xref: /openbmc/u-boot/drivers/mtd/spi/sf_probe.c (revision 93e14596)
1 /*
2  * SPI flash probing
3  *
4  * Copyright (C) 2008 Atmel Corporation
5  * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
6  * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
7  *
8  * Licensed under the GPL-2 or later.
9  */
10 
11 #include <common.h>
12 #include <fdtdec.h>
13 #include <malloc.h>
14 #include <spi.h>
15 #include <spi_flash.h>
16 
17 #include "sf_internal.h"
18 
19 DECLARE_GLOBAL_DATA_PTR;
20 
21 /**
22  * struct spi_flash_params - SPI/QSPI flash device params structure
23  *
24  * @name:		Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
25  * @jedec:		Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
26  * @ext_jedec:		Device ext_jedec ID
27  * @sector_size:	Sector size of this device
28  * @nr_sectors:	No.of sectors on this device
29  * @flags:		Importent param, for flash specific behaviour
30  */
31 struct spi_flash_params {
32 	const char *name;
33 	u32 jedec;
34 	u16 ext_jedec;
35 	u32 sector_size;
36 	u32 nr_sectors;
37 	u16 flags;
38 };
39 
40 static const struct spi_flash_params spi_flash_params_table[] = {
41 #ifdef CONFIG_SPI_FLASH_ATMEL		/* ATMEL */
42 	{"AT45DB011D",	   0x1f2200, 0x0,	64 * 1024,     4,	       SECT_4K},
43 	{"AT45DB021D",	   0x1f2300, 0x0,	64 * 1024,     8,	       SECT_4K},
44 	{"AT45DB041D",	   0x1f2400, 0x0,	64 * 1024,     8,	       SECT_4K},
45 	{"AT45DB081D",	   0x1f2500, 0x0,	64 * 1024,    16,	       SECT_4K},
46 	{"AT45DB161D",	   0x1f2600, 0x0,	64 * 1024,    32,	       SECT_4K},
47 	{"AT45DB321D",	   0x1f2700, 0x0,	64 * 1024,    64,	       SECT_4K},
48 	{"AT45DB641D",	   0x1f2800, 0x0,	64 * 1024,   128,	       SECT_4K},
49 #endif
50 #ifdef CONFIG_SPI_FLASH_EON		/* EON */
51 	{"EN25Q32B",	   0x1c3016, 0x0,	64 * 1024,    64,	             0},
52 	{"EN25Q64",	   0x1c3017, 0x0,	64 * 1024,   128,	       SECT_4K},
53 	{"EN25Q128B",	   0x1c3018, 0x0,       64 * 1024,   256,	             0},
54 	{"EN25S64",	   0x1c3817, 0x0,	64 * 1024,   128,		     0},
55 #endif
56 #ifdef CONFIG_SPI_FLASH_GIGADEVICE	/* GIGADEVICE */
57 	{"GD25Q64B",	   0xc84017, 0x0,	64 * 1024,   128,	       SECT_4K},
58 	{"GD25LQ32",	   0xc86016, 0x0,	64 * 1024,    64,	       SECT_4K},
59 #endif
60 #ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
61 	{"MX25L4005",	   0xc22013, 0x0,	64 * 1024,     8,	             0},
62 	{"MX25L8005",	   0xc22014, 0x0,	64 * 1024,    16,	             0},
63 	{"MX25L1605D",	   0xc22015, 0x0,	64 * 1024,    32,	             0},
64 	{"MX25L3205D",	   0xc22016, 0x0,	64 * 1024,    64,	             0},
65 	{"MX25L6405D",	   0xc22017, 0x0,	64 * 1024,   128,	             0},
66 	{"MX25L12805",	   0xc22018, 0x0,	64 * 1024,   256,	             0},
67 	{"MX25L25635F",	   0xc22019, 0x0,	64 * 1024,   512,	             0},
68 	{"MX25L51235F",	   0xc2201A, 0x0,	64 * 1024,  1024,	             0},
69 	{"MX25L12855E",	   0xc22618, 0x0,	64 * 1024,   256,	             0},
70 #endif
71 #ifdef CONFIG_SPI_FLASH_SPANSION	/* SPANSION */
72 	{"S25FL008A",	   0x010213, 0x0,	64 * 1024,    16,	             0},
73 	{"S25FL016A",	   0x010214, 0x0,	64 * 1024,    32,	             0},
74 	{"S25FL032A",	   0x010215, 0x0,	64 * 1024,    64,	             0},
75 	{"S25FL064A",	   0x010216, 0x0,	64 * 1024,   128,	             0},
76 	{"S25FL128P_256K", 0x012018, 0x0300,   256 * 1024,    64,	             0},
77 	{"S25FL128P_64K",  0x012018, 0x0301,    64 * 1024,   256,	             0},
78 	{"S25FL032P",	   0x010215, 0x4d00,    64 * 1024,    64,	             0},
79 	{"S25FL064P",	   0x010216, 0x4d00,    64 * 1024,   128,	             0},
80 	{"S25FL128S_64K",  0x012018, 0x4d01,    64 * 1024,   256,		     0},
81 	{"S25FL256S_256K", 0x010219, 0x4d00,    64 * 1024,   512,	             0},
82 	{"S25FL256S_64K",  0x010219, 0x4d01,    64 * 1024,   512,	             0},
83 	{"S25FL512S_256K", 0x010220, 0x4d00,    64 * 1024,  1024,	             0},
84 	{"S25FL512S_64K",  0x010220, 0x4d01,    64 * 1024,  1024,	             0},
85 #endif
86 #ifdef CONFIG_SPI_FLASH_STMICRO		/* STMICRO */
87 	{"M25P10",	   0x202011, 0x0,       32 * 1024,     4,	             0},
88 	{"M25P20",	   0x202012, 0x0,       64 * 1024,     4,	             0},
89 	{"M25P40",	   0x202013, 0x0,       64 * 1024,     8,	             0},
90 	{"M25P80",	   0x202014, 0x0,       64 * 1024,    16,	             0},
91 	{"M25P16",	   0x202015, 0x0,       64 * 1024,    32,	             0},
92 	{"M25P32",	   0x202016, 0x0,       64 * 1024,    64,	             0},
93 	{"M25P64",	   0x202017, 0x0,       64 * 1024,   128,	             0},
94 	{"M25P128",	   0x202018, 0x0,      256 * 1024,    64,	             0},
95 	{"N25Q32",	   0x20ba16, 0x0,       64 * 1024,    64,	       SECT_4K},
96 	{"N25Q32A",	   0x20bb16, 0x0,       64 * 1024,    64,	       SECT_4K},
97 	{"N25Q64",	   0x20ba17, 0x0,       64 * 1024,   128,	       SECT_4K},
98 	{"N25Q64A",	   0x20bb17, 0x0,       64 * 1024,   128,	       SECT_4K},
99 	{"N25Q128",	   0x20ba18, 0x0,       64 * 1024,   256,	       SECT_4K},
100 	{"N25Q128A",	   0x20bb18, 0x0,       64 * 1024,   256,	       SECT_4K},
101 	{"N25Q256",	   0x20ba19, 0x0,       64 * 1024,   512,	       SECT_4K},
102 	{"N25Q256A",	   0x20bb19, 0x0,       64 * 1024,   512,	       SECT_4K},
103 	{"N25Q512",	   0x20ba20, 0x0,       64 * 1024,  1024,      E_FSR | SECT_4K},
104 	{"N25Q512A",	   0x20bb20, 0x0,       64 * 1024,  1024,      E_FSR | SECT_4K},
105 	{"N25Q1024",	   0x20ba21, 0x0,       64 * 1024,  2048,      E_FSR | SECT_4K},
106 	{"N25Q1024A",	   0x20bb21, 0x0,       64 * 1024,  2048,      E_FSR | SECT_4K},
107 #endif
108 #ifdef CONFIG_SPI_FLASH_SST		/* SST */
109 	{"SST25VF040B",	   0xbf258d, 0x0,	64 * 1024,     8,     SECT_4K | SST_WP},
110 	{"SST25VF080B",	   0xbf258e, 0x0,	64 * 1024,    16,     SECT_4K | SST_WP},
111 	{"SST25VF016B",	   0xbf2541, 0x0,	64 * 1024,    32,     SECT_4K | SST_WP},
112 	{"SST25VF032B",	   0xbf254a, 0x0,	64 * 1024,    64,     SECT_4K | SST_WP},
113 	{"SST25VF064C",	   0xbf254b, 0x0,	64 * 1024,   128,	       SECT_4K},
114 	{"SST25WF512",	   0xbf2501, 0x0,	64 * 1024,     1,     SECT_4K | SST_WP},
115 	{"SST25WF010",	   0xbf2502, 0x0,	64 * 1024,     2,     SECT_4K | SST_WP},
116 	{"SST25WF020",	   0xbf2503, 0x0,	64 * 1024,     4,     SECT_4K | SST_WP},
117 	{"SST25WF040",	   0xbf2504, 0x0,	64 * 1024,     8,     SECT_4K | SST_WP},
118 	{"SST25WF080",	   0xbf2505, 0x0,	64 * 1024,    16,     SECT_4K | SST_WP},
119 #endif
120 #ifdef CONFIG_SPI_FLASH_WINBOND		/* WINBOND */
121 	{"W25P80",	   0xef2014, 0x0,	64 * 1024,    16,		    0},
122 	{"W25P16",	   0xef2015, 0x0,	64 * 1024,    32,		    0},
123 	{"W25P32",	   0xef2016, 0x0,	64 * 1024,    64,		    0},
124 	{"W25X40",	   0xef3013, 0x0,	64 * 1024,     8,	      SECT_4K},
125 	{"W25X16",	   0xef3015, 0x0,	64 * 1024,    32,	      SECT_4K},
126 	{"W25X32",	   0xef3016, 0x0,	64 * 1024,    64,	      SECT_4K},
127 	{"W25X64",	   0xef3017, 0x0,	64 * 1024,   128,	      SECT_4K},
128 	{"W25Q80BL",	   0xef4014, 0x0,	64 * 1024,    16,	      SECT_4K},
129 	{"W25Q16CL",	   0xef4015, 0x0,	64 * 1024,    32,	      SECT_4K},
130 	{"W25Q32BV",	   0xef4016, 0x0,	64 * 1024,    64,	      SECT_4K},
131 	{"W25Q64CV",	   0xef4017, 0x0,	64 * 1024,   128,	      SECT_4K},
132 	{"W25Q128BV",	   0xef4018, 0x0,	64 * 1024,   256,	      SECT_4K},
133 	{"W25Q256",	   0xef4019, 0x0,	64 * 1024,   512,	      SECT_4K},
134 	{"W25Q80BW",	   0xef5014, 0x0,	64 * 1024,    16,	      SECT_4K},
135 	{"W25Q16DW",	   0xef6015, 0x0,	64 * 1024,    32,	      SECT_4K},
136 	{"W25Q32DW",	   0xef6016, 0x0,	64 * 1024,    64,	      SECT_4K},
137 	{"W25Q64DW",	   0xef6017, 0x0,	64 * 1024,   128,	      SECT_4K},
138 	{"W25Q128FW",	   0xef6018, 0x0,	64 * 1024,   256,	      SECT_4K},
139 #endif
140 	/*
141 	 * Note:
142 	 * Below paired flash devices has similar spi_flash_params params.
143 	 * (S25FL129P_64K, S25FL128S_64K)
144 	 * (W25Q80BL, W25Q80BV)
145 	 * (W25Q16CL, W25Q16DV)
146 	 * (W25Q32BV, W25Q32FV_SPI)
147 	 * (W25Q64CV, W25Q64FV_SPI)
148 	 * (W25Q128BV, W25Q128FV_SPI)
149 	 * (W25Q32DW, W25Q32FV_QPI)
150 	 * (W25Q64DW, W25Q64FV_QPI)
151 	 * (W25Q128FW, W25Q128FV_QPI)
152 	 */
153 };
154 
155 static struct spi_flash *spi_flash_validate_params(struct spi_slave *spi,
156 		u8 *idcode)
157 {
158 	const struct spi_flash_params *params;
159 	struct spi_flash *flash;
160 	int i;
161 	u16 jedec = idcode[1] << 8 | idcode[2];
162 	u16 ext_jedec = idcode[3] << 8 | idcode[4];
163 
164 	/* Get the flash id (jedec = manuf_id + dev_id, ext_jedec) */
165 	for (i = 0; i < ARRAY_SIZE(spi_flash_params_table); i++) {
166 		params = &spi_flash_params_table[i];
167 		if ((params->jedec >> 16) == idcode[0]) {
168 			if ((params->jedec & 0xFFFF) == jedec) {
169 				if (params->ext_jedec == 0)
170 					break;
171 				else if (params->ext_jedec == ext_jedec)
172 					break;
173 			}
174 		}
175 	}
176 
177 	if (i == ARRAY_SIZE(spi_flash_params_table)) {
178 		printf("SF: Unsupported flash IDs: ");
179 		printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
180 		       idcode[0], jedec, ext_jedec);
181 		return NULL;
182 	}
183 
184 	flash = malloc(sizeof(*flash));
185 	if (!flash) {
186 		debug("SF: Failed to allocate spi_flash\n");
187 		return NULL;
188 	}
189 	memset(flash, '\0', sizeof(*flash));
190 
191 	flash->spi = spi;
192 	flash->name = params->name;
193 	flash->memory_map = spi->memory_map;
194 
195 	/* Assign spi_flash ops */
196 	flash->write = spi_flash_cmd_write_ops;
197 #ifdef CONFIG_SPI_FLASH_SST
198 	if (params->flags & SST_WP)
199 		flash->write = sst_write_wp;
200 #endif
201 	flash->erase = spi_flash_cmd_erase_ops;
202 	flash->read = spi_flash_cmd_read_ops;
203 
204 	/* Compute the flash size */
205 	flash->page_size = (ext_jedec == 0x4d00) ? 512 : 256;
206 	flash->sector_size = params->sector_size;
207 	flash->size = flash->sector_size * params->nr_sectors;
208 
209 	/* Compute erase sector and command */
210 	if (params->flags & SECT_4K) {
211 		flash->erase_cmd = CMD_ERASE_4K;
212 		flash->erase_size = 4096;
213 	} else if (params->flags & SECT_32K) {
214 		flash->erase_cmd = CMD_ERASE_32K;
215 		flash->erase_size = 32768;
216 	} else {
217 		flash->erase_cmd = CMD_ERASE_64K;
218 		flash->erase_size = flash->sector_size;
219 	}
220 
221 	/* Poll cmd seclection */
222 	flash->poll_cmd = CMD_READ_STATUS;
223 #ifdef CONFIG_SPI_FLASH_STMICRO
224 	if (params->flags & E_FSR)
225 		flash->poll_cmd = CMD_FLAG_STATUS;
226 #endif
227 
228 	/* Configure the BAR - discover bank cmds and read current bank */
229 #ifdef CONFIG_SPI_FLASH_BAR
230 	u8 curr_bank = 0;
231 	if (flash->size > SPI_FLASH_16MB_BOUN) {
232 		flash->bank_read_cmd = (idcode[0] == 0x01) ?
233 					CMD_BANKADDR_BRRD : CMD_EXTNADDR_RDEAR;
234 		flash->bank_write_cmd = (idcode[0] == 0x01) ?
235 					CMD_BANKADDR_BRWR : CMD_EXTNADDR_WREAR;
236 
237 		if (spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
238 					  &curr_bank, 1)) {
239 			debug("SF: fail to read bank addr register\n");
240 			return NULL;
241 		}
242 		flash->bank_curr = curr_bank;
243 	} else {
244 		flash->bank_curr = curr_bank;
245 	}
246 #endif
247 
248 	/* Flash powers up read-only, so clear BP# bits */
249 #if defined(CONFIG_SPI_FLASH_ATMEL) || \
250 	defined(CONFIG_SPI_FLASH_MACRONIX) || \
251 	defined(CONFIG_SPI_FLASH_SST)
252 		spi_flash_cmd_write_status(flash, 0);
253 #endif
254 
255 	return flash;
256 }
257 
258 #ifdef CONFIG_OF_CONTROL
259 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
260 {
261 	fdt_addr_t addr;
262 	fdt_size_t size;
263 	int node;
264 
265 	/* If there is no node, do nothing */
266 	node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
267 	if (node < 0)
268 		return 0;
269 
270 	addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
271 	if (addr == FDT_ADDR_T_NONE) {
272 		debug("%s: Cannot decode address\n", __func__);
273 		return 0;
274 	}
275 
276 	if (flash->size != size) {
277 		debug("%s: Memory map must cover entire device\n", __func__);
278 		return -1;
279 	}
280 	flash->memory_map = (void *)addr;
281 
282 	return 0;
283 }
284 #endif /* CONFIG_OF_CONTROL */
285 
286 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
287 		unsigned int max_hz, unsigned int spi_mode)
288 {
289 	struct spi_slave *spi;
290 	struct spi_flash *flash = NULL;
291 	u8 idcode[5];
292 	int ret;
293 
294 	/* Setup spi_slave */
295 	spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
296 	if (!spi) {
297 		printf("SF: Failed to set up slave\n");
298 		return NULL;
299 	}
300 
301 	/* Claim spi bus */
302 	ret = spi_claim_bus(spi);
303 	if (ret) {
304 		debug("SF: Failed to claim SPI bus: %d\n", ret);
305 		goto err_claim_bus;
306 	}
307 
308 	/* Read the ID codes */
309 	ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
310 	if (ret) {
311 		printf("SF: Failed to get idcodes\n");
312 		goto err_read_id;
313 	}
314 
315 #ifdef DEBUG
316 	printf("SF: Got idcodes\n");
317 	print_buffer(0, idcode, 1, sizeof(idcode), 0);
318 #endif
319 
320 	/* Validate params from spi_flash_params table */
321 	flash = spi_flash_validate_params(spi, idcode);
322 	if (!flash)
323 		goto err_read_id;
324 
325 #ifdef CONFIG_OF_CONTROL
326 	if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
327 		debug("SF: FDT decode error\n");
328 		goto err_read_id;
329 	}
330 #endif
331 #ifndef CONFIG_SPL_BUILD
332 	printf("SF: Detected %s with page size ", flash->name);
333 	print_size(flash->page_size, ", erase size ");
334 	print_size(flash->erase_size, ", total ");
335 	print_size(flash->size, "");
336 	if (flash->memory_map)
337 		printf(", mapped at %p", flash->memory_map);
338 	puts("\n");
339 #endif
340 #ifndef CONFIG_SPI_FLASH_BAR
341 	if (flash->size > SPI_FLASH_16MB_BOUN) {
342 		puts("SF: Warning - Only lower 16MiB accessible,");
343 		puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
344 	}
345 #endif
346 
347 	/* Release spi bus */
348 	spi_release_bus(spi);
349 
350 	return flash;
351 
352 err_read_id:
353 	spi_release_bus(spi);
354 err_claim_bus:
355 	spi_free_slave(spi);
356 	return NULL;
357 }
358 
359 void spi_flash_free(struct spi_flash *flash)
360 {
361 	spi_free_slave(flash->spi);
362 	free(flash);
363 }
364