1 /* 2 * SPI flash probing 3 * 4 * Copyright (C) 2008 Atmel Corporation 5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik 6 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #include <common.h> 12 #include <dm.h> 13 #include <errno.h> 14 #include <fdtdec.h> 15 #include <malloc.h> 16 #include <mapmem.h> 17 #include <spi.h> 18 #include <spi_flash.h> 19 #include <asm/io.h> 20 21 #include "sf_internal.h" 22 23 DECLARE_GLOBAL_DATA_PTR; 24 25 /* Read commands array */ 26 static u8 spi_read_cmds_array[] = { 27 CMD_READ_ARRAY_SLOW, 28 CMD_READ_ARRAY_FAST, 29 CMD_READ_DUAL_OUTPUT_FAST, 30 CMD_READ_DUAL_IO_FAST, 31 CMD_READ_QUAD_OUTPUT_FAST, 32 CMD_READ_QUAD_IO_FAST, 33 }; 34 35 #ifdef CONFIG_SPI_FLASH_MACRONIX 36 static int spi_flash_set_qeb_mxic(struct spi_flash *flash) 37 { 38 u8 qeb_status; 39 int ret; 40 41 ret = spi_flash_cmd_read_status(flash, &qeb_status); 42 if (ret < 0) 43 return ret; 44 45 if (qeb_status & STATUS_QEB_MXIC) { 46 debug("SF: mxic: QEB is already set\n"); 47 } else { 48 ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC); 49 if (ret < 0) 50 return ret; 51 } 52 53 return ret; 54 } 55 #endif 56 57 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) 58 static int spi_flash_set_qeb_winspan(struct spi_flash *flash) 59 { 60 u8 qeb_status; 61 int ret; 62 63 ret = spi_flash_cmd_read_config(flash, &qeb_status); 64 if (ret < 0) 65 return ret; 66 67 if (qeb_status & STATUS_QEB_WINSPAN) { 68 debug("SF: winspan: QEB is already set\n"); 69 } else { 70 ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN); 71 if (ret < 0) 72 return ret; 73 } 74 75 return ret; 76 } 77 #endif 78 79 static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0) 80 { 81 switch (idcode0) { 82 #ifdef CONFIG_SPI_FLASH_MACRONIX 83 case SPI_FLASH_CFI_MFR_MACRONIX: 84 return spi_flash_set_qeb_mxic(flash); 85 #endif 86 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) 87 case SPI_FLASH_CFI_MFR_SPANSION: 88 case SPI_FLASH_CFI_MFR_WINBOND: 89 return spi_flash_set_qeb_winspan(flash); 90 #endif 91 #ifdef CONFIG_SPI_FLASH_STMICRO 92 case SPI_FLASH_CFI_MFR_STMICRO: 93 debug("SF: QEB is volatile for %02x flash\n", idcode0); 94 return 0; 95 #endif 96 default: 97 printf("SF: Need set QEB func for %02x flash\n", idcode0); 98 return -1; 99 } 100 } 101 102 #ifdef CONFIG_SPI_FLASH_BAR 103 static int spi_flash_read_bank(struct spi_flash *flash, u8 idcode0) 104 { 105 u8 curr_bank = 0; 106 int ret; 107 108 if (flash->size <= SPI_FLASH_16MB_BOUN) 109 goto bank_end; 110 111 switch (idcode0) { 112 case SPI_FLASH_CFI_MFR_SPANSION: 113 flash->bank_read_cmd = CMD_BANKADDR_BRRD; 114 flash->bank_write_cmd = CMD_BANKADDR_BRWR; 115 default: 116 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR; 117 flash->bank_write_cmd = CMD_EXTNADDR_WREAR; 118 } 119 120 ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1, 121 &curr_bank, 1); 122 if (ret) { 123 debug("SF: fail to read bank addr register\n"); 124 return ret; 125 } 126 127 bank_end: 128 flash->bank_curr = curr_bank; 129 return 0; 130 } 131 #endif 132 133 static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode, 134 struct spi_flash *flash) 135 { 136 const struct spi_flash_params *params; 137 u8 cmd; 138 u16 jedec = idcode[1] << 8 | idcode[2]; 139 u16 ext_jedec = idcode[3] << 8 | idcode[4]; 140 141 /* Validate params from spi_flash_params table */ 142 params = spi_flash_params_table; 143 for (; params->name != NULL; params++) { 144 if ((params->jedec >> 16) == idcode[0]) { 145 if ((params->jedec & 0xFFFF) == jedec) { 146 if (params->ext_jedec == 0) 147 break; 148 else if (params->ext_jedec == ext_jedec) 149 break; 150 } 151 } 152 } 153 154 if (!params->name) { 155 printf("SF: Unsupported flash IDs: "); 156 printf("manuf %02x, jedec %04x, ext_jedec %04x\n", 157 idcode[0], jedec, ext_jedec); 158 return -EPROTONOSUPPORT; 159 } 160 161 /* Assign spi data */ 162 flash->spi = spi; 163 flash->name = params->name; 164 flash->memory_map = spi->memory_map; 165 flash->dual_flash = flash->spi->option; 166 167 /* Assign spi_flash ops */ 168 #ifndef CONFIG_DM_SPI_FLASH 169 flash->write = spi_flash_cmd_write_ops; 170 #if defined(CONFIG_SPI_FLASH_SST) 171 if (params->flags & SST_WR) 172 flash->flags |= SNOR_F_SST_WR; 173 174 if (params->flags & SNOR_F_SST_WR) { 175 if (flash->spi->op_mode_tx & SPI_OPM_TX_BP) 176 flash->write = sst_write_bp; 177 else 178 flash->write = sst_write_wp; 179 } 180 #endif 181 flash->erase = spi_flash_cmd_erase_ops; 182 flash->read = spi_flash_cmd_read_ops; 183 #endif 184 185 /* Compute the flash size */ 186 flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0; 187 /* 188 * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the 189 * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with 190 * the 0x4d00 Extended JEDEC code have 512b pages. All of the others 191 * have 256b pages. 192 */ 193 if (ext_jedec == 0x4d00) { 194 if ((jedec == 0x0215) || (jedec == 0x216)) 195 flash->page_size = 256; 196 else 197 flash->page_size = 512; 198 } else { 199 flash->page_size = 256; 200 } 201 flash->page_size <<= flash->shift; 202 flash->sector_size = params->sector_size << flash->shift; 203 flash->size = flash->sector_size * params->nr_sectors << flash->shift; 204 #ifdef CONFIG_SF_DUAL_FLASH 205 if (flash->dual_flash & SF_DUAL_STACKED_FLASH) 206 flash->size <<= 1; 207 #endif 208 209 /* Compute erase sector and command */ 210 if (params->flags & SECT_4K) { 211 flash->erase_cmd = CMD_ERASE_4K; 212 flash->erase_size = 4096 << flash->shift; 213 } else if (params->flags & SECT_32K) { 214 flash->erase_cmd = CMD_ERASE_32K; 215 flash->erase_size = 32768 << flash->shift; 216 } else { 217 flash->erase_cmd = CMD_ERASE_64K; 218 flash->erase_size = flash->sector_size; 219 } 220 221 /* Now erase size becomes valid sector size */ 222 flash->sector_size = flash->erase_size; 223 224 /* Look for the fastest read cmd */ 225 cmd = fls(params->e_rd_cmd & flash->spi->op_mode_rx); 226 if (cmd) { 227 cmd = spi_read_cmds_array[cmd - 1]; 228 flash->read_cmd = cmd; 229 } else { 230 /* Go for default supported read cmd */ 231 flash->read_cmd = CMD_READ_ARRAY_FAST; 232 } 233 234 /* Not require to look for fastest only two write cmds yet */ 235 if (params->flags & WR_QPP && flash->spi->op_mode_tx & SPI_OPM_TX_QPP) 236 flash->write_cmd = CMD_QUAD_PAGE_PROGRAM; 237 else 238 /* Go for default supported write cmd */ 239 flash->write_cmd = CMD_PAGE_PROGRAM; 240 241 /* Read dummy_byte: dummy byte is determined based on the 242 * dummy cycles of a particular command. 243 * Fast commands - dummy_byte = dummy_cycles/8 244 * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8 245 * For I/O commands except cmd[0] everything goes on no.of lines 246 * based on particular command but incase of fast commands except 247 * data all go on single line irrespective of command. 248 */ 249 switch (flash->read_cmd) { 250 case CMD_READ_QUAD_IO_FAST: 251 flash->dummy_byte = 2; 252 break; 253 case CMD_READ_ARRAY_SLOW: 254 flash->dummy_byte = 0; 255 break; 256 default: 257 flash->dummy_byte = 1; 258 } 259 260 #ifdef CONFIG_SPI_FLASH_STMICRO 261 if (params->flags & E_FSR) 262 flash->flags |= SNOR_F_USE_FSR; 263 #endif 264 265 /* Configure the BAR - discover bank cmds and read current bank */ 266 #ifdef CONFIG_SPI_FLASH_BAR 267 int ret = spi_flash_read_bank(flash, idcode[0]); 268 if (ret < 0) 269 return ret; 270 #endif 271 272 /* Flash powers up read-only, so clear BP# bits */ 273 #if defined(CONFIG_SPI_FLASH_ATMEL) || \ 274 defined(CONFIG_SPI_FLASH_MACRONIX) || \ 275 defined(CONFIG_SPI_FLASH_SST) 276 spi_flash_cmd_write_status(flash, 0); 277 #endif 278 279 return 0; 280 } 281 282 #if CONFIG_IS_ENABLED(OF_CONTROL) 283 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) 284 { 285 fdt_addr_t addr; 286 fdt_size_t size; 287 int node; 288 289 /* If there is no node, do nothing */ 290 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH); 291 if (node < 0) 292 return 0; 293 294 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size); 295 if (addr == FDT_ADDR_T_NONE) { 296 debug("%s: Cannot decode address\n", __func__); 297 return 0; 298 } 299 300 if (flash->size != size) { 301 debug("%s: Memory map must cover entire device\n", __func__); 302 return -1; 303 } 304 flash->memory_map = map_sysmem(addr, size); 305 306 return 0; 307 } 308 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */ 309 310 /** 311 * spi_flash_probe_slave() - Probe for a SPI flash device on a bus 312 * 313 * @spi: Bus to probe 314 * @flashp: Pointer to place to put flash info, which may be NULL if the 315 * space should be allocated 316 */ 317 int spi_flash_probe_slave(struct spi_slave *spi, struct spi_flash *flash) 318 { 319 u8 idcode[5]; 320 int ret; 321 322 /* Setup spi_slave */ 323 if (!spi) { 324 printf("SF: Failed to set up slave\n"); 325 return -ENODEV; 326 } 327 328 /* Claim spi bus */ 329 ret = spi_claim_bus(spi); 330 if (ret) { 331 debug("SF: Failed to claim SPI bus: %d\n", ret); 332 return ret; 333 } 334 335 /* Read the ID codes */ 336 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); 337 if (ret) { 338 printf("SF: Failed to get idcodes\n"); 339 goto err_read_id; 340 } 341 342 #ifdef DEBUG 343 printf("SF: Got idcodes\n"); 344 print_buffer(0, idcode, 1, sizeof(idcode), 0); 345 #endif 346 347 if (spi_flash_validate_params(spi, idcode, flash)) { 348 ret = -EINVAL; 349 goto err_read_id; 350 } 351 352 /* Set the quad enable bit - only for quad commands */ 353 if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) || 354 (flash->read_cmd == CMD_READ_QUAD_IO_FAST) || 355 (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) { 356 if (spi_flash_set_qeb(flash, idcode[0])) { 357 debug("SF: Fail to set QEB for %02x\n", idcode[0]); 358 ret = -EINVAL; 359 goto err_read_id; 360 } 361 } 362 363 #if CONFIG_IS_ENABLED(OF_CONTROL) 364 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) { 365 debug("SF: FDT decode error\n"); 366 ret = -EINVAL; 367 goto err_read_id; 368 } 369 #endif 370 #ifndef CONFIG_SPL_BUILD 371 printf("SF: Detected %s with page size ", flash->name); 372 print_size(flash->page_size, ", erase size "); 373 print_size(flash->erase_size, ", total "); 374 print_size(flash->size, ""); 375 if (flash->memory_map) 376 printf(", mapped at %p", flash->memory_map); 377 puts("\n"); 378 #endif 379 #ifndef CONFIG_SPI_FLASH_BAR 380 if (((flash->dual_flash == SF_SINGLE_FLASH) && 381 (flash->size > SPI_FLASH_16MB_BOUN)) || 382 ((flash->dual_flash > SF_SINGLE_FLASH) && 383 (flash->size > SPI_FLASH_16MB_BOUN << 1))) { 384 puts("SF: Warning - Only lower 16MiB accessible,"); 385 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n"); 386 } 387 #endif 388 #ifdef CONFIG_SPI_FLASH_MTD 389 ret = spi_flash_mtd_register(flash); 390 #endif 391 392 err_read_id: 393 spi_release_bus(spi); 394 return ret; 395 } 396 397 #ifndef CONFIG_DM_SPI_FLASH 398 struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus) 399 { 400 struct spi_flash *flash; 401 402 /* Allocate space if needed (not used by sf-uclass */ 403 flash = calloc(1, sizeof(*flash)); 404 if (!flash) { 405 debug("SF: Failed to allocate spi_flash\n"); 406 return NULL; 407 } 408 409 if (spi_flash_probe_slave(bus, flash)) { 410 spi_free_slave(bus); 411 free(flash); 412 return NULL; 413 } 414 415 return flash; 416 } 417 418 struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs, 419 unsigned int max_hz, unsigned int spi_mode) 420 { 421 struct spi_slave *bus; 422 423 bus = spi_setup_slave(busnum, cs, max_hz, spi_mode); 424 if (!bus) 425 return NULL; 426 return spi_flash_probe_tail(bus); 427 } 428 429 #ifdef CONFIG_OF_SPI_FLASH 430 struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node, 431 int spi_node) 432 { 433 struct spi_slave *bus; 434 435 bus = spi_setup_slave_fdt(blob, slave_node, spi_node); 436 if (!bus) 437 return NULL; 438 return spi_flash_probe_tail(bus); 439 } 440 #endif 441 442 void spi_flash_free(struct spi_flash *flash) 443 { 444 #ifdef CONFIG_SPI_FLASH_MTD 445 spi_flash_mtd_unregister(); 446 #endif 447 spi_free_slave(flash->spi); 448 free(flash); 449 } 450 451 #else /* defined CONFIG_DM_SPI_FLASH */ 452 453 static int spi_flash_std_read(struct udevice *dev, u32 offset, size_t len, 454 void *buf) 455 { 456 struct spi_flash *flash = dev_get_uclass_priv(dev); 457 458 return spi_flash_cmd_read_ops(flash, offset, len, buf); 459 } 460 461 int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len, 462 const void *buf) 463 { 464 struct spi_flash *flash = dev_get_uclass_priv(dev); 465 466 #if defined(CONFIG_SPI_FLASH_SST) 467 if (flash->flags & SNOR_F_SST_WR) { 468 if (flash->spi->op_mode_tx & SPI_OPM_TX_BP) 469 return sst_write_bp(flash, offset, len, buf); 470 else 471 return sst_write_wp(flash, offset, len, buf); 472 } 473 #endif 474 475 return spi_flash_cmd_write_ops(flash, offset, len, buf); 476 } 477 478 int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len) 479 { 480 struct spi_flash *flash = dev_get_uclass_priv(dev); 481 482 return spi_flash_cmd_erase_ops(flash, offset, len); 483 } 484 485 int spi_flash_std_probe(struct udevice *dev) 486 { 487 struct spi_slave *slave = dev_get_parent_priv(dev); 488 struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev); 489 struct spi_flash *flash; 490 491 flash = dev_get_uclass_priv(dev); 492 flash->dev = dev; 493 debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs); 494 return spi_flash_probe_slave(slave, flash); 495 } 496 497 static const struct dm_spi_flash_ops spi_flash_std_ops = { 498 .read = spi_flash_std_read, 499 .write = spi_flash_std_write, 500 .erase = spi_flash_std_erase, 501 }; 502 503 static const struct udevice_id spi_flash_std_ids[] = { 504 { .compatible = "spi-flash" }, 505 { } 506 }; 507 508 U_BOOT_DRIVER(spi_flash_std) = { 509 .name = "spi_flash_std", 510 .id = UCLASS_SPI_FLASH, 511 .of_match = spi_flash_std_ids, 512 .probe = spi_flash_std_probe, 513 .priv_auto_alloc_size = sizeof(struct spi_flash), 514 .ops = &spi_flash_std_ops, 515 }; 516 517 #endif /* CONFIG_DM_SPI_FLASH */ 518