1 /* 2 * SPI flash probing 3 * 4 * Copyright (C) 2008 Atmel Corporation 5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik 6 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #include <common.h> 12 #include <dm.h> 13 #include <errno.h> 14 #include <fdtdec.h> 15 #include <malloc.h> 16 #include <mapmem.h> 17 #include <spi.h> 18 #include <spi_flash.h> 19 #include <asm/io.h> 20 21 #include "sf_internal.h" 22 23 DECLARE_GLOBAL_DATA_PTR; 24 25 /* Read commands array */ 26 static u8 spi_read_cmds_array[] = { 27 CMD_READ_ARRAY_SLOW, 28 CMD_READ_ARRAY_FAST, 29 CMD_READ_DUAL_OUTPUT_FAST, 30 CMD_READ_DUAL_IO_FAST, 31 CMD_READ_QUAD_OUTPUT_FAST, 32 CMD_READ_QUAD_IO_FAST, 33 }; 34 35 #ifdef CONFIG_SPI_FLASH_MACRONIX 36 static int spi_flash_set_qeb_mxic(struct spi_flash *flash) 37 { 38 u8 qeb_status; 39 int ret; 40 41 ret = spi_flash_cmd_read_status(flash, &qeb_status); 42 if (ret < 0) 43 return ret; 44 45 if (qeb_status & STATUS_QEB_MXIC) { 46 debug("SF: mxic: QEB is already set\n"); 47 } else { 48 ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC); 49 if (ret < 0) 50 return ret; 51 } 52 53 return ret; 54 } 55 #endif 56 57 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) 58 static int spi_flash_set_qeb_winspan(struct spi_flash *flash) 59 { 60 u8 qeb_status; 61 int ret; 62 63 ret = spi_flash_cmd_read_config(flash, &qeb_status); 64 if (ret < 0) 65 return ret; 66 67 if (qeb_status & STATUS_QEB_WINSPAN) { 68 debug("SF: winspan: QEB is already set\n"); 69 } else { 70 ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN); 71 if (ret < 0) 72 return ret; 73 } 74 75 return ret; 76 } 77 #endif 78 79 static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0) 80 { 81 switch (idcode0) { 82 #ifdef CONFIG_SPI_FLASH_MACRONIX 83 case SPI_FLASH_CFI_MFR_MACRONIX: 84 return spi_flash_set_qeb_mxic(flash); 85 #endif 86 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) 87 case SPI_FLASH_CFI_MFR_SPANSION: 88 case SPI_FLASH_CFI_MFR_WINBOND: 89 return spi_flash_set_qeb_winspan(flash); 90 #endif 91 #ifdef CONFIG_SPI_FLASH_STMICRO 92 case SPI_FLASH_CFI_MFR_STMICRO: 93 debug("SF: QEB is volatile for %02x flash\n", idcode0); 94 return 0; 95 #endif 96 default: 97 printf("SF: Need set QEB func for %02x flash\n", idcode0); 98 return -1; 99 } 100 } 101 102 static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode, 103 struct spi_flash *flash) 104 { 105 const struct spi_flash_params *params; 106 u8 cmd; 107 u16 jedec = idcode[1] << 8 | idcode[2]; 108 u16 ext_jedec = idcode[3] << 8 | idcode[4]; 109 110 /* Validate params from spi_flash_params table */ 111 params = spi_flash_params_table; 112 for (; params->name != NULL; params++) { 113 if ((params->jedec >> 16) == idcode[0]) { 114 if ((params->jedec & 0xFFFF) == jedec) { 115 if (params->ext_jedec == 0) 116 break; 117 else if (params->ext_jedec == ext_jedec) 118 break; 119 } 120 } 121 } 122 123 if (!params->name) { 124 printf("SF: Unsupported flash IDs: "); 125 printf("manuf %02x, jedec %04x, ext_jedec %04x\n", 126 idcode[0], jedec, ext_jedec); 127 return -EPROTONOSUPPORT; 128 } 129 130 /* Assign spi data */ 131 flash->spi = spi; 132 flash->name = params->name; 133 flash->memory_map = spi->memory_map; 134 flash->dual_flash = flash->spi->option; 135 #ifdef CONFIG_DM_SPI_FLASH 136 flash->flags = params->flags; 137 #endif 138 139 /* Assign spi_flash ops */ 140 #ifndef CONFIG_DM_SPI_FLASH 141 flash->write = spi_flash_cmd_write_ops; 142 #if defined(CONFIG_SPI_FLASH_SST) 143 if (params->flags & SST_WR) { 144 if (flash->spi->op_mode_tx & SPI_OPM_TX_BP) 145 flash->write = sst_write_bp; 146 else 147 flash->write = sst_write_wp; 148 } 149 #endif 150 flash->erase = spi_flash_cmd_erase_ops; 151 flash->read = spi_flash_cmd_read_ops; 152 #endif 153 154 /* Compute the flash size */ 155 flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0; 156 /* 157 * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the 158 * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with 159 * the 0x4d00 Extended JEDEC code have 512b pages. All of the others 160 * have 256b pages. 161 */ 162 if (ext_jedec == 0x4d00) { 163 if ((jedec == 0x0215) || (jedec == 0x216)) 164 flash->page_size = 256; 165 else 166 flash->page_size = 512; 167 } else { 168 flash->page_size = 256; 169 } 170 flash->page_size <<= flash->shift; 171 flash->sector_size = params->sector_size << flash->shift; 172 flash->size = flash->sector_size * params->nr_sectors << flash->shift; 173 #ifdef CONFIG_SF_DUAL_FLASH 174 if (flash->dual_flash & SF_DUAL_STACKED_FLASH) 175 flash->size <<= 1; 176 #endif 177 178 /* Compute erase sector and command */ 179 if (params->flags & SECT_4K) { 180 flash->erase_cmd = CMD_ERASE_4K; 181 flash->erase_size = 4096 << flash->shift; 182 } else if (params->flags & SECT_32K) { 183 flash->erase_cmd = CMD_ERASE_32K; 184 flash->erase_size = 32768 << flash->shift; 185 } else { 186 flash->erase_cmd = CMD_ERASE_64K; 187 flash->erase_size = flash->sector_size; 188 } 189 190 /* Now erase size becomes valid sector size */ 191 flash->sector_size = flash->erase_size; 192 193 /* Look for the fastest read cmd */ 194 cmd = fls(params->e_rd_cmd & flash->spi->op_mode_rx); 195 if (cmd) { 196 cmd = spi_read_cmds_array[cmd - 1]; 197 flash->read_cmd = cmd; 198 } else { 199 /* Go for default supported read cmd */ 200 flash->read_cmd = CMD_READ_ARRAY_FAST; 201 } 202 203 /* Not require to look for fastest only two write cmds yet */ 204 if (params->flags & WR_QPP && flash->spi->op_mode_tx & SPI_OPM_TX_QPP) 205 flash->write_cmd = CMD_QUAD_PAGE_PROGRAM; 206 else 207 /* Go for default supported write cmd */ 208 flash->write_cmd = CMD_PAGE_PROGRAM; 209 210 /* Read dummy_byte: dummy byte is determined based on the 211 * dummy cycles of a particular command. 212 * Fast commands - dummy_byte = dummy_cycles/8 213 * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8 214 * For I/O commands except cmd[0] everything goes on no.of lines 215 * based on particular command but incase of fast commands except 216 * data all go on single line irrespective of command. 217 */ 218 switch (flash->read_cmd) { 219 case CMD_READ_QUAD_IO_FAST: 220 flash->dummy_byte = 2; 221 break; 222 case CMD_READ_ARRAY_SLOW: 223 flash->dummy_byte = 0; 224 break; 225 default: 226 flash->dummy_byte = 1; 227 } 228 229 /* Poll cmd selection */ 230 flash->poll_cmd = CMD_READ_STATUS; 231 #ifdef CONFIG_SPI_FLASH_STMICRO 232 if (params->flags & E_FSR) 233 flash->poll_cmd = CMD_FLAG_STATUS; 234 #endif 235 236 /* Configure the BAR - discover bank cmds and read current bank */ 237 #ifdef CONFIG_SPI_FLASH_BAR 238 u8 curr_bank = 0; 239 if (flash->size > SPI_FLASH_16MB_BOUN) { 240 int ret; 241 242 flash->bank_read_cmd = (idcode[0] == 0x01) ? 243 CMD_BANKADDR_BRRD : CMD_EXTNADDR_RDEAR; 244 flash->bank_write_cmd = (idcode[0] == 0x01) ? 245 CMD_BANKADDR_BRWR : CMD_EXTNADDR_WREAR; 246 247 ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1, 248 &curr_bank, 1); 249 if (ret) { 250 debug("SF: fail to read bank addr register\n"); 251 return ret; 252 } 253 flash->bank_curr = curr_bank; 254 } else { 255 flash->bank_curr = curr_bank; 256 } 257 #endif 258 259 /* Flash powers up read-only, so clear BP# bits */ 260 #if defined(CONFIG_SPI_FLASH_ATMEL) || \ 261 defined(CONFIG_SPI_FLASH_MACRONIX) || \ 262 defined(CONFIG_SPI_FLASH_SST) 263 spi_flash_cmd_write_status(flash, 0); 264 #endif 265 266 return 0; 267 } 268 269 #ifdef CONFIG_OF_CONTROL 270 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) 271 { 272 fdt_addr_t addr; 273 fdt_size_t size; 274 int node; 275 276 /* If there is no node, do nothing */ 277 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH); 278 if (node < 0) 279 return 0; 280 281 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size); 282 if (addr == FDT_ADDR_T_NONE) { 283 debug("%s: Cannot decode address\n", __func__); 284 return 0; 285 } 286 287 if (flash->size != size) { 288 debug("%s: Memory map must cover entire device\n", __func__); 289 return -1; 290 } 291 flash->memory_map = map_sysmem(addr, size); 292 293 return 0; 294 } 295 #endif /* CONFIG_OF_CONTROL */ 296 297 /** 298 * spi_flash_probe_slave() - Probe for a SPI flash device on a bus 299 * 300 * @spi: Bus to probe 301 * @flashp: Pointer to place to put flash info, which may be NULL if the 302 * space should be allocated 303 */ 304 int spi_flash_probe_slave(struct spi_slave *spi, struct spi_flash *flash) 305 { 306 u8 idcode[5]; 307 int ret; 308 309 /* Setup spi_slave */ 310 if (!spi) { 311 printf("SF: Failed to set up slave\n"); 312 return -ENODEV; 313 } 314 315 /* Claim spi bus */ 316 ret = spi_claim_bus(spi); 317 if (ret) { 318 debug("SF: Failed to claim SPI bus: %d\n", ret); 319 return ret; 320 } 321 322 /* Read the ID codes */ 323 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); 324 if (ret) { 325 printf("SF: Failed to get idcodes\n"); 326 goto err_read_id; 327 } 328 329 #ifdef DEBUG 330 printf("SF: Got idcodes\n"); 331 print_buffer(0, idcode, 1, sizeof(idcode), 0); 332 #endif 333 334 if (spi_flash_validate_params(spi, idcode, flash)) { 335 ret = -EINVAL; 336 goto err_read_id; 337 } 338 339 /* Set the quad enable bit - only for quad commands */ 340 if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) || 341 (flash->read_cmd == CMD_READ_QUAD_IO_FAST) || 342 (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) { 343 if (spi_flash_set_qeb(flash, idcode[0])) { 344 debug("SF: Fail to set QEB for %02x\n", idcode[0]); 345 ret = -EINVAL; 346 goto err_read_id; 347 } 348 } 349 350 #ifdef CONFIG_OF_CONTROL 351 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) { 352 debug("SF: FDT decode error\n"); 353 ret = -EINVAL; 354 goto err_read_id; 355 } 356 #endif 357 #ifndef CONFIG_SPL_BUILD 358 printf("SF: Detected %s with page size ", flash->name); 359 print_size(flash->page_size, ", erase size "); 360 print_size(flash->erase_size, ", total "); 361 print_size(flash->size, ""); 362 if (flash->memory_map) 363 printf(", mapped at %p", flash->memory_map); 364 puts("\n"); 365 #endif 366 #ifndef CONFIG_SPI_FLASH_BAR 367 if (((flash->dual_flash == SF_SINGLE_FLASH) && 368 (flash->size > SPI_FLASH_16MB_BOUN)) || 369 ((flash->dual_flash > SF_SINGLE_FLASH) && 370 (flash->size > SPI_FLASH_16MB_BOUN << 1))) { 371 puts("SF: Warning - Only lower 16MiB accessible,"); 372 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n"); 373 } 374 #endif 375 376 /* Release spi bus */ 377 spi_release_bus(spi); 378 379 return 0; 380 381 err_read_id: 382 spi_release_bus(spi); 383 return ret; 384 } 385 386 #ifndef CONFIG_DM_SPI_FLASH 387 struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus) 388 { 389 struct spi_flash *flash; 390 391 /* Allocate space if needed (not used by sf-uclass */ 392 flash = calloc(1, sizeof(*flash)); 393 if (!flash) { 394 debug("SF: Failed to allocate spi_flash\n"); 395 return NULL; 396 } 397 398 if (spi_flash_probe_slave(bus, flash)) { 399 spi_free_slave(bus); 400 free(flash); 401 return NULL; 402 } 403 404 return flash; 405 } 406 407 struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs, 408 unsigned int max_hz, unsigned int spi_mode) 409 { 410 struct spi_slave *bus; 411 412 bus = spi_setup_slave(busnum, cs, max_hz, spi_mode); 413 if (!bus) 414 return NULL; 415 return spi_flash_probe_tail(bus); 416 } 417 418 #ifdef CONFIG_OF_SPI_FLASH 419 struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node, 420 int spi_node) 421 { 422 struct spi_slave *bus; 423 424 bus = spi_setup_slave_fdt(blob, slave_node, spi_node); 425 if (!bus) 426 return NULL; 427 return spi_flash_probe_tail(bus); 428 } 429 #endif 430 431 void spi_flash_free(struct spi_flash *flash) 432 { 433 spi_free_slave(flash->spi); 434 free(flash); 435 } 436 437 #else /* defined CONFIG_DM_SPI_FLASH */ 438 439 static int spi_flash_std_read(struct udevice *dev, u32 offset, size_t len, 440 void *buf) 441 { 442 struct spi_flash *flash = dev_get_uclass_priv(dev); 443 444 return spi_flash_cmd_read_ops(flash, offset, len, buf); 445 } 446 447 int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len, 448 const void *buf) 449 { 450 struct spi_flash *flash = dev_get_uclass_priv(dev); 451 452 #if defined(CONFIG_SPI_FLASH_SST) 453 if (flash->flags & SST_WR) { 454 if (flash->spi->op_mode_tx & SPI_OPM_TX_BP) 455 return sst_write_bp(flash, offset, len, buf); 456 else 457 return sst_write_wp(flash, offset, len, buf); 458 } 459 #endif 460 461 return spi_flash_cmd_write_ops(flash, offset, len, buf); 462 } 463 464 int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len) 465 { 466 struct spi_flash *flash = dev_get_uclass_priv(dev); 467 468 return spi_flash_cmd_erase_ops(flash, offset, len); 469 } 470 471 int spi_flash_std_probe(struct udevice *dev) 472 { 473 struct spi_slave *slave = dev_get_parentdata(dev); 474 struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev); 475 struct spi_flash *flash; 476 477 flash = dev_get_uclass_priv(dev); 478 flash->dev = dev; 479 debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs); 480 return spi_flash_probe_slave(slave, flash); 481 } 482 483 static const struct dm_spi_flash_ops spi_flash_std_ops = { 484 .read = spi_flash_std_read, 485 .write = spi_flash_std_write, 486 .erase = spi_flash_std_erase, 487 }; 488 489 static const struct udevice_id spi_flash_std_ids[] = { 490 { .compatible = "spi-flash" }, 491 { } 492 }; 493 494 U_BOOT_DRIVER(spi_flash_std) = { 495 .name = "spi_flash_std", 496 .id = UCLASS_SPI_FLASH, 497 .of_match = spi_flash_std_ids, 498 .probe = spi_flash_std_probe, 499 .priv_auto_alloc_size = sizeof(struct spi_flash), 500 .ops = &spi_flash_std_ops, 501 }; 502 503 #endif /* CONFIG_DM_SPI_FLASH */ 504