1 /* 2 * SPI flash probing 3 * 4 * Copyright (C) 2008 Atmel Corporation 5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik 6 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #include <common.h> 12 #include <dm.h> 13 #include <errno.h> 14 #include <fdtdec.h> 15 #include <malloc.h> 16 #include <mapmem.h> 17 #include <spi.h> 18 #include <spi_flash.h> 19 #include <asm/io.h> 20 21 #include "sf_internal.h" 22 23 DECLARE_GLOBAL_DATA_PTR; 24 25 /* Read commands array */ 26 static u8 spi_read_cmds_array[] = { 27 CMD_READ_ARRAY_SLOW, 28 CMD_READ_ARRAY_FAST, 29 CMD_READ_DUAL_OUTPUT_FAST, 30 CMD_READ_DUAL_IO_FAST, 31 CMD_READ_QUAD_OUTPUT_FAST, 32 CMD_READ_QUAD_IO_FAST, 33 }; 34 35 #ifdef CONFIG_SPI_FLASH_MACRONIX 36 static int spi_flash_set_qeb_mxic(struct spi_flash *flash) 37 { 38 u8 qeb_status; 39 int ret; 40 41 ret = spi_flash_cmd_read_status(flash, &qeb_status); 42 if (ret < 0) 43 return ret; 44 45 if (qeb_status & STATUS_QEB_MXIC) { 46 debug("SF: mxic: QEB is already set\n"); 47 } else { 48 ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC); 49 if (ret < 0) 50 return ret; 51 } 52 53 return ret; 54 } 55 #endif 56 57 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) 58 static int spi_flash_set_qeb_winspan(struct spi_flash *flash) 59 { 60 u8 qeb_status; 61 int ret; 62 63 ret = spi_flash_cmd_read_config(flash, &qeb_status); 64 if (ret < 0) 65 return ret; 66 67 if (qeb_status & STATUS_QEB_WINSPAN) { 68 debug("SF: winspan: QEB is already set\n"); 69 } else { 70 ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN); 71 if (ret < 0) 72 return ret; 73 } 74 75 return ret; 76 } 77 #endif 78 79 static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0) 80 { 81 switch (idcode0) { 82 #ifdef CONFIG_SPI_FLASH_MACRONIX 83 case SPI_FLASH_CFI_MFR_MACRONIX: 84 return spi_flash_set_qeb_mxic(flash); 85 #endif 86 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) 87 case SPI_FLASH_CFI_MFR_SPANSION: 88 case SPI_FLASH_CFI_MFR_WINBOND: 89 return spi_flash_set_qeb_winspan(flash); 90 #endif 91 #ifdef CONFIG_SPI_FLASH_STMICRO 92 case SPI_FLASH_CFI_MFR_STMICRO: 93 debug("SF: QEB is volatile for %02x flash\n", idcode0); 94 return 0; 95 #endif 96 default: 97 printf("SF: Need set QEB func for %02x flash\n", idcode0); 98 return -1; 99 } 100 } 101 102 static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode, 103 struct spi_flash *flash) 104 { 105 const struct spi_flash_params *params; 106 u8 cmd; 107 u16 jedec = idcode[1] << 8 | idcode[2]; 108 u16 ext_jedec = idcode[3] << 8 | idcode[4]; 109 110 /* Validate params from spi_flash_params table */ 111 params = spi_flash_params_table; 112 for (; params->name != NULL; params++) { 113 if ((params->jedec >> 16) == idcode[0]) { 114 if ((params->jedec & 0xFFFF) == jedec) { 115 if (params->ext_jedec == 0) 116 break; 117 else if (params->ext_jedec == ext_jedec) 118 break; 119 } 120 } 121 } 122 123 if (!params->name) { 124 printf("SF: Unsupported flash IDs: "); 125 printf("manuf %02x, jedec %04x, ext_jedec %04x\n", 126 idcode[0], jedec, ext_jedec); 127 return -EPROTONOSUPPORT; 128 } 129 130 /* Assign spi data */ 131 flash->spi = spi; 132 flash->name = params->name; 133 flash->memory_map = spi->memory_map; 134 flash->dual_flash = flash->spi->option; 135 136 /* Assign spi_flash ops */ 137 #ifndef CONFIG_DM_SPI_FLASH 138 flash->write = spi_flash_cmd_write_ops; 139 #if defined(CONFIG_SPI_FLASH_SST) 140 if (params->flags & SST_WR) { 141 if (flash->spi->op_mode_tx & SPI_OPM_TX_BP) 142 flash->write = sst_write_bp; 143 else 144 flash->write = sst_write_wp; 145 } 146 #endif 147 flash->erase = spi_flash_cmd_erase_ops; 148 flash->read = spi_flash_cmd_read_ops; 149 #endif 150 151 /* Compute the flash size */ 152 flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0; 153 /* 154 * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the 155 * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with 156 * the 0x4d00 Extended JEDEC code have 512b pages. All of the others 157 * have 256b pages. 158 */ 159 if (ext_jedec == 0x4d00) { 160 if ((jedec == 0x0215) || (jedec == 0x216)) 161 flash->page_size = 256; 162 else 163 flash->page_size = 512; 164 } else { 165 flash->page_size = 256; 166 } 167 flash->page_size <<= flash->shift; 168 flash->sector_size = params->sector_size << flash->shift; 169 flash->size = flash->sector_size * params->nr_sectors << flash->shift; 170 #ifdef CONFIG_SF_DUAL_FLASH 171 if (flash->dual_flash & SF_DUAL_STACKED_FLASH) 172 flash->size <<= 1; 173 #endif 174 175 /* Compute erase sector and command */ 176 if (params->flags & SECT_4K) { 177 flash->erase_cmd = CMD_ERASE_4K; 178 flash->erase_size = 4096 << flash->shift; 179 } else if (params->flags & SECT_32K) { 180 flash->erase_cmd = CMD_ERASE_32K; 181 flash->erase_size = 32768 << flash->shift; 182 } else { 183 flash->erase_cmd = CMD_ERASE_64K; 184 flash->erase_size = flash->sector_size; 185 } 186 187 /* Look for the fastest read cmd */ 188 cmd = fls(params->e_rd_cmd & flash->spi->op_mode_rx); 189 if (cmd) { 190 cmd = spi_read_cmds_array[cmd - 1]; 191 flash->read_cmd = cmd; 192 } else { 193 /* Go for default supported read cmd */ 194 flash->read_cmd = CMD_READ_ARRAY_FAST; 195 } 196 197 /* Not require to look for fastest only two write cmds yet */ 198 if (params->flags & WR_QPP && flash->spi->op_mode_tx & SPI_OPM_TX_QPP) 199 flash->write_cmd = CMD_QUAD_PAGE_PROGRAM; 200 else 201 /* Go for default supported write cmd */ 202 flash->write_cmd = CMD_PAGE_PROGRAM; 203 204 /* Read dummy_byte: dummy byte is determined based on the 205 * dummy cycles of a particular command. 206 * Fast commands - dummy_byte = dummy_cycles/8 207 * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8 208 * For I/O commands except cmd[0] everything goes on no.of lines 209 * based on particular command but incase of fast commands except 210 * data all go on single line irrespective of command. 211 */ 212 switch (flash->read_cmd) { 213 case CMD_READ_QUAD_IO_FAST: 214 flash->dummy_byte = 2; 215 break; 216 case CMD_READ_ARRAY_SLOW: 217 flash->dummy_byte = 0; 218 break; 219 default: 220 flash->dummy_byte = 1; 221 } 222 223 /* Poll cmd selection */ 224 flash->poll_cmd = CMD_READ_STATUS; 225 #ifdef CONFIG_SPI_FLASH_STMICRO 226 if (params->flags & E_FSR) 227 flash->poll_cmd = CMD_FLAG_STATUS; 228 #endif 229 230 /* Configure the BAR - discover bank cmds and read current bank */ 231 #ifdef CONFIG_SPI_FLASH_BAR 232 u8 curr_bank = 0; 233 if (flash->size > SPI_FLASH_16MB_BOUN) { 234 int ret; 235 236 flash->bank_read_cmd = (idcode[0] == 0x01) ? 237 CMD_BANKADDR_BRRD : CMD_EXTNADDR_RDEAR; 238 flash->bank_write_cmd = (idcode[0] == 0x01) ? 239 CMD_BANKADDR_BRWR : CMD_EXTNADDR_WREAR; 240 241 ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1, 242 &curr_bank, 1); 243 if (ret) { 244 debug("SF: fail to read bank addr register\n"); 245 return ret; 246 } 247 flash->bank_curr = curr_bank; 248 } else { 249 flash->bank_curr = curr_bank; 250 } 251 #endif 252 253 /* Flash powers up read-only, so clear BP# bits */ 254 #if defined(CONFIG_SPI_FLASH_ATMEL) || \ 255 defined(CONFIG_SPI_FLASH_MACRONIX) || \ 256 defined(CONFIG_SPI_FLASH_SST) 257 spi_flash_cmd_write_status(flash, 0); 258 #endif 259 260 return 0; 261 } 262 263 #ifdef CONFIG_OF_CONTROL 264 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) 265 { 266 fdt_addr_t addr; 267 fdt_size_t size; 268 int node; 269 270 /* If there is no node, do nothing */ 271 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH); 272 if (node < 0) 273 return 0; 274 275 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size); 276 if (addr == FDT_ADDR_T_NONE) { 277 debug("%s: Cannot decode address\n", __func__); 278 return 0; 279 } 280 281 if (flash->size != size) { 282 debug("%s: Memory map must cover entire device\n", __func__); 283 return -1; 284 } 285 flash->memory_map = map_sysmem(addr, size); 286 287 return 0; 288 } 289 #endif /* CONFIG_OF_CONTROL */ 290 291 #ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN 292 /* enable the W#/Vpp signal to disable writing to the status register */ 293 static int spi_enable_wp_pin(struct spi_flash *flash) 294 { 295 u8 status; 296 int ret; 297 298 ret = spi_flash_cmd_read_status(flash, &status); 299 if (ret < 0) 300 return ret; 301 302 ret = spi_flash_cmd_write_status(flash, STATUS_SRWD); 303 if (ret < 0) 304 return ret; 305 306 ret = spi_flash_cmd_write_disable(flash); 307 if (ret < 0) 308 return ret; 309 310 return 0; 311 } 312 #else 313 static int spi_enable_wp_pin(struct spi_flash *flash) 314 { 315 return 0; 316 } 317 #endif 318 319 /** 320 * spi_flash_probe_slave() - Probe for a SPI flash device on a bus 321 * 322 * @spi: Bus to probe 323 * @flashp: Pointer to place to put flash info, which may be NULL if the 324 * space should be allocated 325 */ 326 int spi_flash_probe_slave(struct spi_slave *spi, struct spi_flash *flash) 327 { 328 u8 idcode[5]; 329 int ret; 330 331 /* Setup spi_slave */ 332 if (!spi) { 333 printf("SF: Failed to set up slave\n"); 334 return -ENODEV; 335 } 336 337 /* Claim spi bus */ 338 ret = spi_claim_bus(spi); 339 if (ret) { 340 debug("SF: Failed to claim SPI bus: %d\n", ret); 341 return ret; 342 } 343 344 /* Read the ID codes */ 345 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); 346 if (ret) { 347 printf("SF: Failed to get idcodes\n"); 348 goto err_read_id; 349 } 350 351 #ifdef DEBUG 352 printf("SF: Got idcodes\n"); 353 print_buffer(0, idcode, 1, sizeof(idcode), 0); 354 #endif 355 356 if (spi_flash_validate_params(spi, idcode, flash)) { 357 ret = -EINVAL; 358 goto err_read_id; 359 } 360 361 /* Set the quad enable bit - only for quad commands */ 362 if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) || 363 (flash->read_cmd == CMD_READ_QUAD_IO_FAST) || 364 (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) { 365 if (spi_flash_set_qeb(flash, idcode[0])) { 366 debug("SF: Fail to set QEB for %02x\n", idcode[0]); 367 ret = -EINVAL; 368 goto err_read_id; 369 } 370 } 371 372 #ifdef CONFIG_OF_CONTROL 373 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) { 374 debug("SF: FDT decode error\n"); 375 ret = -EINVAL; 376 goto err_read_id; 377 } 378 #endif 379 #ifndef CONFIG_SPL_BUILD 380 printf("SF: Detected %s with page size ", flash->name); 381 print_size(flash->page_size, ", erase size "); 382 print_size(flash->erase_size, ", total "); 383 print_size(flash->size, ""); 384 if (flash->memory_map) 385 printf(", mapped at %p", flash->memory_map); 386 puts("\n"); 387 #endif 388 #ifndef CONFIG_SPI_FLASH_BAR 389 if (((flash->dual_flash == SF_SINGLE_FLASH) && 390 (flash->size > SPI_FLASH_16MB_BOUN)) || 391 ((flash->dual_flash > SF_SINGLE_FLASH) && 392 (flash->size > SPI_FLASH_16MB_BOUN << 1))) { 393 puts("SF: Warning - Only lower 16MiB accessible,"); 394 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n"); 395 } 396 #endif 397 if (spi_enable_wp_pin(flash)) 398 puts("Enable WP pin failed\n"); 399 400 /* Release spi bus */ 401 spi_release_bus(spi); 402 403 return 0; 404 405 err_read_id: 406 spi_release_bus(spi); 407 return ret; 408 } 409 410 #ifndef CONFIG_DM_SPI_FLASH 411 struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus) 412 { 413 struct spi_flash *flash; 414 415 /* Allocate space if needed (not used by sf-uclass */ 416 flash = calloc(1, sizeof(*flash)); 417 if (!flash) { 418 debug("SF: Failed to allocate spi_flash\n"); 419 return NULL; 420 } 421 422 if (spi_flash_probe_slave(bus, flash)) { 423 spi_free_slave(bus); 424 free(flash); 425 return NULL; 426 } 427 428 return flash; 429 } 430 431 struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs, 432 unsigned int max_hz, unsigned int spi_mode) 433 { 434 struct spi_slave *bus; 435 436 bus = spi_setup_slave(busnum, cs, max_hz, spi_mode); 437 return spi_flash_probe_tail(bus); 438 } 439 440 #ifdef CONFIG_OF_SPI_FLASH 441 struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node, 442 int spi_node) 443 { 444 struct spi_slave *bus; 445 446 bus = spi_setup_slave_fdt(blob, slave_node, spi_node); 447 return spi_flash_probe_tail(bus); 448 } 449 #endif 450 451 void spi_flash_free(struct spi_flash *flash) 452 { 453 spi_free_slave(flash->spi); 454 free(flash); 455 } 456 457 #else /* defined CONFIG_DM_SPI_FLASH */ 458 459 static int spi_flash_std_read(struct udevice *dev, u32 offset, size_t len, 460 void *buf) 461 { 462 struct spi_flash *flash = dev_get_uclass_priv(dev); 463 464 return spi_flash_cmd_read_ops(flash, offset, len, buf); 465 } 466 467 int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len, 468 const void *buf) 469 { 470 struct spi_flash *flash = dev_get_uclass_priv(dev); 471 472 return spi_flash_cmd_write_ops(flash, offset, len, buf); 473 } 474 475 int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len) 476 { 477 struct spi_flash *flash = dev_get_uclass_priv(dev); 478 479 return spi_flash_cmd_erase_ops(flash, offset, len); 480 } 481 482 int spi_flash_std_probe(struct udevice *dev) 483 { 484 struct spi_slave *slave = dev_get_parentdata(dev); 485 struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev); 486 struct spi_flash *flash; 487 488 flash = dev_get_uclass_priv(dev); 489 flash->dev = dev; 490 debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs); 491 return spi_flash_probe_slave(slave, flash); 492 } 493 494 static const struct dm_spi_flash_ops spi_flash_std_ops = { 495 .read = spi_flash_std_read, 496 .write = spi_flash_std_write, 497 .erase = spi_flash_std_erase, 498 }; 499 500 static const struct udevice_id spi_flash_std_ids[] = { 501 { .compatible = "spi-flash" }, 502 { } 503 }; 504 505 U_BOOT_DRIVER(spi_flash_std) = { 506 .name = "spi_flash_std", 507 .id = UCLASS_SPI_FLASH, 508 .of_match = spi_flash_std_ids, 509 .probe = spi_flash_std_probe, 510 .priv_auto_alloc_size = sizeof(struct spi_flash), 511 .ops = &spi_flash_std_ops, 512 }; 513 514 #endif /* CONFIG_DM_SPI_FLASH */ 515