1 /* 2 * SPI flash probing 3 * 4 * Copyright (C) 2008 Atmel Corporation 5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik 6 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #include <common.h> 12 #include <dm.h> 13 #include <errno.h> 14 #include <fdtdec.h> 15 #include <malloc.h> 16 #include <spi.h> 17 #include <spi_flash.h> 18 #include <asm/io.h> 19 20 #include "sf_internal.h" 21 22 DECLARE_GLOBAL_DATA_PTR; 23 24 /* Read commands array */ 25 static u8 spi_read_cmds_array[] = { 26 CMD_READ_ARRAY_SLOW, 27 CMD_READ_ARRAY_FAST, 28 CMD_READ_DUAL_OUTPUT_FAST, 29 CMD_READ_DUAL_IO_FAST, 30 CMD_READ_QUAD_OUTPUT_FAST, 31 CMD_READ_QUAD_IO_FAST, 32 }; 33 34 #ifdef CONFIG_SPI_FLASH_MACRONIX 35 static int spi_flash_set_qeb_mxic(struct spi_flash *flash) 36 { 37 u8 qeb_status; 38 int ret; 39 40 ret = spi_flash_cmd_read_status(flash, &qeb_status); 41 if (ret < 0) 42 return ret; 43 44 if (qeb_status & STATUS_QEB_MXIC) { 45 debug("SF: mxic: QEB is already set\n"); 46 } else { 47 ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC); 48 if (ret < 0) 49 return ret; 50 } 51 52 return ret; 53 } 54 #endif 55 56 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) 57 static int spi_flash_set_qeb_winspan(struct spi_flash *flash) 58 { 59 u8 qeb_status; 60 int ret; 61 62 ret = spi_flash_cmd_read_config(flash, &qeb_status); 63 if (ret < 0) 64 return ret; 65 66 if (qeb_status & STATUS_QEB_WINSPAN) { 67 debug("SF: winspan: QEB is already set\n"); 68 } else { 69 ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN); 70 if (ret < 0) 71 return ret; 72 } 73 74 return ret; 75 } 76 #endif 77 78 static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0) 79 { 80 switch (idcode0) { 81 #ifdef CONFIG_SPI_FLASH_MACRONIX 82 case SPI_FLASH_CFI_MFR_MACRONIX: 83 return spi_flash_set_qeb_mxic(flash); 84 #endif 85 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) 86 case SPI_FLASH_CFI_MFR_SPANSION: 87 case SPI_FLASH_CFI_MFR_WINBOND: 88 return spi_flash_set_qeb_winspan(flash); 89 #endif 90 #ifdef CONFIG_SPI_FLASH_STMICRO 91 case SPI_FLASH_CFI_MFR_STMICRO: 92 debug("SF: QEB is volatile for %02x flash\n", idcode0); 93 return 0; 94 #endif 95 default: 96 printf("SF: Need set QEB func for %02x flash\n", idcode0); 97 return -1; 98 } 99 } 100 101 static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode, 102 struct spi_flash *flash) 103 { 104 const struct spi_flash_params *params; 105 u8 cmd; 106 u16 jedec = idcode[1] << 8 | idcode[2]; 107 u16 ext_jedec = idcode[3] << 8 | idcode[4]; 108 109 /* Validate params from spi_flash_params table */ 110 params = spi_flash_params_table; 111 for (; params->name != NULL; params++) { 112 if ((params->jedec >> 16) == idcode[0]) { 113 if ((params->jedec & 0xFFFF) == jedec) { 114 if (params->ext_jedec == 0) 115 break; 116 else if (params->ext_jedec == ext_jedec) 117 break; 118 } 119 } 120 } 121 122 if (!params->name) { 123 printf("SF: Unsupported flash IDs: "); 124 printf("manuf %02x, jedec %04x, ext_jedec %04x\n", 125 idcode[0], jedec, ext_jedec); 126 return -EPROTONOSUPPORT; 127 } 128 129 /* Assign spi data */ 130 flash->spi = spi; 131 flash->name = params->name; 132 flash->memory_map = spi->memory_map; 133 flash->dual_flash = flash->spi->option; 134 135 /* Assign spi_flash ops */ 136 #ifndef CONFIG_DM_SPI_FLASH 137 flash->write = spi_flash_cmd_write_ops; 138 #if defined(CONFIG_SPI_FLASH_SST) 139 if (params->flags & SST_WR) { 140 if (flash->spi->op_mode_tx & SPI_OPM_TX_BP) 141 flash->write = sst_write_bp; 142 else 143 flash->write = sst_write_wp; 144 } 145 #endif 146 flash->erase = spi_flash_cmd_erase_ops; 147 flash->read = spi_flash_cmd_read_ops; 148 #endif 149 150 /* Compute the flash size */ 151 flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0; 152 /* 153 * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the 154 * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with 155 * the 0x4d00 Extended JEDEC code have 512b pages. All of the others 156 * have 256b pages. 157 */ 158 if (ext_jedec == 0x4d00) { 159 if ((jedec == 0x0215) || (jedec == 0x216)) 160 flash->page_size = 256; 161 else 162 flash->page_size = 512; 163 } else { 164 flash->page_size = 256; 165 } 166 flash->page_size <<= flash->shift; 167 flash->sector_size = params->sector_size << flash->shift; 168 flash->size = flash->sector_size * params->nr_sectors << flash->shift; 169 #ifdef CONFIG_SF_DUAL_FLASH 170 if (flash->dual_flash & SF_DUAL_STACKED_FLASH) 171 flash->size <<= 1; 172 #endif 173 174 /* Compute erase sector and command */ 175 if (params->flags & SECT_4K) { 176 flash->erase_cmd = CMD_ERASE_4K; 177 flash->erase_size = 4096 << flash->shift; 178 } else if (params->flags & SECT_32K) { 179 flash->erase_cmd = CMD_ERASE_32K; 180 flash->erase_size = 32768 << flash->shift; 181 } else { 182 flash->erase_cmd = CMD_ERASE_64K; 183 flash->erase_size = flash->sector_size; 184 } 185 186 /* Look for the fastest read cmd */ 187 cmd = fls(params->e_rd_cmd & flash->spi->op_mode_rx); 188 if (cmd) { 189 cmd = spi_read_cmds_array[cmd - 1]; 190 flash->read_cmd = cmd; 191 } else { 192 /* Go for default supported read cmd */ 193 flash->read_cmd = CMD_READ_ARRAY_FAST; 194 } 195 196 /* Not require to look for fastest only two write cmds yet */ 197 if (params->flags & WR_QPP && flash->spi->op_mode_tx & SPI_OPM_TX_QPP) 198 flash->write_cmd = CMD_QUAD_PAGE_PROGRAM; 199 else 200 /* Go for default supported write cmd */ 201 flash->write_cmd = CMD_PAGE_PROGRAM; 202 203 /* Read dummy_byte: dummy byte is determined based on the 204 * dummy cycles of a particular command. 205 * Fast commands - dummy_byte = dummy_cycles/8 206 * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8 207 * For I/O commands except cmd[0] everything goes on no.of lines 208 * based on particular command but incase of fast commands except 209 * data all go on single line irrespective of command. 210 */ 211 switch (flash->read_cmd) { 212 case CMD_READ_QUAD_IO_FAST: 213 flash->dummy_byte = 2; 214 break; 215 case CMD_READ_ARRAY_SLOW: 216 flash->dummy_byte = 0; 217 break; 218 default: 219 flash->dummy_byte = 1; 220 } 221 222 /* Poll cmd selection */ 223 flash->poll_cmd = CMD_READ_STATUS; 224 #ifdef CONFIG_SPI_FLASH_STMICRO 225 if (params->flags & E_FSR) 226 flash->poll_cmd = CMD_FLAG_STATUS; 227 #endif 228 229 /* Configure the BAR - discover bank cmds and read current bank */ 230 #ifdef CONFIG_SPI_FLASH_BAR 231 u8 curr_bank = 0; 232 if (flash->size > SPI_FLASH_16MB_BOUN) { 233 int ret; 234 235 flash->bank_read_cmd = (idcode[0] == 0x01) ? 236 CMD_BANKADDR_BRRD : CMD_EXTNADDR_RDEAR; 237 flash->bank_write_cmd = (idcode[0] == 0x01) ? 238 CMD_BANKADDR_BRWR : CMD_EXTNADDR_WREAR; 239 240 ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1, 241 &curr_bank, 1); 242 if (ret) { 243 debug("SF: fail to read bank addr register\n"); 244 return ret; 245 } 246 flash->bank_curr = curr_bank; 247 } else { 248 flash->bank_curr = curr_bank; 249 } 250 #endif 251 252 /* Flash powers up read-only, so clear BP# bits */ 253 #if defined(CONFIG_SPI_FLASH_ATMEL) || \ 254 defined(CONFIG_SPI_FLASH_MACRONIX) || \ 255 defined(CONFIG_SPI_FLASH_SST) 256 spi_flash_cmd_write_status(flash, 0); 257 #endif 258 259 return 0; 260 } 261 262 #ifdef CONFIG_OF_CONTROL 263 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) 264 { 265 fdt_addr_t addr; 266 fdt_size_t size; 267 int node; 268 269 /* If there is no node, do nothing */ 270 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH); 271 if (node < 0) 272 return 0; 273 274 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size); 275 if (addr == FDT_ADDR_T_NONE) { 276 debug("%s: Cannot decode address\n", __func__); 277 return 0; 278 } 279 280 if (flash->size != size) { 281 debug("%s: Memory map must cover entire device\n", __func__); 282 return -1; 283 } 284 flash->memory_map = map_sysmem(addr, size); 285 286 return 0; 287 } 288 #endif /* CONFIG_OF_CONTROL */ 289 290 #ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN 291 /* enable the W#/Vpp signal to disable writing to the status register */ 292 static int spi_enable_wp_pin(struct spi_flash *flash) 293 { 294 u8 status; 295 int ret; 296 297 ret = spi_flash_cmd_read_status(flash, &status); 298 if (ret < 0) 299 return ret; 300 301 ret = spi_flash_cmd_write_status(flash, STATUS_SRWD); 302 if (ret < 0) 303 return ret; 304 305 ret = spi_flash_cmd_write_disable(flash); 306 if (ret < 0) 307 return ret; 308 309 return 0; 310 } 311 #else 312 static int spi_enable_wp_pin(struct spi_flash *flash) 313 { 314 return 0; 315 } 316 #endif 317 318 /** 319 * spi_flash_probe_slave() - Probe for a SPI flash device on a bus 320 * 321 * @spi: Bus to probe 322 * @flashp: Pointer to place to put flash info, which may be NULL if the 323 * space should be allocated 324 */ 325 int spi_flash_probe_slave(struct spi_slave *spi, struct spi_flash *flash) 326 { 327 u8 idcode[5]; 328 int ret; 329 330 /* Setup spi_slave */ 331 if (!spi) { 332 printf("SF: Failed to set up slave\n"); 333 return -ENODEV; 334 } 335 336 /* Claim spi bus */ 337 ret = spi_claim_bus(spi); 338 if (ret) { 339 debug("SF: Failed to claim SPI bus: %d\n", ret); 340 return ret; 341 } 342 343 /* Read the ID codes */ 344 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); 345 if (ret) { 346 printf("SF: Failed to get idcodes\n"); 347 goto err_read_id; 348 } 349 350 #ifdef DEBUG 351 printf("SF: Got idcodes\n"); 352 print_buffer(0, idcode, 1, sizeof(idcode), 0); 353 #endif 354 355 if (spi_flash_validate_params(spi, idcode, flash)) { 356 ret = -EINVAL; 357 goto err_read_id; 358 } 359 360 /* Set the quad enable bit - only for quad commands */ 361 if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) || 362 (flash->read_cmd == CMD_READ_QUAD_IO_FAST) || 363 (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) { 364 if (spi_flash_set_qeb(flash, idcode[0])) { 365 debug("SF: Fail to set QEB for %02x\n", idcode[0]); 366 ret = -EINVAL; 367 goto err_read_id; 368 } 369 } 370 371 #ifdef CONFIG_OF_CONTROL 372 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) { 373 debug("SF: FDT decode error\n"); 374 ret = -EINVAL; 375 goto err_read_id; 376 } 377 #endif 378 #ifndef CONFIG_SPL_BUILD 379 printf("SF: Detected %s with page size ", flash->name); 380 print_size(flash->page_size, ", erase size "); 381 print_size(flash->erase_size, ", total "); 382 print_size(flash->size, ""); 383 if (flash->memory_map) 384 printf(", mapped at %p", flash->memory_map); 385 puts("\n"); 386 #endif 387 #ifndef CONFIG_SPI_FLASH_BAR 388 if (((flash->dual_flash == SF_SINGLE_FLASH) && 389 (flash->size > SPI_FLASH_16MB_BOUN)) || 390 ((flash->dual_flash > SF_SINGLE_FLASH) && 391 (flash->size > SPI_FLASH_16MB_BOUN << 1))) { 392 puts("SF: Warning - Only lower 16MiB accessible,"); 393 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n"); 394 } 395 #endif 396 if (spi_enable_wp_pin(flash)) 397 puts("Enable WP pin failed\n"); 398 399 /* Release spi bus */ 400 spi_release_bus(spi); 401 402 return 0; 403 404 err_read_id: 405 spi_release_bus(spi); 406 return ret; 407 } 408 409 #ifndef CONFIG_DM_SPI_FLASH 410 struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus) 411 { 412 struct spi_flash *flash; 413 414 /* Allocate space if needed (not used by sf-uclass */ 415 flash = calloc(1, sizeof(*flash)); 416 if (!flash) { 417 debug("SF: Failed to allocate spi_flash\n"); 418 return NULL; 419 } 420 421 if (spi_flash_probe_slave(bus, flash)) { 422 spi_free_slave(bus); 423 free(flash); 424 return NULL; 425 } 426 427 return flash; 428 } 429 430 struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs, 431 unsigned int max_hz, unsigned int spi_mode) 432 { 433 struct spi_slave *bus; 434 435 bus = spi_setup_slave(busnum, cs, max_hz, spi_mode); 436 return spi_flash_probe_tail(bus); 437 } 438 439 #ifdef CONFIG_OF_SPI_FLASH 440 struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node, 441 int spi_node) 442 { 443 struct spi_slave *bus; 444 445 bus = spi_setup_slave_fdt(blob, slave_node, spi_node); 446 return spi_flash_probe_tail(bus); 447 } 448 #endif 449 450 void spi_flash_free(struct spi_flash *flash) 451 { 452 spi_free_slave(flash->spi); 453 free(flash); 454 } 455 456 #else /* defined CONFIG_DM_SPI_FLASH */ 457 458 static int spi_flash_std_read(struct udevice *dev, u32 offset, size_t len, 459 void *buf) 460 { 461 struct spi_flash *flash = dev->uclass_priv; 462 463 return spi_flash_cmd_read_ops(flash, offset, len, buf); 464 } 465 466 int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len, 467 const void *buf) 468 { 469 struct spi_flash *flash = dev->uclass_priv; 470 471 return spi_flash_cmd_write_ops(flash, offset, len, buf); 472 } 473 474 int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len) 475 { 476 struct spi_flash *flash = dev->uclass_priv; 477 478 return spi_flash_cmd_erase_ops(flash, offset, len); 479 } 480 481 int spi_flash_std_probe(struct udevice *dev) 482 { 483 struct spi_slave *slave = dev_get_parentdata(dev); 484 struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev); 485 struct spi_flash *flash; 486 487 flash = dev->uclass_priv; 488 flash->dev = dev; 489 debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs); 490 return spi_flash_probe_slave(slave, flash); 491 } 492 493 static const struct dm_spi_flash_ops spi_flash_std_ops = { 494 .read = spi_flash_std_read, 495 .write = spi_flash_std_write, 496 .erase = spi_flash_std_erase, 497 }; 498 499 static const struct udevice_id spi_flash_std_ids[] = { 500 { .compatible = "spi-flash" }, 501 { } 502 }; 503 504 U_BOOT_DRIVER(spi_flash_std) = { 505 .name = "spi_flash_std", 506 .id = UCLASS_SPI_FLASH, 507 .of_match = spi_flash_std_ids, 508 .probe = spi_flash_std_probe, 509 .priv_auto_alloc_size = sizeof(struct spi_flash), 510 .ops = &spi_flash_std_ops, 511 }; 512 513 #endif /* CONFIG_DM_SPI_FLASH */ 514