1 /* 2 * SPI flash probing 3 * 4 * Copyright (C) 2008 Atmel Corporation 5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik 6 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #include <common.h> 12 #include <fdtdec.h> 13 #include <malloc.h> 14 #include <spi.h> 15 #include <spi_flash.h> 16 #include <asm/io.h> 17 18 #include "sf_internal.h" 19 20 DECLARE_GLOBAL_DATA_PTR; 21 22 /** 23 * struct spi_flash_params - SPI/QSPI flash device params structure 24 * 25 * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) 26 * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id]) 27 * @ext_jedec: Device ext_jedec ID 28 * @sector_size: Sector size of this device 29 * @nr_sectors: No.of sectors on this device 30 * @flags: Importent param, for flash specific behaviour 31 */ 32 struct spi_flash_params { 33 const char *name; 34 u32 jedec; 35 u16 ext_jedec; 36 u32 sector_size; 37 u32 nr_sectors; 38 u16 flags; 39 }; 40 41 static const struct spi_flash_params spi_flash_params_table[] = { 42 #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */ 43 {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, SECT_4K}, 44 {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, SECT_4K}, 45 {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, SECT_4K}, 46 {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, SECT_4K}, 47 {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, SECT_4K}, 48 {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, SECT_4K}, 49 {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, SECT_4K}, 50 {"AT25DF321", 0x1f4701, 0x0, 64 * 1024, 64, SECT_4K}, 51 #endif 52 #ifdef CONFIG_SPI_FLASH_EON /* EON */ 53 {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0}, 54 {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, SECT_4K}, 55 {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0}, 56 {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0}, 57 #endif 58 #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */ 59 {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K}, 60 {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K}, 61 #endif 62 #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ 63 {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0}, 64 {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0}, 65 {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0}, 66 {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0}, 67 {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0}, 68 {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, 0}, 69 {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, 0}, 70 {"MX25L51235F", 0xc2201A, 0x0, 64 * 1024, 1024, 0}, 71 {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, 0}, 72 #endif 73 #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ 74 {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0}, 75 {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0}, 76 {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0}, 77 {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0}, 78 {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, 0}, 79 {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, 0}, 80 {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, 0}, 81 {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, 0}, 82 {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, 0}, 83 {"S25FL256S_256K", 0x010219, 0x4d00, 64 * 1024, 512, 0}, 84 {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, 0}, 85 {"S25FL512S_256K", 0x010220, 0x4d00, 64 * 1024, 1024, 0}, 86 {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, 0}, 87 #endif 88 #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */ 89 {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0}, 90 {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0}, 91 {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0}, 92 {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0}, 93 {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0}, 94 {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0}, 95 {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0}, 96 {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0}, 97 {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, SECT_4K}, 98 {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, SECT_4K}, 99 {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, SECT_4K}, 100 {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, SECT_4K}, 101 {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, SECT_4K}, 102 {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, SECT_4K}, 103 {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, SECT_4K}, 104 {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, SECT_4K}, 105 {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, E_FSR | SECT_4K}, 106 {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, E_FSR | SECT_4K}, 107 {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, E_FSR | SECT_4K}, 108 {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, E_FSR | SECT_4K}, 109 #endif 110 #ifdef CONFIG_SPI_FLASH_SST /* SST */ 111 {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WP}, 112 {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WP}, 113 {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WP}, 114 {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WP}, 115 {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, SECT_4K}, 116 {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WP}, 117 {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WP}, 118 {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WP}, 119 {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WP}, 120 {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WP}, 121 #endif 122 #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */ 123 {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0}, 124 {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0}, 125 {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0}, 126 {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K}, 127 {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K}, 128 {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K}, 129 {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K}, 130 {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, SECT_4K}, 131 {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, SECT_4K}, 132 {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, SECT_4K}, 133 {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, SECT_4K}, 134 {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, SECT_4K}, 135 {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, SECT_4K}, 136 {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, SECT_4K}, 137 {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, SECT_4K}, 138 {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, SECT_4K}, 139 {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, SECT_4K}, 140 {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, SECT_4K}, 141 #endif 142 /* 143 * Note: 144 * Below paired flash devices has similar spi_flash params. 145 * (S25FL129P_64K, S25FL128S_64K) 146 * (W25Q80BL, W25Q80BV) 147 * (W25Q16CL, W25Q16DV) 148 * (W25Q32BV, W25Q32FV_SPI) 149 * (W25Q64CV, W25Q64FV_SPI) 150 * (W25Q128BV, W25Q128FV_SPI) 151 * (W25Q32DW, W25Q32FV_QPI) 152 * (W25Q64DW, W25Q64FV_QPI) 153 * (W25Q128FW, W25Q128FV_QPI) 154 */ 155 }; 156 157 static struct spi_flash *spi_flash_validate_params(struct spi_slave *spi, 158 u8 *idcode) 159 { 160 const struct spi_flash_params *params; 161 struct spi_flash *flash; 162 int i; 163 u16 jedec = idcode[1] << 8 | idcode[2]; 164 u16 ext_jedec = idcode[3] << 8 | idcode[4]; 165 166 /* Get the flash id (jedec = manuf_id + dev_id, ext_jedec) */ 167 for (i = 0; i < ARRAY_SIZE(spi_flash_params_table); i++) { 168 params = &spi_flash_params_table[i]; 169 if ((params->jedec >> 16) == idcode[0]) { 170 if ((params->jedec & 0xFFFF) == jedec) { 171 if (params->ext_jedec == 0) 172 break; 173 else if (params->ext_jedec == ext_jedec) 174 break; 175 } 176 } 177 } 178 179 if (i == ARRAY_SIZE(spi_flash_params_table)) { 180 printf("SF: Unsupported flash IDs: "); 181 printf("manuf %02x, jedec %04x, ext_jedec %04x\n", 182 idcode[0], jedec, ext_jedec); 183 return NULL; 184 } 185 186 flash = malloc(sizeof(*flash)); 187 if (!flash) { 188 debug("SF: Failed to allocate spi_flash\n"); 189 return NULL; 190 } 191 memset(flash, '\0', sizeof(*flash)); 192 193 /* Assign spi data */ 194 flash->spi = spi; 195 flash->name = params->name; 196 flash->memory_map = spi->memory_map; 197 198 /* Assign spi_flash ops */ 199 flash->write = spi_flash_cmd_write_ops; 200 #ifdef CONFIG_SPI_FLASH_SST 201 if (params->flags & SST_WP) 202 flash->write = sst_write_wp; 203 #endif 204 flash->erase = spi_flash_cmd_erase_ops; 205 flash->read = spi_flash_cmd_read_ops; 206 207 /* Compute the flash size */ 208 flash->page_size = (ext_jedec == 0x4d00) ? 512 : 256; 209 flash->sector_size = params->sector_size; 210 flash->size = flash->sector_size * params->nr_sectors; 211 212 /* Compute erase sector and command */ 213 if (params->flags & SECT_4K) { 214 flash->erase_cmd = CMD_ERASE_4K; 215 flash->erase_size = 4096; 216 } else if (params->flags & SECT_32K) { 217 flash->erase_cmd = CMD_ERASE_32K; 218 flash->erase_size = 32768; 219 } else { 220 flash->erase_cmd = CMD_ERASE_64K; 221 flash->erase_size = flash->sector_size; 222 } 223 224 /* Poll cmd seclection */ 225 flash->poll_cmd = CMD_READ_STATUS; 226 #ifdef CONFIG_SPI_FLASH_STMICRO 227 if (params->flags & E_FSR) 228 flash->poll_cmd = CMD_FLAG_STATUS; 229 #endif 230 231 /* Configure the BAR - discover bank cmds and read current bank */ 232 #ifdef CONFIG_SPI_FLASH_BAR 233 u8 curr_bank = 0; 234 if (flash->size > SPI_FLASH_16MB_BOUN) { 235 flash->bank_read_cmd = (idcode[0] == 0x01) ? 236 CMD_BANKADDR_BRRD : CMD_EXTNADDR_RDEAR; 237 flash->bank_write_cmd = (idcode[0] == 0x01) ? 238 CMD_BANKADDR_BRWR : CMD_EXTNADDR_WREAR; 239 240 if (spi_flash_read_common(flash, &flash->bank_read_cmd, 1, 241 &curr_bank, 1)) { 242 debug("SF: fail to read bank addr register\n"); 243 return NULL; 244 } 245 flash->bank_curr = curr_bank; 246 } else { 247 flash->bank_curr = curr_bank; 248 } 249 #endif 250 251 /* Flash powers up read-only, so clear BP# bits */ 252 #if defined(CONFIG_SPI_FLASH_ATMEL) || \ 253 defined(CONFIG_SPI_FLASH_MACRONIX) || \ 254 defined(CONFIG_SPI_FLASH_SST) 255 spi_flash_cmd_write_status(flash, 0); 256 #endif 257 258 return flash; 259 } 260 261 #ifdef CONFIG_OF_CONTROL 262 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) 263 { 264 fdt_addr_t addr; 265 fdt_size_t size; 266 int node; 267 268 /* If there is no node, do nothing */ 269 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH); 270 if (node < 0) 271 return 0; 272 273 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size); 274 if (addr == FDT_ADDR_T_NONE) { 275 debug("%s: Cannot decode address\n", __func__); 276 return 0; 277 } 278 279 if (flash->size != size) { 280 debug("%s: Memory map must cover entire device\n", __func__); 281 return -1; 282 } 283 flash->memory_map = map_sysmem(addr, size); 284 285 return 0; 286 } 287 #endif /* CONFIG_OF_CONTROL */ 288 289 static struct spi_flash *spi_flash_probe_slave(struct spi_slave *spi) 290 { 291 struct spi_flash *flash = NULL; 292 u8 idcode[5]; 293 int ret; 294 295 /* Setup spi_slave */ 296 if (!spi) { 297 printf("SF: Failed to set up slave\n"); 298 return NULL; 299 } 300 301 /* Claim spi bus */ 302 ret = spi_claim_bus(spi); 303 if (ret) { 304 debug("SF: Failed to claim SPI bus: %d\n", ret); 305 goto err_claim_bus; 306 } 307 308 /* Read the ID codes */ 309 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); 310 if (ret) { 311 printf("SF: Failed to get idcodes\n"); 312 goto err_read_id; 313 } 314 315 #ifdef DEBUG 316 printf("SF: Got idcodes\n"); 317 print_buffer(0, idcode, 1, sizeof(idcode), 0); 318 #endif 319 320 /* Validate params from spi_flash_params table */ 321 flash = spi_flash_validate_params(spi, idcode); 322 if (!flash) 323 goto err_read_id; 324 325 #ifdef CONFIG_OF_CONTROL 326 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) { 327 debug("SF: FDT decode error\n"); 328 goto err_read_id; 329 } 330 #endif 331 #ifndef CONFIG_SPL_BUILD 332 printf("SF: Detected %s with page size ", flash->name); 333 print_size(flash->page_size, ", erase size "); 334 print_size(flash->erase_size, ", total "); 335 print_size(flash->size, ""); 336 if (flash->memory_map) 337 printf(", mapped at %p", flash->memory_map); 338 puts("\n"); 339 #endif 340 #ifndef CONFIG_SPI_FLASH_BAR 341 if (flash->size > SPI_FLASH_16MB_BOUN) { 342 puts("SF: Warning - Only lower 16MiB accessible,"); 343 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n"); 344 } 345 #endif 346 347 /* Release spi bus */ 348 spi_release_bus(spi); 349 350 return flash; 351 352 err_read_id: 353 spi_release_bus(spi); 354 err_claim_bus: 355 spi_free_slave(spi); 356 return NULL; 357 } 358 359 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, 360 unsigned int max_hz, unsigned int spi_mode) 361 { 362 struct spi_slave *spi; 363 364 spi = spi_setup_slave(bus, cs, max_hz, spi_mode); 365 return spi_flash_probe_slave(spi); 366 } 367 368 #ifdef CONFIG_OF_SPI_FLASH 369 struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node, 370 int spi_node) 371 { 372 struct spi_slave *spi; 373 374 spi = spi_setup_slave_fdt(blob, slave_node, spi_node); 375 return spi_flash_probe_slave(spi); 376 } 377 #endif 378 379 void spi_flash_free(struct spi_flash *flash) 380 { 381 spi_free_slave(flash->spi); 382 free(flash); 383 } 384