xref: /openbmc/u-boot/drivers/mtd/spi/sf_internal.h (revision 965de8b9)
1 /*
2  * SPI flash internal definitions
3  *
4  * Copyright (C) 2008 Atmel Corporation
5  * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef _SF_INTERNAL_H_
11 #define _SF_INTERNAL_H_
12 
13 #define SPI_FLASH_16MB_BOUN		0x1000000
14 
15 /* SECT flags */
16 #define SECT_4K				(1 << 1)
17 #define SECT_32K			(1 << 2)
18 #define E_FSR				(1 << 3)
19 
20 /* Erase commands */
21 #define CMD_ERASE_4K			0x20
22 #define CMD_ERASE_32K			0x52
23 #define CMD_ERASE_CHIP			0xc7
24 #define CMD_ERASE_64K			0xd8
25 
26 /* Write commands */
27 #define CMD_WRITE_STATUS		0x01
28 #define CMD_PAGE_PROGRAM		0x02
29 #define CMD_WRITE_DISABLE		0x04
30 #define CMD_READ_STATUS			0x05
31 #define CMD_READ_STATUS1		0x35
32 #define CMD_WRITE_ENABLE		0x06
33 #define CMD_READ_CONFIG			0x35
34 #define CMD_FLAG_STATUS			0x70
35 
36 /* Read commands */
37 #define CMD_READ_ARRAY_SLOW		0x03
38 #define CMD_READ_ARRAY_FAST		0x0b
39 #define CMD_READ_ID			0x9f
40 
41 /* Bank addr access commands */
42 #ifdef CONFIG_SPI_FLASH_BAR
43 # define CMD_BANKADDR_BRWR		0x17
44 # define CMD_BANKADDR_BRRD		0x16
45 # define CMD_EXTNADDR_WREAR		0xC5
46 # define CMD_EXTNADDR_RDEAR		0xC8
47 #endif
48 
49 /* Common status */
50 #define STATUS_WIP			0x01
51 #define STATUS_PEC			0x80
52 
53 /* Flash timeout values */
54 #define SPI_FLASH_PROG_TIMEOUT		(2 * CONFIG_SYS_HZ)
55 #define SPI_FLASH_PAGE_ERASE_TIMEOUT	(5 * CONFIG_SYS_HZ)
56 #define SPI_FLASH_SECTOR_ERASE_TIMEOUT	(10 * CONFIG_SYS_HZ)
57 
58 /* SST specific */
59 #ifdef CONFIG_SPI_FLASH_SST
60 # define SST_WP			0x01	/* Supports AAI word program */
61 # define CMD_SST_BP		0x02    /* Byte Program */
62 # define CMD_SST_AAI_WP		0xAD	/* Auto Address Incr Word Program */
63 
64 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
65 		const void *buf);
66 #endif
67 
68 /* Send a single-byte command to the device and read the response */
69 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
70 
71 /*
72  * Send a multi-byte command to the device and read the response. Used
73  * for flash array reads, etc.
74  */
75 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
76 		size_t cmd_len, void *data, size_t data_len);
77 
78 /*
79  * Send a multi-byte command to the device followed by (optional)
80  * data. Used for programming the flash array, etc.
81  */
82 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
83 		const void *data, size_t data_len);
84 
85 
86 /* Flash erase(sectors) operation, support all possible erase commands */
87 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
88 
89 /* Program the status register */
90 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
91 
92 /* Set quad enbale bit */
93 int spi_flash_set_qeb(struct spi_flash *flash);
94 
95 /* Enable writing on the SPI flash */
96 static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
97 {
98 	return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
99 }
100 
101 /* Disable writing on the SPI flash */
102 static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
103 {
104 	return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
105 }
106 
107 /*
108  * Send the read status command to the device and wait for the wip
109  * (write-in-progress) bit to clear itself.
110  */
111 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
112 
113 /*
114  * Used for spi_flash write operation
115  * - SPI claim
116  * - spi_flash_cmd_write_enable
117  * - spi_flash_cmd_write
118  * - spi_flash_cmd_wait_ready
119  * - SPI release
120  */
121 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
122 		size_t cmd_len, const void *buf, size_t buf_len);
123 
124 /*
125  * Flash write operation, support all possible write commands.
126  * Write the requested data out breaking it up into multiple write
127  * commands as needed per the write size.
128  */
129 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
130 		size_t len, const void *buf);
131 
132 /*
133  * Same as spi_flash_cmd_read() except it also claims/releases the SPI
134  * bus. Used as common part of the ->read() operation.
135  */
136 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
137 		size_t cmd_len, void *data, size_t data_len);
138 
139 /* Flash read operation, support all possible read commands */
140 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
141 		size_t len, void *data);
142 
143 #endif /* _SF_INTERNAL_H_ */
144