1 /* 2 * SPI flash internal definitions 3 * 4 * Copyright (C) 2008 Atmel Corporation 5 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef _SF_INTERNAL_H_ 11 #define _SF_INTERNAL_H_ 12 13 #include <linux/types.h> 14 #include <linux/compiler.h> 15 16 /* Dual SPI flash memories - see SPI_COMM_DUAL_... */ 17 enum spi_dual_flash { 18 SF_SINGLE_FLASH = 0, 19 SF_DUAL_STACKED_FLASH = BIT(0), 20 SF_DUAL_PARALLEL_FLASH = BIT(1), 21 }; 22 23 enum spi_nor_option_flags { 24 SNOR_F_SST_WR = BIT(0), 25 SNOR_F_USE_FSR = BIT(1), 26 }; 27 28 #define SPI_FLASH_3B_ADDR_LEN 3 29 #define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN) 30 #define SPI_FLASH_16MB_BOUN 0x1000000 31 32 /* CFI Manufacture ID's */ 33 #define SPI_FLASH_CFI_MFR_SPANSION 0x01 34 #define SPI_FLASH_CFI_MFR_STMICRO 0x20 35 #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2 36 #define SPI_FLASH_CFI_MFR_SST 0xbf 37 #define SPI_FLASH_CFI_MFR_WINBOND 0xef 38 #define SPI_FLASH_CFI_MFR_ATMEL 0x1f 39 40 /* Erase commands */ 41 #define CMD_ERASE_4K 0x20 42 #define CMD_ERASE_CHIP 0xc7 43 #define CMD_ERASE_64K 0xd8 44 45 /* Write commands */ 46 #define CMD_WRITE_STATUS 0x01 47 #define CMD_PAGE_PROGRAM 0x02 48 #define CMD_WRITE_DISABLE 0x04 49 #define CMD_WRITE_ENABLE 0x06 50 #define CMD_QUAD_PAGE_PROGRAM 0x32 51 #define CMD_WRITE_EVCR 0x61 52 53 /* Read commands */ 54 #define CMD_READ_ARRAY_SLOW 0x03 55 #define CMD_READ_ARRAY_FAST 0x0b 56 #define CMD_READ_DUAL_OUTPUT_FAST 0x3b 57 #define CMD_READ_DUAL_IO_FAST 0xbb 58 #define CMD_READ_QUAD_OUTPUT_FAST 0x6b 59 #define CMD_READ_QUAD_IO_FAST 0xeb 60 #define CMD_READ_ID 0x9f 61 #define CMD_READ_STATUS 0x05 62 #define CMD_READ_STATUS1 0x35 63 #define CMD_READ_CONFIG 0x35 64 #define CMD_FLAG_STATUS 0x70 65 #define CMD_READ_EVCR 0x65 66 67 /* Bank addr access commands */ 68 #ifdef CONFIG_SPI_FLASH_BAR 69 # define CMD_BANKADDR_BRWR 0x17 70 # define CMD_BANKADDR_BRRD 0x16 71 # define CMD_EXTNADDR_WREAR 0xC5 72 # define CMD_EXTNADDR_RDEAR 0xC8 73 #endif 74 75 /* Common status */ 76 #define STATUS_WIP BIT(0) 77 #define STATUS_QEB_WINSPAN BIT(1) 78 #define STATUS_QEB_MXIC BIT(6) 79 #define STATUS_PEC BIT(7) 80 #define STATUS_QEB_MICRON BIT(7) 81 #define SR_BP0 BIT(2) /* Block protect 0 */ 82 #define SR_BP1 BIT(3) /* Block protect 1 */ 83 #define SR_BP2 BIT(4) /* Block protect 2 */ 84 85 /* Flash timeout values */ 86 #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ) 87 #define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ) 88 #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ) 89 90 /* SST specific */ 91 #ifdef CONFIG_SPI_FLASH_SST 92 # define CMD_SST_BP 0x02 /* Byte Program */ 93 # define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */ 94 95 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len, 96 const void *buf); 97 int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, 98 const void *buf); 99 #endif 100 101 #ifdef CONFIG_SPI_FLASH_SPANSION 102 /* Used for Spansion S25FS-S family flash only. */ 103 #define CMD_SPANSION_RDAR 0x65 /* Read any device register */ 104 #define CMD_SPANSION_WRAR 0x71 /* Write any device register */ 105 #endif 106 /** 107 * struct spi_flash_params - SPI/QSPI flash device params structure 108 * 109 * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) 110 * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id]) 111 * @ext_jedec: Device ext_jedec ID 112 * @sector_size: Isn't necessarily a sector size from vendor, 113 * the size listed here is what works with CMD_ERASE_64K 114 * @nr_sectors: No.of sectors on this device 115 * @flags: Important param, for flash specific behaviour 116 */ 117 struct spi_flash_params { 118 const char *name; 119 u32 jedec; 120 u16 ext_jedec; 121 u32 sector_size; 122 u32 nr_sectors; 123 124 u16 flags; 125 #define SECT_4K BIT(0) 126 #define E_FSR BIT(1) 127 #define SST_WR BIT(2) 128 #define WR_QPP BIT(3) 129 #define RD_QUAD BIT(4) 130 #define RD_DUAL BIT(5) 131 #define RD_QUADIO BIT(6) 132 #define RD_DUALIO BIT(7) 133 #define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO) 134 }; 135 136 extern const struct spi_flash_params spi_flash_params_table[]; 137 138 /* Send a single-byte command to the device and read the response */ 139 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); 140 141 /* 142 * Send a multi-byte command to the device and read the response. Used 143 * for flash array reads, etc. 144 */ 145 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd, 146 size_t cmd_len, void *data, size_t data_len); 147 148 /* 149 * Send a multi-byte command to the device followed by (optional) 150 * data. Used for programming the flash array, etc. 151 */ 152 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, 153 const void *data, size_t data_len); 154 155 156 /* Flash erase(sectors) operation, support all possible erase commands */ 157 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len); 158 159 /* Lock stmicro spi flash region */ 160 int stm_lock(struct spi_flash *flash, u32 ofs, size_t len); 161 162 /* Unlock stmicro spi flash region */ 163 int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len); 164 165 /* Check if a stmicro spi flash region is completely locked */ 166 int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len); 167 168 /* Enable writing on the SPI flash */ 169 static inline int spi_flash_cmd_write_enable(struct spi_flash *flash) 170 { 171 return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0); 172 } 173 174 /* Disable writing on the SPI flash */ 175 static inline int spi_flash_cmd_write_disable(struct spi_flash *flash) 176 { 177 return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0); 178 } 179 180 /* 181 * Used for spi_flash write operation 182 * - SPI claim 183 * - spi_flash_cmd_write_enable 184 * - spi_flash_cmd_write 185 * - spi_flash_cmd_wait_ready 186 * - SPI release 187 */ 188 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, 189 size_t cmd_len, const void *buf, size_t buf_len); 190 191 /* 192 * Flash write operation, support all possible write commands. 193 * Write the requested data out breaking it up into multiple write 194 * commands as needed per the write size. 195 */ 196 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset, 197 size_t len, const void *buf); 198 199 /* 200 * Same as spi_flash_cmd_read() except it also claims/releases the SPI 201 * bus. Used as common part of the ->read() operation. 202 */ 203 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, 204 size_t cmd_len, void *data, size_t data_len); 205 206 /* Flash read operation, support all possible read commands */ 207 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, 208 size_t len, void *data); 209 210 #ifdef CONFIG_SPI_FLASH_MTD 211 int spi_flash_mtd_register(struct spi_flash *flash); 212 void spi_flash_mtd_unregister(void); 213 #endif 214 215 /** 216 * spi_flash_scan - scan the SPI FLASH 217 * @flash: the spi flash structure 218 * 219 * The drivers can use this fuction to scan the SPI FLASH. 220 * In the scanning, it will try to get all the necessary information to 221 * fill the spi_flash{}. 222 * 223 * Return: 0 for success, others for failure. 224 */ 225 int spi_flash_scan(struct spi_flash *flash); 226 227 #endif /* _SF_INTERNAL_H_ */ 228