183d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2898e76c9SJagannadha Sutradharudu Teki /* 3898e76c9SJagannadha Sutradharudu Teki * SPI flash internal definitions 4898e76c9SJagannadha Sutradharudu Teki * 5898e76c9SJagannadha Sutradharudu Teki * Copyright (C) 2008 Atmel Corporation 6898e76c9SJagannadha Sutradharudu Teki * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. 7898e76c9SJagannadha Sutradharudu Teki */ 8898e76c9SJagannadha Sutradharudu Teki 9469146c0SJagannadha Sutradharudu Teki #ifndef _SF_INTERNAL_H_ 10469146c0SJagannadha Sutradharudu Teki #define _SF_INTERNAL_H_ 11898e76c9SJagannadha Sutradharudu Teki 12ff0960f9SSimon Glass #include <linux/types.h> 13ff0960f9SSimon Glass #include <linux/compiler.h> 14ff0960f9SSimon Glass 15*c4e88623SVignesh R #define SPI_NOR_MAX_ID_LEN 6 16*c4e88623SVignesh R #define SPI_NOR_MAX_ADDR_WIDTH 4 17ff0960f9SSimon Glass 18*c4e88623SVignesh R struct flash_info { 19*c4e88623SVignesh R char *name; 20f790ca7cSJagan Teki 21f790ca7cSJagan Teki /* 22f790ca7cSJagan Teki * This array stores the ID bytes. 23f790ca7cSJagan Teki * The first three bytes are the JEDIC ID. 24f790ca7cSJagan Teki * JEDEC ID zero means "no ID" (mostly older chips). 25f790ca7cSJagan Teki */ 26*c4e88623SVignesh R u8 id[SPI_NOR_MAX_ID_LEN]; 27f790ca7cSJagan Teki u8 id_len; 28f790ca7cSJagan Teki 29*c4e88623SVignesh R /* The size listed here is what works with SPINOR_OP_SE, which isn't 30f3bf2e5aSJagan Teki * necessarily called a "sector" by the vendor. 31f3bf2e5aSJagan Teki */ 32*c4e88623SVignesh R unsigned int sector_size; 33*c4e88623SVignesh R u16 n_sectors; 343632c8e5SJagan Teki 35f790ca7cSJagan Teki u16 page_size; 36*c4e88623SVignesh R u16 addr_width; 37f790ca7cSJagan Teki 38ff0960f9SSimon Glass u16 flags; 39*c4e88623SVignesh R #define SECT_4K BIT(0) /* SPINOR_OP_BE_4K works uniformly */ 40*c4e88623SVignesh R #define SPI_NOR_NO_ERASE BIT(1) /* No erase command needed */ 41*c4e88623SVignesh R #define SST_WRITE BIT(2) /* use SST byte programming */ 42*c4e88623SVignesh R #define SPI_NOR_NO_FR BIT(3) /* Can't do fastread */ 43*c4e88623SVignesh R #define SECT_4K_PMC BIT(4) /* SPINOR_OP_BE_4K_PMC works uniformly */ 44*c4e88623SVignesh R #define SPI_NOR_DUAL_READ BIT(5) /* Flash supports Dual Read */ 45*c4e88623SVignesh R #define SPI_NOR_QUAD_READ BIT(6) /* Flash supports Quad Read */ 46*c4e88623SVignesh R #define USE_FSR BIT(7) /* use flag status register */ 47*c4e88623SVignesh R #define SPI_NOR_HAS_LOCK BIT(8) /* Flash supports lock/unlock via SR */ 48*c4e88623SVignesh R #define SPI_NOR_HAS_TB BIT(9) /* 49*c4e88623SVignesh R * Flash SR has Top/Bottom (TB) protect 50*c4e88623SVignesh R * bit. Must be used with 51*c4e88623SVignesh R * SPI_NOR_HAS_LOCK. 52*c4e88623SVignesh R */ 53*c4e88623SVignesh R #define SPI_S3AN BIT(10) /* 54*c4e88623SVignesh R * Xilinx Spartan 3AN In-System Flash 55*c4e88623SVignesh R * (MFR cannot be used for probing 56*c4e88623SVignesh R * because it has the same value as 57*c4e88623SVignesh R * ATMEL flashes) 58*c4e88623SVignesh R */ 59*c4e88623SVignesh R #define SPI_NOR_4B_OPCODES BIT(11) /* 60*c4e88623SVignesh R * Use dedicated 4byte address op codes 61*c4e88623SVignesh R * to support memory size above 128Mib. 62*c4e88623SVignesh R */ 63*c4e88623SVignesh R #define NO_CHIP_ERASE BIT(12) /* Chip does not support chip erase */ 64*c4e88623SVignesh R #define SPI_NOR_SKIP_SFDP BIT(13) /* Skip parsing of SFDP tables */ 65*c4e88623SVignesh R #define USE_CLSR BIT(14) /* use CLSR command */ 66ff0960f9SSimon Glass }; 67ff0960f9SSimon Glass 68*c4e88623SVignesh R extern const struct flash_info spi_nor_ids[]; 69*c4e88623SVignesh R 70*c4e88623SVignesh R #define JEDEC_MFR(info) ((info)->id[0]) 71*c4e88623SVignesh R #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) 72ff0960f9SSimon Glass 73898e76c9SJagannadha Sutradharudu Teki /* Send a single-byte command to the device and read the response */ 74898e76c9SJagannadha Sutradharudu Teki int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); 75898e76c9SJagannadha Sutradharudu Teki 76898e76c9SJagannadha Sutradharudu Teki /* 77898e76c9SJagannadha Sutradharudu Teki * Send a multi-byte command to the device and read the response. Used 78898e76c9SJagannadha Sutradharudu Teki * for flash array reads, etc. 79898e76c9SJagannadha Sutradharudu Teki */ 80898e76c9SJagannadha Sutradharudu Teki int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd, 81898e76c9SJagannadha Sutradharudu Teki size_t cmd_len, void *data, size_t data_len); 82898e76c9SJagannadha Sutradharudu Teki 83898e76c9SJagannadha Sutradharudu Teki /* 84898e76c9SJagannadha Sutradharudu Teki * Send a multi-byte command to the device followed by (optional) 85898e76c9SJagannadha Sutradharudu Teki * data. Used for programming the flash array, etc. 86898e76c9SJagannadha Sutradharudu Teki */ 87898e76c9SJagannadha Sutradharudu Teki int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, 88898e76c9SJagannadha Sutradharudu Teki const void *data, size_t data_len); 89898e76c9SJagannadha Sutradharudu Teki 90898e76c9SJagannadha Sutradharudu Teki 91a58986caSSimon Glass /* Get software write-protect value (BP bits) */ 92a58986caSSimon Glass int spi_flash_cmd_get_sw_write_prot(struct spi_flash *flash); 93a58986caSSimon Glass 94898e76c9SJagannadha Sutradharudu Teki 959fe6d871SDaniel Schwierzeck #ifdef CONFIG_SPI_FLASH_MTD 969fe6d871SDaniel Schwierzeck int spi_flash_mtd_register(struct spi_flash *flash); 979fe6d871SDaniel Schwierzeck void spi_flash_mtd_unregister(void); 989fe6d871SDaniel Schwierzeck #endif 99469146c0SJagannadha Sutradharudu Teki #endif /* _SF_INTERNAL_H_ */ 100