1 /* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <spi_flash.h> 9 #include <malloc.h> 10 11 #define ESPI_BOOT_IMAGE_SIZE 0x48 12 #define ESPI_BOOT_IMAGE_ADDR 0x50 13 #define CONFIG_CFG_DATA_SECTOR 0 14 15 /* 16 * The main entry for SPI booting. It's necessary that SDRAM is already 17 * configured and available since this code loads the main U-Boot image 18 * from SPI into SDRAM and starts it from there. 19 */ 20 void spi_boot(void) 21 { 22 void (*uboot)(void) __noreturn; 23 u32 offset, code_len; 24 unsigned char *buf = NULL; 25 struct spi_flash *flash; 26 27 flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, 28 CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); 29 if (flash == NULL) { 30 puts("\nspi_flash_probe failed"); 31 hang(); 32 } 33 34 #ifdef CONFIG_FSL_CORENET 35 offset = CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS; 36 code_len = CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE; 37 #else 38 /* 39 * Load U-Boot image from SPI flash into RAM 40 */ 41 buf = malloc(flash->page_size); 42 if (buf == NULL) { 43 puts("\nmalloc failed"); 44 hang(); 45 } 46 memset(buf, 0, flash->page_size); 47 48 spi_flash_read(flash, CONFIG_CFG_DATA_SECTOR, 49 flash->page_size, (void *)buf); 50 offset = *(u32 *)(buf + ESPI_BOOT_IMAGE_ADDR); 51 /* Skip spl code */ 52 offset += CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS; 53 /* Get the code size from offset 0x48 */ 54 code_len = *(u32 *)(buf + ESPI_BOOT_IMAGE_SIZE); 55 /* Skip spl code */ 56 code_len = code_len - CONFIG_SPL_MAX_SIZE; 57 #endif 58 /* copy code to DDR */ 59 spi_flash_read(flash, offset, code_len, 60 (void *)CONFIG_SYS_SPI_FLASH_U_BOOT_DST); 61 /* 62 * Jump to U-Boot image 63 */ 64 flush_cache(CONFIG_SYS_SPI_FLASH_U_BOOT_DST, code_len); 65 uboot = (void *)CONFIG_SYS_SPI_FLASH_U_BOOT_START; 66 (*uboot)(); 67 } 68