1 /*
2  *  linux/drivers/mtd/onenand/onenand_base.c
3  *
4  *  Copyright (C) 2005-2007 Samsung Electronics
5  *  Kyungmin Park <kyungmin.park@samsung.com>
6  *
7  *  Credits:
8  *      Adrian Hunter <ext-adrian.hunter@nokia.com>:
9  *      auto-placement support, read-while load support, various fixes
10  *      Copyright (C) Nokia Corporation, 2007
11  *
12  *      Rohit Hagargundgi <h.rohit at samsung.com>,
13  *      Amul Kumar Saha <amul.saha@samsung.com>:
14  *      Flex-OneNAND support
15  *      Copyright (C) Samsung Electronics, 2009
16  *
17  * This program is free software; you can redistribute it and/or modify
18  * it under the terms of the GNU General Public License version 2 as
19  * published by the Free Software Foundation.
20  */
21 
22 #include <common.h>
23 #include <watchdog.h>
24 #include <linux/compat.h>
25 #include <linux/mtd/mtd.h>
26 #include "linux/mtd/flashchip.h"
27 #include <linux/mtd/onenand.h>
28 
29 #include <asm/io.h>
30 #include <linux/errno.h>
31 #include <malloc.h>
32 
33 /* It should access 16-bit instead of 8-bit */
34 static void *memcpy_16(void *dst, const void *src, unsigned int len)
35 {
36 	void *ret = dst;
37 	short *d = dst;
38 	const short *s = src;
39 
40 	len >>= 1;
41 	while (len-- > 0)
42 		*d++ = *s++;
43 	return ret;
44 }
45 
46 /**
47  *  onenand_oob_128 - oob info for Flex-Onenand with 4KB page
48  *  For now, we expose only 64 out of 80 ecc bytes
49  */
50 static struct nand_ecclayout onenand_oob_128 = {
51 	.eccbytes	= 64,
52 	.eccpos		= {
53 		6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
54 		22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
55 		38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
56 		54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
57 		70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
58 		86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
59 		102, 103, 104, 105
60 		},
61 	.oobfree	= {
62 		{2, 4}, {18, 4}, {34, 4}, {50, 4},
63 		{66, 4}, {82, 4}, {98, 4}, {114, 4}
64 	}
65 };
66 
67 /**
68  * onenand_oob_64 - oob info for large (2KB) page
69  */
70 static struct nand_ecclayout onenand_oob_64 = {
71 	.eccbytes	= 20,
72 	.eccpos		= {
73 		8, 9, 10, 11, 12,
74 		24, 25, 26, 27, 28,
75 		40, 41, 42, 43, 44,
76 		56, 57, 58, 59, 60,
77 		},
78 	.oobfree	= {
79 		{2, 3}, {14, 2}, {18, 3}, {30, 2},
80 		{34, 3}, {46, 2}, {50, 3}, {62, 2}
81 	}
82 };
83 
84 /**
85  * onenand_oob_32 - oob info for middle (1KB) page
86  */
87 static struct nand_ecclayout onenand_oob_32 = {
88 	.eccbytes	= 10,
89 	.eccpos		= {
90 		8, 9, 10, 11, 12,
91 		24, 25, 26, 27, 28,
92 		},
93 	.oobfree	= { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
94 };
95 
96 /*
97  * Warning! This array is used with the memcpy_16() function, thus
98  * it must be aligned to 2 bytes. GCC can make this array unaligned
99  * as the array is made of unsigned char, which memcpy16() doesn't
100  * like and will cause unaligned access.
101  */
102 static const unsigned char __aligned(2) ffchars[] = {
103 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
104 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 16 */
105 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
106 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 32 */
107 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
108 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 48 */
109 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
110 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 64 */
111 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
112 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 80 */
113 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
114 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 96 */
115 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
116 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 112 */
117 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
118 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 128 */
119 };
120 
121 /**
122  * onenand_readw - [OneNAND Interface] Read OneNAND register
123  * @param addr		address to read
124  *
125  * Read OneNAND register
126  */
127 static unsigned short onenand_readw(void __iomem * addr)
128 {
129 	return readw(addr);
130 }
131 
132 /**
133  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
134  * @param value		value to write
135  * @param addr		address to write
136  *
137  * Write OneNAND register with value
138  */
139 static void onenand_writew(unsigned short value, void __iomem * addr)
140 {
141 	writew(value, addr);
142 }
143 
144 /**
145  * onenand_block_address - [DEFAULT] Get block address
146  * @param device	the device id
147  * @param block		the block
148  * @return		translated block address if DDP, otherwise same
149  *
150  * Setup Start Address 1 Register (F100h)
151  */
152 static int onenand_block_address(struct onenand_chip *this, int block)
153 {
154 	/* Device Flash Core select, NAND Flash Block Address */
155 	if (block & this->density_mask)
156 		return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
157 
158 	return block;
159 }
160 
161 /**
162  * onenand_bufferram_address - [DEFAULT] Get bufferram address
163  * @param device	the device id
164  * @param block		the block
165  * @return		set DBS value if DDP, otherwise 0
166  *
167  * Setup Start Address 2 Register (F101h) for DDP
168  */
169 static int onenand_bufferram_address(struct onenand_chip *this, int block)
170 {
171 	/* Device BufferRAM Select */
172 	if (block & this->density_mask)
173 		return ONENAND_DDP_CHIP1;
174 
175 	return ONENAND_DDP_CHIP0;
176 }
177 
178 /**
179  * onenand_page_address - [DEFAULT] Get page address
180  * @param page		the page address
181  * @param sector	the sector address
182  * @return		combined page and sector address
183  *
184  * Setup Start Address 8 Register (F107h)
185  */
186 static int onenand_page_address(int page, int sector)
187 {
188 	/* Flash Page Address, Flash Sector Address */
189 	int fpa, fsa;
190 
191 	fpa = page & ONENAND_FPA_MASK;
192 	fsa = sector & ONENAND_FSA_MASK;
193 
194 	return ((fpa << ONENAND_FPA_SHIFT) | fsa);
195 }
196 
197 /**
198  * onenand_buffer_address - [DEFAULT] Get buffer address
199  * @param dataram1	DataRAM index
200  * @param sectors	the sector address
201  * @param count		the number of sectors
202  * @return		the start buffer value
203  *
204  * Setup Start Buffer Register (F200h)
205  */
206 static int onenand_buffer_address(int dataram1, int sectors, int count)
207 {
208 	int bsa, bsc;
209 
210 	/* BufferRAM Sector Address */
211 	bsa = sectors & ONENAND_BSA_MASK;
212 
213 	if (dataram1)
214 		bsa |= ONENAND_BSA_DATARAM1;	/* DataRAM1 */
215 	else
216 		bsa |= ONENAND_BSA_DATARAM0;	/* DataRAM0 */
217 
218 	/* BufferRAM Sector Count */
219 	bsc = count & ONENAND_BSC_MASK;
220 
221 	return ((bsa << ONENAND_BSA_SHIFT) | bsc);
222 }
223 
224 /**
225  * flexonenand_block - Return block number for flash address
226  * @param this		- OneNAND device structure
227  * @param addr		- Address for which block number is needed
228  */
229 static unsigned int flexonenand_block(struct onenand_chip *this, loff_t addr)
230 {
231 	unsigned int boundary, blk, die = 0;
232 
233 	if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) {
234 		die = 1;
235 		addr -= this->diesize[0];
236 	}
237 
238 	boundary = this->boundary[die];
239 
240 	blk = addr >> (this->erase_shift - 1);
241 	if (blk > boundary)
242 		blk = (blk + boundary + 1) >> 1;
243 
244 	blk += die ? this->density_mask : 0;
245 	return blk;
246 }
247 
248 unsigned int onenand_block(struct onenand_chip *this, loff_t addr)
249 {
250 	if (!FLEXONENAND(this))
251 		return addr >> this->erase_shift;
252 	return flexonenand_block(this, addr);
253 }
254 
255 /**
256  * flexonenand_addr - Return address of the block
257  * @this:		OneNAND device structure
258  * @block:		Block number on Flex-OneNAND
259  *
260  * Return address of the block
261  */
262 static loff_t flexonenand_addr(struct onenand_chip *this, int block)
263 {
264 	loff_t ofs = 0;
265 	int die = 0, boundary;
266 
267 	if (ONENAND_IS_DDP(this) && block >= this->density_mask) {
268 		block -= this->density_mask;
269 		die = 1;
270 		ofs = this->diesize[0];
271 	}
272 
273 	boundary = this->boundary[die];
274 	ofs += (loff_t) block << (this->erase_shift - 1);
275 	if (block > (boundary + 1))
276 		ofs += (loff_t) (block - boundary - 1)
277 			<< (this->erase_shift - 1);
278 	return ofs;
279 }
280 
281 loff_t onenand_addr(struct onenand_chip *this, int block)
282 {
283 	if (!FLEXONENAND(this))
284 		return (loff_t) block << this->erase_shift;
285 	return flexonenand_addr(this, block);
286 }
287 
288 /**
289  * flexonenand_region - [Flex-OneNAND] Return erase region of addr
290  * @param mtd		MTD device structure
291  * @param addr		address whose erase region needs to be identified
292  */
293 int flexonenand_region(struct mtd_info *mtd, loff_t addr)
294 {
295 	int i;
296 
297 	for (i = 0; i < mtd->numeraseregions; i++)
298 		if (addr < mtd->eraseregions[i].offset)
299 			break;
300 	return i - 1;
301 }
302 
303 /**
304  * onenand_get_density - [DEFAULT] Get OneNAND density
305  * @param dev_id        OneNAND device ID
306  *
307  * Get OneNAND density from device ID
308  */
309 static inline int onenand_get_density(int dev_id)
310 {
311 	int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
312 	return (density & ONENAND_DEVICE_DENSITY_MASK);
313 }
314 
315 /**
316  * onenand_command - [DEFAULT] Send command to OneNAND device
317  * @param mtd		MTD device structure
318  * @param cmd		the command to be sent
319  * @param addr		offset to read from or write to
320  * @param len		number of bytes to read or write
321  *
322  * Send command to OneNAND device. This function is used for middle/large page
323  * devices (1KB/2KB Bytes per page)
324  */
325 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr,
326 			   size_t len)
327 {
328 	struct onenand_chip *this = mtd->priv;
329 	int value;
330 	int block, page;
331 
332 	/* Now we use page size operation */
333 	int sectors = 0, count = 0;
334 
335 	/* Address translation */
336 	switch (cmd) {
337 	case ONENAND_CMD_UNLOCK:
338 	case ONENAND_CMD_LOCK:
339 	case ONENAND_CMD_LOCK_TIGHT:
340 	case ONENAND_CMD_UNLOCK_ALL:
341 		block = -1;
342 		page = -1;
343 		break;
344 
345 	case FLEXONENAND_CMD_PI_ACCESS:
346 		/* addr contains die index */
347 		block = addr * this->density_mask;
348 		page = -1;
349 		break;
350 
351 	case ONENAND_CMD_ERASE:
352 	case ONENAND_CMD_BUFFERRAM:
353 		block = onenand_block(this, addr);
354 		page = -1;
355 		break;
356 
357 	case FLEXONENAND_CMD_READ_PI:
358 		cmd = ONENAND_CMD_READ;
359 		block = addr * this->density_mask;
360 		page = 0;
361 		break;
362 
363 	default:
364 		block = onenand_block(this, addr);
365 		page = (int) (addr
366 			- onenand_addr(this, block)) >> this->page_shift;
367 		page &= this->page_mask;
368 		break;
369 	}
370 
371 	/* NOTE: The setting order of the registers is very important! */
372 	if (cmd == ONENAND_CMD_BUFFERRAM) {
373 		/* Select DataRAM for DDP */
374 		value = onenand_bufferram_address(this, block);
375 		this->write_word(value,
376 				 this->base + ONENAND_REG_START_ADDRESS2);
377 
378 		if (ONENAND_IS_4KB_PAGE(this))
379 			ONENAND_SET_BUFFERRAM0(this);
380 		else
381 			/* Switch to the next data buffer */
382 			ONENAND_SET_NEXT_BUFFERRAM(this);
383 
384 		return 0;
385 	}
386 
387 	if (block != -1) {
388 		/* Write 'DFS, FBA' of Flash */
389 		value = onenand_block_address(this, block);
390 		this->write_word(value,
391 				 this->base + ONENAND_REG_START_ADDRESS1);
392 
393 		/* Select DataRAM for DDP */
394 		value = onenand_bufferram_address(this, block);
395 		this->write_word(value,
396 				 this->base + ONENAND_REG_START_ADDRESS2);
397 	}
398 
399 	if (page != -1) {
400 		int dataram;
401 
402 		switch (cmd) {
403 		case FLEXONENAND_CMD_RECOVER_LSB:
404 		case ONENAND_CMD_READ:
405 		case ONENAND_CMD_READOOB:
406 			if (ONENAND_IS_4KB_PAGE(this))
407 				dataram = ONENAND_SET_BUFFERRAM0(this);
408 			else
409 				dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
410 
411 			break;
412 
413 		default:
414 			dataram = ONENAND_CURRENT_BUFFERRAM(this);
415 			break;
416 		}
417 
418 		/* Write 'FPA, FSA' of Flash */
419 		value = onenand_page_address(page, sectors);
420 		this->write_word(value,
421 				 this->base + ONENAND_REG_START_ADDRESS8);
422 
423 		/* Write 'BSA, BSC' of DataRAM */
424 		value = onenand_buffer_address(dataram, sectors, count);
425 		this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
426 	}
427 
428 	/* Interrupt clear */
429 	this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
430 	/* Write command */
431 	this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
432 
433 	return 0;
434 }
435 
436 /**
437  * onenand_read_ecc - return ecc status
438  * @param this		onenand chip structure
439  */
440 static int onenand_read_ecc(struct onenand_chip *this)
441 {
442 	int ecc, i;
443 
444 	if (!FLEXONENAND(this))
445 		return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
446 
447 	for (i = 0; i < 4; i++) {
448 		ecc = this->read_word(this->base
449 				+ ((ONENAND_REG_ECC_STATUS + i) << 1));
450 		if (likely(!ecc))
451 			continue;
452 		if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR)
453 			return ONENAND_ECC_2BIT_ALL;
454 	}
455 
456 	return 0;
457 }
458 
459 /**
460  * onenand_wait - [DEFAULT] wait until the command is done
461  * @param mtd		MTD device structure
462  * @param state		state to select the max. timeout value
463  *
464  * Wait for command done. This applies to all OneNAND command
465  * Read can take up to 30us, erase up to 2ms and program up to 350us
466  * according to general OneNAND specs
467  */
468 static int onenand_wait(struct mtd_info *mtd, int state)
469 {
470 	struct onenand_chip *this = mtd->priv;
471 	unsigned int interrupt = 0;
472 	unsigned int ctrl;
473 
474 	/* Wait at most 20ms ... */
475 	u32 timeo = (CONFIG_SYS_HZ * 20) / 1000;
476 	u32 time_start = get_timer(0);
477 	do {
478 		WATCHDOG_RESET();
479 		if (get_timer(time_start) > timeo)
480 			return -EIO;
481 		interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
482 	} while ((interrupt & ONENAND_INT_MASTER) == 0);
483 
484 	ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
485 
486 	if (interrupt & ONENAND_INT_READ) {
487 		int ecc = onenand_read_ecc(this);
488 		if (ecc & ONENAND_ECC_2BIT_ALL) {
489 			printk("onenand_wait: ECC error = 0x%04x\n", ecc);
490 			return -EBADMSG;
491 		}
492 	}
493 
494 	if (ctrl & ONENAND_CTRL_ERROR) {
495 		printk("onenand_wait: controller error = 0x%04x\n", ctrl);
496 		if (ctrl & ONENAND_CTRL_LOCK)
497 			printk("onenand_wait: it's locked error = 0x%04x\n",
498 				ctrl);
499 
500 		return -EIO;
501 	}
502 
503 
504 	return 0;
505 }
506 
507 /**
508  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
509  * @param mtd		MTD data structure
510  * @param area		BufferRAM area
511  * @return		offset given area
512  *
513  * Return BufferRAM offset given area
514  */
515 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
516 {
517 	struct onenand_chip *this = mtd->priv;
518 
519 	if (ONENAND_CURRENT_BUFFERRAM(this)) {
520 		if (area == ONENAND_DATARAM)
521 			return mtd->writesize;
522 		if (area == ONENAND_SPARERAM)
523 			return mtd->oobsize;
524 	}
525 
526 	return 0;
527 }
528 
529 /**
530  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
531  * @param mtd		MTD data structure
532  * @param area		BufferRAM area
533  * @param buffer	the databuffer to put/get data
534  * @param offset	offset to read from or write to
535  * @param count		number of bytes to read/write
536  *
537  * Read the BufferRAM area
538  */
539 static int onenand_read_bufferram(struct mtd_info *mtd, loff_t addr, int area,
540 				  unsigned char *buffer, int offset,
541 				  size_t count)
542 {
543 	struct onenand_chip *this = mtd->priv;
544 	void __iomem *bufferram;
545 
546 	bufferram = this->base + area;
547 	bufferram += onenand_bufferram_offset(mtd, area);
548 
549 	memcpy_16(buffer, bufferram + offset, count);
550 
551 	return 0;
552 }
553 
554 /**
555  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
556  * @param mtd		MTD data structure
557  * @param area		BufferRAM area
558  * @param buffer	the databuffer to put/get data
559  * @param offset	offset to read from or write to
560  * @param count		number of bytes to read/write
561  *
562  * Read the BufferRAM area with Sync. Burst Mode
563  */
564 static int onenand_sync_read_bufferram(struct mtd_info *mtd, loff_t addr, int area,
565 				       unsigned char *buffer, int offset,
566 				       size_t count)
567 {
568 	struct onenand_chip *this = mtd->priv;
569 	void __iomem *bufferram;
570 
571 	bufferram = this->base + area;
572 	bufferram += onenand_bufferram_offset(mtd, area);
573 
574 	this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
575 
576 	memcpy_16(buffer, bufferram + offset, count);
577 
578 	this->mmcontrol(mtd, 0);
579 
580 	return 0;
581 }
582 
583 /**
584  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
585  * @param mtd		MTD data structure
586  * @param area		BufferRAM area
587  * @param buffer	the databuffer to put/get data
588  * @param offset	offset to read from or write to
589  * @param count		number of bytes to read/write
590  *
591  * Write the BufferRAM area
592  */
593 static int onenand_write_bufferram(struct mtd_info *mtd, loff_t addr, int area,
594 				   const unsigned char *buffer, int offset,
595 				   size_t count)
596 {
597 	struct onenand_chip *this = mtd->priv;
598 	void __iomem *bufferram;
599 
600 	bufferram = this->base + area;
601 	bufferram += onenand_bufferram_offset(mtd, area);
602 
603 	memcpy_16(bufferram + offset, buffer, count);
604 
605 	return 0;
606 }
607 
608 /**
609  * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
610  * @param mtd		MTD data structure
611  * @param addr		address to check
612  * @return		blockpage address
613  *
614  * Get blockpage address at 2x program mode
615  */
616 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
617 {
618 	struct onenand_chip *this = mtd->priv;
619 	int blockpage, block, page;
620 
621 	/* Calculate the even block number */
622 	block = (int) (addr >> this->erase_shift) & ~1;
623 	/* Is it the odd plane? */
624 	if (addr & this->writesize)
625 		block++;
626 	page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
627 	blockpage = (block << 7) | page;
628 
629 	return blockpage;
630 }
631 
632 /**
633  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
634  * @param mtd		MTD data structure
635  * @param addr		address to check
636  * @return		1 if there are valid data, otherwise 0
637  *
638  * Check bufferram if there is data we required
639  */
640 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
641 {
642 	struct onenand_chip *this = mtd->priv;
643 	int blockpage, found = 0;
644 	unsigned int i;
645 
646 	if (ONENAND_IS_2PLANE(this))
647 		blockpage = onenand_get_2x_blockpage(mtd, addr);
648 	else
649 		blockpage = (int) (addr >> this->page_shift);
650 
651 	/* Is there valid data? */
652 	i = ONENAND_CURRENT_BUFFERRAM(this);
653 	if (this->bufferram[i].blockpage == blockpage)
654 		found = 1;
655 	else {
656 		/* Check another BufferRAM */
657 		i = ONENAND_NEXT_BUFFERRAM(this);
658 		if (this->bufferram[i].blockpage == blockpage) {
659 			ONENAND_SET_NEXT_BUFFERRAM(this);
660 			found = 1;
661 		}
662 	}
663 
664 	if (found && ONENAND_IS_DDP(this)) {
665 		/* Select DataRAM for DDP */
666 		int block = onenand_block(this, addr);
667 		int value = onenand_bufferram_address(this, block);
668 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
669 	}
670 
671 	return found;
672 }
673 
674 /**
675  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
676  * @param mtd		MTD data structure
677  * @param addr		address to update
678  * @param valid		valid flag
679  *
680  * Update BufferRAM information
681  */
682 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
683 				    int valid)
684 {
685 	struct onenand_chip *this = mtd->priv;
686 	int blockpage;
687 	unsigned int i;
688 
689 	if (ONENAND_IS_2PLANE(this))
690 		blockpage = onenand_get_2x_blockpage(mtd, addr);
691 	else
692 		blockpage = (int)(addr >> this->page_shift);
693 
694 	/* Invalidate another BufferRAM */
695 	i = ONENAND_NEXT_BUFFERRAM(this);
696 	if (this->bufferram[i].blockpage == blockpage)
697 		this->bufferram[i].blockpage = -1;
698 
699 	/* Update BufferRAM */
700 	i = ONENAND_CURRENT_BUFFERRAM(this);
701 	if (valid)
702 		this->bufferram[i].blockpage = blockpage;
703 	else
704 		this->bufferram[i].blockpage = -1;
705 
706 	return 0;
707 }
708 
709 /**
710  * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
711  * @param mtd           MTD data structure
712  * @param addr          start address to invalidate
713  * @param len           length to invalidate
714  *
715  * Invalidate BufferRAM information
716  */
717 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
718 					 unsigned int len)
719 {
720 	struct onenand_chip *this = mtd->priv;
721 	int i;
722 	loff_t end_addr = addr + len;
723 
724 	/* Invalidate BufferRAM */
725 	for (i = 0; i < MAX_BUFFERRAM; i++) {
726 		loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
727 
728 		if (buf_addr >= addr && buf_addr < end_addr)
729 			this->bufferram[i].blockpage = -1;
730 	}
731 }
732 
733 /**
734  * onenand_get_device - [GENERIC] Get chip for selected access
735  * @param mtd		MTD device structure
736  * @param new_state	the state which is requested
737  *
738  * Get the device and lock it for exclusive access
739  */
740 static void onenand_get_device(struct mtd_info *mtd, int new_state)
741 {
742 	/* Do nothing */
743 }
744 
745 /**
746  * onenand_release_device - [GENERIC] release chip
747  * @param mtd		MTD device structure
748  *
749  * Deselect, release chip lock and wake up anyone waiting on the device
750  */
751 static void onenand_release_device(struct mtd_info *mtd)
752 {
753 	/* Do nothing */
754 }
755 
756 /**
757  * onenand_transfer_auto_oob - [INTERN] oob auto-placement transfer
758  * @param mtd		MTD device structure
759  * @param buf		destination address
760  * @param column	oob offset to read from
761  * @param thislen	oob length to read
762  */
763 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf,
764 					int column, int thislen)
765 {
766 	struct onenand_chip *this = mtd->priv;
767 	struct nand_oobfree *free;
768 	int readcol = column;
769 	int readend = column + thislen;
770 	int lastgap = 0;
771 	unsigned int i;
772 	uint8_t *oob_buf = this->oob_buf;
773 
774 	free = this->ecclayout->oobfree;
775 	for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES_LARGE && free->length;
776 	     i++, free++) {
777 		if (readcol >= lastgap)
778 			readcol += free->offset - lastgap;
779 		if (readend >= lastgap)
780 			readend += free->offset - lastgap;
781 		lastgap = free->offset + free->length;
782 	}
783 	this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
784 	free = this->ecclayout->oobfree;
785 	for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES_LARGE && free->length;
786 	     i++, free++) {
787 		int free_end = free->offset + free->length;
788 		if (free->offset < readend && free_end > readcol) {
789 			int st = max_t(int,free->offset,readcol);
790 			int ed = min_t(int,free_end,readend);
791 			int n = ed - st;
792 			memcpy(buf, oob_buf + st, n);
793 			buf += n;
794 		} else if (column == 0)
795 			break;
796 	}
797 	return 0;
798 }
799 
800 /**
801  * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data
802  * @param mtd		MTD device structure
803  * @param addr		address to recover
804  * @param status	return value from onenand_wait
805  *
806  * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has
807  * lower page address and MSB page has higher page address in paired pages.
808  * If power off occurs during MSB page program, the paired LSB page data can
809  * become corrupt. LSB page recovery read is a way to read LSB page though page
810  * data are corrupted. When uncorrectable error occurs as a result of LSB page
811  * read after power up, issue LSB page recovery read.
812  */
813 static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
814 {
815 	struct onenand_chip *this = mtd->priv;
816 	int i;
817 
818 	/* Recovery is only for Flex-OneNAND */
819 	if (!FLEXONENAND(this))
820 		return status;
821 
822 	/* check if we failed due to uncorrectable error */
823 	if (!mtd_is_eccerr(status) && status != ONENAND_BBT_READ_ECC_ERROR)
824 		return status;
825 
826 	/* check if address lies in MLC region */
827 	i = flexonenand_region(mtd, addr);
828 	if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift))
829 		return status;
830 
831 	printk("onenand_recover_lsb:"
832 		"Attempting to recover from uncorrectable read\n");
833 
834 	/* Issue the LSB page recovery command */
835 	this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize);
836 	return this->wait(mtd, FL_READING);
837 }
838 
839 /**
840  * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
841  * @param mtd		MTD device structure
842  * @param from		offset to read from
843  * @param ops		oob operation description structure
844  *
845  * OneNAND read main and/or out-of-band data
846  */
847 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
848 		struct mtd_oob_ops *ops)
849 {
850 	struct onenand_chip *this = mtd->priv;
851 	struct mtd_ecc_stats stats;
852 	size_t len = ops->len;
853 	size_t ooblen = ops->ooblen;
854 	u_char *buf = ops->datbuf;
855 	u_char *oobbuf = ops->oobbuf;
856 	int read = 0, column, thislen;
857 	int oobread = 0, oobcolumn, thisooblen, oobsize;
858 	int ret = 0, boundary = 0;
859 	int writesize = this->writesize;
860 
861 	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
862 
863 	if (ops->mode == MTD_OPS_AUTO_OOB)
864 		oobsize = this->ecclayout->oobavail;
865 	else
866 		oobsize = mtd->oobsize;
867 
868 	oobcolumn = from & (mtd->oobsize - 1);
869 
870 	/* Do not allow reads past end of device */
871 	if ((from + len) > mtd->size) {
872 		printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n");
873 		ops->retlen = 0;
874 		ops->oobretlen = 0;
875 		return -EINVAL;
876 	}
877 
878 	stats = mtd->ecc_stats;
879 
880 	/* Read-while-load method */
881 	/* Note: We can't use this feature in MLC */
882 
883 	/* Do first load to bufferRAM */
884 	if (read < len) {
885 		if (!onenand_check_bufferram(mtd, from)) {
886 			this->main_buf = buf;
887 			this->command(mtd, ONENAND_CMD_READ, from, writesize);
888 			ret = this->wait(mtd, FL_READING);
889 			if (unlikely(ret))
890 				ret = onenand_recover_lsb(mtd, from, ret);
891 			onenand_update_bufferram(mtd, from, !ret);
892 			if (ret == -EBADMSG)
893 				ret = 0;
894 		}
895 	}
896 
897 	thislen = min_t(int, writesize, len - read);
898 	column = from & (writesize - 1);
899 	if (column + thislen > writesize)
900 		thislen = writesize - column;
901 
902 	while (!ret) {
903 		/* If there is more to load then start next load */
904 		from += thislen;
905 		if (!ONENAND_IS_4KB_PAGE(this) && read + thislen < len) {
906 			this->main_buf = buf + thislen;
907 			this->command(mtd, ONENAND_CMD_READ, from, writesize);
908 			/*
909 			 * Chip boundary handling in DDP
910 			 * Now we issued chip 1 read and pointed chip 1
911 			 * bufferam so we have to point chip 0 bufferam.
912 			 */
913 			if (ONENAND_IS_DDP(this) &&
914 					unlikely(from == (this->chipsize >> 1))) {
915 				this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
916 				boundary = 1;
917 			} else
918 				boundary = 0;
919 			ONENAND_SET_PREV_BUFFERRAM(this);
920 		}
921 
922 		/* While load is going, read from last bufferRAM */
923 		this->read_bufferram(mtd, from - thislen, ONENAND_DATARAM, buf, column, thislen);
924 
925 		/* Read oob area if needed */
926 		if (oobbuf) {
927 			thisooblen = oobsize - oobcolumn;
928 			thisooblen = min_t(int, thisooblen, ooblen - oobread);
929 
930 			if (ops->mode == MTD_OPS_AUTO_OOB)
931 				onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
932 			else
933 				this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
934 			oobread += thisooblen;
935 			oobbuf += thisooblen;
936 			oobcolumn = 0;
937 		}
938 
939 		if (ONENAND_IS_4KB_PAGE(this) && (read + thislen < len)) {
940 			this->command(mtd, ONENAND_CMD_READ, from, writesize);
941 			ret = this->wait(mtd, FL_READING);
942 			if (unlikely(ret))
943 				ret = onenand_recover_lsb(mtd, from, ret);
944 			onenand_update_bufferram(mtd, from, !ret);
945 			if (mtd_is_eccerr(ret))
946 				ret = 0;
947 		}
948 
949 		/* See if we are done */
950 		read += thislen;
951 		if (read == len)
952 			break;
953 		/* Set up for next read from bufferRAM */
954 		if (unlikely(boundary))
955 			this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
956 		if (!ONENAND_IS_4KB_PAGE(this))
957 			ONENAND_SET_NEXT_BUFFERRAM(this);
958 		buf += thislen;
959 		thislen = min_t(int, writesize, len - read);
960 		column = 0;
961 
962 		if (!ONENAND_IS_4KB_PAGE(this)) {
963 			/* Now wait for load */
964 			ret = this->wait(mtd, FL_READING);
965 			onenand_update_bufferram(mtd, from, !ret);
966 			if (mtd_is_eccerr(ret))
967 				ret = 0;
968 		}
969 	}
970 
971 	/*
972 	 * Return success, if no ECC failures, else -EBADMSG
973 	 * fs driver will take care of that, because
974 	 * retlen == desired len and result == -EBADMSG
975 	 */
976 	ops->retlen = read;
977 	ops->oobretlen = oobread;
978 
979 	if (ret)
980 		return ret;
981 
982 	if (mtd->ecc_stats.failed - stats.failed)
983 		return -EBADMSG;
984 
985 	/* return max bitflips per ecc step; ONENANDs correct 1 bit only */
986 	return mtd->ecc_stats.corrected != stats.corrected ? 1 : 0;
987 }
988 
989 /**
990  * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
991  * @param mtd		MTD device structure
992  * @param from		offset to read from
993  * @param ops		oob operation description structure
994  *
995  * OneNAND read out-of-band data from the spare area
996  */
997 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
998 		struct mtd_oob_ops *ops)
999 {
1000 	struct onenand_chip *this = mtd->priv;
1001 	struct mtd_ecc_stats stats;
1002 	int read = 0, thislen, column, oobsize;
1003 	size_t len = ops->ooblen;
1004 	unsigned int mode = ops->mode;
1005 	u_char *buf = ops->oobbuf;
1006 	int ret = 0, readcmd;
1007 
1008 	from += ops->ooboffs;
1009 
1010 	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
1011 
1012 	/* Initialize return length value */
1013 	ops->oobretlen = 0;
1014 
1015 	if (mode == MTD_OPS_AUTO_OOB)
1016 		oobsize = this->ecclayout->oobavail;
1017 	else
1018 		oobsize = mtd->oobsize;
1019 
1020 	column = from & (mtd->oobsize - 1);
1021 
1022 	if (unlikely(column >= oobsize)) {
1023 		printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n");
1024 		return -EINVAL;
1025 	}
1026 
1027 	/* Do not allow reads past end of device */
1028 	if (unlikely(from >= mtd->size ||
1029 		column + len > ((mtd->size >> this->page_shift) -
1030 				(from >> this->page_shift)) * oobsize)) {
1031 		printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n");
1032 		return -EINVAL;
1033 	}
1034 
1035 	stats = mtd->ecc_stats;
1036 
1037 	readcmd = ONENAND_IS_4KB_PAGE(this) ?
1038 		ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1039 
1040 	while (read < len) {
1041 		thislen = oobsize - column;
1042 		thislen = min_t(int, thislen, len);
1043 
1044 		this->spare_buf = buf;
1045 		this->command(mtd, readcmd, from, mtd->oobsize);
1046 
1047 		onenand_update_bufferram(mtd, from, 0);
1048 
1049 		ret = this->wait(mtd, FL_READING);
1050 		if (unlikely(ret))
1051 			ret = onenand_recover_lsb(mtd, from, ret);
1052 
1053 		if (ret && ret != -EBADMSG) {
1054 			printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret);
1055 			break;
1056 		}
1057 
1058 		if (mode == MTD_OPS_AUTO_OOB)
1059 			onenand_transfer_auto_oob(mtd, buf, column, thislen);
1060 		else
1061 			this->read_bufferram(mtd, 0, ONENAND_SPARERAM, buf, column, thislen);
1062 
1063 		read += thislen;
1064 
1065 		if (read == len)
1066 			break;
1067 
1068 		buf += thislen;
1069 
1070 		/* Read more? */
1071 		if (read < len) {
1072 			/* Page size */
1073 			from += mtd->writesize;
1074 			column = 0;
1075 		}
1076 	}
1077 
1078 	ops->oobretlen = read;
1079 
1080 	if (ret)
1081 		return ret;
1082 
1083 	if (mtd->ecc_stats.failed - stats.failed)
1084 		return -EBADMSG;
1085 
1086 	return 0;
1087 }
1088 
1089 /**
1090  * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
1091  * @param mtd		MTD device structure
1092  * @param from		offset to read from
1093  * @param len		number of bytes to read
1094  * @param retlen	pointer to variable to store the number of read bytes
1095  * @param buf		the databuffer to put data
1096  *
1097  * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
1098 */
1099 int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1100 		 size_t * retlen, u_char * buf)
1101 {
1102 	struct mtd_oob_ops ops = {
1103 		.len    = len,
1104 		.ooblen = 0,
1105 		.datbuf = buf,
1106 		.oobbuf = NULL,
1107 	};
1108 	int ret;
1109 
1110 	onenand_get_device(mtd, FL_READING);
1111 	ret = onenand_read_ops_nolock(mtd, from, &ops);
1112 	onenand_release_device(mtd);
1113 
1114 	*retlen = ops.retlen;
1115 	return ret;
1116 }
1117 
1118 /**
1119  * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
1120  * @param mtd		MTD device structure
1121  * @param from		offset to read from
1122  * @param ops		oob operations description structure
1123  *
1124  * OneNAND main and/or out-of-band
1125  */
1126 int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1127 			struct mtd_oob_ops *ops)
1128 {
1129 	int ret;
1130 
1131 	switch (ops->mode) {
1132 	case MTD_OPS_PLACE_OOB:
1133 	case MTD_OPS_AUTO_OOB:
1134 		break;
1135 	case MTD_OPS_RAW:
1136 		/* Not implemented yet */
1137 	default:
1138 		return -EINVAL;
1139 	}
1140 
1141 	onenand_get_device(mtd, FL_READING);
1142 	if (ops->datbuf)
1143 		ret = onenand_read_ops_nolock(mtd, from, ops);
1144 	else
1145 		ret = onenand_read_oob_nolock(mtd, from, ops);
1146 	onenand_release_device(mtd);
1147 
1148 	return ret;
1149 }
1150 
1151 /**
1152  * onenand_bbt_wait - [DEFAULT] wait until the command is done
1153  * @param mtd		MTD device structure
1154  * @param state		state to select the max. timeout value
1155  *
1156  * Wait for command done.
1157  */
1158 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1159 {
1160 	struct onenand_chip *this = mtd->priv;
1161 	unsigned int interrupt;
1162 	unsigned int ctrl;
1163 
1164 	/* Wait at most 20ms ... */
1165 	u32 timeo = (CONFIG_SYS_HZ * 20) / 1000;
1166 	u32 time_start = get_timer(0);
1167 	do {
1168 		WATCHDOG_RESET();
1169 		if (get_timer(time_start) > timeo)
1170 			return ONENAND_BBT_READ_FATAL_ERROR;
1171 		interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1172 	} while ((interrupt & ONENAND_INT_MASTER) == 0);
1173 
1174 	/* To get correct interrupt status in timeout case */
1175 	interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1176 	ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1177 
1178 	if (interrupt & ONENAND_INT_READ) {
1179 		int ecc = onenand_read_ecc(this);
1180 		if (ecc & ONENAND_ECC_2BIT_ALL) {
1181 			printk(KERN_INFO "onenand_bbt_wait: ecc error = 0x%04x"
1182 				", controller = 0x%04x\n", ecc, ctrl);
1183 			return ONENAND_BBT_READ_ERROR;
1184 		}
1185 	} else {
1186 		printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1187 				"ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1188 		return ONENAND_BBT_READ_FATAL_ERROR;
1189 	}
1190 
1191 	/* Initial bad block case: 0x2400 or 0x0400 */
1192 	if (ctrl & ONENAND_CTRL_ERROR) {
1193 		printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
1194 		return ONENAND_BBT_READ_ERROR;
1195 	}
1196 
1197 	return 0;
1198 }
1199 
1200 /**
1201  * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1202  * @param mtd		MTD device structure
1203  * @param from		offset to read from
1204  * @param ops		oob operation description structure
1205  *
1206  * OneNAND read out-of-band data from the spare area for bbt scan
1207  */
1208 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1209 		struct mtd_oob_ops *ops)
1210 {
1211 	struct onenand_chip *this = mtd->priv;
1212 	int read = 0, thislen, column;
1213 	int ret = 0, readcmd;
1214 	size_t len = ops->ooblen;
1215 	u_char *buf = ops->oobbuf;
1216 
1217 	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1218 
1219 	readcmd = ONENAND_IS_4KB_PAGE(this) ?
1220 		ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1221 
1222 	/* Initialize return value */
1223 	ops->oobretlen = 0;
1224 
1225 	/* Do not allow reads past end of device */
1226 	if (unlikely((from + len) > mtd->size)) {
1227 		printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1228 		return ONENAND_BBT_READ_FATAL_ERROR;
1229 	}
1230 
1231 	/* Grab the lock and see if the device is available */
1232 	onenand_get_device(mtd, FL_READING);
1233 
1234 	column = from & (mtd->oobsize - 1);
1235 
1236 	while (read < len) {
1237 
1238 		thislen = mtd->oobsize - column;
1239 		thislen = min_t(int, thislen, len);
1240 
1241 		this->spare_buf = buf;
1242 		this->command(mtd, readcmd, from, mtd->oobsize);
1243 
1244 		onenand_update_bufferram(mtd, from, 0);
1245 
1246 		ret = this->bbt_wait(mtd, FL_READING);
1247 		if (unlikely(ret))
1248 			ret = onenand_recover_lsb(mtd, from, ret);
1249 
1250 		if (ret)
1251 			break;
1252 
1253 		this->read_bufferram(mtd, 0, ONENAND_SPARERAM, buf, column, thislen);
1254 		read += thislen;
1255 		if (read == len)
1256 			break;
1257 
1258 		buf += thislen;
1259 
1260 		/* Read more? */
1261 		if (read < len) {
1262 			/* Update Page size */
1263 			from += this->writesize;
1264 			column = 0;
1265 		}
1266 	}
1267 
1268 	/* Deselect and wake up anyone waiting on the device */
1269 	onenand_release_device(mtd);
1270 
1271 	ops->oobretlen = read;
1272 	return ret;
1273 }
1274 
1275 
1276 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1277 /**
1278  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1279  * @param mtd           MTD device structure
1280  * @param buf           the databuffer to verify
1281  * @param to            offset to read from
1282  */
1283 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1284 {
1285 	struct onenand_chip *this = mtd->priv;
1286 	u_char *oob_buf = this->oob_buf;
1287 	int status, i, readcmd;
1288 
1289 	readcmd = ONENAND_IS_4KB_PAGE(this) ?
1290 		ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1291 
1292 	this->command(mtd, readcmd, to, mtd->oobsize);
1293 	onenand_update_bufferram(mtd, to, 0);
1294 	status = this->wait(mtd, FL_READING);
1295 	if (status)
1296 		return status;
1297 
1298 	this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1299 	for (i = 0; i < mtd->oobsize; i++)
1300 		if (buf[i] != 0xFF && buf[i] != oob_buf[i])
1301 			return -EBADMSG;
1302 
1303 	return 0;
1304 }
1305 
1306 /**
1307  * onenand_verify - [GENERIC] verify the chip contents after a write
1308  * @param mtd          MTD device structure
1309  * @param buf          the databuffer to verify
1310  * @param addr         offset to read from
1311  * @param len          number of bytes to read and compare
1312  */
1313 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1314 {
1315 	struct onenand_chip *this = mtd->priv;
1316 	void __iomem *dataram;
1317 	int ret = 0;
1318 	int thislen, column;
1319 
1320 	while (len != 0) {
1321 		thislen = min_t(int, this->writesize, len);
1322 		column = addr & (this->writesize - 1);
1323 		if (column + thislen > this->writesize)
1324 			thislen = this->writesize - column;
1325 
1326 		this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1327 
1328 		onenand_update_bufferram(mtd, addr, 0);
1329 
1330 		ret = this->wait(mtd, FL_READING);
1331 		if (ret)
1332 			return ret;
1333 
1334 		onenand_update_bufferram(mtd, addr, 1);
1335 
1336 		dataram = this->base + ONENAND_DATARAM;
1337 		dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1338 
1339 		if (memcmp(buf, dataram + column, thislen))
1340 			return -EBADMSG;
1341 
1342 		len -= thislen;
1343 		buf += thislen;
1344 		addr += thislen;
1345 	}
1346 
1347 	return 0;
1348 }
1349 #else
1350 #define onenand_verify(...)             (0)
1351 #define onenand_verify_oob(...)         (0)
1352 #endif
1353 
1354 #define NOTALIGNED(x)	((x & (this->subpagesize - 1)) != 0)
1355 
1356 /**
1357  * onenand_fill_auto_oob - [INTERN] oob auto-placement transfer
1358  * @param mtd           MTD device structure
1359  * @param oob_buf       oob buffer
1360  * @param buf           source address
1361  * @param column        oob offset to write to
1362  * @param thislen       oob length to write
1363  */
1364 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1365 		const u_char *buf, int column, int thislen)
1366 {
1367 	struct onenand_chip *this = mtd->priv;
1368 	struct nand_oobfree *free;
1369 	int writecol = column;
1370 	int writeend = column + thislen;
1371 	int lastgap = 0;
1372 	unsigned int i;
1373 
1374 	free = this->ecclayout->oobfree;
1375 	for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES_LARGE && free->length;
1376 	     i++, free++) {
1377 		if (writecol >= lastgap)
1378 			writecol += free->offset - lastgap;
1379 		if (writeend >= lastgap)
1380 			writeend += free->offset - lastgap;
1381 		lastgap = free->offset + free->length;
1382 	}
1383 	free = this->ecclayout->oobfree;
1384 	for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES_LARGE && free->length;
1385 	     i++, free++) {
1386 		int free_end = free->offset + free->length;
1387 		if (free->offset < writeend && free_end > writecol) {
1388 			int st = max_t(int,free->offset,writecol);
1389 			int ed = min_t(int,free_end,writeend);
1390 			int n = ed - st;
1391 			memcpy(oob_buf + st, buf, n);
1392 			buf += n;
1393 		} else if (column == 0)
1394 			break;
1395 	}
1396 	return 0;
1397 }
1398 
1399 /**
1400  * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1401  * @param mtd           MTD device structure
1402  * @param to            offset to write to
1403  * @param ops           oob operation description structure
1404  *
1405  * Write main and/or oob with ECC
1406  */
1407 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1408 		struct mtd_oob_ops *ops)
1409 {
1410 	struct onenand_chip *this = mtd->priv;
1411 	int written = 0, column, thislen, subpage;
1412 	int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1413 	size_t len = ops->len;
1414 	size_t ooblen = ops->ooblen;
1415 	const u_char *buf = ops->datbuf;
1416 	const u_char *oob = ops->oobbuf;
1417 	u_char *oobbuf;
1418 	int ret = 0;
1419 
1420 	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1421 
1422 	/* Initialize retlen, in case of early exit */
1423 	ops->retlen = 0;
1424 	ops->oobretlen = 0;
1425 
1426 	/* Reject writes, which are not page aligned */
1427 	if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1428 		printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n");
1429 		return -EINVAL;
1430 	}
1431 
1432 	if (ops->mode == MTD_OPS_AUTO_OOB)
1433 		oobsize = this->ecclayout->oobavail;
1434 	else
1435 		oobsize = mtd->oobsize;
1436 
1437 	oobcolumn = to & (mtd->oobsize - 1);
1438 
1439 	column = to & (mtd->writesize - 1);
1440 
1441 	/* Loop until all data write */
1442 	while (written < len) {
1443 		u_char *wbuf = (u_char *) buf;
1444 
1445 		thislen = min_t(int, mtd->writesize - column, len - written);
1446 		thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1447 
1448 		this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1449 
1450 		/* Partial page write */
1451 		subpage = thislen < mtd->writesize;
1452 		if (subpage) {
1453 			memset(this->page_buf, 0xff, mtd->writesize);
1454 			memcpy(this->page_buf + column, buf, thislen);
1455 			wbuf = this->page_buf;
1456 		}
1457 
1458 		this->write_bufferram(mtd, to, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1459 
1460 		if (oob) {
1461 			oobbuf = this->oob_buf;
1462 
1463 			/* We send data to spare ram with oobsize
1464 			 *                          * to prevent byte access */
1465 			memset(oobbuf, 0xff, mtd->oobsize);
1466 			if (ops->mode == MTD_OPS_AUTO_OOB)
1467 				onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1468 			else
1469 				memcpy(oobbuf + oobcolumn, oob, thisooblen);
1470 
1471 			oobwritten += thisooblen;
1472 			oob += thisooblen;
1473 			oobcolumn = 0;
1474 		} else
1475 			oobbuf = (u_char *) ffchars;
1476 
1477 		this->write_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1478 
1479 		this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1480 
1481 		ret = this->wait(mtd, FL_WRITING);
1482 
1483 		/* In partial page write we don't update bufferram */
1484 		onenand_update_bufferram(mtd, to, !ret && !subpage);
1485 		if (ONENAND_IS_2PLANE(this)) {
1486 			ONENAND_SET_BUFFERRAM1(this);
1487 			onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1488 		}
1489 
1490 		if (ret) {
1491 			printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret);
1492 			break;
1493 		}
1494 
1495 		/* Only check verify write turn on */
1496 		ret = onenand_verify(mtd, buf, to, thislen);
1497 		if (ret) {
1498 			printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
1499 			break;
1500 		}
1501 
1502 		written += thislen;
1503 
1504 		if (written == len)
1505 			break;
1506 
1507 		column = 0;
1508 		to += thislen;
1509 		buf += thislen;
1510 	}
1511 
1512 	ops->retlen = written;
1513 
1514 	return ret;
1515 }
1516 
1517 /**
1518  * onenand_write_oob_nolock - [INTERN] OneNAND write out-of-band
1519  * @param mtd           MTD device structure
1520  * @param to            offset to write to
1521  * @param len           number of bytes to write
1522  * @param retlen        pointer to variable to store the number of written bytes
1523  * @param buf           the data to write
1524  * @param mode          operation mode
1525  *
1526  * OneNAND write out-of-band
1527  */
1528 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
1529 		struct mtd_oob_ops *ops)
1530 {
1531 	struct onenand_chip *this = mtd->priv;
1532 	int column, ret = 0, oobsize;
1533 	int written = 0, oobcmd;
1534 	u_char *oobbuf;
1535 	size_t len = ops->ooblen;
1536 	const u_char *buf = ops->oobbuf;
1537 	unsigned int mode = ops->mode;
1538 
1539 	to += ops->ooboffs;
1540 
1541 	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1542 
1543 	/* Initialize retlen, in case of early exit */
1544 	ops->oobretlen = 0;
1545 
1546 	if (mode == MTD_OPS_AUTO_OOB)
1547 		oobsize = this->ecclayout->oobavail;
1548 	else
1549 		oobsize = mtd->oobsize;
1550 
1551 	column = to & (mtd->oobsize - 1);
1552 
1553 	if (unlikely(column >= oobsize)) {
1554 		printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n");
1555 		return -EINVAL;
1556 	}
1557 
1558 	/* For compatibility with NAND: Do not allow write past end of page */
1559 	if (unlikely(column + len > oobsize)) {
1560 		printk(KERN_ERR "onenand_write_oob_nolock: "
1561 				"Attempt to write past end of page\n");
1562 		return -EINVAL;
1563 	}
1564 
1565 	/* Do not allow reads past end of device */
1566 	if (unlikely(to >= mtd->size ||
1567 				column + len > ((mtd->size >> this->page_shift) -
1568 					(to >> this->page_shift)) * oobsize)) {
1569 		printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n");
1570 		return -EINVAL;
1571 	}
1572 
1573 	oobbuf = this->oob_buf;
1574 
1575 	oobcmd = ONENAND_IS_4KB_PAGE(this) ?
1576 		ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
1577 
1578 	/* Loop until all data write */
1579 	while (written < len) {
1580 		int thislen = min_t(int, oobsize, len - written);
1581 
1582 		this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1583 
1584 		/* We send data to spare ram with oobsize
1585 		 * to prevent byte access */
1586 		memset(oobbuf, 0xff, mtd->oobsize);
1587 		if (mode == MTD_OPS_AUTO_OOB)
1588 			onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1589 		else
1590 			memcpy(oobbuf + column, buf, thislen);
1591 		this->write_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1592 
1593 		if (ONENAND_IS_4KB_PAGE(this)) {
1594 			/* Set main area of DataRAM to 0xff*/
1595 			memset(this->page_buf, 0xff, mtd->writesize);
1596 			this->write_bufferram(mtd, 0, ONENAND_DATARAM,
1597 				this->page_buf,	0, mtd->writesize);
1598 		}
1599 
1600 		this->command(mtd, oobcmd, to, mtd->oobsize);
1601 
1602 		onenand_update_bufferram(mtd, to, 0);
1603 		if (ONENAND_IS_2PLANE(this)) {
1604 			ONENAND_SET_BUFFERRAM1(this);
1605 			onenand_update_bufferram(mtd, to + this->writesize, 0);
1606 		}
1607 
1608 		ret = this->wait(mtd, FL_WRITING);
1609 		if (ret) {
1610 			printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret);
1611 			break;
1612 		}
1613 
1614 		ret = onenand_verify_oob(mtd, oobbuf, to);
1615 		if (ret) {
1616 			printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret);
1617 			break;
1618 		}
1619 
1620 		written += thislen;
1621 		if (written == len)
1622 			break;
1623 
1624 		to += mtd->writesize;
1625 		buf += thislen;
1626 		column = 0;
1627 	}
1628 
1629 	ops->oobretlen = written;
1630 
1631 	return ret;
1632 }
1633 
1634 /**
1635  * onenand_write - [MTD Interface] compability function for onenand_write_ecc
1636  * @param mtd		MTD device structure
1637  * @param to		offset to write to
1638  * @param len		number of bytes to write
1639  * @param retlen	pointer to variable to store the number of written bytes
1640  * @param buf		the data to write
1641  *
1642  * Write with ECC
1643  */
1644 int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1645 		  size_t * retlen, const u_char * buf)
1646 {
1647 	struct mtd_oob_ops ops = {
1648 		.len    = len,
1649 		.ooblen = 0,
1650 		.datbuf = (u_char *) buf,
1651 		.oobbuf = NULL,
1652 	};
1653 	int ret;
1654 
1655 	onenand_get_device(mtd, FL_WRITING);
1656 	ret = onenand_write_ops_nolock(mtd, to, &ops);
1657 	onenand_release_device(mtd);
1658 
1659 	*retlen = ops.retlen;
1660 	return ret;
1661 }
1662 
1663 /**
1664  * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
1665  * @param mtd		MTD device structure
1666  * @param to		offset to write to
1667  * @param ops		oob operation description structure
1668  *
1669  * OneNAND write main and/or out-of-band
1670  */
1671 int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1672 			struct mtd_oob_ops *ops)
1673 {
1674 	int ret;
1675 
1676 	switch (ops->mode) {
1677 	case MTD_OPS_PLACE_OOB:
1678 	case MTD_OPS_AUTO_OOB:
1679 		break;
1680 	case MTD_OPS_RAW:
1681 		/* Not implemented yet */
1682 	default:
1683 		return -EINVAL;
1684 	}
1685 
1686 	onenand_get_device(mtd, FL_WRITING);
1687 	if (ops->datbuf)
1688 		ret = onenand_write_ops_nolock(mtd, to, ops);
1689 	else
1690 		ret = onenand_write_oob_nolock(mtd, to, ops);
1691 	onenand_release_device(mtd);
1692 
1693 	return ret;
1694 
1695 }
1696 
1697 /**
1698  * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
1699  * @param mtd		MTD device structure
1700  * @param ofs		offset from device start
1701  * @param allowbbt	1, if its allowed to access the bbt area
1702  *
1703  * Check, if the block is bad, Either by reading the bad block table or
1704  * calling of the scan function.
1705  */
1706 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
1707 {
1708 	struct onenand_chip *this = mtd->priv;
1709 	struct bbm_info *bbm = this->bbm;
1710 
1711 	/* Return info from the table */
1712 	return bbm->isbad_bbt(mtd, ofs, allowbbt);
1713 }
1714 
1715 
1716 /**
1717  * onenand_erase - [MTD Interface] erase block(s)
1718  * @param mtd		MTD device structure
1719  * @param instr		erase instruction
1720  *
1721  * Erase one ore more blocks
1722  */
1723 int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1724 {
1725 	struct onenand_chip *this = mtd->priv;
1726 	unsigned int block_size;
1727 	loff_t addr = instr->addr;
1728 	unsigned int len = instr->len;
1729 	int ret = 0, i;
1730 	struct mtd_erase_region_info *region = NULL;
1731 	unsigned int region_end = 0;
1732 
1733 	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n",
1734 			(unsigned int) addr, len);
1735 
1736 	if (FLEXONENAND(this)) {
1737 		/* Find the eraseregion of this address */
1738 		i = flexonenand_region(mtd, addr);
1739 		region = &mtd->eraseregions[i];
1740 
1741 		block_size = region->erasesize;
1742 		region_end = region->offset
1743 			+ region->erasesize * region->numblocks;
1744 
1745 		/* Start address within region must align on block boundary.
1746 		 * Erase region's start offset is always block start address.
1747 		 */
1748 		if (unlikely((addr - region->offset) & (block_size - 1))) {
1749 			MTDDEBUG(MTD_DEBUG_LEVEL0, "onenand_erase:"
1750 				" Unaligned address\n");
1751 			return -EINVAL;
1752 		}
1753 	} else {
1754 		block_size = 1 << this->erase_shift;
1755 
1756 		/* Start address must align on block boundary */
1757 		if (unlikely(addr & (block_size - 1))) {
1758 			MTDDEBUG(MTD_DEBUG_LEVEL0, "onenand_erase:"
1759 						"Unaligned address\n");
1760 			return -EINVAL;
1761 		}
1762 	}
1763 
1764 	/* Length must align on block boundary */
1765 	if (unlikely(len & (block_size - 1))) {
1766 		MTDDEBUG (MTD_DEBUG_LEVEL0,
1767 			 "onenand_erase: Length not block aligned\n");
1768 		return -EINVAL;
1769 	}
1770 
1771 	/* Grab the lock and see if the device is available */
1772 	onenand_get_device(mtd, FL_ERASING);
1773 
1774 	/* Loop throught the pages */
1775 	instr->state = MTD_ERASING;
1776 
1777 	while (len) {
1778 
1779 		/* Check if we have a bad block, we do not erase bad blocks */
1780 		if (instr->priv == 0 && onenand_block_isbad_nolock(mtd, addr, 0)) {
1781 			printk(KERN_WARNING "onenand_erase: attempt to erase"
1782 				" a bad block at addr 0x%08x\n",
1783 				(unsigned int) addr);
1784 			instr->state = MTD_ERASE_FAILED;
1785 			goto erase_exit;
1786 		}
1787 
1788 		this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1789 
1790 		onenand_invalidate_bufferram(mtd, addr, block_size);
1791 
1792 		ret = this->wait(mtd, FL_ERASING);
1793 		/* Check, if it is write protected */
1794 		if (ret) {
1795 			if (ret == -EPERM)
1796 				MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
1797 					  "Device is write protected!!!\n");
1798 			else
1799 				MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
1800 					  "Failed erase, block %d\n",
1801 					onenand_block(this, addr));
1802 			instr->state = MTD_ERASE_FAILED;
1803 			instr->fail_addr = addr;
1804 
1805 			goto erase_exit;
1806 		}
1807 
1808 		len -= block_size;
1809 		addr += block_size;
1810 
1811 		if (addr == region_end) {
1812 			if (!len)
1813 				break;
1814 			region++;
1815 
1816 			block_size = region->erasesize;
1817 			region_end = region->offset
1818 				+ region->erasesize * region->numblocks;
1819 
1820 			if (len & (block_size - 1)) {
1821 				/* This has been checked at MTD
1822 				 * partitioning level. */
1823 				printk("onenand_erase: Unaligned address\n");
1824 				goto erase_exit;
1825 			}
1826 		}
1827 	}
1828 
1829 	instr->state = MTD_ERASE_DONE;
1830 
1831 erase_exit:
1832 
1833 	ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1834 	/* Do call back function */
1835 	if (!ret)
1836 		mtd_erase_callback(instr);
1837 
1838 	/* Deselect and wake up anyone waiting on the device */
1839 	onenand_release_device(mtd);
1840 
1841 	return ret;
1842 }
1843 
1844 /**
1845  * onenand_sync - [MTD Interface] sync
1846  * @param mtd		MTD device structure
1847  *
1848  * Sync is actually a wait for chip ready function
1849  */
1850 void onenand_sync(struct mtd_info *mtd)
1851 {
1852 	MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1853 
1854 	/* Grab the lock and see if the device is available */
1855 	onenand_get_device(mtd, FL_SYNCING);
1856 
1857 	/* Release it and go back */
1858 	onenand_release_device(mtd);
1859 }
1860 
1861 /**
1862  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1863  * @param mtd		MTD device structure
1864  * @param ofs		offset relative to mtd start
1865  *
1866  * Check whether the block is bad
1867  */
1868 int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1869 {
1870 	int ret;
1871 
1872 	/* Check for invalid offset */
1873 	if (ofs > mtd->size)
1874 		return -EINVAL;
1875 
1876 	onenand_get_device(mtd, FL_READING);
1877 	ret = onenand_block_isbad_nolock(mtd,ofs, 0);
1878 	onenand_release_device(mtd);
1879 	return ret;
1880 }
1881 
1882 /**
1883  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1884  * @param mtd           MTD device structure
1885  * @param ofs           offset from device start
1886  *
1887  * This is the default implementation, which can be overridden by
1888  * a hardware specific driver.
1889  */
1890 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1891 {
1892 	struct onenand_chip *this = mtd->priv;
1893 	struct bbm_info *bbm = this->bbm;
1894 	u_char buf[2] = {0, 0};
1895 	struct mtd_oob_ops ops = {
1896 		.mode = MTD_OPS_PLACE_OOB,
1897 		.ooblen = 2,
1898 		.oobbuf = buf,
1899 		.ooboffs = 0,
1900 	};
1901 	int block;
1902 
1903 	/* Get block number */
1904 	block = onenand_block(this, ofs);
1905 	if (bbm->bbt)
1906 		bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1907 
1908 	/* We write two bytes, so we dont have to mess with 16 bit access */
1909 	ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1910 	return onenand_write_oob_nolock(mtd, ofs, &ops);
1911 }
1912 
1913 /**
1914  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1915  * @param mtd		MTD device structure
1916  * @param ofs		offset relative to mtd start
1917  *
1918  * Mark the block as bad
1919  */
1920 int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1921 {
1922 	struct onenand_chip *this = mtd->priv;
1923 	int ret;
1924 
1925 	ret = onenand_block_isbad(mtd, ofs);
1926 	if (ret) {
1927 		/* If it was bad already, return success and do nothing */
1928 		if (ret > 0)
1929 			return 0;
1930 		return ret;
1931 	}
1932 
1933 	onenand_get_device(mtd, FL_WRITING);
1934 	ret = this->block_markbad(mtd, ofs);
1935 	onenand_release_device(mtd);
1936 
1937 	return ret;
1938 }
1939 
1940 /**
1941  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1942  * @param mtd           MTD device structure
1943  * @param ofs           offset relative to mtd start
1944  * @param len           number of bytes to lock or unlock
1945  * @param cmd           lock or unlock command
1946  *
1947  * Lock or unlock one or more blocks
1948  */
1949 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1950 {
1951 	struct onenand_chip *this = mtd->priv;
1952 	int start, end, block, value, status;
1953 
1954 	start = onenand_block(this, ofs);
1955 	end = onenand_block(this, ofs + len);
1956 
1957 	/* Continuous lock scheme */
1958 	if (this->options & ONENAND_HAS_CONT_LOCK) {
1959 		/* Set start block address */
1960 		this->write_word(start,
1961 				 this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1962 		/* Set end block address */
1963 		this->write_word(end - 1,
1964 				 this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1965 		/* Write unlock command */
1966 		this->command(mtd, cmd, 0, 0);
1967 
1968 		/* There's no return value */
1969 		this->wait(mtd, FL_UNLOCKING);
1970 
1971 		/* Sanity check */
1972 		while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1973 		       & ONENAND_CTRL_ONGO)
1974 			continue;
1975 
1976 		/* Check lock status */
1977 		status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1978 		if (!(status & ONENAND_WP_US))
1979 			printk(KERN_ERR "wp status = 0x%x\n", status);
1980 
1981 		return 0;
1982 	}
1983 
1984 	/* Block lock scheme */
1985 	for (block = start; block < end; block++) {
1986 		/* Set block address */
1987 		value = onenand_block_address(this, block);
1988 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1989 		/* Select DataRAM for DDP */
1990 		value = onenand_bufferram_address(this, block);
1991 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1992 
1993 		/* Set start block address */
1994 		this->write_word(block,
1995 				 this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1996 		/* Write unlock command */
1997 		this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1998 
1999 		/* There's no return value */
2000 		this->wait(mtd, FL_UNLOCKING);
2001 
2002 		/* Sanity check */
2003 		while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2004 		       & ONENAND_CTRL_ONGO)
2005 			continue;
2006 
2007 		/* Check lock status */
2008 		status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2009 		if (!(status & ONENAND_WP_US))
2010 			printk(KERN_ERR "block = %d, wp status = 0x%x\n",
2011 			       block, status);
2012 	}
2013 
2014 	return 0;
2015 }
2016 
2017 #ifdef ONENAND_LINUX
2018 /**
2019  * onenand_lock - [MTD Interface] Lock block(s)
2020  * @param mtd           MTD device structure
2021  * @param ofs           offset relative to mtd start
2022  * @param len           number of bytes to unlock
2023  *
2024  * Lock one or more blocks
2025  */
2026 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
2027 {
2028 	int ret;
2029 
2030 	onenand_get_device(mtd, FL_LOCKING);
2031 	ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
2032 	onenand_release_device(mtd);
2033 	return ret;
2034 }
2035 
2036 /**
2037  * onenand_unlock - [MTD Interface] Unlock block(s)
2038  * @param mtd           MTD device structure
2039  * @param ofs           offset relative to mtd start
2040  * @param len           number of bytes to unlock
2041  *
2042  * Unlock one or more blocks
2043  */
2044 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
2045 {
2046 	int ret;
2047 
2048 	onenand_get_device(mtd, FL_LOCKING);
2049 	ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2050 	onenand_release_device(mtd);
2051 	return ret;
2052 }
2053 #endif
2054 
2055 /**
2056  * onenand_check_lock_status - [OneNAND Interface] Check lock status
2057  * @param this          onenand chip data structure
2058  *
2059  * Check lock status
2060  */
2061 static int onenand_check_lock_status(struct onenand_chip *this)
2062 {
2063 	unsigned int value, block, status;
2064 	unsigned int end;
2065 
2066 	end = this->chipsize >> this->erase_shift;
2067 	for (block = 0; block < end; block++) {
2068 		/* Set block address */
2069 		value = onenand_block_address(this, block);
2070 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2071 		/* Select DataRAM for DDP */
2072 		value = onenand_bufferram_address(this, block);
2073 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2074 		/* Set start block address */
2075 		this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2076 
2077 		/* Check lock status */
2078 		status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2079 		if (!(status & ONENAND_WP_US)) {
2080 			printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
2081 			return 0;
2082 		}
2083 	}
2084 
2085 	return 1;
2086 }
2087 
2088 /**
2089  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
2090  * @param mtd           MTD device structure
2091  *
2092  * Unlock all blocks
2093  */
2094 static void onenand_unlock_all(struct mtd_info *mtd)
2095 {
2096 	struct onenand_chip *this = mtd->priv;
2097 	loff_t ofs = 0;
2098 	size_t len = mtd->size;
2099 
2100 	if (this->options & ONENAND_HAS_UNLOCK_ALL) {
2101 		/* Set start block address */
2102 		this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2103 		/* Write unlock command */
2104 		this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
2105 
2106 		/* There's no return value */
2107 		this->wait(mtd, FL_LOCKING);
2108 
2109 		/* Sanity check */
2110 		while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2111 				& ONENAND_CTRL_ONGO)
2112 			continue;
2113 
2114 		/* Check lock status */
2115 		if (onenand_check_lock_status(this))
2116 			return;
2117 
2118 		/* Workaround for all block unlock in DDP */
2119 		if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) {
2120 			/* All blocks on another chip */
2121 			ofs = this->chipsize >> 1;
2122 			len = this->chipsize >> 1;
2123 		}
2124 	}
2125 
2126 	onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2127 }
2128 
2129 
2130 /**
2131  * onenand_check_features - Check and set OneNAND features
2132  * @param mtd           MTD data structure
2133  *
2134  * Check and set OneNAND features
2135  * - lock scheme
2136  * - two plane
2137  */
2138 static void onenand_check_features(struct mtd_info *mtd)
2139 {
2140 	struct onenand_chip *this = mtd->priv;
2141 	unsigned int density, process;
2142 
2143 	/* Lock scheme depends on density and process */
2144 	density = onenand_get_density(this->device_id);
2145 	process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2146 
2147 	/* Lock scheme */
2148 	switch (density) {
2149 	case ONENAND_DEVICE_DENSITY_4Gb:
2150 		if (ONENAND_IS_DDP(this))
2151 			this->options |= ONENAND_HAS_2PLANE;
2152 		else
2153 			this->options |= ONENAND_HAS_4KB_PAGE;
2154 
2155 	case ONENAND_DEVICE_DENSITY_2Gb:
2156 		/* 2Gb DDP don't have 2 plane */
2157 		if (!ONENAND_IS_DDP(this))
2158 			this->options |= ONENAND_HAS_2PLANE;
2159 		this->options |= ONENAND_HAS_UNLOCK_ALL;
2160 
2161 	case ONENAND_DEVICE_DENSITY_1Gb:
2162 		/* A-Die has all block unlock */
2163 		if (process)
2164 			this->options |= ONENAND_HAS_UNLOCK_ALL;
2165 		break;
2166 
2167 	default:
2168 		/* Some OneNAND has continuous lock scheme */
2169 		if (!process)
2170 			this->options |= ONENAND_HAS_CONT_LOCK;
2171 		break;
2172 	}
2173 
2174 	if (ONENAND_IS_MLC(this))
2175 		this->options |= ONENAND_HAS_4KB_PAGE;
2176 
2177 	if (ONENAND_IS_4KB_PAGE(this))
2178 		this->options &= ~ONENAND_HAS_2PLANE;
2179 
2180 	if (FLEXONENAND(this)) {
2181 		this->options &= ~ONENAND_HAS_CONT_LOCK;
2182 		this->options |= ONENAND_HAS_UNLOCK_ALL;
2183 	}
2184 
2185 	if (this->options & ONENAND_HAS_CONT_LOCK)
2186 		printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
2187 	if (this->options & ONENAND_HAS_UNLOCK_ALL)
2188 		printk(KERN_DEBUG "Chip support all block unlock\n");
2189 	if (this->options & ONENAND_HAS_2PLANE)
2190 		printk(KERN_DEBUG "Chip has 2 plane\n");
2191 	if (this->options & ONENAND_HAS_4KB_PAGE)
2192 		printk(KERN_DEBUG "Chip has 4KiB pagesize\n");
2193 
2194 }
2195 
2196 /**
2197  * onenand_print_device_info - Print device ID
2198  * @param device        device ID
2199  *
2200  * Print device ID
2201  */
2202 char *onenand_print_device_info(int device, int version)
2203 {
2204 	int vcc, demuxed, ddp, density, flexonenand;
2205 	char *dev_info = malloc(80);
2206 	char *p = dev_info;
2207 
2208 	vcc = device & ONENAND_DEVICE_VCC_MASK;
2209 	demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2210 	ddp = device & ONENAND_DEVICE_IS_DDP;
2211 	density = onenand_get_density(device);
2212 	flexonenand = device & DEVICE_IS_FLEXONENAND;
2213 	p += sprintf(dev_info, "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)",
2214 	       demuxed ? "" : "Muxed ",
2215 	       flexonenand ? "Flex-" : "",
2216 	       ddp ? "(DDP)" : "",
2217 	       (16 << density), vcc ? "2.65/3.3" : "1.8", device);
2218 
2219 	sprintf(p, "\nOneNAND version = 0x%04x", version);
2220 	printk("%s\n", dev_info);
2221 
2222 	return dev_info;
2223 }
2224 
2225 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2226 	{ONENAND_MFR_NUMONYX, "Numonyx"},
2227 	{ONENAND_MFR_SAMSUNG, "Samsung"},
2228 };
2229 
2230 /**
2231  * onenand_check_maf - Check manufacturer ID
2232  * @param manuf         manufacturer ID
2233  *
2234  * Check manufacturer ID
2235  */
2236 static int onenand_check_maf(int manuf)
2237 {
2238 	int size = ARRAY_SIZE(onenand_manuf_ids);
2239 	int i;
2240 #ifdef ONENAND_DEBUG
2241 	char *name;
2242 #endif
2243 
2244 	for (i = 0; i < size; i++)
2245 		if (manuf == onenand_manuf_ids[i].id)
2246 			break;
2247 
2248 #ifdef ONENAND_DEBUG
2249 	if (i < size)
2250 		name = onenand_manuf_ids[i].name;
2251 	else
2252 		name = "Unknown";
2253 
2254 	printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2255 #endif
2256 
2257 	return i == size;
2258 }
2259 
2260 /**
2261 * flexonenand_get_boundary	- Reads the SLC boundary
2262 * @param onenand_info		- onenand info structure
2263 *
2264 * Fill up boundary[] field in onenand_chip
2265 **/
2266 static int flexonenand_get_boundary(struct mtd_info *mtd)
2267 {
2268 	struct onenand_chip *this = mtd->priv;
2269 	unsigned int die, bdry;
2270 	int syscfg, locked;
2271 
2272 	/* Disable ECC */
2273 	syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2274 	this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1);
2275 
2276 	for (die = 0; die < this->dies; die++) {
2277 		this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
2278 		this->wait(mtd, FL_SYNCING);
2279 
2280 		this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
2281 		this->wait(mtd, FL_READING);
2282 
2283 		bdry = this->read_word(this->base + ONENAND_DATARAM);
2284 		if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3)
2285 			locked = 0;
2286 		else
2287 			locked = 1;
2288 		this->boundary[die] = bdry & FLEXONENAND_PI_MASK;
2289 
2290 		this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2291 		this->wait(mtd, FL_RESETING);
2292 
2293 		printk(KERN_INFO "Die %d boundary: %d%s\n", die,
2294 		       this->boundary[die], locked ? "(Locked)" : "(Unlocked)");
2295 	}
2296 
2297 	/* Enable ECC */
2298 	this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2299 	return 0;
2300 }
2301 
2302 /**
2303  * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info
2304  * 			  boundary[], diesize[], mtd->size, mtd->erasesize,
2305  * 			  mtd->eraseregions
2306  * @param mtd		- MTD device structure
2307  */
2308 static void flexonenand_get_size(struct mtd_info *mtd)
2309 {
2310 	struct onenand_chip *this = mtd->priv;
2311 	int die, i, eraseshift, density;
2312 	int blksperdie, maxbdry;
2313 	loff_t ofs;
2314 
2315 	density = onenand_get_density(this->device_id);
2316 	blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift);
2317 	blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
2318 	maxbdry = blksperdie - 1;
2319 	eraseshift = this->erase_shift - 1;
2320 
2321 	mtd->numeraseregions = this->dies << 1;
2322 
2323 	/* This fills up the device boundary */
2324 	flexonenand_get_boundary(mtd);
2325 	die = 0;
2326 	ofs = 0;
2327 	i = -1;
2328 	for (; die < this->dies; die++) {
2329 		if (!die || this->boundary[die-1] != maxbdry) {
2330 			i++;
2331 			mtd->eraseregions[i].offset = ofs;
2332 			mtd->eraseregions[i].erasesize = 1 << eraseshift;
2333 			mtd->eraseregions[i].numblocks =
2334 							this->boundary[die] + 1;
2335 			ofs += mtd->eraseregions[i].numblocks << eraseshift;
2336 			eraseshift++;
2337 		} else {
2338 			mtd->numeraseregions -= 1;
2339 			mtd->eraseregions[i].numblocks +=
2340 							this->boundary[die] + 1;
2341 			ofs += (this->boundary[die] + 1) << (eraseshift - 1);
2342 		}
2343 		if (this->boundary[die] != maxbdry) {
2344 			i++;
2345 			mtd->eraseregions[i].offset = ofs;
2346 			mtd->eraseregions[i].erasesize = 1 << eraseshift;
2347 			mtd->eraseregions[i].numblocks = maxbdry ^
2348 							 this->boundary[die];
2349 			ofs += mtd->eraseregions[i].numblocks << eraseshift;
2350 			eraseshift--;
2351 		} else
2352 			mtd->numeraseregions -= 1;
2353 	}
2354 
2355 	/* Expose MLC erase size except when all blocks are SLC */
2356 	mtd->erasesize = 1 << this->erase_shift;
2357 	if (mtd->numeraseregions == 1)
2358 		mtd->erasesize >>= 1;
2359 
2360 	printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions);
2361 	for (i = 0; i < mtd->numeraseregions; i++)
2362 		printk(KERN_INFO "[offset: 0x%08llx, erasesize: 0x%05x,"
2363 			" numblocks: %04u]\n", mtd->eraseregions[i].offset,
2364 			mtd->eraseregions[i].erasesize,
2365 			mtd->eraseregions[i].numblocks);
2366 
2367 	for (die = 0, mtd->size = 0; die < this->dies; die++) {
2368 		this->diesize[die] = (loff_t) (blksperdie << this->erase_shift);
2369 		this->diesize[die] -= (loff_t) (this->boundary[die] + 1)
2370 						 << (this->erase_shift - 1);
2371 		mtd->size += this->diesize[die];
2372 	}
2373 }
2374 
2375 /**
2376  * flexonenand_check_blocks_erased - Check if blocks are erased
2377  * @param mtd_info	- mtd info structure
2378  * @param start		- first erase block to check
2379  * @param end		- last erase block to check
2380  *
2381  * Converting an unerased block from MLC to SLC
2382  * causes byte values to change. Since both data and its ECC
2383  * have changed, reads on the block give uncorrectable error.
2384  * This might lead to the block being detected as bad.
2385  *
2386  * Avoid this by ensuring that the block to be converted is
2387  * erased.
2388  */
2389 static int flexonenand_check_blocks_erased(struct mtd_info *mtd,
2390 					int start, int end)
2391 {
2392 	struct onenand_chip *this = mtd->priv;
2393 	int i, ret;
2394 	int block;
2395 	struct mtd_oob_ops ops = {
2396 		.mode = MTD_OPS_PLACE_OOB,
2397 		.ooboffs = 0,
2398 		.ooblen	= mtd->oobsize,
2399 		.datbuf	= NULL,
2400 		.oobbuf	= this->oob_buf,
2401 	};
2402 	loff_t addr;
2403 
2404 	printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end);
2405 
2406 	for (block = start; block <= end; block++) {
2407 		addr = flexonenand_addr(this, block);
2408 		if (onenand_block_isbad_nolock(mtd, addr, 0))
2409 			continue;
2410 
2411 		/*
2412 		 * Since main area write results in ECC write to spare,
2413 		 * it is sufficient to check only ECC bytes for change.
2414 		 */
2415 		ret = onenand_read_oob_nolock(mtd, addr, &ops);
2416 		if (ret)
2417 			return ret;
2418 
2419 		for (i = 0; i < mtd->oobsize; i++)
2420 			if (this->oob_buf[i] != 0xff)
2421 				break;
2422 
2423 		if (i != mtd->oobsize) {
2424 			printk(KERN_WARNING "Block %d not erased.\n", block);
2425 			return 1;
2426 		}
2427 	}
2428 
2429 	return 0;
2430 }
2431 
2432 /**
2433  * flexonenand_set_boundary	- Writes the SLC boundary
2434  * @param mtd			- mtd info structure
2435  */
2436 int flexonenand_set_boundary(struct mtd_info *mtd, int die,
2437 				    int boundary, int lock)
2438 {
2439 	struct onenand_chip *this = mtd->priv;
2440 	int ret, density, blksperdie, old, new, thisboundary;
2441 	loff_t addr;
2442 
2443 	if (die >= this->dies)
2444 		return -EINVAL;
2445 
2446 	if (boundary == this->boundary[die])
2447 		return 0;
2448 
2449 	density = onenand_get_density(this->device_id);
2450 	blksperdie = ((16 << density) << 20) >> this->erase_shift;
2451 	blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
2452 
2453 	if (boundary >= blksperdie) {
2454 		printk("flexonenand_set_boundary:"
2455 			"Invalid boundary value. "
2456 			"Boundary not changed.\n");
2457 		return -EINVAL;
2458 	}
2459 
2460 	/* Check if converting blocks are erased */
2461 	old = this->boundary[die] + (die * this->density_mask);
2462 	new = boundary + (die * this->density_mask);
2463 	ret = flexonenand_check_blocks_erased(mtd, min(old, new)
2464 						+ 1, max(old, new));
2465 	if (ret) {
2466 		printk(KERN_ERR "flexonenand_set_boundary: Please erase blocks before boundary change\n");
2467 		return ret;
2468 	}
2469 
2470 	this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
2471 	this->wait(mtd, FL_SYNCING);
2472 
2473 	/* Check is boundary is locked */
2474 	this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
2475 	ret = this->wait(mtd, FL_READING);
2476 
2477 	thisboundary = this->read_word(this->base + ONENAND_DATARAM);
2478 	if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) {
2479 		printk(KERN_ERR "flexonenand_set_boundary: boundary locked\n");
2480 		goto out;
2481 	}
2482 
2483 	printk(KERN_INFO "flexonenand_set_boundary: Changing die %d boundary: %d%s\n",
2484 			die, boundary, lock ? "(Locked)" : "(Unlocked)");
2485 
2486 	boundary &= FLEXONENAND_PI_MASK;
2487 	boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT);
2488 
2489 	addr = die ? this->diesize[0] : 0;
2490 	this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
2491 	ret = this->wait(mtd, FL_ERASING);
2492 	if (ret) {
2493 		printk("flexonenand_set_boundary:"
2494 			"Failed PI erase for Die %d\n", die);
2495 		goto out;
2496 	}
2497 
2498 	this->write_word(boundary, this->base + ONENAND_DATARAM);
2499 	this->command(mtd, ONENAND_CMD_PROG, addr, 0);
2500 	ret = this->wait(mtd, FL_WRITING);
2501 	if (ret) {
2502 		printk("flexonenand_set_boundary:"
2503 			"Failed PI write for Die %d\n", die);
2504 		goto out;
2505 	}
2506 
2507 	this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0);
2508 	ret = this->wait(mtd, FL_WRITING);
2509 out:
2510 	this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND);
2511 	this->wait(mtd, FL_RESETING);
2512 	if (!ret)
2513 		/* Recalculate device size on boundary change*/
2514 		flexonenand_get_size(mtd);
2515 
2516 	return ret;
2517 }
2518 
2519 /**
2520  * onenand_chip_probe - [OneNAND Interface] Probe the OneNAND chip
2521  * @param mtd		MTD device structure
2522  *
2523  * OneNAND detection method:
2524  *   Compare the the values from command with ones from register
2525  */
2526 static int onenand_chip_probe(struct mtd_info *mtd)
2527 {
2528 	struct onenand_chip *this = mtd->priv;
2529 	int bram_maf_id, bram_dev_id, maf_id, dev_id;
2530 	int syscfg;
2531 
2532 	/* Save system configuration 1 */
2533 	syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2534 
2535 	/* Clear Sync. Burst Read mode to read BootRAM */
2536 	this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ),
2537 			 this->base + ONENAND_REG_SYS_CFG1);
2538 
2539 	/* Send the command for reading device ID from BootRAM */
2540 	this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2541 
2542 	/* Read manufacturer and device IDs from BootRAM */
2543 	bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2544 	bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2545 
2546 	/* Reset OneNAND to read default register values */
2547 	this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2548 
2549 	/* Wait reset */
2550 	if (this->wait(mtd, FL_RESETING))
2551 		return -ENXIO;
2552 
2553 	/* Restore system configuration 1 */
2554 	this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2555 
2556 	/* Check manufacturer ID */
2557 	if (onenand_check_maf(bram_maf_id))
2558 		return -ENXIO;
2559 
2560 	/* Read manufacturer and device IDs from Register */
2561 	maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2562 	dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2563 
2564 	/* Check OneNAND device */
2565 	if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2566 		return -ENXIO;
2567 
2568 	return 0;
2569 }
2570 
2571 /**
2572  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2573  * @param mtd		MTD device structure
2574  *
2575  * OneNAND detection method:
2576  *   Compare the the values from command with ones from register
2577  */
2578 int onenand_probe(struct mtd_info *mtd)
2579 {
2580 	struct onenand_chip *this = mtd->priv;
2581 	int dev_id, ver_id;
2582 	int density;
2583 	int ret;
2584 
2585 	ret = this->chip_probe(mtd);
2586 	if (ret)
2587 		return ret;
2588 
2589 	/* Read device IDs from Register */
2590 	dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2591 	ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2592 	this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY);
2593 
2594 	/* Flash device information */
2595 	mtd->name = onenand_print_device_info(dev_id, ver_id);
2596 	this->device_id = dev_id;
2597 	this->version_id = ver_id;
2598 
2599 	/* Check OneNAND features */
2600 	onenand_check_features(mtd);
2601 
2602 	density = onenand_get_density(dev_id);
2603 	if (FLEXONENAND(this)) {
2604 		this->dies = ONENAND_IS_DDP(this) ? 2 : 1;
2605 		/* Maximum possible erase regions */
2606 		mtd->numeraseregions = this->dies << 1;
2607 		mtd->eraseregions = malloc(sizeof(struct mtd_erase_region_info)
2608 					* (this->dies << 1));
2609 		if (!mtd->eraseregions)
2610 			return -ENOMEM;
2611 	}
2612 
2613 	/*
2614 	 * For Flex-OneNAND, chipsize represents maximum possible device size.
2615 	 * mtd->size represents the actual device size.
2616 	 */
2617 	this->chipsize = (16 << density) << 20;
2618 
2619 	/* OneNAND page size & block size */
2620 	/* The data buffer size is equal to page size */
2621 	mtd->writesize =
2622 	    this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2623 	/* We use the full BufferRAM */
2624 	if (ONENAND_IS_4KB_PAGE(this))
2625 		mtd->writesize <<= 1;
2626 
2627 	mtd->oobsize = mtd->writesize >> 5;
2628 	/* Pagers per block is always 64 in OneNAND */
2629 	mtd->erasesize = mtd->writesize << 6;
2630 	/*
2631 	 * Flex-OneNAND SLC area has 64 pages per block.
2632 	 * Flex-OneNAND MLC area has 128 pages per block.
2633 	 * Expose MLC erase size to find erase_shift and page_mask.
2634 	 */
2635 	if (FLEXONENAND(this))
2636 		mtd->erasesize <<= 1;
2637 
2638 	this->erase_shift = ffs(mtd->erasesize) - 1;
2639 	this->page_shift = ffs(mtd->writesize) - 1;
2640 	this->ppb_shift = (this->erase_shift - this->page_shift);
2641 	this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
2642 	/* Set density mask. it is used for DDP */
2643 	if (ONENAND_IS_DDP(this))
2644 		this->density_mask = this->chipsize >> (this->erase_shift + 1);
2645 	/* It's real page size */
2646 	this->writesize = mtd->writesize;
2647 
2648 	/* REVIST: Multichip handling */
2649 
2650 	if (FLEXONENAND(this))
2651 		flexonenand_get_size(mtd);
2652 	else
2653 		mtd->size = this->chipsize;
2654 
2655 	mtd->flags = MTD_CAP_NANDFLASH;
2656 	mtd->_erase = onenand_erase;
2657 	mtd->_read = onenand_read;
2658 	mtd->_write = onenand_write;
2659 	mtd->_read_oob = onenand_read_oob;
2660 	mtd->_write_oob = onenand_write_oob;
2661 	mtd->_sync = onenand_sync;
2662 	mtd->_block_isbad = onenand_block_isbad;
2663 	mtd->_block_markbad = onenand_block_markbad;
2664 	mtd->writebufsize = mtd->writesize;
2665 
2666 	return 0;
2667 }
2668 
2669 /**
2670  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2671  * @param mtd		MTD device structure
2672  * @param maxchips	Number of chips to scan for
2673  *
2674  * This fills out all the not initialized function pointers
2675  * with the defaults.
2676  * The flash ID is read and the mtd/chip structures are
2677  * filled with the appropriate values.
2678  */
2679 int onenand_scan(struct mtd_info *mtd, int maxchips)
2680 {
2681 	int i;
2682 	struct onenand_chip *this = mtd->priv;
2683 
2684 	if (!this->read_word)
2685 		this->read_word = onenand_readw;
2686 	if (!this->write_word)
2687 		this->write_word = onenand_writew;
2688 
2689 	if (!this->command)
2690 		this->command = onenand_command;
2691 	if (!this->wait)
2692 		this->wait = onenand_wait;
2693 	if (!this->bbt_wait)
2694 		this->bbt_wait = onenand_bbt_wait;
2695 
2696 	if (!this->read_bufferram)
2697 		this->read_bufferram = onenand_read_bufferram;
2698 	if (!this->write_bufferram)
2699 		this->write_bufferram = onenand_write_bufferram;
2700 
2701 	if (!this->chip_probe)
2702 		this->chip_probe = onenand_chip_probe;
2703 
2704 	if (!this->block_markbad)
2705 		this->block_markbad = onenand_default_block_markbad;
2706 	if (!this->scan_bbt)
2707 		this->scan_bbt = onenand_default_bbt;
2708 
2709 	if (onenand_probe(mtd))
2710 		return -ENXIO;
2711 
2712 	/* Set Sync. Burst Read after probing */
2713 	if (this->mmcontrol) {
2714 		printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2715 		this->read_bufferram = onenand_sync_read_bufferram;
2716 	}
2717 
2718 	/* Allocate buffers, if necessary */
2719 	if (!this->page_buf) {
2720 		this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2721 		if (!this->page_buf) {
2722 			printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2723 			return -ENOMEM;
2724 		}
2725 		this->options |= ONENAND_PAGEBUF_ALLOC;
2726 	}
2727 	if (!this->oob_buf) {
2728 		this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2729 		if (!this->oob_buf) {
2730 			printk(KERN_ERR "onenand_scan: Can't allocate oob_buf\n");
2731 			if (this->options & ONENAND_PAGEBUF_ALLOC) {
2732 				this->options &= ~ONENAND_PAGEBUF_ALLOC;
2733 				kfree(this->page_buf);
2734 			}
2735 			return -ENOMEM;
2736 		}
2737 		this->options |= ONENAND_OOBBUF_ALLOC;
2738 	}
2739 
2740 	this->state = FL_READY;
2741 
2742 	/*
2743 	 * Allow subpage writes up to oobsize.
2744 	 */
2745 	switch (mtd->oobsize) {
2746 	case 128:
2747 		this->ecclayout = &onenand_oob_128;
2748 		mtd->subpage_sft = 0;
2749 		break;
2750 
2751 	case 64:
2752 		this->ecclayout = &onenand_oob_64;
2753 		mtd->subpage_sft = 2;
2754 		break;
2755 
2756 	case 32:
2757 		this->ecclayout = &onenand_oob_32;
2758 		mtd->subpage_sft = 1;
2759 		break;
2760 
2761 	default:
2762 		printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2763 			mtd->oobsize);
2764 		mtd->subpage_sft = 0;
2765 		/* To prevent kernel oops */
2766 		this->ecclayout = &onenand_oob_32;
2767 		break;
2768 	}
2769 
2770 	this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2771 
2772 	/*
2773 	 * The number of bytes available for a client to place data into
2774 	 * the out of band area
2775 	 */
2776 	this->ecclayout->oobavail = 0;
2777 
2778 	for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES_LARGE &&
2779 	    this->ecclayout->oobfree[i].length; i++)
2780 		this->ecclayout->oobavail +=
2781 			this->ecclayout->oobfree[i].length;
2782 	mtd->oobavail = this->ecclayout->oobavail;
2783 
2784 	mtd->ecclayout = this->ecclayout;
2785 
2786 	/* Unlock whole block */
2787 	onenand_unlock_all(mtd);
2788 
2789 	return this->scan_bbt(mtd);
2790 }
2791 
2792 /**
2793  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2794  * @param mtd		MTD device structure
2795  */
2796 void onenand_release(struct mtd_info *mtd)
2797 {
2798 }
2799