1 /* 2 * linux/drivers/mtd/onenand/onenand_base.c 3 * 4 * Copyright (C) 2005-2007 Samsung Electronics 5 * Kyungmin Park <kyungmin.park@samsung.com> 6 * 7 * Credits: 8 * Adrian Hunter <ext-adrian.hunter@nokia.com>: 9 * auto-placement support, read-while load support, various fixes 10 * Copyright (C) Nokia Corporation, 2007 11 * 12 * Rohit Hagargundgi <h.rohit at samsung.com>, 13 * Amul Kumar Saha <amul.saha@samsung.com>: 14 * Flex-OneNAND support 15 * Copyright (C) Samsung Electronics, 2009 16 * 17 * This program is free software; you can redistribute it and/or modify 18 * it under the terms of the GNU General Public License version 2 as 19 * published by the Free Software Foundation. 20 */ 21 22 #include <common.h> 23 #include <linux/compat.h> 24 #include <linux/mtd/mtd.h> 25 #include <linux/mtd/onenand.h> 26 27 #include <asm/io.h> 28 #include <asm/errno.h> 29 #include <malloc.h> 30 31 /* It should access 16-bit instead of 8-bit */ 32 static void *memcpy_16(void *dst, const void *src, unsigned int len) 33 { 34 void *ret = dst; 35 short *d = dst; 36 const short *s = src; 37 38 len >>= 1; 39 while (len-- > 0) 40 *d++ = *s++; 41 return ret; 42 } 43 44 /** 45 * onenand_oob_128 - oob info for Flex-Onenand with 4KB page 46 * For now, we expose only 64 out of 80 ecc bytes 47 */ 48 static struct nand_ecclayout onenand_oob_128 = { 49 .eccbytes = 64, 50 .eccpos = { 51 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 52 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 53 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 54 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 55 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 56 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 57 102, 103, 104, 105 58 }, 59 .oobfree = { 60 {2, 4}, {18, 4}, {34, 4}, {50, 4}, 61 {66, 4}, {82, 4}, {98, 4}, {114, 4} 62 } 63 }; 64 65 /** 66 * onenand_oob_64 - oob info for large (2KB) page 67 */ 68 static struct nand_ecclayout onenand_oob_64 = { 69 .eccbytes = 20, 70 .eccpos = { 71 8, 9, 10, 11, 12, 72 24, 25, 26, 27, 28, 73 40, 41, 42, 43, 44, 74 56, 57, 58, 59, 60, 75 }, 76 .oobfree = { 77 {2, 3}, {14, 2}, {18, 3}, {30, 2}, 78 {34, 3}, {46, 2}, {50, 3}, {62, 2} 79 } 80 }; 81 82 /** 83 * onenand_oob_32 - oob info for middle (1KB) page 84 */ 85 static struct nand_ecclayout onenand_oob_32 = { 86 .eccbytes = 10, 87 .eccpos = { 88 8, 9, 10, 11, 12, 89 24, 25, 26, 27, 28, 90 }, 91 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} } 92 }; 93 94 static const unsigned char ffchars[] = { 95 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 96 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ 97 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 98 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */ 99 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 100 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */ 101 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 102 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */ 103 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 104 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */ 105 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 106 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */ 107 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 108 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */ 109 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 110 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */ 111 }; 112 113 /** 114 * onenand_readw - [OneNAND Interface] Read OneNAND register 115 * @param addr address to read 116 * 117 * Read OneNAND register 118 */ 119 static unsigned short onenand_readw(void __iomem * addr) 120 { 121 return readw(addr); 122 } 123 124 /** 125 * onenand_writew - [OneNAND Interface] Write OneNAND register with value 126 * @param value value to write 127 * @param addr address to write 128 * 129 * Write OneNAND register with value 130 */ 131 static void onenand_writew(unsigned short value, void __iomem * addr) 132 { 133 writew(value, addr); 134 } 135 136 /** 137 * onenand_block_address - [DEFAULT] Get block address 138 * @param device the device id 139 * @param block the block 140 * @return translated block address if DDP, otherwise same 141 * 142 * Setup Start Address 1 Register (F100h) 143 */ 144 static int onenand_block_address(struct onenand_chip *this, int block) 145 { 146 /* Device Flash Core select, NAND Flash Block Address */ 147 if (block & this->density_mask) 148 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask); 149 150 return block; 151 } 152 153 /** 154 * onenand_bufferram_address - [DEFAULT] Get bufferram address 155 * @param device the device id 156 * @param block the block 157 * @return set DBS value if DDP, otherwise 0 158 * 159 * Setup Start Address 2 Register (F101h) for DDP 160 */ 161 static int onenand_bufferram_address(struct onenand_chip *this, int block) 162 { 163 /* Device BufferRAM Select */ 164 if (block & this->density_mask) 165 return ONENAND_DDP_CHIP1; 166 167 return ONENAND_DDP_CHIP0; 168 } 169 170 /** 171 * onenand_page_address - [DEFAULT] Get page address 172 * @param page the page address 173 * @param sector the sector address 174 * @return combined page and sector address 175 * 176 * Setup Start Address 8 Register (F107h) 177 */ 178 static int onenand_page_address(int page, int sector) 179 { 180 /* Flash Page Address, Flash Sector Address */ 181 int fpa, fsa; 182 183 fpa = page & ONENAND_FPA_MASK; 184 fsa = sector & ONENAND_FSA_MASK; 185 186 return ((fpa << ONENAND_FPA_SHIFT) | fsa); 187 } 188 189 /** 190 * onenand_buffer_address - [DEFAULT] Get buffer address 191 * @param dataram1 DataRAM index 192 * @param sectors the sector address 193 * @param count the number of sectors 194 * @return the start buffer value 195 * 196 * Setup Start Buffer Register (F200h) 197 */ 198 static int onenand_buffer_address(int dataram1, int sectors, int count) 199 { 200 int bsa, bsc; 201 202 /* BufferRAM Sector Address */ 203 bsa = sectors & ONENAND_BSA_MASK; 204 205 if (dataram1) 206 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */ 207 else 208 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */ 209 210 /* BufferRAM Sector Count */ 211 bsc = count & ONENAND_BSC_MASK; 212 213 return ((bsa << ONENAND_BSA_SHIFT) | bsc); 214 } 215 216 /** 217 * flexonenand_block - Return block number for flash address 218 * @param this - OneNAND device structure 219 * @param addr - Address for which block number is needed 220 */ 221 static unsigned int flexonenand_block(struct onenand_chip *this, loff_t addr) 222 { 223 unsigned int boundary, blk, die = 0; 224 225 if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) { 226 die = 1; 227 addr -= this->diesize[0]; 228 } 229 230 boundary = this->boundary[die]; 231 232 blk = addr >> (this->erase_shift - 1); 233 if (blk > boundary) 234 blk = (blk + boundary + 1) >> 1; 235 236 blk += die ? this->density_mask : 0; 237 return blk; 238 } 239 240 unsigned int onenand_block(struct onenand_chip *this, loff_t addr) 241 { 242 if (!FLEXONENAND(this)) 243 return addr >> this->erase_shift; 244 return flexonenand_block(this, addr); 245 } 246 247 /** 248 * flexonenand_addr - Return address of the block 249 * @this: OneNAND device structure 250 * @block: Block number on Flex-OneNAND 251 * 252 * Return address of the block 253 */ 254 static loff_t flexonenand_addr(struct onenand_chip *this, int block) 255 { 256 loff_t ofs = 0; 257 int die = 0, boundary; 258 259 if (ONENAND_IS_DDP(this) && block >= this->density_mask) { 260 block -= this->density_mask; 261 die = 1; 262 ofs = this->diesize[0]; 263 } 264 265 boundary = this->boundary[die]; 266 ofs += (loff_t) block << (this->erase_shift - 1); 267 if (block > (boundary + 1)) 268 ofs += (loff_t) (block - boundary - 1) 269 << (this->erase_shift - 1); 270 return ofs; 271 } 272 273 loff_t onenand_addr(struct onenand_chip *this, int block) 274 { 275 if (!FLEXONENAND(this)) 276 return (loff_t) block << this->erase_shift; 277 return flexonenand_addr(this, block); 278 } 279 280 /** 281 * flexonenand_region - [Flex-OneNAND] Return erase region of addr 282 * @param mtd MTD device structure 283 * @param addr address whose erase region needs to be identified 284 */ 285 int flexonenand_region(struct mtd_info *mtd, loff_t addr) 286 { 287 int i; 288 289 for (i = 0; i < mtd->numeraseregions; i++) 290 if (addr < mtd->eraseregions[i].offset) 291 break; 292 return i - 1; 293 } 294 295 /** 296 * onenand_get_density - [DEFAULT] Get OneNAND density 297 * @param dev_id OneNAND device ID 298 * 299 * Get OneNAND density from device ID 300 */ 301 static inline int onenand_get_density(int dev_id) 302 { 303 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; 304 return (density & ONENAND_DEVICE_DENSITY_MASK); 305 } 306 307 /** 308 * onenand_command - [DEFAULT] Send command to OneNAND device 309 * @param mtd MTD device structure 310 * @param cmd the command to be sent 311 * @param addr offset to read from or write to 312 * @param len number of bytes to read or write 313 * 314 * Send command to OneNAND device. This function is used for middle/large page 315 * devices (1KB/2KB Bytes per page) 316 */ 317 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, 318 size_t len) 319 { 320 struct onenand_chip *this = mtd->priv; 321 int value; 322 int block, page; 323 324 /* Now we use page size operation */ 325 int sectors = 0, count = 0; 326 327 /* Address translation */ 328 switch (cmd) { 329 case ONENAND_CMD_UNLOCK: 330 case ONENAND_CMD_LOCK: 331 case ONENAND_CMD_LOCK_TIGHT: 332 case ONENAND_CMD_UNLOCK_ALL: 333 block = -1; 334 page = -1; 335 break; 336 337 case FLEXONENAND_CMD_PI_ACCESS: 338 /* addr contains die index */ 339 block = addr * this->density_mask; 340 page = -1; 341 break; 342 343 case ONENAND_CMD_ERASE: 344 case ONENAND_CMD_BUFFERRAM: 345 block = onenand_block(this, addr); 346 page = -1; 347 break; 348 349 case FLEXONENAND_CMD_READ_PI: 350 cmd = ONENAND_CMD_READ; 351 block = addr * this->density_mask; 352 page = 0; 353 break; 354 355 default: 356 block = onenand_block(this, addr); 357 page = (int) (addr 358 - onenand_addr(this, block)) >> this->page_shift; 359 page &= this->page_mask; 360 break; 361 } 362 363 /* NOTE: The setting order of the registers is very important! */ 364 if (cmd == ONENAND_CMD_BUFFERRAM) { 365 /* Select DataRAM for DDP */ 366 value = onenand_bufferram_address(this, block); 367 this->write_word(value, 368 this->base + ONENAND_REG_START_ADDRESS2); 369 370 if (ONENAND_IS_4KB_PAGE(this)) 371 ONENAND_SET_BUFFERRAM0(this); 372 else 373 /* Switch to the next data buffer */ 374 ONENAND_SET_NEXT_BUFFERRAM(this); 375 376 return 0; 377 } 378 379 if (block != -1) { 380 /* Write 'DFS, FBA' of Flash */ 381 value = onenand_block_address(this, block); 382 this->write_word(value, 383 this->base + ONENAND_REG_START_ADDRESS1); 384 385 /* Select DataRAM for DDP */ 386 value = onenand_bufferram_address(this, block); 387 this->write_word(value, 388 this->base + ONENAND_REG_START_ADDRESS2); 389 } 390 391 if (page != -1) { 392 int dataram; 393 394 switch (cmd) { 395 case FLEXONENAND_CMD_RECOVER_LSB: 396 case ONENAND_CMD_READ: 397 case ONENAND_CMD_READOOB: 398 if (ONENAND_IS_4KB_PAGE(this)) 399 dataram = ONENAND_SET_BUFFERRAM0(this); 400 else 401 dataram = ONENAND_SET_NEXT_BUFFERRAM(this); 402 403 break; 404 405 default: 406 dataram = ONENAND_CURRENT_BUFFERRAM(this); 407 break; 408 } 409 410 /* Write 'FPA, FSA' of Flash */ 411 value = onenand_page_address(page, sectors); 412 this->write_word(value, 413 this->base + ONENAND_REG_START_ADDRESS8); 414 415 /* Write 'BSA, BSC' of DataRAM */ 416 value = onenand_buffer_address(dataram, sectors, count); 417 this->write_word(value, this->base + ONENAND_REG_START_BUFFER); 418 } 419 420 /* Interrupt clear */ 421 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); 422 /* Write command */ 423 this->write_word(cmd, this->base + ONENAND_REG_COMMAND); 424 425 return 0; 426 } 427 428 /** 429 * onenand_read_ecc - return ecc status 430 * @param this onenand chip structure 431 */ 432 static int onenand_read_ecc(struct onenand_chip *this) 433 { 434 int ecc, i; 435 436 if (!FLEXONENAND(this)) 437 return this->read_word(this->base + ONENAND_REG_ECC_STATUS); 438 439 for (i = 0; i < 4; i++) { 440 ecc = this->read_word(this->base 441 + ((ONENAND_REG_ECC_STATUS + i) << 1)); 442 if (likely(!ecc)) 443 continue; 444 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR) 445 return ONENAND_ECC_2BIT_ALL; 446 } 447 448 return 0; 449 } 450 451 /** 452 * onenand_wait - [DEFAULT] wait until the command is done 453 * @param mtd MTD device structure 454 * @param state state to select the max. timeout value 455 * 456 * Wait for command done. This applies to all OneNAND command 457 * Read can take up to 30us, erase up to 2ms and program up to 350us 458 * according to general OneNAND specs 459 */ 460 static int onenand_wait(struct mtd_info *mtd, int state) 461 { 462 struct onenand_chip *this = mtd->priv; 463 unsigned int flags = ONENAND_INT_MASTER; 464 unsigned int interrupt = 0; 465 unsigned int ctrl; 466 467 while (1) { 468 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 469 if (interrupt & flags) 470 break; 471 } 472 473 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 474 475 if (interrupt & ONENAND_INT_READ) { 476 int ecc = onenand_read_ecc(this); 477 if (ecc & ONENAND_ECC_2BIT_ALL) { 478 printk("onenand_wait: ECC error = 0x%04x\n", ecc); 479 return -EBADMSG; 480 } 481 } 482 483 if (ctrl & ONENAND_CTRL_ERROR) { 484 printk("onenand_wait: controller error = 0x%04x\n", ctrl); 485 if (ctrl & ONENAND_CTRL_LOCK) 486 printk("onenand_wait: it's locked error = 0x%04x\n", 487 ctrl); 488 489 return -EIO; 490 } 491 492 493 return 0; 494 } 495 496 /** 497 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset 498 * @param mtd MTD data structure 499 * @param area BufferRAM area 500 * @return offset given area 501 * 502 * Return BufferRAM offset given area 503 */ 504 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) 505 { 506 struct onenand_chip *this = mtd->priv; 507 508 if (ONENAND_CURRENT_BUFFERRAM(this)) { 509 if (area == ONENAND_DATARAM) 510 return mtd->writesize; 511 if (area == ONENAND_SPARERAM) 512 return mtd->oobsize; 513 } 514 515 return 0; 516 } 517 518 /** 519 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area 520 * @param mtd MTD data structure 521 * @param area BufferRAM area 522 * @param buffer the databuffer to put/get data 523 * @param offset offset to read from or write to 524 * @param count number of bytes to read/write 525 * 526 * Read the BufferRAM area 527 */ 528 static int onenand_read_bufferram(struct mtd_info *mtd, loff_t addr, int area, 529 unsigned char *buffer, int offset, 530 size_t count) 531 { 532 struct onenand_chip *this = mtd->priv; 533 void __iomem *bufferram; 534 535 bufferram = this->base + area; 536 bufferram += onenand_bufferram_offset(mtd, area); 537 538 memcpy_16(buffer, bufferram + offset, count); 539 540 return 0; 541 } 542 543 /** 544 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode 545 * @param mtd MTD data structure 546 * @param area BufferRAM area 547 * @param buffer the databuffer to put/get data 548 * @param offset offset to read from or write to 549 * @param count number of bytes to read/write 550 * 551 * Read the BufferRAM area with Sync. Burst Mode 552 */ 553 static int onenand_sync_read_bufferram(struct mtd_info *mtd, loff_t addr, int area, 554 unsigned char *buffer, int offset, 555 size_t count) 556 { 557 struct onenand_chip *this = mtd->priv; 558 void __iomem *bufferram; 559 560 bufferram = this->base + area; 561 bufferram += onenand_bufferram_offset(mtd, area); 562 563 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ); 564 565 memcpy_16(buffer, bufferram + offset, count); 566 567 this->mmcontrol(mtd, 0); 568 569 return 0; 570 } 571 572 /** 573 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area 574 * @param mtd MTD data structure 575 * @param area BufferRAM area 576 * @param buffer the databuffer to put/get data 577 * @param offset offset to read from or write to 578 * @param count number of bytes to read/write 579 * 580 * Write the BufferRAM area 581 */ 582 static int onenand_write_bufferram(struct mtd_info *mtd, loff_t addr, int area, 583 const unsigned char *buffer, int offset, 584 size_t count) 585 { 586 struct onenand_chip *this = mtd->priv; 587 void __iomem *bufferram; 588 589 bufferram = this->base + area; 590 bufferram += onenand_bufferram_offset(mtd, area); 591 592 memcpy_16(bufferram + offset, buffer, count); 593 594 return 0; 595 } 596 597 /** 598 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode 599 * @param mtd MTD data structure 600 * @param addr address to check 601 * @return blockpage address 602 * 603 * Get blockpage address at 2x program mode 604 */ 605 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr) 606 { 607 struct onenand_chip *this = mtd->priv; 608 int blockpage, block, page; 609 610 /* Calculate the even block number */ 611 block = (int) (addr >> this->erase_shift) & ~1; 612 /* Is it the odd plane? */ 613 if (addr & this->writesize) 614 block++; 615 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask; 616 blockpage = (block << 7) | page; 617 618 return blockpage; 619 } 620 621 /** 622 * onenand_check_bufferram - [GENERIC] Check BufferRAM information 623 * @param mtd MTD data structure 624 * @param addr address to check 625 * @return 1 if there are valid data, otherwise 0 626 * 627 * Check bufferram if there is data we required 628 */ 629 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) 630 { 631 struct onenand_chip *this = mtd->priv; 632 int blockpage, found = 0; 633 unsigned int i; 634 635 if (ONENAND_IS_2PLANE(this)) 636 blockpage = onenand_get_2x_blockpage(mtd, addr); 637 else 638 blockpage = (int) (addr >> this->page_shift); 639 640 /* Is there valid data? */ 641 i = ONENAND_CURRENT_BUFFERRAM(this); 642 if (this->bufferram[i].blockpage == blockpage) 643 found = 1; 644 else { 645 /* Check another BufferRAM */ 646 i = ONENAND_NEXT_BUFFERRAM(this); 647 if (this->bufferram[i].blockpage == blockpage) { 648 ONENAND_SET_NEXT_BUFFERRAM(this); 649 found = 1; 650 } 651 } 652 653 if (found && ONENAND_IS_DDP(this)) { 654 /* Select DataRAM for DDP */ 655 int block = onenand_block(this, addr); 656 int value = onenand_bufferram_address(this, block); 657 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 658 } 659 660 return found; 661 } 662 663 /** 664 * onenand_update_bufferram - [GENERIC] Update BufferRAM information 665 * @param mtd MTD data structure 666 * @param addr address to update 667 * @param valid valid flag 668 * 669 * Update BufferRAM information 670 */ 671 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr, 672 int valid) 673 { 674 struct onenand_chip *this = mtd->priv; 675 int blockpage; 676 unsigned int i; 677 678 if (ONENAND_IS_2PLANE(this)) 679 blockpage = onenand_get_2x_blockpage(mtd, addr); 680 else 681 blockpage = (int)(addr >> this->page_shift); 682 683 /* Invalidate another BufferRAM */ 684 i = ONENAND_NEXT_BUFFERRAM(this); 685 if (this->bufferram[i].blockpage == blockpage) 686 this->bufferram[i].blockpage = -1; 687 688 /* Update BufferRAM */ 689 i = ONENAND_CURRENT_BUFFERRAM(this); 690 if (valid) 691 this->bufferram[i].blockpage = blockpage; 692 else 693 this->bufferram[i].blockpage = -1; 694 695 return 0; 696 } 697 698 /** 699 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information 700 * @param mtd MTD data structure 701 * @param addr start address to invalidate 702 * @param len length to invalidate 703 * 704 * Invalidate BufferRAM information 705 */ 706 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr, 707 unsigned int len) 708 { 709 struct onenand_chip *this = mtd->priv; 710 int i; 711 loff_t end_addr = addr + len; 712 713 /* Invalidate BufferRAM */ 714 for (i = 0; i < MAX_BUFFERRAM; i++) { 715 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift; 716 717 if (buf_addr >= addr && buf_addr < end_addr) 718 this->bufferram[i].blockpage = -1; 719 } 720 } 721 722 /** 723 * onenand_get_device - [GENERIC] Get chip for selected access 724 * @param mtd MTD device structure 725 * @param new_state the state which is requested 726 * 727 * Get the device and lock it for exclusive access 728 */ 729 static void onenand_get_device(struct mtd_info *mtd, int new_state) 730 { 731 /* Do nothing */ 732 } 733 734 /** 735 * onenand_release_device - [GENERIC] release chip 736 * @param mtd MTD device structure 737 * 738 * Deselect, release chip lock and wake up anyone waiting on the device 739 */ 740 static void onenand_release_device(struct mtd_info *mtd) 741 { 742 /* Do nothing */ 743 } 744 745 /** 746 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer 747 * @param mtd MTD device structure 748 * @param buf destination address 749 * @param column oob offset to read from 750 * @param thislen oob length to read 751 */ 752 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, 753 int column, int thislen) 754 { 755 struct onenand_chip *this = mtd->priv; 756 struct nand_oobfree *free; 757 int readcol = column; 758 int readend = column + thislen; 759 int lastgap = 0; 760 unsigned int i; 761 uint8_t *oob_buf = this->oob_buf; 762 763 free = this->ecclayout->oobfree; 764 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 765 if (readcol >= lastgap) 766 readcol += free->offset - lastgap; 767 if (readend >= lastgap) 768 readend += free->offset - lastgap; 769 lastgap = free->offset + free->length; 770 } 771 this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); 772 free = this->ecclayout->oobfree; 773 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 774 int free_end = free->offset + free->length; 775 if (free->offset < readend && free_end > readcol) { 776 int st = max_t(int,free->offset,readcol); 777 int ed = min_t(int,free_end,readend); 778 int n = ed - st; 779 memcpy(buf, oob_buf + st, n); 780 buf += n; 781 } else if (column == 0) 782 break; 783 } 784 return 0; 785 } 786 787 /** 788 * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data 789 * @param mtd MTD device structure 790 * @param addr address to recover 791 * @param status return value from onenand_wait 792 * 793 * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has 794 * lower page address and MSB page has higher page address in paired pages. 795 * If power off occurs during MSB page program, the paired LSB page data can 796 * become corrupt. LSB page recovery read is a way to read LSB page though page 797 * data are corrupted. When uncorrectable error occurs as a result of LSB page 798 * read after power up, issue LSB page recovery read. 799 */ 800 static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status) 801 { 802 struct onenand_chip *this = mtd->priv; 803 int i; 804 805 /* Recovery is only for Flex-OneNAND */ 806 if (!FLEXONENAND(this)) 807 return status; 808 809 /* check if we failed due to uncorrectable error */ 810 if (status != -EBADMSG && status != ONENAND_BBT_READ_ECC_ERROR) 811 return status; 812 813 /* check if address lies in MLC region */ 814 i = flexonenand_region(mtd, addr); 815 if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift)) 816 return status; 817 818 printk("onenand_recover_lsb:" 819 "Attempting to recover from uncorrectable read\n"); 820 821 /* Issue the LSB page recovery command */ 822 this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize); 823 return this->wait(mtd, FL_READING); 824 } 825 826 /** 827 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band 828 * @param mtd MTD device structure 829 * @param from offset to read from 830 * @param ops oob operation description structure 831 * 832 * OneNAND read main and/or out-of-band data 833 */ 834 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from, 835 struct mtd_oob_ops *ops) 836 { 837 struct onenand_chip *this = mtd->priv; 838 struct mtd_ecc_stats stats; 839 size_t len = ops->len; 840 size_t ooblen = ops->ooblen; 841 u_char *buf = ops->datbuf; 842 u_char *oobbuf = ops->oobbuf; 843 int read = 0, column, thislen; 844 int oobread = 0, oobcolumn, thisooblen, oobsize; 845 int ret = 0, boundary = 0; 846 int writesize = this->writesize; 847 848 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len); 849 850 if (ops->mode == MTD_OOB_AUTO) 851 oobsize = this->ecclayout->oobavail; 852 else 853 oobsize = mtd->oobsize; 854 855 oobcolumn = from & (mtd->oobsize - 1); 856 857 /* Do not allow reads past end of device */ 858 if ((from + len) > mtd->size) { 859 printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n"); 860 ops->retlen = 0; 861 ops->oobretlen = 0; 862 return -EINVAL; 863 } 864 865 stats = mtd->ecc_stats; 866 867 /* Read-while-load method */ 868 /* Note: We can't use this feature in MLC */ 869 870 /* Do first load to bufferRAM */ 871 if (read < len) { 872 if (!onenand_check_bufferram(mtd, from)) { 873 this->main_buf = buf; 874 this->command(mtd, ONENAND_CMD_READ, from, writesize); 875 ret = this->wait(mtd, FL_READING); 876 if (unlikely(ret)) 877 ret = onenand_recover_lsb(mtd, from, ret); 878 onenand_update_bufferram(mtd, from, !ret); 879 if (ret == -EBADMSG) 880 ret = 0; 881 } 882 } 883 884 thislen = min_t(int, writesize, len - read); 885 column = from & (writesize - 1); 886 if (column + thislen > writesize) 887 thislen = writesize - column; 888 889 while (!ret) { 890 /* If there is more to load then start next load */ 891 from += thislen; 892 if (!ONENAND_IS_4KB_PAGE(this) && read + thislen < len) { 893 this->main_buf = buf + thislen; 894 this->command(mtd, ONENAND_CMD_READ, from, writesize); 895 /* 896 * Chip boundary handling in DDP 897 * Now we issued chip 1 read and pointed chip 1 898 * bufferam so we have to point chip 0 bufferam. 899 */ 900 if (ONENAND_IS_DDP(this) && 901 unlikely(from == (this->chipsize >> 1))) { 902 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2); 903 boundary = 1; 904 } else 905 boundary = 0; 906 ONENAND_SET_PREV_BUFFERRAM(this); 907 } 908 909 /* While load is going, read from last bufferRAM */ 910 this->read_bufferram(mtd, from - thislen, ONENAND_DATARAM, buf, column, thislen); 911 912 /* Read oob area if needed */ 913 if (oobbuf) { 914 thisooblen = oobsize - oobcolumn; 915 thisooblen = min_t(int, thisooblen, ooblen - oobread); 916 917 if (ops->mode == MTD_OOB_AUTO) 918 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen); 919 else 920 this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen); 921 oobread += thisooblen; 922 oobbuf += thisooblen; 923 oobcolumn = 0; 924 } 925 926 if (ONENAND_IS_4KB_PAGE(this) && (read + thislen < len)) { 927 this->command(mtd, ONENAND_CMD_READ, from, writesize); 928 ret = this->wait(mtd, FL_READING); 929 if (unlikely(ret)) 930 ret = onenand_recover_lsb(mtd, from, ret); 931 onenand_update_bufferram(mtd, from, !ret); 932 if (ret == -EBADMSG) 933 ret = 0; 934 } 935 936 /* See if we are done */ 937 read += thislen; 938 if (read == len) 939 break; 940 /* Set up for next read from bufferRAM */ 941 if (unlikely(boundary)) 942 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2); 943 if (!ONENAND_IS_4KB_PAGE(this)) 944 ONENAND_SET_NEXT_BUFFERRAM(this); 945 buf += thislen; 946 thislen = min_t(int, writesize, len - read); 947 column = 0; 948 949 if (!ONENAND_IS_4KB_PAGE(this)) { 950 /* Now wait for load */ 951 ret = this->wait(mtd, FL_READING); 952 onenand_update_bufferram(mtd, from, !ret); 953 if (ret == -EBADMSG) 954 ret = 0; 955 } 956 } 957 958 /* 959 * Return success, if no ECC failures, else -EBADMSG 960 * fs driver will take care of that, because 961 * retlen == desired len and result == -EBADMSG 962 */ 963 ops->retlen = read; 964 ops->oobretlen = oobread; 965 966 if (ret) 967 return ret; 968 969 if (mtd->ecc_stats.failed - stats.failed) 970 return -EBADMSG; 971 972 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; 973 } 974 975 /** 976 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band 977 * @param mtd MTD device structure 978 * @param from offset to read from 979 * @param ops oob operation description structure 980 * 981 * OneNAND read out-of-band data from the spare area 982 */ 983 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from, 984 struct mtd_oob_ops *ops) 985 { 986 struct onenand_chip *this = mtd->priv; 987 struct mtd_ecc_stats stats; 988 int read = 0, thislen, column, oobsize; 989 size_t len = ops->ooblen; 990 mtd_oob_mode_t mode = ops->mode; 991 u_char *buf = ops->oobbuf; 992 int ret = 0, readcmd; 993 994 from += ops->ooboffs; 995 996 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len); 997 998 /* Initialize return length value */ 999 ops->oobretlen = 0; 1000 1001 if (mode == MTD_OOB_AUTO) 1002 oobsize = this->ecclayout->oobavail; 1003 else 1004 oobsize = mtd->oobsize; 1005 1006 column = from & (mtd->oobsize - 1); 1007 1008 if (unlikely(column >= oobsize)) { 1009 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n"); 1010 return -EINVAL; 1011 } 1012 1013 /* Do not allow reads past end of device */ 1014 if (unlikely(from >= mtd->size || 1015 column + len > ((mtd->size >> this->page_shift) - 1016 (from >> this->page_shift)) * oobsize)) { 1017 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n"); 1018 return -EINVAL; 1019 } 1020 1021 stats = mtd->ecc_stats; 1022 1023 readcmd = ONENAND_IS_4KB_PAGE(this) ? 1024 ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1025 1026 while (read < len) { 1027 thislen = oobsize - column; 1028 thislen = min_t(int, thislen, len); 1029 1030 this->spare_buf = buf; 1031 this->command(mtd, readcmd, from, mtd->oobsize); 1032 1033 onenand_update_bufferram(mtd, from, 0); 1034 1035 ret = this->wait(mtd, FL_READING); 1036 if (unlikely(ret)) 1037 ret = onenand_recover_lsb(mtd, from, ret); 1038 1039 if (ret && ret != -EBADMSG) { 1040 printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret); 1041 break; 1042 } 1043 1044 if (mode == MTD_OOB_AUTO) 1045 onenand_transfer_auto_oob(mtd, buf, column, thislen); 1046 else 1047 this->read_bufferram(mtd, 0, ONENAND_SPARERAM, buf, column, thislen); 1048 1049 read += thislen; 1050 1051 if (read == len) 1052 break; 1053 1054 buf += thislen; 1055 1056 /* Read more? */ 1057 if (read < len) { 1058 /* Page size */ 1059 from += mtd->writesize; 1060 column = 0; 1061 } 1062 } 1063 1064 ops->oobretlen = read; 1065 1066 if (ret) 1067 return ret; 1068 1069 if (mtd->ecc_stats.failed - stats.failed) 1070 return -EBADMSG; 1071 1072 return 0; 1073 } 1074 1075 /** 1076 * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc 1077 * @param mtd MTD device structure 1078 * @param from offset to read from 1079 * @param len number of bytes to read 1080 * @param retlen pointer to variable to store the number of read bytes 1081 * @param buf the databuffer to put data 1082 * 1083 * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL 1084 */ 1085 int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, 1086 size_t * retlen, u_char * buf) 1087 { 1088 struct mtd_oob_ops ops = { 1089 .len = len, 1090 .ooblen = 0, 1091 .datbuf = buf, 1092 .oobbuf = NULL, 1093 }; 1094 int ret; 1095 1096 onenand_get_device(mtd, FL_READING); 1097 ret = onenand_read_ops_nolock(mtd, from, &ops); 1098 onenand_release_device(mtd); 1099 1100 *retlen = ops.retlen; 1101 return ret; 1102 } 1103 1104 /** 1105 * onenand_read_oob - [MTD Interface] OneNAND read out-of-band 1106 * @param mtd MTD device structure 1107 * @param from offset to read from 1108 * @param ops oob operations description structure 1109 * 1110 * OneNAND main and/or out-of-band 1111 */ 1112 int onenand_read_oob(struct mtd_info *mtd, loff_t from, 1113 struct mtd_oob_ops *ops) 1114 { 1115 int ret; 1116 1117 switch (ops->mode) { 1118 case MTD_OOB_PLACE: 1119 case MTD_OOB_AUTO: 1120 break; 1121 case MTD_OOB_RAW: 1122 /* Not implemented yet */ 1123 default: 1124 return -EINVAL; 1125 } 1126 1127 onenand_get_device(mtd, FL_READING); 1128 if (ops->datbuf) 1129 ret = onenand_read_ops_nolock(mtd, from, ops); 1130 else 1131 ret = onenand_read_oob_nolock(mtd, from, ops); 1132 onenand_release_device(mtd); 1133 1134 return ret; 1135 } 1136 1137 /** 1138 * onenand_bbt_wait - [DEFAULT] wait until the command is done 1139 * @param mtd MTD device structure 1140 * @param state state to select the max. timeout value 1141 * 1142 * Wait for command done. 1143 */ 1144 static int onenand_bbt_wait(struct mtd_info *mtd, int state) 1145 { 1146 struct onenand_chip *this = mtd->priv; 1147 unsigned int flags = ONENAND_INT_MASTER; 1148 unsigned int interrupt; 1149 unsigned int ctrl; 1150 1151 while (1) { 1152 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1153 if (interrupt & flags) 1154 break; 1155 } 1156 1157 /* To get correct interrupt status in timeout case */ 1158 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1159 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 1160 1161 if (interrupt & ONENAND_INT_READ) { 1162 int ecc = onenand_read_ecc(this); 1163 if (ecc & ONENAND_ECC_2BIT_ALL) { 1164 printk(KERN_INFO "onenand_bbt_wait: ecc error = 0x%04x" 1165 ", controller = 0x%04x\n", ecc, ctrl); 1166 return ONENAND_BBT_READ_ERROR; 1167 } 1168 } else { 1169 printk(KERN_ERR "onenand_bbt_wait: read timeout!" 1170 "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt); 1171 return ONENAND_BBT_READ_FATAL_ERROR; 1172 } 1173 1174 /* Initial bad block case: 0x2400 or 0x0400 */ 1175 if (ctrl & ONENAND_CTRL_ERROR) { 1176 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl); 1177 return ONENAND_BBT_READ_ERROR; 1178 } 1179 1180 return 0; 1181 } 1182 1183 /** 1184 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan 1185 * @param mtd MTD device structure 1186 * @param from offset to read from 1187 * @param ops oob operation description structure 1188 * 1189 * OneNAND read out-of-band data from the spare area for bbt scan 1190 */ 1191 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, 1192 struct mtd_oob_ops *ops) 1193 { 1194 struct onenand_chip *this = mtd->priv; 1195 int read = 0, thislen, column; 1196 int ret = 0, readcmd; 1197 size_t len = ops->ooblen; 1198 u_char *buf = ops->oobbuf; 1199 1200 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len); 1201 1202 readcmd = ONENAND_IS_4KB_PAGE(this) ? 1203 ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1204 1205 /* Initialize return value */ 1206 ops->oobretlen = 0; 1207 1208 /* Do not allow reads past end of device */ 1209 if (unlikely((from + len) > mtd->size)) { 1210 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n"); 1211 return ONENAND_BBT_READ_FATAL_ERROR; 1212 } 1213 1214 /* Grab the lock and see if the device is available */ 1215 onenand_get_device(mtd, FL_READING); 1216 1217 column = from & (mtd->oobsize - 1); 1218 1219 while (read < len) { 1220 1221 thislen = mtd->oobsize - column; 1222 thislen = min_t(int, thislen, len); 1223 1224 this->spare_buf = buf; 1225 this->command(mtd, readcmd, from, mtd->oobsize); 1226 1227 onenand_update_bufferram(mtd, from, 0); 1228 1229 ret = this->bbt_wait(mtd, FL_READING); 1230 if (unlikely(ret)) 1231 ret = onenand_recover_lsb(mtd, from, ret); 1232 1233 if (ret) 1234 break; 1235 1236 this->read_bufferram(mtd, 0, ONENAND_SPARERAM, buf, column, thislen); 1237 read += thislen; 1238 if (read == len) 1239 break; 1240 1241 buf += thislen; 1242 1243 /* Read more? */ 1244 if (read < len) { 1245 /* Update Page size */ 1246 from += this->writesize; 1247 column = 0; 1248 } 1249 } 1250 1251 /* Deselect and wake up anyone waiting on the device */ 1252 onenand_release_device(mtd); 1253 1254 ops->oobretlen = read; 1255 return ret; 1256 } 1257 1258 1259 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 1260 /** 1261 * onenand_verify_oob - [GENERIC] verify the oob contents after a write 1262 * @param mtd MTD device structure 1263 * @param buf the databuffer to verify 1264 * @param to offset to read from 1265 */ 1266 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to) 1267 { 1268 struct onenand_chip *this = mtd->priv; 1269 u_char *oob_buf = this->oob_buf; 1270 int status, i, readcmd; 1271 1272 readcmd = ONENAND_IS_4KB_PAGE(this) ? 1273 ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1274 1275 this->command(mtd, readcmd, to, mtd->oobsize); 1276 onenand_update_bufferram(mtd, to, 0); 1277 status = this->wait(mtd, FL_READING); 1278 if (status) 1279 return status; 1280 1281 this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); 1282 for (i = 0; i < mtd->oobsize; i++) 1283 if (buf[i] != 0xFF && buf[i] != oob_buf[i]) 1284 return -EBADMSG; 1285 1286 return 0; 1287 } 1288 1289 /** 1290 * onenand_verify - [GENERIC] verify the chip contents after a write 1291 * @param mtd MTD device structure 1292 * @param buf the databuffer to verify 1293 * @param addr offset to read from 1294 * @param len number of bytes to read and compare 1295 */ 1296 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len) 1297 { 1298 struct onenand_chip *this = mtd->priv; 1299 void __iomem *dataram; 1300 int ret = 0; 1301 int thislen, column; 1302 1303 while (len != 0) { 1304 thislen = min_t(int, this->writesize, len); 1305 column = addr & (this->writesize - 1); 1306 if (column + thislen > this->writesize) 1307 thislen = this->writesize - column; 1308 1309 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize); 1310 1311 onenand_update_bufferram(mtd, addr, 0); 1312 1313 ret = this->wait(mtd, FL_READING); 1314 if (ret) 1315 return ret; 1316 1317 onenand_update_bufferram(mtd, addr, 1); 1318 1319 dataram = this->base + ONENAND_DATARAM; 1320 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM); 1321 1322 if (memcmp(buf, dataram + column, thislen)) 1323 return -EBADMSG; 1324 1325 len -= thislen; 1326 buf += thislen; 1327 addr += thislen; 1328 } 1329 1330 return 0; 1331 } 1332 #else 1333 #define onenand_verify(...) (0) 1334 #define onenand_verify_oob(...) (0) 1335 #endif 1336 1337 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0) 1338 1339 /** 1340 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer 1341 * @param mtd MTD device structure 1342 * @param oob_buf oob buffer 1343 * @param buf source address 1344 * @param column oob offset to write to 1345 * @param thislen oob length to write 1346 */ 1347 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf, 1348 const u_char *buf, int column, int thislen) 1349 { 1350 struct onenand_chip *this = mtd->priv; 1351 struct nand_oobfree *free; 1352 int writecol = column; 1353 int writeend = column + thislen; 1354 int lastgap = 0; 1355 unsigned int i; 1356 1357 free = this->ecclayout->oobfree; 1358 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 1359 if (writecol >= lastgap) 1360 writecol += free->offset - lastgap; 1361 if (writeend >= lastgap) 1362 writeend += free->offset - lastgap; 1363 lastgap = free->offset + free->length; 1364 } 1365 free = this->ecclayout->oobfree; 1366 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 1367 int free_end = free->offset + free->length; 1368 if (free->offset < writeend && free_end > writecol) { 1369 int st = max_t(int,free->offset,writecol); 1370 int ed = min_t(int,free_end,writeend); 1371 int n = ed - st; 1372 memcpy(oob_buf + st, buf, n); 1373 buf += n; 1374 } else if (column == 0) 1375 break; 1376 } 1377 return 0; 1378 } 1379 1380 /** 1381 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band 1382 * @param mtd MTD device structure 1383 * @param to offset to write to 1384 * @param ops oob operation description structure 1385 * 1386 * Write main and/or oob with ECC 1387 */ 1388 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to, 1389 struct mtd_oob_ops *ops) 1390 { 1391 struct onenand_chip *this = mtd->priv; 1392 int written = 0, column, thislen, subpage; 1393 int oobwritten = 0, oobcolumn, thisooblen, oobsize; 1394 size_t len = ops->len; 1395 size_t ooblen = ops->ooblen; 1396 const u_char *buf = ops->datbuf; 1397 const u_char *oob = ops->oobbuf; 1398 u_char *oobbuf; 1399 int ret = 0; 1400 1401 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len); 1402 1403 /* Initialize retlen, in case of early exit */ 1404 ops->retlen = 0; 1405 ops->oobretlen = 0; 1406 1407 /* Do not allow writes past end of device */ 1408 if (unlikely((to + len) > mtd->size)) { 1409 printk(KERN_ERR "onenand_write_ops_nolock: Attempt write to past end of device\n"); 1410 return -EINVAL; 1411 } 1412 1413 /* Reject writes, which are not page aligned */ 1414 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) { 1415 printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n"); 1416 return -EINVAL; 1417 } 1418 1419 if (ops->mode == MTD_OOB_AUTO) 1420 oobsize = this->ecclayout->oobavail; 1421 else 1422 oobsize = mtd->oobsize; 1423 1424 oobcolumn = to & (mtd->oobsize - 1); 1425 1426 column = to & (mtd->writesize - 1); 1427 1428 /* Loop until all data write */ 1429 while (written < len) { 1430 u_char *wbuf = (u_char *) buf; 1431 1432 thislen = min_t(int, mtd->writesize - column, len - written); 1433 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten); 1434 1435 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen); 1436 1437 /* Partial page write */ 1438 subpage = thislen < mtd->writesize; 1439 if (subpage) { 1440 memset(this->page_buf, 0xff, mtd->writesize); 1441 memcpy(this->page_buf + column, buf, thislen); 1442 wbuf = this->page_buf; 1443 } 1444 1445 this->write_bufferram(mtd, to, ONENAND_DATARAM, wbuf, 0, mtd->writesize); 1446 1447 if (oob) { 1448 oobbuf = this->oob_buf; 1449 1450 /* We send data to spare ram with oobsize 1451 * * to prevent byte access */ 1452 memset(oobbuf, 0xff, mtd->oobsize); 1453 if (ops->mode == MTD_OOB_AUTO) 1454 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen); 1455 else 1456 memcpy(oobbuf + oobcolumn, oob, thisooblen); 1457 1458 oobwritten += thisooblen; 1459 oob += thisooblen; 1460 oobcolumn = 0; 1461 } else 1462 oobbuf = (u_char *) ffchars; 1463 1464 this->write_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 1465 1466 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize); 1467 1468 ret = this->wait(mtd, FL_WRITING); 1469 1470 /* In partial page write we don't update bufferram */ 1471 onenand_update_bufferram(mtd, to, !ret && !subpage); 1472 if (ONENAND_IS_2PLANE(this)) { 1473 ONENAND_SET_BUFFERRAM1(this); 1474 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage); 1475 } 1476 1477 if (ret) { 1478 printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret); 1479 break; 1480 } 1481 1482 /* Only check verify write turn on */ 1483 ret = onenand_verify(mtd, buf, to, thislen); 1484 if (ret) { 1485 printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret); 1486 break; 1487 } 1488 1489 written += thislen; 1490 1491 if (written == len) 1492 break; 1493 1494 column = 0; 1495 to += thislen; 1496 buf += thislen; 1497 } 1498 1499 ops->retlen = written; 1500 1501 return ret; 1502 } 1503 1504 /** 1505 * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band 1506 * @param mtd MTD device structure 1507 * @param to offset to write to 1508 * @param len number of bytes to write 1509 * @param retlen pointer to variable to store the number of written bytes 1510 * @param buf the data to write 1511 * @param mode operation mode 1512 * 1513 * OneNAND write out-of-band 1514 */ 1515 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to, 1516 struct mtd_oob_ops *ops) 1517 { 1518 struct onenand_chip *this = mtd->priv; 1519 int column, ret = 0, oobsize; 1520 int written = 0, oobcmd; 1521 u_char *oobbuf; 1522 size_t len = ops->ooblen; 1523 const u_char *buf = ops->oobbuf; 1524 mtd_oob_mode_t mode = ops->mode; 1525 1526 to += ops->ooboffs; 1527 1528 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len); 1529 1530 /* Initialize retlen, in case of early exit */ 1531 ops->oobretlen = 0; 1532 1533 if (mode == MTD_OOB_AUTO) 1534 oobsize = this->ecclayout->oobavail; 1535 else 1536 oobsize = mtd->oobsize; 1537 1538 column = to & (mtd->oobsize - 1); 1539 1540 if (unlikely(column >= oobsize)) { 1541 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n"); 1542 return -EINVAL; 1543 } 1544 1545 /* For compatibility with NAND: Do not allow write past end of page */ 1546 if (unlikely(column + len > oobsize)) { 1547 printk(KERN_ERR "onenand_write_oob_nolock: " 1548 "Attempt to write past end of page\n"); 1549 return -EINVAL; 1550 } 1551 1552 /* Do not allow reads past end of device */ 1553 if (unlikely(to >= mtd->size || 1554 column + len > ((mtd->size >> this->page_shift) - 1555 (to >> this->page_shift)) * oobsize)) { 1556 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n"); 1557 return -EINVAL; 1558 } 1559 1560 oobbuf = this->oob_buf; 1561 1562 oobcmd = ONENAND_IS_4KB_PAGE(this) ? 1563 ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB; 1564 1565 /* Loop until all data write */ 1566 while (written < len) { 1567 int thislen = min_t(int, oobsize, len - written); 1568 1569 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize); 1570 1571 /* We send data to spare ram with oobsize 1572 * to prevent byte access */ 1573 memset(oobbuf, 0xff, mtd->oobsize); 1574 if (mode == MTD_OOB_AUTO) 1575 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen); 1576 else 1577 memcpy(oobbuf + column, buf, thislen); 1578 this->write_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 1579 1580 if (ONENAND_IS_4KB_PAGE(this)) { 1581 /* Set main area of DataRAM to 0xff*/ 1582 memset(this->page_buf, 0xff, mtd->writesize); 1583 this->write_bufferram(mtd, 0, ONENAND_DATARAM, 1584 this->page_buf, 0, mtd->writesize); 1585 } 1586 1587 this->command(mtd, oobcmd, to, mtd->oobsize); 1588 1589 onenand_update_bufferram(mtd, to, 0); 1590 if (ONENAND_IS_2PLANE(this)) { 1591 ONENAND_SET_BUFFERRAM1(this); 1592 onenand_update_bufferram(mtd, to + this->writesize, 0); 1593 } 1594 1595 ret = this->wait(mtd, FL_WRITING); 1596 if (ret) { 1597 printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret); 1598 break; 1599 } 1600 1601 ret = onenand_verify_oob(mtd, oobbuf, to); 1602 if (ret) { 1603 printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret); 1604 break; 1605 } 1606 1607 written += thislen; 1608 if (written == len) 1609 break; 1610 1611 to += mtd->writesize; 1612 buf += thislen; 1613 column = 0; 1614 } 1615 1616 ops->oobretlen = written; 1617 1618 return ret; 1619 } 1620 1621 /** 1622 * onenand_write - [MTD Interface] compability function for onenand_write_ecc 1623 * @param mtd MTD device structure 1624 * @param to offset to write to 1625 * @param len number of bytes to write 1626 * @param retlen pointer to variable to store the number of written bytes 1627 * @param buf the data to write 1628 * 1629 * Write with ECC 1630 */ 1631 int onenand_write(struct mtd_info *mtd, loff_t to, size_t len, 1632 size_t * retlen, const u_char * buf) 1633 { 1634 struct mtd_oob_ops ops = { 1635 .len = len, 1636 .ooblen = 0, 1637 .datbuf = (u_char *) buf, 1638 .oobbuf = NULL, 1639 }; 1640 int ret; 1641 1642 onenand_get_device(mtd, FL_WRITING); 1643 ret = onenand_write_ops_nolock(mtd, to, &ops); 1644 onenand_release_device(mtd); 1645 1646 *retlen = ops.retlen; 1647 return ret; 1648 } 1649 1650 /** 1651 * onenand_write_oob - [MTD Interface] OneNAND write out-of-band 1652 * @param mtd MTD device structure 1653 * @param to offset to write to 1654 * @param ops oob operation description structure 1655 * 1656 * OneNAND write main and/or out-of-band 1657 */ 1658 int onenand_write_oob(struct mtd_info *mtd, loff_t to, 1659 struct mtd_oob_ops *ops) 1660 { 1661 int ret; 1662 1663 switch (ops->mode) { 1664 case MTD_OOB_PLACE: 1665 case MTD_OOB_AUTO: 1666 break; 1667 case MTD_OOB_RAW: 1668 /* Not implemented yet */ 1669 default: 1670 return -EINVAL; 1671 } 1672 1673 onenand_get_device(mtd, FL_WRITING); 1674 if (ops->datbuf) 1675 ret = onenand_write_ops_nolock(mtd, to, ops); 1676 else 1677 ret = onenand_write_oob_nolock(mtd, to, ops); 1678 onenand_release_device(mtd); 1679 1680 return ret; 1681 1682 } 1683 1684 /** 1685 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad 1686 * @param mtd MTD device structure 1687 * @param ofs offset from device start 1688 * @param allowbbt 1, if its allowed to access the bbt area 1689 * 1690 * Check, if the block is bad, Either by reading the bad block table or 1691 * calling of the scan function. 1692 */ 1693 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt) 1694 { 1695 struct onenand_chip *this = mtd->priv; 1696 struct bbm_info *bbm = this->bbm; 1697 1698 /* Return info from the table */ 1699 return bbm->isbad_bbt(mtd, ofs, allowbbt); 1700 } 1701 1702 1703 /** 1704 * onenand_erase - [MTD Interface] erase block(s) 1705 * @param mtd MTD device structure 1706 * @param instr erase instruction 1707 * 1708 * Erase one ore more blocks 1709 */ 1710 int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) 1711 { 1712 struct onenand_chip *this = mtd->priv; 1713 unsigned int block_size; 1714 loff_t addr = instr->addr; 1715 unsigned int len = instr->len; 1716 int ret = 0, i; 1717 struct mtd_erase_region_info *region = NULL; 1718 unsigned int region_end = 0; 1719 1720 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", 1721 (unsigned int) addr, len); 1722 1723 /* Do not allow erase past end of device */ 1724 if (unlikely((len + addr) > mtd->size)) { 1725 MTDDEBUG(MTD_DEBUG_LEVEL0, "onenand_erase:" 1726 "Erase past end of device\n"); 1727 return -EINVAL; 1728 } 1729 1730 if (FLEXONENAND(this)) { 1731 /* Find the eraseregion of this address */ 1732 i = flexonenand_region(mtd, addr); 1733 region = &mtd->eraseregions[i]; 1734 1735 block_size = region->erasesize; 1736 region_end = region->offset 1737 + region->erasesize * region->numblocks; 1738 1739 /* Start address within region must align on block boundary. 1740 * Erase region's start offset is always block start address. 1741 */ 1742 if (unlikely((addr - region->offset) & (block_size - 1))) { 1743 MTDDEBUG(MTD_DEBUG_LEVEL0, "onenand_erase:" 1744 " Unaligned address\n"); 1745 return -EINVAL; 1746 } 1747 } else { 1748 block_size = 1 << this->erase_shift; 1749 1750 /* Start address must align on block boundary */ 1751 if (unlikely(addr & (block_size - 1))) { 1752 MTDDEBUG(MTD_DEBUG_LEVEL0, "onenand_erase:" 1753 "Unaligned address\n"); 1754 return -EINVAL; 1755 } 1756 } 1757 1758 /* Length must align on block boundary */ 1759 if (unlikely(len & (block_size - 1))) { 1760 MTDDEBUG (MTD_DEBUG_LEVEL0, 1761 "onenand_erase: Length not block aligned\n"); 1762 return -EINVAL; 1763 } 1764 1765 instr->fail_addr = 0xffffffff; 1766 1767 /* Grab the lock and see if the device is available */ 1768 onenand_get_device(mtd, FL_ERASING); 1769 1770 /* Loop throught the pages */ 1771 instr->state = MTD_ERASING; 1772 1773 while (len) { 1774 1775 /* Check if we have a bad block, we do not erase bad blocks */ 1776 if (instr->priv == 0 && onenand_block_isbad_nolock(mtd, addr, 0)) { 1777 printk(KERN_WARNING "onenand_erase: attempt to erase" 1778 " a bad block at addr 0x%08x\n", 1779 (unsigned int) addr); 1780 instr->state = MTD_ERASE_FAILED; 1781 goto erase_exit; 1782 } 1783 1784 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); 1785 1786 onenand_invalidate_bufferram(mtd, addr, block_size); 1787 1788 ret = this->wait(mtd, FL_ERASING); 1789 /* Check, if it is write protected */ 1790 if (ret) { 1791 if (ret == -EPERM) 1792 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: " 1793 "Device is write protected!!!\n"); 1794 else 1795 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: " 1796 "Failed erase, block %d\n", 1797 onenand_block(this, addr)); 1798 instr->state = MTD_ERASE_FAILED; 1799 instr->fail_addr = addr; 1800 1801 goto erase_exit; 1802 } 1803 1804 len -= block_size; 1805 addr += block_size; 1806 1807 if (addr == region_end) { 1808 if (!len) 1809 break; 1810 region++; 1811 1812 block_size = region->erasesize; 1813 region_end = region->offset 1814 + region->erasesize * region->numblocks; 1815 1816 if (len & (block_size - 1)) { 1817 /* This has been checked at MTD 1818 * partitioning level. */ 1819 printk("onenand_erase: Unaligned address\n"); 1820 goto erase_exit; 1821 } 1822 } 1823 } 1824 1825 instr->state = MTD_ERASE_DONE; 1826 1827 erase_exit: 1828 1829 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; 1830 /* Do call back function */ 1831 if (!ret) 1832 mtd_erase_callback(instr); 1833 1834 /* Deselect and wake up anyone waiting on the device */ 1835 onenand_release_device(mtd); 1836 1837 return ret; 1838 } 1839 1840 /** 1841 * onenand_sync - [MTD Interface] sync 1842 * @param mtd MTD device structure 1843 * 1844 * Sync is actually a wait for chip ready function 1845 */ 1846 void onenand_sync(struct mtd_info *mtd) 1847 { 1848 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_sync: called\n"); 1849 1850 /* Grab the lock and see if the device is available */ 1851 onenand_get_device(mtd, FL_SYNCING); 1852 1853 /* Release it and go back */ 1854 onenand_release_device(mtd); 1855 } 1856 1857 /** 1858 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad 1859 * @param mtd MTD device structure 1860 * @param ofs offset relative to mtd start 1861 * 1862 * Check whether the block is bad 1863 */ 1864 int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs) 1865 { 1866 int ret; 1867 1868 /* Check for invalid offset */ 1869 if (ofs > mtd->size) 1870 return -EINVAL; 1871 1872 onenand_get_device(mtd, FL_READING); 1873 ret = onenand_block_isbad_nolock(mtd,ofs, 0); 1874 onenand_release_device(mtd); 1875 return ret; 1876 } 1877 1878 /** 1879 * onenand_default_block_markbad - [DEFAULT] mark a block bad 1880 * @param mtd MTD device structure 1881 * @param ofs offset from device start 1882 * 1883 * This is the default implementation, which can be overridden by 1884 * a hardware specific driver. 1885 */ 1886 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) 1887 { 1888 struct onenand_chip *this = mtd->priv; 1889 struct bbm_info *bbm = this->bbm; 1890 u_char buf[2] = {0, 0}; 1891 struct mtd_oob_ops ops = { 1892 .mode = MTD_OOB_PLACE, 1893 .ooblen = 2, 1894 .oobbuf = buf, 1895 .ooboffs = 0, 1896 }; 1897 int block; 1898 1899 /* Get block number */ 1900 block = onenand_block(this, ofs); 1901 if (bbm->bbt) 1902 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); 1903 1904 /* We write two bytes, so we dont have to mess with 16 bit access */ 1905 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01); 1906 return onenand_write_oob_nolock(mtd, ofs, &ops); 1907 } 1908 1909 /** 1910 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad 1911 * @param mtd MTD device structure 1912 * @param ofs offset relative to mtd start 1913 * 1914 * Mark the block as bad 1915 */ 1916 int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs) 1917 { 1918 struct onenand_chip *this = mtd->priv; 1919 int ret; 1920 1921 ret = onenand_block_isbad(mtd, ofs); 1922 if (ret) { 1923 /* If it was bad already, return success and do nothing */ 1924 if (ret > 0) 1925 return 0; 1926 return ret; 1927 } 1928 1929 ret = this->block_markbad(mtd, ofs); 1930 return ret; 1931 } 1932 1933 /** 1934 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s) 1935 * @param mtd MTD device structure 1936 * @param ofs offset relative to mtd start 1937 * @param len number of bytes to lock or unlock 1938 * @param cmd lock or unlock command 1939 * 1940 * Lock or unlock one or more blocks 1941 */ 1942 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd) 1943 { 1944 struct onenand_chip *this = mtd->priv; 1945 int start, end, block, value, status; 1946 1947 start = onenand_block(this, ofs); 1948 end = onenand_block(this, ofs + len); 1949 1950 /* Continuous lock scheme */ 1951 if (this->options & ONENAND_HAS_CONT_LOCK) { 1952 /* Set start block address */ 1953 this->write_word(start, 1954 this->base + ONENAND_REG_START_BLOCK_ADDRESS); 1955 /* Set end block address */ 1956 this->write_word(end - 1, 1957 this->base + ONENAND_REG_END_BLOCK_ADDRESS); 1958 /* Write unlock command */ 1959 this->command(mtd, cmd, 0, 0); 1960 1961 /* There's no return value */ 1962 this->wait(mtd, FL_UNLOCKING); 1963 1964 /* Sanity check */ 1965 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 1966 & ONENAND_CTRL_ONGO) 1967 continue; 1968 1969 /* Check lock status */ 1970 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 1971 if (!(status & ONENAND_WP_US)) 1972 printk(KERN_ERR "wp status = 0x%x\n", status); 1973 1974 return 0; 1975 } 1976 1977 /* Block lock scheme */ 1978 for (block = start; block < end; block++) { 1979 /* Set block address */ 1980 value = onenand_block_address(this, block); 1981 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 1982 /* Select DataRAM for DDP */ 1983 value = onenand_bufferram_address(this, block); 1984 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 1985 1986 /* Set start block address */ 1987 this->write_word(block, 1988 this->base + ONENAND_REG_START_BLOCK_ADDRESS); 1989 /* Write unlock command */ 1990 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0); 1991 1992 /* There's no return value */ 1993 this->wait(mtd, FL_UNLOCKING); 1994 1995 /* Sanity check */ 1996 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 1997 & ONENAND_CTRL_ONGO) 1998 continue; 1999 2000 /* Check lock status */ 2001 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2002 if (!(status & ONENAND_WP_US)) 2003 printk(KERN_ERR "block = %d, wp status = 0x%x\n", 2004 block, status); 2005 } 2006 2007 return 0; 2008 } 2009 2010 #ifdef ONENAND_LINUX 2011 /** 2012 * onenand_lock - [MTD Interface] Lock block(s) 2013 * @param mtd MTD device structure 2014 * @param ofs offset relative to mtd start 2015 * @param len number of bytes to unlock 2016 * 2017 * Lock one or more blocks 2018 */ 2019 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len) 2020 { 2021 int ret; 2022 2023 onenand_get_device(mtd, FL_LOCKING); 2024 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK); 2025 onenand_release_device(mtd); 2026 return ret; 2027 } 2028 2029 /** 2030 * onenand_unlock - [MTD Interface] Unlock block(s) 2031 * @param mtd MTD device structure 2032 * @param ofs offset relative to mtd start 2033 * @param len number of bytes to unlock 2034 * 2035 * Unlock one or more blocks 2036 */ 2037 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) 2038 { 2039 int ret; 2040 2041 onenand_get_device(mtd, FL_LOCKING); 2042 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); 2043 onenand_release_device(mtd); 2044 return ret; 2045 } 2046 #endif 2047 2048 /** 2049 * onenand_check_lock_status - [OneNAND Interface] Check lock status 2050 * @param this onenand chip data structure 2051 * 2052 * Check lock status 2053 */ 2054 static int onenand_check_lock_status(struct onenand_chip *this) 2055 { 2056 unsigned int value, block, status; 2057 unsigned int end; 2058 2059 end = this->chipsize >> this->erase_shift; 2060 for (block = 0; block < end; block++) { 2061 /* Set block address */ 2062 value = onenand_block_address(this, block); 2063 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 2064 /* Select DataRAM for DDP */ 2065 value = onenand_bufferram_address(this, block); 2066 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 2067 /* Set start block address */ 2068 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2069 2070 /* Check lock status */ 2071 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2072 if (!(status & ONENAND_WP_US)) { 2073 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status); 2074 return 0; 2075 } 2076 } 2077 2078 return 1; 2079 } 2080 2081 /** 2082 * onenand_unlock_all - [OneNAND Interface] unlock all blocks 2083 * @param mtd MTD device structure 2084 * 2085 * Unlock all blocks 2086 */ 2087 static void onenand_unlock_all(struct mtd_info *mtd) 2088 { 2089 struct onenand_chip *this = mtd->priv; 2090 loff_t ofs = 0; 2091 size_t len = mtd->size; 2092 2093 if (this->options & ONENAND_HAS_UNLOCK_ALL) { 2094 /* Set start block address */ 2095 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2096 /* Write unlock command */ 2097 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0); 2098 2099 /* There's no return value */ 2100 this->wait(mtd, FL_LOCKING); 2101 2102 /* Sanity check */ 2103 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2104 & ONENAND_CTRL_ONGO) 2105 continue; 2106 2107 /* Check lock status */ 2108 if (onenand_check_lock_status(this)) 2109 return; 2110 2111 /* Workaround for all block unlock in DDP */ 2112 if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) { 2113 /* All blocks on another chip */ 2114 ofs = this->chipsize >> 1; 2115 len = this->chipsize >> 1; 2116 } 2117 } 2118 2119 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); 2120 } 2121 2122 2123 /** 2124 * onenand_check_features - Check and set OneNAND features 2125 * @param mtd MTD data structure 2126 * 2127 * Check and set OneNAND features 2128 * - lock scheme 2129 * - two plane 2130 */ 2131 static void onenand_check_features(struct mtd_info *mtd) 2132 { 2133 struct onenand_chip *this = mtd->priv; 2134 unsigned int density, process; 2135 2136 /* Lock scheme depends on density and process */ 2137 density = onenand_get_density(this->device_id); 2138 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT; 2139 2140 /* Lock scheme */ 2141 switch (density) { 2142 case ONENAND_DEVICE_DENSITY_4Gb: 2143 if (ONENAND_IS_DDP(this)) 2144 this->options |= ONENAND_HAS_2PLANE; 2145 else 2146 this->options |= ONENAND_HAS_4KB_PAGE; 2147 2148 case ONENAND_DEVICE_DENSITY_2Gb: 2149 /* 2Gb DDP don't have 2 plane */ 2150 if (!ONENAND_IS_DDP(this)) 2151 this->options |= ONENAND_HAS_2PLANE; 2152 this->options |= ONENAND_HAS_UNLOCK_ALL; 2153 2154 case ONENAND_DEVICE_DENSITY_1Gb: 2155 /* A-Die has all block unlock */ 2156 if (process) 2157 this->options |= ONENAND_HAS_UNLOCK_ALL; 2158 break; 2159 2160 default: 2161 /* Some OneNAND has continuous lock scheme */ 2162 if (!process) 2163 this->options |= ONENAND_HAS_CONT_LOCK; 2164 break; 2165 } 2166 2167 if (ONENAND_IS_MLC(this)) 2168 this->options |= ONENAND_HAS_4KB_PAGE; 2169 2170 if (ONENAND_IS_4KB_PAGE(this)) 2171 this->options &= ~ONENAND_HAS_2PLANE; 2172 2173 if (FLEXONENAND(this)) { 2174 this->options &= ~ONENAND_HAS_CONT_LOCK; 2175 this->options |= ONENAND_HAS_UNLOCK_ALL; 2176 } 2177 2178 if (this->options & ONENAND_HAS_CONT_LOCK) 2179 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n"); 2180 if (this->options & ONENAND_HAS_UNLOCK_ALL) 2181 printk(KERN_DEBUG "Chip support all block unlock\n"); 2182 if (this->options & ONENAND_HAS_2PLANE) 2183 printk(KERN_DEBUG "Chip has 2 plane\n"); 2184 if (this->options & ONENAND_HAS_4KB_PAGE) 2185 printk(KERN_DEBUG "Chip has 4KiB pagesize\n"); 2186 2187 } 2188 2189 /** 2190 * onenand_print_device_info - Print device ID 2191 * @param device device ID 2192 * 2193 * Print device ID 2194 */ 2195 char *onenand_print_device_info(int device, int version) 2196 { 2197 int vcc, demuxed, ddp, density, flexonenand; 2198 char *dev_info = malloc(80); 2199 char *p = dev_info; 2200 2201 vcc = device & ONENAND_DEVICE_VCC_MASK; 2202 demuxed = device & ONENAND_DEVICE_IS_DEMUX; 2203 ddp = device & ONENAND_DEVICE_IS_DDP; 2204 density = onenand_get_density(device); 2205 flexonenand = device & DEVICE_IS_FLEXONENAND; 2206 p += sprintf(dev_info, "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)", 2207 demuxed ? "" : "Muxed ", 2208 flexonenand ? "Flex-" : "", 2209 ddp ? "(DDP)" : "", 2210 (16 << density), vcc ? "2.65/3.3" : "1.8", device); 2211 2212 sprintf(p, "\nOneNAND version = 0x%04x", version); 2213 printk("%s\n", dev_info); 2214 2215 return dev_info; 2216 } 2217 2218 static const struct onenand_manufacturers onenand_manuf_ids[] = { 2219 {ONENAND_MFR_NUMONYX, "Numonyx"}, 2220 {ONENAND_MFR_SAMSUNG, "Samsung"}, 2221 }; 2222 2223 /** 2224 * onenand_check_maf - Check manufacturer ID 2225 * @param manuf manufacturer ID 2226 * 2227 * Check manufacturer ID 2228 */ 2229 static int onenand_check_maf(int manuf) 2230 { 2231 int size = ARRAY_SIZE(onenand_manuf_ids); 2232 int i; 2233 #ifdef ONENAND_DEBUG 2234 char *name; 2235 #endif 2236 2237 for (i = 0; i < size; i++) 2238 if (manuf == onenand_manuf_ids[i].id) 2239 break; 2240 2241 #ifdef ONENAND_DEBUG 2242 if (i < size) 2243 name = onenand_manuf_ids[i].name; 2244 else 2245 name = "Unknown"; 2246 2247 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf); 2248 #endif 2249 2250 return i == size; 2251 } 2252 2253 /** 2254 * flexonenand_get_boundary - Reads the SLC boundary 2255 * @param onenand_info - onenand info structure 2256 * 2257 * Fill up boundary[] field in onenand_chip 2258 **/ 2259 static int flexonenand_get_boundary(struct mtd_info *mtd) 2260 { 2261 struct onenand_chip *this = mtd->priv; 2262 unsigned int die, bdry; 2263 int syscfg, locked; 2264 2265 /* Disable ECC */ 2266 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 2267 this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1); 2268 2269 for (die = 0; die < this->dies; die++) { 2270 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0); 2271 this->wait(mtd, FL_SYNCING); 2272 2273 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0); 2274 this->wait(mtd, FL_READING); 2275 2276 bdry = this->read_word(this->base + ONENAND_DATARAM); 2277 if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3) 2278 locked = 0; 2279 else 2280 locked = 1; 2281 this->boundary[die] = bdry & FLEXONENAND_PI_MASK; 2282 2283 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 2284 this->wait(mtd, FL_RESETING); 2285 2286 printk(KERN_INFO "Die %d boundary: %d%s\n", die, 2287 this->boundary[die], locked ? "(Locked)" : "(Unlocked)"); 2288 } 2289 2290 /* Enable ECC */ 2291 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 2292 return 0; 2293 } 2294 2295 /** 2296 * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info 2297 * boundary[], diesize[], mtd->size, mtd->erasesize, 2298 * mtd->eraseregions 2299 * @param mtd - MTD device structure 2300 */ 2301 static void flexonenand_get_size(struct mtd_info *mtd) 2302 { 2303 struct onenand_chip *this = mtd->priv; 2304 int die, i, eraseshift, density; 2305 int blksperdie, maxbdry; 2306 loff_t ofs; 2307 2308 density = onenand_get_density(this->device_id); 2309 blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift); 2310 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0; 2311 maxbdry = blksperdie - 1; 2312 eraseshift = this->erase_shift - 1; 2313 2314 mtd->numeraseregions = this->dies << 1; 2315 2316 /* This fills up the device boundary */ 2317 flexonenand_get_boundary(mtd); 2318 die = 0; 2319 ofs = 0; 2320 i = -1; 2321 for (; die < this->dies; die++) { 2322 if (!die || this->boundary[die-1] != maxbdry) { 2323 i++; 2324 mtd->eraseregions[i].offset = ofs; 2325 mtd->eraseregions[i].erasesize = 1 << eraseshift; 2326 mtd->eraseregions[i].numblocks = 2327 this->boundary[die] + 1; 2328 ofs += mtd->eraseregions[i].numblocks << eraseshift; 2329 eraseshift++; 2330 } else { 2331 mtd->numeraseregions -= 1; 2332 mtd->eraseregions[i].numblocks += 2333 this->boundary[die] + 1; 2334 ofs += (this->boundary[die] + 1) << (eraseshift - 1); 2335 } 2336 if (this->boundary[die] != maxbdry) { 2337 i++; 2338 mtd->eraseregions[i].offset = ofs; 2339 mtd->eraseregions[i].erasesize = 1 << eraseshift; 2340 mtd->eraseregions[i].numblocks = maxbdry ^ 2341 this->boundary[die]; 2342 ofs += mtd->eraseregions[i].numblocks << eraseshift; 2343 eraseshift--; 2344 } else 2345 mtd->numeraseregions -= 1; 2346 } 2347 2348 /* Expose MLC erase size except when all blocks are SLC */ 2349 mtd->erasesize = 1 << this->erase_shift; 2350 if (mtd->numeraseregions == 1) 2351 mtd->erasesize >>= 1; 2352 2353 printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions); 2354 for (i = 0; i < mtd->numeraseregions; i++) 2355 printk(KERN_INFO "[offset: 0x%08llx, erasesize: 0x%05x," 2356 " numblocks: %04u]\n", mtd->eraseregions[i].offset, 2357 mtd->eraseregions[i].erasesize, 2358 mtd->eraseregions[i].numblocks); 2359 2360 for (die = 0, mtd->size = 0; die < this->dies; die++) { 2361 this->diesize[die] = (loff_t) (blksperdie << this->erase_shift); 2362 this->diesize[die] -= (loff_t) (this->boundary[die] + 1) 2363 << (this->erase_shift - 1); 2364 mtd->size += this->diesize[die]; 2365 } 2366 } 2367 2368 /** 2369 * flexonenand_check_blocks_erased - Check if blocks are erased 2370 * @param mtd_info - mtd info structure 2371 * @param start - first erase block to check 2372 * @param end - last erase block to check 2373 * 2374 * Converting an unerased block from MLC to SLC 2375 * causes byte values to change. Since both data and its ECC 2376 * have changed, reads on the block give uncorrectable error. 2377 * This might lead to the block being detected as bad. 2378 * 2379 * Avoid this by ensuring that the block to be converted is 2380 * erased. 2381 */ 2382 static int flexonenand_check_blocks_erased(struct mtd_info *mtd, 2383 int start, int end) 2384 { 2385 struct onenand_chip *this = mtd->priv; 2386 int i, ret; 2387 int block; 2388 struct mtd_oob_ops ops = { 2389 .mode = MTD_OOB_PLACE, 2390 .ooboffs = 0, 2391 .ooblen = mtd->oobsize, 2392 .datbuf = NULL, 2393 .oobbuf = this->oob_buf, 2394 }; 2395 loff_t addr; 2396 2397 printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end); 2398 2399 for (block = start; block <= end; block++) { 2400 addr = flexonenand_addr(this, block); 2401 if (onenand_block_isbad_nolock(mtd, addr, 0)) 2402 continue; 2403 2404 /* 2405 * Since main area write results in ECC write to spare, 2406 * it is sufficient to check only ECC bytes for change. 2407 */ 2408 ret = onenand_read_oob_nolock(mtd, addr, &ops); 2409 if (ret) 2410 return ret; 2411 2412 for (i = 0; i < mtd->oobsize; i++) 2413 if (this->oob_buf[i] != 0xff) 2414 break; 2415 2416 if (i != mtd->oobsize) { 2417 printk(KERN_WARNING "Block %d not erased.\n", block); 2418 return 1; 2419 } 2420 } 2421 2422 return 0; 2423 } 2424 2425 /** 2426 * flexonenand_set_boundary - Writes the SLC boundary 2427 * @param mtd - mtd info structure 2428 */ 2429 int flexonenand_set_boundary(struct mtd_info *mtd, int die, 2430 int boundary, int lock) 2431 { 2432 struct onenand_chip *this = mtd->priv; 2433 int ret, density, blksperdie, old, new, thisboundary; 2434 loff_t addr; 2435 2436 if (die >= this->dies) 2437 return -EINVAL; 2438 2439 if (boundary == this->boundary[die]) 2440 return 0; 2441 2442 density = onenand_get_density(this->device_id); 2443 blksperdie = ((16 << density) << 20) >> this->erase_shift; 2444 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0; 2445 2446 if (boundary >= blksperdie) { 2447 printk("flexonenand_set_boundary:" 2448 "Invalid boundary value. " 2449 "Boundary not changed.\n"); 2450 return -EINVAL; 2451 } 2452 2453 /* Check if converting blocks are erased */ 2454 old = this->boundary[die] + (die * this->density_mask); 2455 new = boundary + (die * this->density_mask); 2456 ret = flexonenand_check_blocks_erased(mtd, min(old, new) 2457 + 1, max(old, new)); 2458 if (ret) { 2459 printk(KERN_ERR "flexonenand_set_boundary: Please erase blocks before boundary change\n"); 2460 return ret; 2461 } 2462 2463 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0); 2464 this->wait(mtd, FL_SYNCING); 2465 2466 /* Check is boundary is locked */ 2467 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0); 2468 ret = this->wait(mtd, FL_READING); 2469 2470 thisboundary = this->read_word(this->base + ONENAND_DATARAM); 2471 if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) { 2472 printk(KERN_ERR "flexonenand_set_boundary: boundary locked\n"); 2473 goto out; 2474 } 2475 2476 printk(KERN_INFO "flexonenand_set_boundary: Changing die %d boundary: %d%s\n", 2477 die, boundary, lock ? "(Locked)" : "(Unlocked)"); 2478 2479 boundary &= FLEXONENAND_PI_MASK; 2480 boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT); 2481 2482 addr = die ? this->diesize[0] : 0; 2483 this->command(mtd, ONENAND_CMD_ERASE, addr, 0); 2484 ret = this->wait(mtd, FL_ERASING); 2485 if (ret) { 2486 printk("flexonenand_set_boundary:" 2487 "Failed PI erase for Die %d\n", die); 2488 goto out; 2489 } 2490 2491 this->write_word(boundary, this->base + ONENAND_DATARAM); 2492 this->command(mtd, ONENAND_CMD_PROG, addr, 0); 2493 ret = this->wait(mtd, FL_WRITING); 2494 if (ret) { 2495 printk("flexonenand_set_boundary:" 2496 "Failed PI write for Die %d\n", die); 2497 goto out; 2498 } 2499 2500 this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0); 2501 ret = this->wait(mtd, FL_WRITING); 2502 out: 2503 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND); 2504 this->wait(mtd, FL_RESETING); 2505 if (!ret) 2506 /* Recalculate device size on boundary change*/ 2507 flexonenand_get_size(mtd); 2508 2509 return ret; 2510 } 2511 2512 /** 2513 * onenand_chip_probe - [OneNAND Interface] Probe the OneNAND chip 2514 * @param mtd MTD device structure 2515 * 2516 * OneNAND detection method: 2517 * Compare the the values from command with ones from register 2518 */ 2519 static int onenand_chip_probe(struct mtd_info *mtd) 2520 { 2521 struct onenand_chip *this = mtd->priv; 2522 int bram_maf_id, bram_dev_id, maf_id, dev_id; 2523 int syscfg; 2524 2525 /* Save system configuration 1 */ 2526 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 2527 2528 /* Clear Sync. Burst Read mode to read BootRAM */ 2529 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), 2530 this->base + ONENAND_REG_SYS_CFG1); 2531 2532 /* Send the command for reading device ID from BootRAM */ 2533 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM); 2534 2535 /* Read manufacturer and device IDs from BootRAM */ 2536 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0); 2537 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2); 2538 2539 /* Reset OneNAND to read default register values */ 2540 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM); 2541 2542 /* Wait reset */ 2543 this->wait(mtd, FL_RESETING); 2544 2545 /* Restore system configuration 1 */ 2546 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 2547 2548 /* Check manufacturer ID */ 2549 if (onenand_check_maf(bram_maf_id)) 2550 return -ENXIO; 2551 2552 /* Read manufacturer and device IDs from Register */ 2553 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); 2554 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); 2555 2556 /* Check OneNAND device */ 2557 if (maf_id != bram_maf_id || dev_id != bram_dev_id) 2558 return -ENXIO; 2559 2560 return 0; 2561 } 2562 2563 /** 2564 * onenand_probe - [OneNAND Interface] Probe the OneNAND device 2565 * @param mtd MTD device structure 2566 * 2567 * OneNAND detection method: 2568 * Compare the the values from command with ones from register 2569 */ 2570 int onenand_probe(struct mtd_info *mtd) 2571 { 2572 struct onenand_chip *this = mtd->priv; 2573 int dev_id, ver_id; 2574 int density; 2575 int ret; 2576 2577 ret = this->chip_probe(mtd); 2578 if (ret) 2579 return ret; 2580 2581 /* Read device IDs from Register */ 2582 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); 2583 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); 2584 this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY); 2585 2586 /* Flash device information */ 2587 mtd->name = onenand_print_device_info(dev_id, ver_id); 2588 this->device_id = dev_id; 2589 this->version_id = ver_id; 2590 2591 /* Check OneNAND features */ 2592 onenand_check_features(mtd); 2593 2594 density = onenand_get_density(dev_id); 2595 if (FLEXONENAND(this)) { 2596 this->dies = ONENAND_IS_DDP(this) ? 2 : 1; 2597 /* Maximum possible erase regions */ 2598 mtd->numeraseregions = this->dies << 1; 2599 mtd->eraseregions = malloc(sizeof(struct mtd_erase_region_info) 2600 * (this->dies << 1)); 2601 if (!mtd->eraseregions) 2602 return -ENOMEM; 2603 } 2604 2605 /* 2606 * For Flex-OneNAND, chipsize represents maximum possible device size. 2607 * mtd->size represents the actual device size. 2608 */ 2609 this->chipsize = (16 << density) << 20; 2610 2611 /* OneNAND page size & block size */ 2612 /* The data buffer size is equal to page size */ 2613 mtd->writesize = 2614 this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); 2615 /* We use the full BufferRAM */ 2616 if (ONENAND_IS_4KB_PAGE(this)) 2617 mtd->writesize <<= 1; 2618 2619 mtd->oobsize = mtd->writesize >> 5; 2620 /* Pagers per block is always 64 in OneNAND */ 2621 mtd->erasesize = mtd->writesize << 6; 2622 /* 2623 * Flex-OneNAND SLC area has 64 pages per block. 2624 * Flex-OneNAND MLC area has 128 pages per block. 2625 * Expose MLC erase size to find erase_shift and page_mask. 2626 */ 2627 if (FLEXONENAND(this)) 2628 mtd->erasesize <<= 1; 2629 2630 this->erase_shift = ffs(mtd->erasesize) - 1; 2631 this->page_shift = ffs(mtd->writesize) - 1; 2632 this->ppb_shift = (this->erase_shift - this->page_shift); 2633 this->page_mask = (mtd->erasesize / mtd->writesize) - 1; 2634 /* Set density mask. it is used for DDP */ 2635 if (ONENAND_IS_DDP(this)) 2636 this->density_mask = this->chipsize >> (this->erase_shift + 1); 2637 /* It's real page size */ 2638 this->writesize = mtd->writesize; 2639 2640 /* REVIST: Multichip handling */ 2641 2642 if (FLEXONENAND(this)) 2643 flexonenand_get_size(mtd); 2644 else 2645 mtd->size = this->chipsize; 2646 2647 mtd->flags = MTD_CAP_NANDFLASH; 2648 mtd->erase = onenand_erase; 2649 mtd->read = onenand_read; 2650 mtd->write = onenand_write; 2651 mtd->read_oob = onenand_read_oob; 2652 mtd->write_oob = onenand_write_oob; 2653 mtd->sync = onenand_sync; 2654 mtd->block_isbad = onenand_block_isbad; 2655 mtd->block_markbad = onenand_block_markbad; 2656 2657 return 0; 2658 } 2659 2660 /** 2661 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device 2662 * @param mtd MTD device structure 2663 * @param maxchips Number of chips to scan for 2664 * 2665 * This fills out all the not initialized function pointers 2666 * with the defaults. 2667 * The flash ID is read and the mtd/chip structures are 2668 * filled with the appropriate values. 2669 */ 2670 int onenand_scan(struct mtd_info *mtd, int maxchips) 2671 { 2672 int i; 2673 struct onenand_chip *this = mtd->priv; 2674 2675 if (!this->read_word) 2676 this->read_word = onenand_readw; 2677 if (!this->write_word) 2678 this->write_word = onenand_writew; 2679 2680 if (!this->command) 2681 this->command = onenand_command; 2682 if (!this->wait) 2683 this->wait = onenand_wait; 2684 if (!this->bbt_wait) 2685 this->bbt_wait = onenand_bbt_wait; 2686 2687 if (!this->read_bufferram) 2688 this->read_bufferram = onenand_read_bufferram; 2689 if (!this->write_bufferram) 2690 this->write_bufferram = onenand_write_bufferram; 2691 2692 if (!this->chip_probe) 2693 this->chip_probe = onenand_chip_probe; 2694 2695 if (!this->block_markbad) 2696 this->block_markbad = onenand_default_block_markbad; 2697 if (!this->scan_bbt) 2698 this->scan_bbt = onenand_default_bbt; 2699 2700 if (onenand_probe(mtd)) 2701 return -ENXIO; 2702 2703 /* Set Sync. Burst Read after probing */ 2704 if (this->mmcontrol) { 2705 printk(KERN_INFO "OneNAND Sync. Burst Read support\n"); 2706 this->read_bufferram = onenand_sync_read_bufferram; 2707 } 2708 2709 /* Allocate buffers, if necessary */ 2710 if (!this->page_buf) { 2711 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL); 2712 if (!this->page_buf) { 2713 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n"); 2714 return -ENOMEM; 2715 } 2716 this->options |= ONENAND_PAGEBUF_ALLOC; 2717 } 2718 if (!this->oob_buf) { 2719 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL); 2720 if (!this->oob_buf) { 2721 printk(KERN_ERR "onenand_scan: Can't allocate oob_buf\n"); 2722 if (this->options & ONENAND_PAGEBUF_ALLOC) { 2723 this->options &= ~ONENAND_PAGEBUF_ALLOC; 2724 kfree(this->page_buf); 2725 } 2726 return -ENOMEM; 2727 } 2728 this->options |= ONENAND_OOBBUF_ALLOC; 2729 } 2730 2731 this->state = FL_READY; 2732 2733 /* 2734 * Allow subpage writes up to oobsize. 2735 */ 2736 switch (mtd->oobsize) { 2737 case 128: 2738 this->ecclayout = &onenand_oob_128; 2739 mtd->subpage_sft = 0; 2740 break; 2741 2742 case 64: 2743 this->ecclayout = &onenand_oob_64; 2744 mtd->subpage_sft = 2; 2745 break; 2746 2747 case 32: 2748 this->ecclayout = &onenand_oob_32; 2749 mtd->subpage_sft = 1; 2750 break; 2751 2752 default: 2753 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n", 2754 mtd->oobsize); 2755 mtd->subpage_sft = 0; 2756 /* To prevent kernel oops */ 2757 this->ecclayout = &onenand_oob_32; 2758 break; 2759 } 2760 2761 this->subpagesize = mtd->writesize >> mtd->subpage_sft; 2762 2763 /* 2764 * The number of bytes available for a client to place data into 2765 * the out of band area 2766 */ 2767 this->ecclayout->oobavail = 0; 2768 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && 2769 this->ecclayout->oobfree[i].length; i++) 2770 this->ecclayout->oobavail += 2771 this->ecclayout->oobfree[i].length; 2772 mtd->oobavail = this->ecclayout->oobavail; 2773 2774 mtd->ecclayout = this->ecclayout; 2775 2776 /* Unlock whole block */ 2777 onenand_unlock_all(mtd); 2778 2779 return this->scan_bbt(mtd); 2780 } 2781 2782 /** 2783 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device 2784 * @param mtd MTD device structure 2785 */ 2786 void onenand_release(struct mtd_info *mtd) 2787 { 2788 } 2789