1 /*
2  *  linux/drivers/mtd/onenand/onenand_base.c
3  *
4  *  Copyright (C) 2005-2007 Samsung Electronics
5  *  Kyungmin Park <kyungmin.park@samsung.com>
6  *
7  *  Credits:
8  *      Adrian Hunter <ext-adrian.hunter@nokia.com>:
9  *      auto-placement support, read-while load support, various fixes
10  *      Copyright (C) Nokia Corporation, 2007
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License version 2 as
14  * published by the Free Software Foundation.
15  */
16 
17 #include <common.h>
18 #include <linux/mtd/compat.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/onenand.h>
21 
22 #include <asm/io.h>
23 #include <asm/errno.h>
24 #include <malloc.h>
25 
26 /* It should access 16-bit instead of 8-bit */
27 static inline void *memcpy_16(void *dst, const void *src, unsigned int len)
28 {
29 	void *ret = dst;
30 	short *d = dst;
31 	const short *s = src;
32 
33 	len >>= 1;
34 	while (len-- > 0)
35 		*d++ = *s++;
36 	return ret;
37 }
38 
39 /**
40  * onenand_oob_64 - oob info for large (2KB) page
41  */
42 static struct nand_ecclayout onenand_oob_64 = {
43 	.eccbytes	= 20,
44 	.eccpos		= {
45 		8, 9, 10, 11, 12,
46 		24, 25, 26, 27, 28,
47 		40, 41, 42, 43, 44,
48 		56, 57, 58, 59, 60,
49 		},
50 	.oobfree	= {
51 		{2, 3}, {14, 2}, {18, 3}, {30, 2},
52 		{34, 3}, {46, 2}, {50, 3}, {62, 2}
53 	}
54 };
55 
56 /**
57  * onenand_oob_32 - oob info for middle (1KB) page
58  */
59 static struct nand_ecclayout onenand_oob_32 = {
60 	.eccbytes	= 10,
61 	.eccpos		= {
62 		8, 9, 10, 11, 12,
63 		24, 25, 26, 27, 28,
64 		},
65 	.oobfree	= { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
66 };
67 
68 static const unsigned char ffchars[] = {
69 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
70 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 16 */
71 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
72 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 32 */
73 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
74 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 48 */
75 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
76 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,	/* 64 */
77 };
78 
79 /**
80  * onenand_readw - [OneNAND Interface] Read OneNAND register
81  * @param addr		address to read
82  *
83  * Read OneNAND register
84  */
85 static unsigned short onenand_readw(void __iomem * addr)
86 {
87 	return readw(addr);
88 }
89 
90 /**
91  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
92  * @param value		value to write
93  * @param addr		address to write
94  *
95  * Write OneNAND register with value
96  */
97 static void onenand_writew(unsigned short value, void __iomem * addr)
98 {
99 	writew(value, addr);
100 }
101 
102 /**
103  * onenand_block_address - [DEFAULT] Get block address
104  * @param device	the device id
105  * @param block		the block
106  * @return		translated block address if DDP, otherwise same
107  *
108  * Setup Start Address 1 Register (F100h)
109  */
110 static int onenand_block_address(struct onenand_chip *this, int block)
111 {
112 	/* Device Flash Core select, NAND Flash Block Address */
113 	if (block & this->density_mask)
114 		return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
115 
116 	return block;
117 }
118 
119 /**
120  * onenand_bufferram_address - [DEFAULT] Get bufferram address
121  * @param device	the device id
122  * @param block		the block
123  * @return		set DBS value if DDP, otherwise 0
124  *
125  * Setup Start Address 2 Register (F101h) for DDP
126  */
127 static int onenand_bufferram_address(struct onenand_chip *this, int block)
128 {
129 	/* Device BufferRAM Select */
130 	if (block & this->density_mask)
131 		return ONENAND_DDP_CHIP1;
132 
133 	return ONENAND_DDP_CHIP0;
134 }
135 
136 /**
137  * onenand_page_address - [DEFAULT] Get page address
138  * @param page		the page address
139  * @param sector	the sector address
140  * @return		combined page and sector address
141  *
142  * Setup Start Address 8 Register (F107h)
143  */
144 static int onenand_page_address(int page, int sector)
145 {
146 	/* Flash Page Address, Flash Sector Address */
147 	int fpa, fsa;
148 
149 	fpa = page & ONENAND_FPA_MASK;
150 	fsa = sector & ONENAND_FSA_MASK;
151 
152 	return ((fpa << ONENAND_FPA_SHIFT) | fsa);
153 }
154 
155 /**
156  * onenand_buffer_address - [DEFAULT] Get buffer address
157  * @param dataram1	DataRAM index
158  * @param sectors	the sector address
159  * @param count		the number of sectors
160  * @return		the start buffer value
161  *
162  * Setup Start Buffer Register (F200h)
163  */
164 static int onenand_buffer_address(int dataram1, int sectors, int count)
165 {
166 	int bsa, bsc;
167 
168 	/* BufferRAM Sector Address */
169 	bsa = sectors & ONENAND_BSA_MASK;
170 
171 	if (dataram1)
172 		bsa |= ONENAND_BSA_DATARAM1;	/* DataRAM1 */
173 	else
174 		bsa |= ONENAND_BSA_DATARAM0;	/* DataRAM0 */
175 
176 	/* BufferRAM Sector Count */
177 	bsc = count & ONENAND_BSC_MASK;
178 
179 	return ((bsa << ONENAND_BSA_SHIFT) | bsc);
180 }
181 
182 /**
183  * onenand_get_density - [DEFAULT] Get OneNAND density
184  * @param dev_id        OneNAND device ID
185  *
186  * Get OneNAND density from device ID
187  */
188 static inline int onenand_get_density(int dev_id)
189 {
190 	int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
191 	return (density & ONENAND_DEVICE_DENSITY_MASK);
192 }
193 
194 /**
195  * onenand_command - [DEFAULT] Send command to OneNAND device
196  * @param mtd		MTD device structure
197  * @param cmd		the command to be sent
198  * @param addr		offset to read from or write to
199  * @param len		number of bytes to read or write
200  *
201  * Send command to OneNAND device. This function is used for middle/large page
202  * devices (1KB/2KB Bytes per page)
203  */
204 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr,
205 			   size_t len)
206 {
207 	struct onenand_chip *this = mtd->priv;
208 	int value, readcmd = 0;
209 	int block, page;
210 	/* Now we use page size operation */
211 	int sectors = 4, count = 4;
212 
213 	/* Address translation */
214 	switch (cmd) {
215 	case ONENAND_CMD_UNLOCK:
216 	case ONENAND_CMD_LOCK:
217 	case ONENAND_CMD_LOCK_TIGHT:
218 	case ONENAND_CMD_UNLOCK_ALL:
219 		block = -1;
220 		page = -1;
221 		break;
222 
223 	case ONENAND_CMD_ERASE:
224 	case ONENAND_CMD_BUFFERRAM:
225 		block = (int)(addr >> this->erase_shift);
226 		page = -1;
227 		break;
228 
229 	default:
230 		block = (int)(addr >> this->erase_shift);
231 		page = (int)(addr >> this->page_shift);
232 		page &= this->page_mask;
233 		break;
234 	}
235 
236 	/* NOTE: The setting order of the registers is very important! */
237 	if (cmd == ONENAND_CMD_BUFFERRAM) {
238 		/* Select DataRAM for DDP */
239 		value = onenand_bufferram_address(this, block);
240 		this->write_word(value,
241 				 this->base + ONENAND_REG_START_ADDRESS2);
242 
243 		/* Switch to the next data buffer */
244 		ONENAND_SET_NEXT_BUFFERRAM(this);
245 
246 		return 0;
247 	}
248 
249 	if (block != -1) {
250 		/* Write 'DFS, FBA' of Flash */
251 		value = onenand_block_address(this, block);
252 		this->write_word(value,
253 				 this->base + ONENAND_REG_START_ADDRESS1);
254 
255 		/* Write 'DFS, FBA' of Flash */
256 		value = onenand_bufferram_address(this, block);
257 		this->write_word(value,
258 				 this->base + ONENAND_REG_START_ADDRESS2);
259 	}
260 
261 	if (page != -1) {
262 		int dataram;
263 
264 		switch (cmd) {
265 		case ONENAND_CMD_READ:
266 		case ONENAND_CMD_READOOB:
267 			dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
268 			readcmd = 1;
269 			break;
270 
271 		default:
272 			dataram = ONENAND_CURRENT_BUFFERRAM(this);
273 			break;
274 		}
275 
276 		/* Write 'FPA, FSA' of Flash */
277 		value = onenand_page_address(page, sectors);
278 		this->write_word(value,
279 				 this->base + ONENAND_REG_START_ADDRESS8);
280 
281 		/* Write 'BSA, BSC' of DataRAM */
282 		value = onenand_buffer_address(dataram, sectors, count);
283 		this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
284 	}
285 
286 	/* Interrupt clear */
287 	this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
288 	/* Write command */
289 	this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
290 
291 	return 0;
292 }
293 
294 /**
295  * onenand_wait - [DEFAULT] wait until the command is done
296  * @param mtd		MTD device structure
297  * @param state		state to select the max. timeout value
298  *
299  * Wait for command done. This applies to all OneNAND command
300  * Read can take up to 30us, erase up to 2ms and program up to 350us
301  * according to general OneNAND specs
302  */
303 static int onenand_wait(struct mtd_info *mtd, int state)
304 {
305 	struct onenand_chip *this = mtd->priv;
306 	unsigned int flags = ONENAND_INT_MASTER;
307 	unsigned int interrupt = 0;
308 	unsigned int ctrl, ecc;
309 
310 	while (1) {
311 		interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
312 		if (interrupt & flags)
313 			break;
314 	}
315 
316 	ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
317 
318 	if (ctrl & ONENAND_CTRL_ERROR) {
319 		printk("onenand_wait: controller error = 0x%04x\n", ctrl);
320 		if (ctrl & ONENAND_CTRL_LOCK)
321 			printk("onenand_wait: it's locked error = 0x%04x\n",
322 				ctrl);
323 
324 		return -EIO;
325 	}
326 
327 	if (interrupt & ONENAND_INT_READ) {
328 		ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
329 		if (ecc & ONENAND_ECC_2BIT_ALL) {
330 			MTDDEBUG (MTD_DEBUG_LEVEL0,
331 				  "onenand_wait: ECC error = 0x%04x\n", ecc);
332 			return -EBADMSG;
333 		}
334 	}
335 
336 	return 0;
337 }
338 
339 /**
340  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
341  * @param mtd		MTD data structure
342  * @param area		BufferRAM area
343  * @return		offset given area
344  *
345  * Return BufferRAM offset given area
346  */
347 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
348 {
349 	struct onenand_chip *this = mtd->priv;
350 
351 	if (ONENAND_CURRENT_BUFFERRAM(this)) {
352 		if (area == ONENAND_DATARAM)
353 			return mtd->writesize;
354 		if (area == ONENAND_SPARERAM)
355 			return mtd->oobsize;
356 	}
357 
358 	return 0;
359 }
360 
361 /**
362  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
363  * @param mtd		MTD data structure
364  * @param area		BufferRAM area
365  * @param buffer	the databuffer to put/get data
366  * @param offset	offset to read from or write to
367  * @param count		number of bytes to read/write
368  *
369  * Read the BufferRAM area
370  */
371 static int onenand_read_bufferram(struct mtd_info *mtd, loff_t addr, int area,
372 				  unsigned char *buffer, int offset,
373 				  size_t count)
374 {
375 	struct onenand_chip *this = mtd->priv;
376 	void __iomem *bufferram;
377 
378 	bufferram = this->base + area;
379 	bufferram += onenand_bufferram_offset(mtd, area);
380 
381 	memcpy_16(buffer, bufferram + offset, count);
382 
383 	return 0;
384 }
385 
386 /**
387  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
388  * @param mtd		MTD data structure
389  * @param area		BufferRAM area
390  * @param buffer	the databuffer to put/get data
391  * @param offset	offset to read from or write to
392  * @param count		number of bytes to read/write
393  *
394  * Read the BufferRAM area with Sync. Burst Mode
395  */
396 static int onenand_sync_read_bufferram(struct mtd_info *mtd, loff_t addr, int area,
397 				       unsigned char *buffer, int offset,
398 				       size_t count)
399 {
400 	struct onenand_chip *this = mtd->priv;
401 	void __iomem *bufferram;
402 
403 	bufferram = this->base + area;
404 	bufferram += onenand_bufferram_offset(mtd, area);
405 
406 	this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
407 
408 	memcpy_16(buffer, bufferram + offset, count);
409 
410 	this->mmcontrol(mtd, 0);
411 
412 	return 0;
413 }
414 
415 /**
416  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
417  * @param mtd		MTD data structure
418  * @param area		BufferRAM area
419  * @param buffer	the databuffer to put/get data
420  * @param offset	offset to read from or write to
421  * @param count		number of bytes to read/write
422  *
423  * Write the BufferRAM area
424  */
425 static int onenand_write_bufferram(struct mtd_info *mtd, loff_t addr, int area,
426 				   const unsigned char *buffer, int offset,
427 				   size_t count)
428 {
429 	struct onenand_chip *this = mtd->priv;
430 	void __iomem *bufferram;
431 
432 	bufferram = this->base + area;
433 	bufferram += onenand_bufferram_offset(mtd, area);
434 
435 	memcpy_16(bufferram + offset, buffer, count);
436 
437 	return 0;
438 }
439 
440 /**
441  * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
442  * @param mtd		MTD data structure
443  * @param addr		address to check
444  * @return		blockpage address
445  *
446  * Get blockpage address at 2x program mode
447  */
448 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
449 {
450 	struct onenand_chip *this = mtd->priv;
451 	int blockpage, block, page;
452 
453 	/* Calculate the even block number */
454 	block = (int) (addr >> this->erase_shift) & ~1;
455 	/* Is it the odd plane? */
456 	if (addr & this->writesize)
457 		block++;
458 	page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
459 	blockpage = (block << 7) | page;
460 
461 	return blockpage;
462 }
463 
464 /**
465  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
466  * @param mtd		MTD data structure
467  * @param addr		address to check
468  * @return		1 if there are valid data, otherwise 0
469  *
470  * Check bufferram if there is data we required
471  */
472 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
473 {
474 	struct onenand_chip *this = mtd->priv;
475 	int blockpage, found = 0;
476 	unsigned int i;
477 
478 #ifdef CONFIG_S3C64XX
479 	return 0;
480 #endif
481 
482 	if (ONENAND_IS_2PLANE(this))
483 		blockpage = onenand_get_2x_blockpage(mtd, addr);
484 	else
485 		blockpage = (int) (addr >> this->page_shift);
486 
487 	/* Is there valid data? */
488 	i = ONENAND_CURRENT_BUFFERRAM(this);
489 	if (this->bufferram[i].blockpage == blockpage)
490 		found = 1;
491 	else {
492 		/* Check another BufferRAM */
493 		i = ONENAND_NEXT_BUFFERRAM(this);
494 		if (this->bufferram[i].blockpage == blockpage) {
495 			ONENAND_SET_NEXT_BUFFERRAM(this);
496 			found = 1;
497 		}
498 	}
499 
500 	if (found && ONENAND_IS_DDP(this)) {
501 		/* Select DataRAM for DDP */
502 		int block = (int) (addr >> this->erase_shift);
503 		int value = onenand_bufferram_address(this, block);
504 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
505 	}
506 
507 	return found;
508 }
509 
510 /**
511  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
512  * @param mtd		MTD data structure
513  * @param addr		address to update
514  * @param valid		valid flag
515  *
516  * Update BufferRAM information
517  */
518 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
519 				    int valid)
520 {
521 	struct onenand_chip *this = mtd->priv;
522 	int blockpage;
523 	unsigned int i;
524 
525 	if (ONENAND_IS_2PLANE(this))
526 		blockpage = onenand_get_2x_blockpage(mtd, addr);
527 	else
528 		blockpage = (int)(addr >> this->page_shift);
529 
530 	/* Invalidate another BufferRAM */
531 	i = ONENAND_NEXT_BUFFERRAM(this);
532 	if (this->bufferram[i].blockpage == blockpage)
533 		this->bufferram[i].blockpage = -1;
534 
535 	/* Update BufferRAM */
536 	i = ONENAND_CURRENT_BUFFERRAM(this);
537 	if (valid)
538 		this->bufferram[i].blockpage = blockpage;
539 	else
540 		this->bufferram[i].blockpage = -1;
541 
542 	return 0;
543 }
544 
545 /**
546  * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
547  * @param mtd           MTD data structure
548  * @param addr          start address to invalidate
549  * @param len           length to invalidate
550  *
551  * Invalidate BufferRAM information
552  */
553 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
554 					 unsigned int len)
555 {
556 	struct onenand_chip *this = mtd->priv;
557 	int i;
558 	loff_t end_addr = addr + len;
559 
560 	/* Invalidate BufferRAM */
561 	for (i = 0; i < MAX_BUFFERRAM; i++) {
562 		loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
563 
564 		if (buf_addr >= addr && buf_addr < end_addr)
565 			this->bufferram[i].blockpage = -1;
566 	}
567 }
568 
569 /**
570  * onenand_get_device - [GENERIC] Get chip for selected access
571  * @param mtd		MTD device structure
572  * @param new_state	the state which is requested
573  *
574  * Get the device and lock it for exclusive access
575  */
576 static void onenand_get_device(struct mtd_info *mtd, int new_state)
577 {
578 	/* Do nothing */
579 }
580 
581 /**
582  * onenand_release_device - [GENERIC] release chip
583  * @param mtd		MTD device structure
584  *
585  * Deselect, release chip lock and wake up anyone waiting on the device
586  */
587 static void onenand_release_device(struct mtd_info *mtd)
588 {
589 	/* Do nothing */
590 }
591 
592 /**
593  * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
594  * @param mtd		MTD device structure
595  * @param buf		destination address
596  * @param column	oob offset to read from
597  * @param thislen	oob length to read
598  */
599 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf,
600 					int column, int thislen)
601 {
602 	struct onenand_chip *this = mtd->priv;
603 	struct nand_oobfree *free;
604 	int readcol = column;
605 	int readend = column + thislen;
606 	int lastgap = 0;
607 	unsigned int i;
608 	uint8_t *oob_buf = this->oob_buf;
609 
610 	free = this->ecclayout->oobfree;
611 	for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
612 		if (readcol >= lastgap)
613 			readcol += free->offset - lastgap;
614 		if (readend >= lastgap)
615 			readend += free->offset - lastgap;
616 		lastgap = free->offset + free->length;
617 	}
618 	this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
619 	free = this->ecclayout->oobfree;
620 	for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
621 		int free_end = free->offset + free->length;
622 		if (free->offset < readend && free_end > readcol) {
623 			int st = max_t(int,free->offset,readcol);
624 			int ed = min_t(int,free_end,readend);
625 			int n = ed - st;
626 			memcpy(buf, oob_buf + st, n);
627 			buf += n;
628 		} else if (column == 0)
629 			break;
630 	}
631 	return 0;
632 }
633 
634 /**
635  * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
636  * @param mtd		MTD device structure
637  * @param from		offset to read from
638  * @param ops		oob operation description structure
639  *
640  * OneNAND read main and/or out-of-band data
641  */
642 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
643 		struct mtd_oob_ops *ops)
644 {
645 	struct onenand_chip *this = mtd->priv;
646 	struct mtd_ecc_stats stats;
647 	size_t len = ops->len;
648 	size_t ooblen = ops->ooblen;
649 	u_char *buf = ops->datbuf;
650 	u_char *oobbuf = ops->oobbuf;
651 	int read = 0, column, thislen;
652 	int oobread = 0, oobcolumn, thisooblen, oobsize;
653 	int ret = 0, boundary = 0;
654 	int writesize = this->writesize;
655 
656 	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
657 
658 	if (ops->mode == MTD_OOB_AUTO)
659 		oobsize = this->ecclayout->oobavail;
660 	else
661 		oobsize = mtd->oobsize;
662 
663 	oobcolumn = from & (mtd->oobsize - 1);
664 
665 	/* Do not allow reads past end of device */
666 	if ((from + len) > mtd->size) {
667 		printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n");
668 		ops->retlen = 0;
669 		ops->oobretlen = 0;
670 		return -EINVAL;
671 	}
672 
673 	stats = mtd->ecc_stats;
674 
675 	/* Read-while-load method */
676 
677 	/* Do first load to bufferRAM */
678 	if (read < len) {
679 		if (!onenand_check_bufferram(mtd, from)) {
680 			this->main_buf = buf;
681 			this->command(mtd, ONENAND_CMD_READ, from, writesize);
682 			ret = this->wait(mtd, FL_READING);
683 			onenand_update_bufferram(mtd, from, !ret);
684 			if (ret == -EBADMSG)
685 				ret = 0;
686 		}
687 	}
688 
689 	thislen = min_t(int, writesize, len - read);
690 	column = from & (writesize - 1);
691 	if (column + thislen > writesize)
692 		thislen = writesize - column;
693 
694 	while (!ret) {
695 		/* If there is more to load then start next load */
696 		from += thislen;
697 		if (read + thislen < len) {
698 			this->main_buf = buf + thislen;
699 			this->command(mtd, ONENAND_CMD_READ, from, writesize);
700 			/*
701 			 * Chip boundary handling in DDP
702 			 * Now we issued chip 1 read and pointed chip 1
703 			 * bufferam so we have to point chip 0 bufferam.
704 			 */
705 			if (ONENAND_IS_DDP(this) &&
706 					unlikely(from == (this->chipsize >> 1))) {
707 				this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
708 				boundary = 1;
709 			} else
710 				boundary = 0;
711 			ONENAND_SET_PREV_BUFFERRAM(this);
712 		}
713 
714 		/* While load is going, read from last bufferRAM */
715 		this->read_bufferram(mtd, from - thislen, ONENAND_DATARAM, buf, column, thislen);
716 
717 		/* Read oob area if needed */
718 		if (oobbuf) {
719 			thisooblen = oobsize - oobcolumn;
720 			thisooblen = min_t(int, thisooblen, ooblen - oobread);
721 
722 			if (ops->mode == MTD_OOB_AUTO)
723 				onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
724 			else
725 				this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
726 			oobread += thisooblen;
727 			oobbuf += thisooblen;
728 			oobcolumn = 0;
729 		}
730 
731 		/* See if we are done */
732 		read += thislen;
733 		if (read == len)
734 			break;
735 		/* Set up for next read from bufferRAM */
736 		if (unlikely(boundary))
737 			this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
738 		ONENAND_SET_NEXT_BUFFERRAM(this);
739 		buf += thislen;
740 		thislen = min_t(int, writesize, len - read);
741 		column = 0;
742 
743 		/* Now wait for load */
744 		ret = this->wait(mtd, FL_READING);
745 		onenand_update_bufferram(mtd, from, !ret);
746 		if (ret == -EBADMSG)
747 			ret = 0;
748 	}
749 
750 	/*
751 	 * Return success, if no ECC failures, else -EBADMSG
752 	 * fs driver will take care of that, because
753 	 * retlen == desired len and result == -EBADMSG
754 	 */
755 	ops->retlen = read;
756 	ops->oobretlen = oobread;
757 
758 	if (ret)
759 		return ret;
760 
761 	if (mtd->ecc_stats.failed - stats.failed)
762 		return -EBADMSG;
763 
764 	return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
765 }
766 
767 /**
768  * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
769  * @param mtd		MTD device structure
770  * @param from		offset to read from
771  * @param ops		oob operation description structure
772  *
773  * OneNAND read out-of-band data from the spare area
774  */
775 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
776 		struct mtd_oob_ops *ops)
777 {
778 	struct onenand_chip *this = mtd->priv;
779 	struct mtd_ecc_stats stats;
780 	int read = 0, thislen, column, oobsize;
781 	size_t len = ops->ooblen;
782 	mtd_oob_mode_t mode = ops->mode;
783 	u_char *buf = ops->oobbuf;
784 	int ret = 0;
785 
786 	from += ops->ooboffs;
787 
788 	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
789 
790 	/* Initialize return length value */
791 	ops->oobretlen = 0;
792 
793 	if (mode == MTD_OOB_AUTO)
794 		oobsize = this->ecclayout->oobavail;
795 	else
796 		oobsize = mtd->oobsize;
797 
798 	column = from & (mtd->oobsize - 1);
799 
800 	if (unlikely(column >= oobsize)) {
801 		printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n");
802 		return -EINVAL;
803 	}
804 
805 	/* Do not allow reads past end of device */
806 	if (unlikely(from >= mtd->size ||
807 		column + len > ((mtd->size >> this->page_shift) -
808 				(from >> this->page_shift)) * oobsize)) {
809 		printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n");
810 		return -EINVAL;
811 	}
812 
813 	stats = mtd->ecc_stats;
814 
815 	while (read < len) {
816 		thislen = oobsize - column;
817 		thislen = min_t(int, thislen, len);
818 
819 		this->spare_buf = buf;
820 		this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
821 
822 		onenand_update_bufferram(mtd, from, 0);
823 
824 		ret = this->wait(mtd, FL_READING);
825 		if (ret && ret != -EBADMSG) {
826 			printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret);
827 			break;
828 		}
829 
830 		if (mode == MTD_OOB_AUTO)
831 			onenand_transfer_auto_oob(mtd, buf, column, thislen);
832 		else
833 			this->read_bufferram(mtd, 0, ONENAND_SPARERAM, buf, column, thislen);
834 
835 		read += thislen;
836 
837 		if (read == len)
838 			break;
839 
840 		buf += thislen;
841 
842 		/* Read more? */
843 		if (read < len) {
844 			/* Page size */
845 			from += mtd->writesize;
846 			column = 0;
847 		}
848 	}
849 
850 	ops->oobretlen = read;
851 
852 	if (ret)
853 		return ret;
854 
855 	if (mtd->ecc_stats.failed - stats.failed)
856 		return -EBADMSG;
857 
858 	return 0;
859 }
860 
861 /**
862  * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
863  * @param mtd		MTD device structure
864  * @param from		offset to read from
865  * @param len		number of bytes to read
866  * @param retlen	pointer to variable to store the number of read bytes
867  * @param buf		the databuffer to put data
868  *
869  * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
870 */
871 int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
872 		 size_t * retlen, u_char * buf)
873 {
874 	struct mtd_oob_ops ops = {
875 		.len    = len,
876 		.ooblen = 0,
877 		.datbuf = buf,
878 		.oobbuf = NULL,
879 	};
880 	int ret;
881 
882 	onenand_get_device(mtd, FL_READING);
883 	ret = onenand_read_ops_nolock(mtd, from, &ops);
884 	onenand_release_device(mtd);
885 
886 	*retlen = ops.retlen;
887 	return ret;
888 }
889 
890 /**
891  * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
892  * @param mtd		MTD device structure
893  * @param from		offset to read from
894  * @param ops		oob operations description structure
895  *
896  * OneNAND main and/or out-of-band
897  */
898 int onenand_read_oob(struct mtd_info *mtd, loff_t from,
899 			struct mtd_oob_ops *ops)
900 {
901 	int ret;
902 
903 	switch (ops->mode) {
904 	case MTD_OOB_PLACE:
905 	case MTD_OOB_AUTO:
906 		break;
907 	case MTD_OOB_RAW:
908 		/* Not implemented yet */
909 	default:
910 		return -EINVAL;
911 	}
912 
913 	onenand_get_device(mtd, FL_READING);
914 	if (ops->datbuf)
915 		ret = onenand_read_ops_nolock(mtd, from, ops);
916 	else
917 		ret = onenand_read_oob_nolock(mtd, from, ops);
918 	onenand_release_device(mtd);
919 
920 	return ret;
921 }
922 
923 /**
924  * onenand_bbt_wait - [DEFAULT] wait until the command is done
925  * @param mtd		MTD device structure
926  * @param state		state to select the max. timeout value
927  *
928  * Wait for command done.
929  */
930 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
931 {
932 	struct onenand_chip *this = mtd->priv;
933 	unsigned int flags = ONENAND_INT_MASTER;
934 	unsigned int interrupt;
935 	unsigned int ctrl;
936 
937 	while (1) {
938 		interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
939 		if (interrupt & flags)
940 			break;
941 	}
942 
943 	/* To get correct interrupt status in timeout case */
944 	interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
945 	ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
946 
947 	if (interrupt & ONENAND_INT_READ) {
948 		int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
949 		if (ecc & ONENAND_ECC_2BIT_ALL)
950 			return ONENAND_BBT_READ_ERROR;
951 	} else {
952 		printk(KERN_ERR "onenand_bbt_wait: read timeout!"
953 				"ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
954 		return ONENAND_BBT_READ_FATAL_ERROR;
955 	}
956 
957 	/* Initial bad block case: 0x2400 or 0x0400 */
958 	if (ctrl & ONENAND_CTRL_ERROR) {
959 		printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
960 		return ONENAND_BBT_READ_ERROR;
961 	}
962 
963 	return 0;
964 }
965 
966 /**
967  * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
968  * @param mtd		MTD device structure
969  * @param from		offset to read from
970  * @param ops		oob operation description structure
971  *
972  * OneNAND read out-of-band data from the spare area for bbt scan
973  */
974 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
975 		struct mtd_oob_ops *ops)
976 {
977 	struct onenand_chip *this = mtd->priv;
978 	int read = 0, thislen, column;
979 	int ret = 0;
980 	size_t len = ops->ooblen;
981 	u_char *buf = ops->oobbuf;
982 
983 	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
984 
985 	/* Initialize return value */
986 	ops->oobretlen = 0;
987 
988 	/* Do not allow reads past end of device */
989 	if (unlikely((from + len) > mtd->size)) {
990 		printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
991 		return ONENAND_BBT_READ_FATAL_ERROR;
992 	}
993 
994 	/* Grab the lock and see if the device is available */
995 	onenand_get_device(mtd, FL_READING);
996 
997 	column = from & (mtd->oobsize - 1);
998 
999 	while (read < len) {
1000 
1001 		thislen = mtd->oobsize - column;
1002 		thislen = min_t(int, thislen, len);
1003 
1004 		this->spare_buf = buf;
1005 		this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1006 
1007 		onenand_update_bufferram(mtd, from, 0);
1008 
1009 		ret = this->bbt_wait(mtd, FL_READING);
1010 		if (ret)
1011 			break;
1012 
1013 		this->read_bufferram(mtd, 0, ONENAND_SPARERAM, buf, column, thislen);
1014 		read += thislen;
1015 		if (read == len)
1016 			break;
1017 
1018 		buf += thislen;
1019 
1020 		/* Read more? */
1021 		if (read < len) {
1022 			/* Update Page size */
1023 			from += this->writesize;
1024 			column = 0;
1025 		}
1026 	}
1027 
1028 	/* Deselect and wake up anyone waiting on the device */
1029 	onenand_release_device(mtd);
1030 
1031 	ops->oobretlen = read;
1032 	return ret;
1033 }
1034 
1035 
1036 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1037 /**
1038  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1039  * @param mtd           MTD device structure
1040  * @param buf           the databuffer to verify
1041  * @param to            offset to read from
1042  */
1043 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1044 {
1045 	struct onenand_chip *this = mtd->priv;
1046 	u_char *oob_buf = this->oob_buf;
1047 	int status, i;
1048 
1049 	this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1050 	onenand_update_bufferram(mtd, to, 0);
1051 	status = this->wait(mtd, FL_READING);
1052 	if (status)
1053 		return status;
1054 
1055 	this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1056 	for (i = 0; i < mtd->oobsize; i++)
1057 		if (buf[i] != 0xFF && buf[i] != oob_buf[i])
1058 			return -EBADMSG;
1059 
1060 	return 0;
1061 }
1062 
1063 /**
1064  * onenand_verify - [GENERIC] verify the chip contents after a write
1065  * @param mtd          MTD device structure
1066  * @param buf          the databuffer to verify
1067  * @param addr         offset to read from
1068  * @param len          number of bytes to read and compare
1069  */
1070 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1071 {
1072 	struct onenand_chip *this = mtd->priv;
1073 	void __iomem *dataram;
1074 	int ret = 0;
1075 	int thislen, column;
1076 
1077 	while (len != 0) {
1078 		thislen = min_t(int, this->writesize, len);
1079 		column = addr & (this->writesize - 1);
1080 		if (column + thislen > this->writesize)
1081 			thislen = this->writesize - column;
1082 
1083 		this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1084 
1085 		onenand_update_bufferram(mtd, addr, 0);
1086 
1087 		ret = this->wait(mtd, FL_READING);
1088 		if (ret)
1089 			return ret;
1090 
1091 		onenand_update_bufferram(mtd, addr, 1);
1092 
1093 		dataram = this->base + ONENAND_DATARAM;
1094 		dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1095 
1096 		if (memcmp(buf, dataram + column, thislen))
1097 			return -EBADMSG;
1098 
1099 		len -= thislen;
1100 		buf += thislen;
1101 		addr += thislen;
1102 	}
1103 
1104 	return 0;
1105 }
1106 #else
1107 #define onenand_verify(...)             (0)
1108 #define onenand_verify_oob(...)         (0)
1109 #endif
1110 
1111 #define NOTALIGNED(x)	((x & (this->subpagesize - 1)) != 0)
1112 
1113 /**
1114  * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1115  * @param mtd           MTD device structure
1116  * @param oob_buf       oob buffer
1117  * @param buf           source address
1118  * @param column        oob offset to write to
1119  * @param thislen       oob length to write
1120  */
1121 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1122 		const u_char *buf, int column, int thislen)
1123 {
1124 	struct onenand_chip *this = mtd->priv;
1125 	struct nand_oobfree *free;
1126 	int writecol = column;
1127 	int writeend = column + thislen;
1128 	int lastgap = 0;
1129 	unsigned int i;
1130 
1131 	free = this->ecclayout->oobfree;
1132 	for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1133 		if (writecol >= lastgap)
1134 			writecol += free->offset - lastgap;
1135 		if (writeend >= lastgap)
1136 			writeend += free->offset - lastgap;
1137 		lastgap = free->offset + free->length;
1138 	}
1139 	free = this->ecclayout->oobfree;
1140 	for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1141 		int free_end = free->offset + free->length;
1142 		if (free->offset < writeend && free_end > writecol) {
1143 			int st = max_t(int,free->offset,writecol);
1144 			int ed = min_t(int,free_end,writeend);
1145 			int n = ed - st;
1146 			memcpy(oob_buf + st, buf, n);
1147 			buf += n;
1148 		} else if (column == 0)
1149 			break;
1150 	}
1151 	return 0;
1152 }
1153 
1154 /**
1155  * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1156  * @param mtd           MTD device structure
1157  * @param to            offset to write to
1158  * @param ops           oob operation description structure
1159  *
1160  * Write main and/or oob with ECC
1161  */
1162 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1163 		struct mtd_oob_ops *ops)
1164 {
1165 	struct onenand_chip *this = mtd->priv;
1166 	int written = 0, column, thislen, subpage;
1167 	int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1168 	size_t len = ops->len;
1169 	size_t ooblen = ops->ooblen;
1170 	const u_char *buf = ops->datbuf;
1171 	const u_char *oob = ops->oobbuf;
1172 	u_char *oobbuf;
1173 	int ret = 0;
1174 
1175 	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1176 
1177 	/* Initialize retlen, in case of early exit */
1178 	ops->retlen = 0;
1179 	ops->oobretlen = 0;
1180 
1181 	/* Do not allow writes past end of device */
1182 	if (unlikely((to + len) > mtd->size)) {
1183 		printk(KERN_ERR "onenand_write_ops_nolock: Attempt write to past end of device\n");
1184 		return -EINVAL;
1185 	}
1186 
1187 	/* Reject writes, which are not page aligned */
1188 	if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1189 		printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n");
1190 		return -EINVAL;
1191 	}
1192 
1193 	if (ops->mode == MTD_OOB_AUTO)
1194 		oobsize = this->ecclayout->oobavail;
1195 	else
1196 		oobsize = mtd->oobsize;
1197 
1198 	oobcolumn = to & (mtd->oobsize - 1);
1199 
1200 	column = to & (mtd->writesize - 1);
1201 
1202 	/* Loop until all data write */
1203 	while (written < len) {
1204 		u_char *wbuf = (u_char *) buf;
1205 
1206 		thislen = min_t(int, mtd->writesize - column, len - written);
1207 		thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1208 
1209 		this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1210 
1211 		/* Partial page write */
1212 		subpage = thislen < mtd->writesize;
1213 		if (subpage) {
1214 			memset(this->page_buf, 0xff, mtd->writesize);
1215 			memcpy(this->page_buf + column, buf, thislen);
1216 			wbuf = this->page_buf;
1217 		}
1218 
1219 		this->write_bufferram(mtd, to, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1220 
1221 		if (oob) {
1222 			oobbuf = this->oob_buf;
1223 
1224 			/* We send data to spare ram with oobsize
1225 			 *                          * to prevent byte access */
1226 			memset(oobbuf, 0xff, mtd->oobsize);
1227 			if (ops->mode == MTD_OOB_AUTO)
1228 				onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1229 			else
1230 				memcpy(oobbuf + oobcolumn, oob, thisooblen);
1231 
1232 			oobwritten += thisooblen;
1233 			oob += thisooblen;
1234 			oobcolumn = 0;
1235 		} else
1236 			oobbuf = (u_char *) ffchars;
1237 
1238 		this->write_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1239 
1240 		this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1241 
1242 		ret = this->wait(mtd, FL_WRITING);
1243 
1244 		/* In partial page write we don't update bufferram */
1245 		onenand_update_bufferram(mtd, to, !ret && !subpage);
1246 		if (ONENAND_IS_2PLANE(this)) {
1247 			ONENAND_SET_BUFFERRAM1(this);
1248 			onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1249 		}
1250 
1251 		if (ret) {
1252 			printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret);
1253 			break;
1254 		}
1255 
1256 		/* Only check verify write turn on */
1257 		ret = onenand_verify(mtd, buf, to, thislen);
1258 		if (ret) {
1259 			printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
1260 			break;
1261 		}
1262 
1263 		written += thislen;
1264 
1265 		if (written == len)
1266 			break;
1267 
1268 		column = 0;
1269 		to += thislen;
1270 		buf += thislen;
1271 	}
1272 
1273 	ops->retlen = written;
1274 
1275 	return ret;
1276 }
1277 
1278 /**
1279  * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
1280  * @param mtd           MTD device structure
1281  * @param to            offset to write to
1282  * @param len           number of bytes to write
1283  * @param retlen        pointer to variable to store the number of written bytes
1284  * @param buf           the data to write
1285  * @param mode          operation mode
1286  *
1287  * OneNAND write out-of-band
1288  */
1289 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
1290 		struct mtd_oob_ops *ops)
1291 {
1292 	struct onenand_chip *this = mtd->priv;
1293 	int column, ret = 0, oobsize;
1294 	int written = 0;
1295 	u_char *oobbuf;
1296 	size_t len = ops->ooblen;
1297 	const u_char *buf = ops->oobbuf;
1298 	mtd_oob_mode_t mode = ops->mode;
1299 
1300 	to += ops->ooboffs;
1301 
1302 	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1303 
1304 	/* Initialize retlen, in case of early exit */
1305 	ops->oobretlen = 0;
1306 
1307 	if (mode == MTD_OOB_AUTO)
1308 		oobsize = this->ecclayout->oobavail;
1309 	else
1310 		oobsize = mtd->oobsize;
1311 
1312 	column = to & (mtd->oobsize - 1);
1313 
1314 	if (unlikely(column >= oobsize)) {
1315 		printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n");
1316 		return -EINVAL;
1317 	}
1318 
1319 	/* For compatibility with NAND: Do not allow write past end of page */
1320 	if (unlikely(column + len > oobsize)) {
1321 		printk(KERN_ERR "onenand_write_oob_nolock: "
1322 				"Attempt to write past end of page\n");
1323 		return -EINVAL;
1324 	}
1325 
1326 	/* Do not allow reads past end of device */
1327 	if (unlikely(to >= mtd->size ||
1328 				column + len > ((mtd->size >> this->page_shift) -
1329 					(to >> this->page_shift)) * oobsize)) {
1330 		printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n");
1331 		return -EINVAL;
1332 	}
1333 
1334 	oobbuf = this->oob_buf;
1335 
1336 	/* Loop until all data write */
1337 	while (written < len) {
1338 		int thislen = min_t(int, oobsize, len - written);
1339 
1340 		this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1341 
1342 		/* We send data to spare ram with oobsize
1343 		 * to prevent byte access */
1344 		memset(oobbuf, 0xff, mtd->oobsize);
1345 		if (mode == MTD_OOB_AUTO)
1346 			onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1347 		else
1348 			memcpy(oobbuf + column, buf, thislen);
1349 		this->write_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1350 
1351 		this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1352 
1353 		onenand_update_bufferram(mtd, to, 0);
1354 		if (ONENAND_IS_2PLANE(this)) {
1355 			ONENAND_SET_BUFFERRAM1(this);
1356 			onenand_update_bufferram(mtd, to + this->writesize, 0);
1357 		}
1358 
1359 		ret = this->wait(mtd, FL_WRITING);
1360 		if (ret) {
1361 			printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret);
1362 			break;
1363 		}
1364 
1365 		ret = onenand_verify_oob(mtd, oobbuf, to);
1366 		if (ret) {
1367 			printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret);
1368 			break;
1369 		}
1370 
1371 		written += thislen;
1372 		if (written == len)
1373 			break;
1374 
1375 		to += mtd->writesize;
1376 		buf += thislen;
1377 		column = 0;
1378 	}
1379 
1380 	ops->oobretlen = written;
1381 
1382 	return ret;
1383 }
1384 
1385 /**
1386  * onenand_write - [MTD Interface] compability function for onenand_write_ecc
1387  * @param mtd		MTD device structure
1388  * @param to		offset to write to
1389  * @param len		number of bytes to write
1390  * @param retlen	pointer to variable to store the number of written bytes
1391  * @param buf		the data to write
1392  *
1393  * Write with ECC
1394  */
1395 int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1396 		  size_t * retlen, const u_char * buf)
1397 {
1398 	struct mtd_oob_ops ops = {
1399 		.len    = len,
1400 		.ooblen = 0,
1401 		.datbuf = (u_char *) buf,
1402 		.oobbuf = NULL,
1403 	};
1404 	int ret;
1405 
1406 	onenand_get_device(mtd, FL_WRITING);
1407 	ret = onenand_write_ops_nolock(mtd, to, &ops);
1408 	onenand_release_device(mtd);
1409 
1410 	*retlen = ops.retlen;
1411 	return ret;
1412 }
1413 
1414 /**
1415  * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
1416  * @param mtd		MTD device structure
1417  * @param to		offset to write to
1418  * @param ops		oob operation description structure
1419  *
1420  * OneNAND write main and/or out-of-band
1421  */
1422 int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1423 			struct mtd_oob_ops *ops)
1424 {
1425 	int ret;
1426 
1427 	switch (ops->mode) {
1428 	case MTD_OOB_PLACE:
1429 	case MTD_OOB_AUTO:
1430 		break;
1431 	case MTD_OOB_RAW:
1432 		/* Not implemented yet */
1433 	default:
1434 		return -EINVAL;
1435 	}
1436 
1437 	onenand_get_device(mtd, FL_WRITING);
1438 	if (ops->datbuf)
1439 		ret = onenand_write_ops_nolock(mtd, to, ops);
1440 	else
1441 		ret = onenand_write_oob_nolock(mtd, to, ops);
1442 	onenand_release_device(mtd);
1443 
1444 	return ret;
1445 
1446 }
1447 
1448 /**
1449  * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
1450  * @param mtd		MTD device structure
1451  * @param ofs		offset from device start
1452  * @param allowbbt	1, if its allowed to access the bbt area
1453  *
1454  * Check, if the block is bad, Either by reading the bad block table or
1455  * calling of the scan function.
1456  */
1457 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
1458 {
1459 	struct onenand_chip *this = mtd->priv;
1460 	struct bbm_info *bbm = this->bbm;
1461 
1462 	/* Return info from the table */
1463 	return bbm->isbad_bbt(mtd, ofs, allowbbt);
1464 }
1465 
1466 
1467 /**
1468  * onenand_erase - [MTD Interface] erase block(s)
1469  * @param mtd		MTD device structure
1470  * @param instr		erase instruction
1471  *
1472  * Erase one ore more blocks
1473  */
1474 int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1475 {
1476 	struct onenand_chip *this = mtd->priv;
1477 	unsigned int block_size;
1478 	loff_t addr;
1479 	int len;
1480 	int ret = 0;
1481 
1482 	MTDDEBUG (MTD_DEBUG_LEVEL3,
1483 		 "onenand_erase: start = 0x%08x, len = %i\n",
1484 		 (unsigned int)instr->addr, (unsigned int)instr->len);
1485 
1486 	block_size = (1 << this->erase_shift);
1487 
1488 	/* Start address must align on block boundary */
1489 	if (unlikely(instr->addr & (block_size - 1))) {
1490 		MTDDEBUG (MTD_DEBUG_LEVEL0,
1491 			 "onenand_erase: Unaligned address\n");
1492 		return -EINVAL;
1493 	}
1494 
1495 	/* Length must align on block boundary */
1496 	if (unlikely(instr->len & (block_size - 1))) {
1497 		MTDDEBUG (MTD_DEBUG_LEVEL0,
1498 			 "onenand_erase: Length not block aligned\n");
1499 		return -EINVAL;
1500 	}
1501 
1502 	/* Do not allow erase past end of device */
1503 	if (unlikely((instr->len + instr->addr) > mtd->size)) {
1504 		MTDDEBUG (MTD_DEBUG_LEVEL0,
1505 			 "onenand_erase: Erase past end of device\n");
1506 		return -EINVAL;
1507 	}
1508 
1509 	instr->fail_addr = 0xffffffff;
1510 
1511 	/* Grab the lock and see if the device is available */
1512 	onenand_get_device(mtd, FL_ERASING);
1513 
1514 	/* Loop throught the pages */
1515 	len = instr->len;
1516 	addr = instr->addr;
1517 
1518 	instr->state = MTD_ERASING;
1519 
1520 	while (len) {
1521 
1522 		/* Check if we have a bad block, we do not erase bad blocks */
1523 		if (instr->priv == 0 && onenand_block_isbad_nolock(mtd, addr, 0)) {
1524 			printk(KERN_WARNING "onenand_erase: attempt to erase"
1525 				" a bad block at addr 0x%08x\n",
1526 				(unsigned int) addr);
1527 			instr->state = MTD_ERASE_FAILED;
1528 			goto erase_exit;
1529 		}
1530 
1531 		this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1532 
1533 		onenand_invalidate_bufferram(mtd, addr, block_size);
1534 
1535 		ret = this->wait(mtd, FL_ERASING);
1536 		/* Check, if it is write protected */
1537 		if (ret) {
1538 			if (ret == -EPERM)
1539 				MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
1540 					  "Device is write protected!!!\n");
1541 			else
1542 				MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
1543 					  "Failed erase, block %d\n",
1544 					  (unsigned)(addr >> this->erase_shift));
1545 			if (ret == -EPERM)
1546 				printk("onenand_erase: "
1547 					  "Device is write protected!!!\n");
1548 			else
1549 				printk("onenand_erase: "
1550 					  "Failed erase, block %d\n",
1551 					  (unsigned)(addr >> this->erase_shift));
1552 			instr->state = MTD_ERASE_FAILED;
1553 			instr->fail_addr = addr;
1554 
1555 			goto erase_exit;
1556 		}
1557 
1558 		len -= block_size;
1559 		addr += block_size;
1560 	}
1561 
1562 	instr->state = MTD_ERASE_DONE;
1563 
1564 erase_exit:
1565 
1566 	ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1567 	/* Do call back function */
1568 	if (!ret)
1569 		mtd_erase_callback(instr);
1570 
1571 	/* Deselect and wake up anyone waiting on the device */
1572 	onenand_release_device(mtd);
1573 
1574 	return ret;
1575 }
1576 
1577 /**
1578  * onenand_sync - [MTD Interface] sync
1579  * @param mtd		MTD device structure
1580  *
1581  * Sync is actually a wait for chip ready function
1582  */
1583 void onenand_sync(struct mtd_info *mtd)
1584 {
1585 	MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1586 
1587 	/* Grab the lock and see if the device is available */
1588 	onenand_get_device(mtd, FL_SYNCING);
1589 
1590 	/* Release it and go back */
1591 	onenand_release_device(mtd);
1592 }
1593 
1594 /**
1595  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1596  * @param mtd		MTD device structure
1597  * @param ofs		offset relative to mtd start
1598  *
1599  * Check whether the block is bad
1600  */
1601 int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1602 {
1603 	int ret;
1604 
1605 	/* Check for invalid offset */
1606 	if (ofs > mtd->size)
1607 		return -EINVAL;
1608 
1609 	onenand_get_device(mtd, FL_READING);
1610 	ret = onenand_block_isbad_nolock(mtd,ofs, 0);
1611 	onenand_release_device(mtd);
1612 	return ret;
1613 }
1614 
1615 /**
1616  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1617  * @param mtd           MTD device structure
1618  * @param ofs           offset from device start
1619  *
1620  * This is the default implementation, which can be overridden by
1621  * a hardware specific driver.
1622  */
1623 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1624 {
1625 	struct onenand_chip *this = mtd->priv;
1626 	struct bbm_info *bbm = this->bbm;
1627 	u_char buf[2] = {0, 0};
1628 	struct mtd_oob_ops ops = {
1629 		.mode = MTD_OOB_PLACE,
1630 		.ooblen = 2,
1631 		.oobbuf = buf,
1632 		.ooboffs = 0,
1633 	};
1634 	int block;
1635 
1636 	/* Get block number */
1637 	block = ((int) ofs) >> bbm->bbt_erase_shift;
1638 	if (bbm->bbt)
1639 		bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1640 
1641 	/* We write two bytes, so we dont have to mess with 16 bit access */
1642 	ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1643 	return onenand_write_oob_nolock(mtd, ofs, &ops);
1644 }
1645 
1646 /**
1647  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1648  * @param mtd		MTD device structure
1649  * @param ofs		offset relative to mtd start
1650  *
1651  * Mark the block as bad
1652  */
1653 int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1654 {
1655 	struct onenand_chip *this = mtd->priv;
1656 	int ret;
1657 
1658 	ret = onenand_block_isbad(mtd, ofs);
1659 	if (ret) {
1660 		/* If it was bad already, return success and do nothing */
1661 		if (ret > 0)
1662 			return 0;
1663 		return ret;
1664 	}
1665 
1666 	ret = this->block_markbad(mtd, ofs);
1667 	return ret;
1668 }
1669 
1670 /**
1671  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1672  * @param mtd           MTD device structure
1673  * @param ofs           offset relative to mtd start
1674  * @param len           number of bytes to lock or unlock
1675  * @param cmd           lock or unlock command
1676  *
1677  * Lock or unlock one or more blocks
1678  */
1679 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1680 {
1681 	struct onenand_chip *this = mtd->priv;
1682 	int start, end, block, value, status;
1683 	int wp_status_mask;
1684 
1685 	start = ofs >> this->erase_shift;
1686 	end = len >> this->erase_shift;
1687 
1688 	if (cmd == ONENAND_CMD_LOCK)
1689 		wp_status_mask = ONENAND_WP_LS;
1690 	else
1691 		wp_status_mask = ONENAND_WP_US;
1692 
1693 	/* Continuous lock scheme */
1694 	if (this->options & ONENAND_HAS_CONT_LOCK) {
1695 		/* Set start block address */
1696 		this->write_word(start,
1697 				 this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1698 		/* Set end block address */
1699 		this->write_word(end - 1,
1700 				 this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1701 		/* Write unlock command */
1702 		this->command(mtd, cmd, 0, 0);
1703 
1704 		/* There's no return value */
1705 		this->wait(mtd, FL_UNLOCKING);
1706 
1707 		/* Sanity check */
1708 		while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1709 		       & ONENAND_CTRL_ONGO)
1710 			continue;
1711 
1712 		/* Check lock status */
1713 		status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1714 		if (!(status & ONENAND_WP_US))
1715 			printk(KERN_ERR "wp status = 0x%x\n", status);
1716 
1717 		return 0;
1718 	}
1719 
1720 	/* Block lock scheme */
1721 	for (block = start; block < start + end; block++) {
1722 		/* Set block address */
1723 		value = onenand_block_address(this, block);
1724 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1725 		/* Select DataRAM for DDP */
1726 		value = onenand_bufferram_address(this, block);
1727 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1728 
1729 		/* Set start block address */
1730 		this->write_word(block,
1731 				 this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1732 		/* Write unlock command */
1733 		this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1734 
1735 		/* There's no return value */
1736 		this->wait(mtd, FL_UNLOCKING);
1737 
1738 		/* Sanity check */
1739 		while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1740 		       & ONENAND_CTRL_ONGO)
1741 			continue;
1742 
1743 		/* Check lock status */
1744 		status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1745 		if (!(status & ONENAND_WP_US))
1746 			printk(KERN_ERR "block = %d, wp status = 0x%x\n",
1747 			       block, status);
1748 	}
1749 
1750 	return 0;
1751 }
1752 
1753 #ifdef ONENAND_LINUX
1754 /**
1755  * onenand_lock - [MTD Interface] Lock block(s)
1756  * @param mtd           MTD device structure
1757  * @param ofs           offset relative to mtd start
1758  * @param len           number of bytes to unlock
1759  *
1760  * Lock one or more blocks
1761  */
1762 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1763 {
1764 	int ret;
1765 
1766 	onenand_get_device(mtd, FL_LOCKING);
1767 	ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1768 	onenand_release_device(mtd);
1769 	return ret;
1770 }
1771 
1772 /**
1773  * onenand_unlock - [MTD Interface] Unlock block(s)
1774  * @param mtd           MTD device structure
1775  * @param ofs           offset relative to mtd start
1776  * @param len           number of bytes to unlock
1777  *
1778  * Unlock one or more blocks
1779  */
1780 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1781 {
1782 	int ret;
1783 
1784 	onenand_get_device(mtd, FL_LOCKING);
1785 	ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1786 	onenand_release_device(mtd);
1787 	return ret;
1788 }
1789 #endif
1790 
1791 /**
1792  * onenand_check_lock_status - [OneNAND Interface] Check lock status
1793  * @param this          onenand chip data structure
1794  *
1795  * Check lock status
1796  */
1797 static int onenand_check_lock_status(struct onenand_chip *this)
1798 {
1799 	unsigned int value, block, status;
1800 	unsigned int end;
1801 
1802 	end = this->chipsize >> this->erase_shift;
1803 	for (block = 0; block < end; block++) {
1804 		/* Set block address */
1805 		value = onenand_block_address(this, block);
1806 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1807 		/* Select DataRAM for DDP */
1808 		value = onenand_bufferram_address(this, block);
1809 		this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1810 		/* Set start block address */
1811 		this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1812 
1813 		/* Check lock status */
1814 		status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1815 		if (!(status & ONENAND_WP_US)) {
1816 			printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1817 			return 0;
1818 		}
1819 	}
1820 
1821 	return 1;
1822 }
1823 
1824 /**
1825  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1826  * @param mtd           MTD device structure
1827  *
1828  * Unlock all blocks
1829  */
1830 static void onenand_unlock_all(struct mtd_info *mtd)
1831 {
1832 	struct onenand_chip *this = mtd->priv;
1833 	loff_t ofs = 0;
1834 	size_t len = this->chipsize;
1835 
1836 	if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1837 		/* Set start block address */
1838 		this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1839 		/* Write unlock command */
1840 		this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1841 
1842 		/* There's no return value */
1843 		this->wait(mtd, FL_LOCKING);
1844 
1845 		/* Sanity check */
1846 		while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1847 				& ONENAND_CTRL_ONGO)
1848 			continue;
1849 
1850 		return;
1851 
1852 		/* Check lock status */
1853 		if (onenand_check_lock_status(this))
1854 			return;
1855 
1856 		/* Workaround for all block unlock in DDP */
1857 		if (ONENAND_IS_DDP(this)) {
1858 			/* All blocks on another chip */
1859 			ofs = this->chipsize >> 1;
1860 			len = this->chipsize >> 1;
1861 		}
1862 	}
1863 
1864 	onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1865 }
1866 
1867 
1868 /**
1869  * onenand_check_features - Check and set OneNAND features
1870  * @param mtd           MTD data structure
1871  *
1872  * Check and set OneNAND features
1873  * - lock scheme
1874  * - two plane
1875  */
1876 static void onenand_check_features(struct mtd_info *mtd)
1877 {
1878 	struct onenand_chip *this = mtd->priv;
1879 	unsigned int density, process;
1880 
1881 	/* Lock scheme depends on density and process */
1882 	density = onenand_get_density(this->device_id);
1883 	process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
1884 
1885 	/* Lock scheme */
1886 	switch (density) {
1887 	case ONENAND_DEVICE_DENSITY_4Gb:
1888 		this->options |= ONENAND_HAS_2PLANE;
1889 
1890 	case ONENAND_DEVICE_DENSITY_2Gb:
1891 		/* 2Gb DDP don't have 2 plane */
1892 		if (!ONENAND_IS_DDP(this))
1893 			this->options |= ONENAND_HAS_2PLANE;
1894 		this->options |= ONENAND_HAS_UNLOCK_ALL;
1895 
1896 	case ONENAND_DEVICE_DENSITY_1Gb:
1897 		/* A-Die has all block unlock */
1898 		if (process)
1899 			this->options |= ONENAND_HAS_UNLOCK_ALL;
1900 		break;
1901 
1902 	default:
1903 		/* Some OneNAND has continuous lock scheme */
1904 		if (!process)
1905 			this->options |= ONENAND_HAS_CONT_LOCK;
1906 		break;
1907 	}
1908 
1909 	if (this->options & ONENAND_HAS_CONT_LOCK)
1910 		printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
1911 	if (this->options & ONENAND_HAS_UNLOCK_ALL)
1912 		printk(KERN_DEBUG "Chip support all block unlock\n");
1913 	if (this->options & ONENAND_HAS_2PLANE)
1914 		printk(KERN_DEBUG "Chip has 2 plane\n");
1915 }
1916 
1917 /**
1918  * onenand_print_device_info - Print device ID
1919  * @param device        device ID
1920  *
1921  * Print device ID
1922  */
1923 char *onenand_print_device_info(int device, int version)
1924 {
1925 	int vcc, demuxed, ddp, density;
1926 	char *dev_info = malloc(80);
1927 	char *p = dev_info;
1928 
1929 	vcc = device & ONENAND_DEVICE_VCC_MASK;
1930 	demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1931 	ddp = device & ONENAND_DEVICE_IS_DDP;
1932 	density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1933 	p += sprintf(dev_info, "%sOneNAND%s %dMB %sV 16-bit (0x%02x)",
1934 	       demuxed ? "" : "Muxed ",
1935 	       ddp ? "(DDP)" : "",
1936 	       (16 << density), vcc ? "2.65/3.3" : "1.8", device);
1937 
1938 	sprintf(p, "\nOneNAND version = 0x%04x", version);
1939 	printk("%s\n", dev_info);
1940 
1941 	return dev_info;
1942 }
1943 
1944 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1945 	{ONENAND_MFR_SAMSUNG, "Samsung"},
1946 };
1947 
1948 /**
1949  * onenand_check_maf - Check manufacturer ID
1950  * @param manuf         manufacturer ID
1951  *
1952  * Check manufacturer ID
1953  */
1954 static int onenand_check_maf(int manuf)
1955 {
1956 	int size = ARRAY_SIZE(onenand_manuf_ids);
1957 	char *name;
1958 	int i;
1959 
1960 	for (i = 0; size; i++)
1961 		if (manuf == onenand_manuf_ids[i].id)
1962 			break;
1963 
1964 	if (i < size)
1965 		name = onenand_manuf_ids[i].name;
1966 	else
1967 		name = "Unknown";
1968 
1969 #ifdef ONENAND_DEBUG
1970 	printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1971 #endif
1972 
1973 	return i == size;
1974 }
1975 
1976 /**
1977  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1978  * @param mtd		MTD device structure
1979  *
1980  * OneNAND detection method:
1981  *   Compare the the values from command with ones from register
1982  */
1983 static int onenand_probe(struct mtd_info *mtd)
1984 {
1985 	struct onenand_chip *this = mtd->priv;
1986 	int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
1987 	int density;
1988 	int syscfg;
1989 
1990 	/* Save system configuration 1 */
1991 	syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
1992 	/* Clear Sync. Burst Read mode to read BootRAM */
1993 	this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
1994 
1995 	/* Send the command for reading device ID from BootRAM */
1996 	this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1997 
1998 	/* Read manufacturer and device IDs from BootRAM */
1999 	bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2000 	bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2001 
2002 	/* Reset OneNAND to read default register values */
2003 	this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2004 
2005 	/* Wait reset */
2006 	this->wait(mtd, FL_RESETING);
2007 
2008 	/* Restore system configuration 1 */
2009 	this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2010 
2011 	/* Check manufacturer ID */
2012 	if (onenand_check_maf(bram_maf_id))
2013 		return -ENXIO;
2014 
2015 	/* Read manufacturer and device IDs from Register */
2016 	maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2017 	dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2018 	ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2019 
2020 	/* Check OneNAND device */
2021 	if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2022 		return -ENXIO;
2023 
2024 	/* FIXME : Current OneNAND MTD doesn't support Flex-OneNAND */
2025 	if (dev_id & (1 << 9)) {
2026 		printk("Not yet support Flex-OneNAND\n");
2027 		return -ENXIO;
2028 	}
2029 
2030 	/* Flash device information */
2031 	mtd->name = onenand_print_device_info(dev_id, ver_id);
2032 	this->device_id = dev_id;
2033 	this->version_id = ver_id;
2034 
2035 	density = onenand_get_density(dev_id);
2036 	this->chipsize = (16 << density) << 20;
2037 	/* Set density mask. it is used for DDP */
2038 	if (ONENAND_IS_DDP(this))
2039 		this->density_mask = (1 << (density + 6));
2040 	else
2041 		this->density_mask = 0;
2042 
2043 	/* OneNAND page size & block size */
2044 	/* The data buffer size is equal to page size */
2045 	mtd->writesize =
2046 	    this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2047 	mtd->oobsize = mtd->writesize >> 5;
2048 	/* Pagers per block is always 64 in OneNAND */
2049 	mtd->erasesize = mtd->writesize << 6;
2050 
2051 	this->erase_shift = ffs(mtd->erasesize) - 1;
2052 	this->page_shift = ffs(mtd->writesize) - 1;
2053 	this->ppb_shift = (this->erase_shift - this->page_shift);
2054 	this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
2055 	/* It's real page size */
2056 	this->writesize = mtd->writesize;
2057 
2058 	/* REVIST: Multichip handling */
2059 
2060 	mtd->size = this->chipsize;
2061 
2062 	/* Check OneNAND features */
2063 	onenand_check_features(mtd);
2064 
2065 	mtd->flags = MTD_CAP_NANDFLASH;
2066 	mtd->erase = onenand_erase;
2067 	mtd->read = onenand_read;
2068 	mtd->write = onenand_write;
2069 	mtd->read_oob = onenand_read_oob;
2070 	mtd->write_oob = onenand_write_oob;
2071 	mtd->sync = onenand_sync;
2072 	mtd->block_isbad = onenand_block_isbad;
2073 	mtd->block_markbad = onenand_block_markbad;
2074 
2075 	return 0;
2076 }
2077 
2078 /**
2079  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2080  * @param mtd		MTD device structure
2081  * @param maxchips	Number of chips to scan for
2082  *
2083  * This fills out all the not initialized function pointers
2084  * with the defaults.
2085  * The flash ID is read and the mtd/chip structures are
2086  * filled with the appropriate values.
2087  */
2088 int onenand_scan(struct mtd_info *mtd, int maxchips)
2089 {
2090 	int i;
2091 	struct onenand_chip *this = mtd->priv;
2092 
2093 	if (!this->read_word)
2094 		this->read_word = onenand_readw;
2095 	if (!this->write_word)
2096 		this->write_word = onenand_writew;
2097 
2098 	if (!this->command)
2099 		this->command = onenand_command;
2100 	if (!this->wait)
2101 		this->wait = onenand_wait;
2102 	if (!this->bbt_wait)
2103 		this->bbt_wait = onenand_bbt_wait;
2104 
2105 	if (!this->read_bufferram)
2106 		this->read_bufferram = onenand_read_bufferram;
2107 	if (!this->write_bufferram)
2108 		this->write_bufferram = onenand_write_bufferram;
2109 
2110 	if (!this->block_markbad)
2111 		this->block_markbad = onenand_default_block_markbad;
2112 	if (!this->scan_bbt)
2113 		this->scan_bbt = onenand_default_bbt;
2114 
2115 	if (onenand_probe(mtd))
2116 		return -ENXIO;
2117 
2118 	/* Set Sync. Burst Read after probing */
2119 	if (this->mmcontrol) {
2120 		printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2121 		this->read_bufferram = onenand_sync_read_bufferram;
2122 	}
2123 
2124 	/* Allocate buffers, if necessary */
2125 	if (!this->page_buf) {
2126 		this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2127 		if (!this->page_buf) {
2128 			printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2129 			return -ENOMEM;
2130 		}
2131 		this->options |= ONENAND_PAGEBUF_ALLOC;
2132 	}
2133 	if (!this->oob_buf) {
2134 		this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2135 		if (!this->oob_buf) {
2136 			printk(KERN_ERR "onenand_scan: Can't allocate oob_buf\n");
2137 			if (this->options & ONENAND_PAGEBUF_ALLOC) {
2138 				this->options &= ~ONENAND_PAGEBUF_ALLOC;
2139 				kfree(this->page_buf);
2140 			}
2141 			return -ENOMEM;
2142 		}
2143 		this->options |= ONENAND_OOBBUF_ALLOC;
2144 	}
2145 
2146 	this->state = FL_READY;
2147 
2148 	/*
2149 	 * Allow subpage writes up to oobsize.
2150 	 */
2151 	switch (mtd->oobsize) {
2152 	case 64:
2153 		this->ecclayout = &onenand_oob_64;
2154 		mtd->subpage_sft = 2;
2155 		break;
2156 
2157 	case 32:
2158 		this->ecclayout = &onenand_oob_32;
2159 		mtd->subpage_sft = 1;
2160 		break;
2161 
2162 	default:
2163 		printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2164 			mtd->oobsize);
2165 		mtd->subpage_sft = 0;
2166 		/* To prevent kernel oops */
2167 		this->ecclayout = &onenand_oob_32;
2168 		break;
2169 	}
2170 
2171 	this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2172 
2173 	/*
2174 	 * The number of bytes available for a client to place data into
2175 	 * the out of band area
2176 	 */
2177 	this->ecclayout->oobavail = 0;
2178 	for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
2179 	    this->ecclayout->oobfree[i].length; i++)
2180 		this->ecclayout->oobavail +=
2181 			this->ecclayout->oobfree[i].length;
2182 	mtd->oobavail = this->ecclayout->oobavail;
2183 
2184 	mtd->ecclayout = this->ecclayout;
2185 
2186 	/* Unlock whole block */
2187 	onenand_unlock_all(mtd);
2188 
2189 	return this->scan_bbt(mtd);
2190 }
2191 
2192 /**
2193  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2194  * @param mtd		MTD device structure
2195  */
2196 void onenand_release(struct mtd_info *mtd)
2197 {
2198 }
2199