1 /* 2 * linux/drivers/mtd/onenand/onenand_base.c 3 * 4 * Copyright (C) 2005-2007 Samsung Electronics 5 * Kyungmin Park <kyungmin.park@samsung.com> 6 * 7 * Credits: 8 * Adrian Hunter <ext-adrian.hunter@nokia.com>: 9 * auto-placement support, read-while load support, various fixes 10 * Copyright (C) Nokia Corporation, 2007 11 * 12 * Rohit Hagargundgi <h.rohit at samsung.com>, 13 * Amul Kumar Saha <amul.saha@samsung.com>: 14 * Flex-OneNAND support 15 * Copyright (C) Samsung Electronics, 2009 16 * 17 * This program is free software; you can redistribute it and/or modify 18 * it under the terms of the GNU General Public License version 2 as 19 * published by the Free Software Foundation. 20 */ 21 22 #include <common.h> 23 #include <linux/compat.h> 24 #include <linux/mtd/mtd.h> 25 #include <linux/mtd/onenand.h> 26 27 #include <asm/io.h> 28 #include <asm/errno.h> 29 #include <malloc.h> 30 31 /* It should access 16-bit instead of 8-bit */ 32 static void *memcpy_16(void *dst, const void *src, unsigned int len) 33 { 34 void *ret = dst; 35 short *d = dst; 36 const short *s = src; 37 38 len >>= 1; 39 while (len-- > 0) 40 *d++ = *s++; 41 return ret; 42 } 43 44 /** 45 * onenand_oob_128 - oob info for Flex-Onenand with 4KB page 46 * For now, we expose only 64 out of 80 ecc bytes 47 */ 48 static struct nand_ecclayout onenand_oob_128 = { 49 .eccbytes = 64, 50 .eccpos = { 51 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 52 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 53 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 54 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 55 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 56 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 57 102, 103, 104, 105 58 }, 59 .oobfree = { 60 {2, 4}, {18, 4}, {34, 4}, {50, 4}, 61 {66, 4}, {82, 4}, {98, 4}, {114, 4} 62 } 63 }; 64 65 /** 66 * onenand_oob_64 - oob info for large (2KB) page 67 */ 68 static struct nand_ecclayout onenand_oob_64 = { 69 .eccbytes = 20, 70 .eccpos = { 71 8, 9, 10, 11, 12, 72 24, 25, 26, 27, 28, 73 40, 41, 42, 43, 44, 74 56, 57, 58, 59, 60, 75 }, 76 .oobfree = { 77 {2, 3}, {14, 2}, {18, 3}, {30, 2}, 78 {34, 3}, {46, 2}, {50, 3}, {62, 2} 79 } 80 }; 81 82 /** 83 * onenand_oob_32 - oob info for middle (1KB) page 84 */ 85 static struct nand_ecclayout onenand_oob_32 = { 86 .eccbytes = 10, 87 .eccpos = { 88 8, 9, 10, 11, 12, 89 24, 25, 26, 27, 28, 90 }, 91 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} } 92 }; 93 94 static const unsigned char ffchars[] = { 95 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 96 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ 97 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 98 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */ 99 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 100 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */ 101 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 102 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */ 103 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 104 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */ 105 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 106 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */ 107 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 108 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */ 109 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 110 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */ 111 }; 112 113 /** 114 * onenand_readw - [OneNAND Interface] Read OneNAND register 115 * @param addr address to read 116 * 117 * Read OneNAND register 118 */ 119 static unsigned short onenand_readw(void __iomem * addr) 120 { 121 return readw(addr); 122 } 123 124 /** 125 * onenand_writew - [OneNAND Interface] Write OneNAND register with value 126 * @param value value to write 127 * @param addr address to write 128 * 129 * Write OneNAND register with value 130 */ 131 static void onenand_writew(unsigned short value, void __iomem * addr) 132 { 133 writew(value, addr); 134 } 135 136 /** 137 * onenand_block_address - [DEFAULT] Get block address 138 * @param device the device id 139 * @param block the block 140 * @return translated block address if DDP, otherwise same 141 * 142 * Setup Start Address 1 Register (F100h) 143 */ 144 static int onenand_block_address(struct onenand_chip *this, int block) 145 { 146 /* Device Flash Core select, NAND Flash Block Address */ 147 if (block & this->density_mask) 148 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask); 149 150 return block; 151 } 152 153 /** 154 * onenand_bufferram_address - [DEFAULT] Get bufferram address 155 * @param device the device id 156 * @param block the block 157 * @return set DBS value if DDP, otherwise 0 158 * 159 * Setup Start Address 2 Register (F101h) for DDP 160 */ 161 static int onenand_bufferram_address(struct onenand_chip *this, int block) 162 { 163 /* Device BufferRAM Select */ 164 if (block & this->density_mask) 165 return ONENAND_DDP_CHIP1; 166 167 return ONENAND_DDP_CHIP0; 168 } 169 170 /** 171 * onenand_page_address - [DEFAULT] Get page address 172 * @param page the page address 173 * @param sector the sector address 174 * @return combined page and sector address 175 * 176 * Setup Start Address 8 Register (F107h) 177 */ 178 static int onenand_page_address(int page, int sector) 179 { 180 /* Flash Page Address, Flash Sector Address */ 181 int fpa, fsa; 182 183 fpa = page & ONENAND_FPA_MASK; 184 fsa = sector & ONENAND_FSA_MASK; 185 186 return ((fpa << ONENAND_FPA_SHIFT) | fsa); 187 } 188 189 /** 190 * onenand_buffer_address - [DEFAULT] Get buffer address 191 * @param dataram1 DataRAM index 192 * @param sectors the sector address 193 * @param count the number of sectors 194 * @return the start buffer value 195 * 196 * Setup Start Buffer Register (F200h) 197 */ 198 static int onenand_buffer_address(int dataram1, int sectors, int count) 199 { 200 int bsa, bsc; 201 202 /* BufferRAM Sector Address */ 203 bsa = sectors & ONENAND_BSA_MASK; 204 205 if (dataram1) 206 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */ 207 else 208 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */ 209 210 /* BufferRAM Sector Count */ 211 bsc = count & ONENAND_BSC_MASK; 212 213 return ((bsa << ONENAND_BSA_SHIFT) | bsc); 214 } 215 216 /** 217 * flexonenand_block - Return block number for flash address 218 * @param this - OneNAND device structure 219 * @param addr - Address for which block number is needed 220 */ 221 static unsigned int flexonenand_block(struct onenand_chip *this, loff_t addr) 222 { 223 unsigned int boundary, blk, die = 0; 224 225 if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) { 226 die = 1; 227 addr -= this->diesize[0]; 228 } 229 230 boundary = this->boundary[die]; 231 232 blk = addr >> (this->erase_shift - 1); 233 if (blk > boundary) 234 blk = (blk + boundary + 1) >> 1; 235 236 blk += die ? this->density_mask : 0; 237 return blk; 238 } 239 240 unsigned int onenand_block(struct onenand_chip *this, loff_t addr) 241 { 242 if (!FLEXONENAND(this)) 243 return addr >> this->erase_shift; 244 return flexonenand_block(this, addr); 245 } 246 247 /** 248 * flexonenand_addr - Return address of the block 249 * @this: OneNAND device structure 250 * @block: Block number on Flex-OneNAND 251 * 252 * Return address of the block 253 */ 254 static loff_t flexonenand_addr(struct onenand_chip *this, int block) 255 { 256 loff_t ofs = 0; 257 int die = 0, boundary; 258 259 if (ONENAND_IS_DDP(this) && block >= this->density_mask) { 260 block -= this->density_mask; 261 die = 1; 262 ofs = this->diesize[0]; 263 } 264 265 boundary = this->boundary[die]; 266 ofs += (loff_t) block << (this->erase_shift - 1); 267 if (block > (boundary + 1)) 268 ofs += (loff_t) (block - boundary - 1) 269 << (this->erase_shift - 1); 270 return ofs; 271 } 272 273 loff_t onenand_addr(struct onenand_chip *this, int block) 274 { 275 if (!FLEXONENAND(this)) 276 return (loff_t) block << this->erase_shift; 277 return flexonenand_addr(this, block); 278 } 279 280 /** 281 * flexonenand_region - [Flex-OneNAND] Return erase region of addr 282 * @param mtd MTD device structure 283 * @param addr address whose erase region needs to be identified 284 */ 285 int flexonenand_region(struct mtd_info *mtd, loff_t addr) 286 { 287 int i; 288 289 for (i = 0; i < mtd->numeraseregions; i++) 290 if (addr < mtd->eraseregions[i].offset) 291 break; 292 return i - 1; 293 } 294 295 /** 296 * onenand_get_density - [DEFAULT] Get OneNAND density 297 * @param dev_id OneNAND device ID 298 * 299 * Get OneNAND density from device ID 300 */ 301 static inline int onenand_get_density(int dev_id) 302 { 303 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; 304 return (density & ONENAND_DEVICE_DENSITY_MASK); 305 } 306 307 /** 308 * onenand_command - [DEFAULT] Send command to OneNAND device 309 * @param mtd MTD device structure 310 * @param cmd the command to be sent 311 * @param addr offset to read from or write to 312 * @param len number of bytes to read or write 313 * 314 * Send command to OneNAND device. This function is used for middle/large page 315 * devices (1KB/2KB Bytes per page) 316 */ 317 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, 318 size_t len) 319 { 320 struct onenand_chip *this = mtd->priv; 321 int value; 322 int block, page; 323 324 /* Now we use page size operation */ 325 int sectors = 0, count = 0; 326 327 /* Address translation */ 328 switch (cmd) { 329 case ONENAND_CMD_UNLOCK: 330 case ONENAND_CMD_LOCK: 331 case ONENAND_CMD_LOCK_TIGHT: 332 case ONENAND_CMD_UNLOCK_ALL: 333 block = -1; 334 page = -1; 335 break; 336 337 case FLEXONENAND_CMD_PI_ACCESS: 338 /* addr contains die index */ 339 block = addr * this->density_mask; 340 page = -1; 341 break; 342 343 case ONENAND_CMD_ERASE: 344 case ONENAND_CMD_BUFFERRAM: 345 block = onenand_block(this, addr); 346 page = -1; 347 break; 348 349 case FLEXONENAND_CMD_READ_PI: 350 cmd = ONENAND_CMD_READ; 351 block = addr * this->density_mask; 352 page = 0; 353 break; 354 355 default: 356 block = onenand_block(this, addr); 357 page = (int) (addr 358 - onenand_addr(this, block)) >> this->page_shift; 359 page &= this->page_mask; 360 break; 361 } 362 363 /* NOTE: The setting order of the registers is very important! */ 364 if (cmd == ONENAND_CMD_BUFFERRAM) { 365 /* Select DataRAM for DDP */ 366 value = onenand_bufferram_address(this, block); 367 this->write_word(value, 368 this->base + ONENAND_REG_START_ADDRESS2); 369 370 if (ONENAND_IS_4KB_PAGE(this)) 371 ONENAND_SET_BUFFERRAM0(this); 372 else 373 /* Switch to the next data buffer */ 374 ONENAND_SET_NEXT_BUFFERRAM(this); 375 376 return 0; 377 } 378 379 if (block != -1) { 380 /* Write 'DFS, FBA' of Flash */ 381 value = onenand_block_address(this, block); 382 this->write_word(value, 383 this->base + ONENAND_REG_START_ADDRESS1); 384 385 /* Select DataRAM for DDP */ 386 value = onenand_bufferram_address(this, block); 387 this->write_word(value, 388 this->base + ONENAND_REG_START_ADDRESS2); 389 } 390 391 if (page != -1) { 392 int dataram; 393 394 switch (cmd) { 395 case FLEXONENAND_CMD_RECOVER_LSB: 396 case ONENAND_CMD_READ: 397 case ONENAND_CMD_READOOB: 398 if (ONENAND_IS_4KB_PAGE(this)) 399 dataram = ONENAND_SET_BUFFERRAM0(this); 400 else 401 dataram = ONENAND_SET_NEXT_BUFFERRAM(this); 402 403 break; 404 405 default: 406 dataram = ONENAND_CURRENT_BUFFERRAM(this); 407 break; 408 } 409 410 /* Write 'FPA, FSA' of Flash */ 411 value = onenand_page_address(page, sectors); 412 this->write_word(value, 413 this->base + ONENAND_REG_START_ADDRESS8); 414 415 /* Write 'BSA, BSC' of DataRAM */ 416 value = onenand_buffer_address(dataram, sectors, count); 417 this->write_word(value, this->base + ONENAND_REG_START_BUFFER); 418 } 419 420 /* Interrupt clear */ 421 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); 422 /* Write command */ 423 this->write_word(cmd, this->base + ONENAND_REG_COMMAND); 424 425 return 0; 426 } 427 428 /** 429 * onenand_read_ecc - return ecc status 430 * @param this onenand chip structure 431 */ 432 static int onenand_read_ecc(struct onenand_chip *this) 433 { 434 int ecc, i; 435 436 if (!FLEXONENAND(this)) 437 return this->read_word(this->base + ONENAND_REG_ECC_STATUS); 438 439 for (i = 0; i < 4; i++) { 440 ecc = this->read_word(this->base 441 + ((ONENAND_REG_ECC_STATUS + i) << 1)); 442 if (likely(!ecc)) 443 continue; 444 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR) 445 return ONENAND_ECC_2BIT_ALL; 446 } 447 448 return 0; 449 } 450 451 /** 452 * onenand_wait - [DEFAULT] wait until the command is done 453 * @param mtd MTD device structure 454 * @param state state to select the max. timeout value 455 * 456 * Wait for command done. This applies to all OneNAND command 457 * Read can take up to 30us, erase up to 2ms and program up to 350us 458 * according to general OneNAND specs 459 */ 460 static int onenand_wait(struct mtd_info *mtd, int state) 461 { 462 struct onenand_chip *this = mtd->priv; 463 unsigned int flags = ONENAND_INT_MASTER; 464 unsigned int interrupt = 0; 465 unsigned int ctrl; 466 467 while (1) { 468 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 469 if (interrupt & flags) 470 break; 471 } 472 473 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 474 475 if (interrupt & ONENAND_INT_READ) { 476 int ecc = onenand_read_ecc(this); 477 if (ecc & ONENAND_ECC_2BIT_ALL) { 478 printk("onenand_wait: ECC error = 0x%04x\n", ecc); 479 return -EBADMSG; 480 } 481 } 482 483 if (ctrl & ONENAND_CTRL_ERROR) { 484 printk("onenand_wait: controller error = 0x%04x\n", ctrl); 485 if (ctrl & ONENAND_CTRL_LOCK) 486 printk("onenand_wait: it's locked error = 0x%04x\n", 487 ctrl); 488 489 return -EIO; 490 } 491 492 493 return 0; 494 } 495 496 /** 497 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset 498 * @param mtd MTD data structure 499 * @param area BufferRAM area 500 * @return offset given area 501 * 502 * Return BufferRAM offset given area 503 */ 504 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) 505 { 506 struct onenand_chip *this = mtd->priv; 507 508 if (ONENAND_CURRENT_BUFFERRAM(this)) { 509 if (area == ONENAND_DATARAM) 510 return mtd->writesize; 511 if (area == ONENAND_SPARERAM) 512 return mtd->oobsize; 513 } 514 515 return 0; 516 } 517 518 /** 519 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area 520 * @param mtd MTD data structure 521 * @param area BufferRAM area 522 * @param buffer the databuffer to put/get data 523 * @param offset offset to read from or write to 524 * @param count number of bytes to read/write 525 * 526 * Read the BufferRAM area 527 */ 528 static int onenand_read_bufferram(struct mtd_info *mtd, loff_t addr, int area, 529 unsigned char *buffer, int offset, 530 size_t count) 531 { 532 struct onenand_chip *this = mtd->priv; 533 void __iomem *bufferram; 534 535 bufferram = this->base + area; 536 bufferram += onenand_bufferram_offset(mtd, area); 537 538 memcpy_16(buffer, bufferram + offset, count); 539 540 return 0; 541 } 542 543 /** 544 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode 545 * @param mtd MTD data structure 546 * @param area BufferRAM area 547 * @param buffer the databuffer to put/get data 548 * @param offset offset to read from or write to 549 * @param count number of bytes to read/write 550 * 551 * Read the BufferRAM area with Sync. Burst Mode 552 */ 553 static int onenand_sync_read_bufferram(struct mtd_info *mtd, loff_t addr, int area, 554 unsigned char *buffer, int offset, 555 size_t count) 556 { 557 struct onenand_chip *this = mtd->priv; 558 void __iomem *bufferram; 559 560 bufferram = this->base + area; 561 bufferram += onenand_bufferram_offset(mtd, area); 562 563 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ); 564 565 memcpy_16(buffer, bufferram + offset, count); 566 567 this->mmcontrol(mtd, 0); 568 569 return 0; 570 } 571 572 /** 573 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area 574 * @param mtd MTD data structure 575 * @param area BufferRAM area 576 * @param buffer the databuffer to put/get data 577 * @param offset offset to read from or write to 578 * @param count number of bytes to read/write 579 * 580 * Write the BufferRAM area 581 */ 582 static int onenand_write_bufferram(struct mtd_info *mtd, loff_t addr, int area, 583 const unsigned char *buffer, int offset, 584 size_t count) 585 { 586 struct onenand_chip *this = mtd->priv; 587 void __iomem *bufferram; 588 589 bufferram = this->base + area; 590 bufferram += onenand_bufferram_offset(mtd, area); 591 592 memcpy_16(bufferram + offset, buffer, count); 593 594 return 0; 595 } 596 597 /** 598 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode 599 * @param mtd MTD data structure 600 * @param addr address to check 601 * @return blockpage address 602 * 603 * Get blockpage address at 2x program mode 604 */ 605 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr) 606 { 607 struct onenand_chip *this = mtd->priv; 608 int blockpage, block, page; 609 610 /* Calculate the even block number */ 611 block = (int) (addr >> this->erase_shift) & ~1; 612 /* Is it the odd plane? */ 613 if (addr & this->writesize) 614 block++; 615 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask; 616 blockpage = (block << 7) | page; 617 618 return blockpage; 619 } 620 621 /** 622 * onenand_check_bufferram - [GENERIC] Check BufferRAM information 623 * @param mtd MTD data structure 624 * @param addr address to check 625 * @return 1 if there are valid data, otherwise 0 626 * 627 * Check bufferram if there is data we required 628 */ 629 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) 630 { 631 struct onenand_chip *this = mtd->priv; 632 int blockpage, found = 0; 633 unsigned int i; 634 635 if (ONENAND_IS_2PLANE(this)) 636 blockpage = onenand_get_2x_blockpage(mtd, addr); 637 else 638 blockpage = (int) (addr >> this->page_shift); 639 640 /* Is there valid data? */ 641 i = ONENAND_CURRENT_BUFFERRAM(this); 642 if (this->bufferram[i].blockpage == blockpage) 643 found = 1; 644 else { 645 /* Check another BufferRAM */ 646 i = ONENAND_NEXT_BUFFERRAM(this); 647 if (this->bufferram[i].blockpage == blockpage) { 648 ONENAND_SET_NEXT_BUFFERRAM(this); 649 found = 1; 650 } 651 } 652 653 if (found && ONENAND_IS_DDP(this)) { 654 /* Select DataRAM for DDP */ 655 int block = onenand_block(this, addr); 656 int value = onenand_bufferram_address(this, block); 657 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 658 } 659 660 return found; 661 } 662 663 /** 664 * onenand_update_bufferram - [GENERIC] Update BufferRAM information 665 * @param mtd MTD data structure 666 * @param addr address to update 667 * @param valid valid flag 668 * 669 * Update BufferRAM information 670 */ 671 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr, 672 int valid) 673 { 674 struct onenand_chip *this = mtd->priv; 675 int blockpage; 676 unsigned int i; 677 678 if (ONENAND_IS_2PLANE(this)) 679 blockpage = onenand_get_2x_blockpage(mtd, addr); 680 else 681 blockpage = (int)(addr >> this->page_shift); 682 683 /* Invalidate another BufferRAM */ 684 i = ONENAND_NEXT_BUFFERRAM(this); 685 if (this->bufferram[i].blockpage == blockpage) 686 this->bufferram[i].blockpage = -1; 687 688 /* Update BufferRAM */ 689 i = ONENAND_CURRENT_BUFFERRAM(this); 690 if (valid) 691 this->bufferram[i].blockpage = blockpage; 692 else 693 this->bufferram[i].blockpage = -1; 694 695 return 0; 696 } 697 698 /** 699 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information 700 * @param mtd MTD data structure 701 * @param addr start address to invalidate 702 * @param len length to invalidate 703 * 704 * Invalidate BufferRAM information 705 */ 706 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr, 707 unsigned int len) 708 { 709 struct onenand_chip *this = mtd->priv; 710 int i; 711 loff_t end_addr = addr + len; 712 713 /* Invalidate BufferRAM */ 714 for (i = 0; i < MAX_BUFFERRAM; i++) { 715 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift; 716 717 if (buf_addr >= addr && buf_addr < end_addr) 718 this->bufferram[i].blockpage = -1; 719 } 720 } 721 722 /** 723 * onenand_get_device - [GENERIC] Get chip for selected access 724 * @param mtd MTD device structure 725 * @param new_state the state which is requested 726 * 727 * Get the device and lock it for exclusive access 728 */ 729 static void onenand_get_device(struct mtd_info *mtd, int new_state) 730 { 731 /* Do nothing */ 732 } 733 734 /** 735 * onenand_release_device - [GENERIC] release chip 736 * @param mtd MTD device structure 737 * 738 * Deselect, release chip lock and wake up anyone waiting on the device 739 */ 740 static void onenand_release_device(struct mtd_info *mtd) 741 { 742 /* Do nothing */ 743 } 744 745 /** 746 * onenand_transfer_auto_oob - [INTERN] oob auto-placement transfer 747 * @param mtd MTD device structure 748 * @param buf destination address 749 * @param column oob offset to read from 750 * @param thislen oob length to read 751 */ 752 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, 753 int column, int thislen) 754 { 755 struct onenand_chip *this = mtd->priv; 756 struct nand_oobfree *free; 757 int readcol = column; 758 int readend = column + thislen; 759 int lastgap = 0; 760 unsigned int i; 761 uint8_t *oob_buf = this->oob_buf; 762 763 free = this->ecclayout->oobfree; 764 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 765 if (readcol >= lastgap) 766 readcol += free->offset - lastgap; 767 if (readend >= lastgap) 768 readend += free->offset - lastgap; 769 lastgap = free->offset + free->length; 770 } 771 this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); 772 free = this->ecclayout->oobfree; 773 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 774 int free_end = free->offset + free->length; 775 if (free->offset < readend && free_end > readcol) { 776 int st = max_t(int,free->offset,readcol); 777 int ed = min_t(int,free_end,readend); 778 int n = ed - st; 779 memcpy(buf, oob_buf + st, n); 780 buf += n; 781 } else if (column == 0) 782 break; 783 } 784 return 0; 785 } 786 787 /** 788 * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data 789 * @param mtd MTD device structure 790 * @param addr address to recover 791 * @param status return value from onenand_wait 792 * 793 * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has 794 * lower page address and MSB page has higher page address in paired pages. 795 * If power off occurs during MSB page program, the paired LSB page data can 796 * become corrupt. LSB page recovery read is a way to read LSB page though page 797 * data are corrupted. When uncorrectable error occurs as a result of LSB page 798 * read after power up, issue LSB page recovery read. 799 */ 800 static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status) 801 { 802 struct onenand_chip *this = mtd->priv; 803 int i; 804 805 /* Recovery is only for Flex-OneNAND */ 806 if (!FLEXONENAND(this)) 807 return status; 808 809 /* check if we failed due to uncorrectable error */ 810 if (!mtd_is_eccerr(status) && status != ONENAND_BBT_READ_ECC_ERROR) 811 return status; 812 813 /* check if address lies in MLC region */ 814 i = flexonenand_region(mtd, addr); 815 if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift)) 816 return status; 817 818 printk("onenand_recover_lsb:" 819 "Attempting to recover from uncorrectable read\n"); 820 821 /* Issue the LSB page recovery command */ 822 this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize); 823 return this->wait(mtd, FL_READING); 824 } 825 826 /** 827 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band 828 * @param mtd MTD device structure 829 * @param from offset to read from 830 * @param ops oob operation description structure 831 * 832 * OneNAND read main and/or out-of-band data 833 */ 834 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from, 835 struct mtd_oob_ops *ops) 836 { 837 struct onenand_chip *this = mtd->priv; 838 struct mtd_ecc_stats stats; 839 size_t len = ops->len; 840 size_t ooblen = ops->ooblen; 841 u_char *buf = ops->datbuf; 842 u_char *oobbuf = ops->oobbuf; 843 int read = 0, column, thislen; 844 int oobread = 0, oobcolumn, thisooblen, oobsize; 845 int ret = 0, boundary = 0; 846 int writesize = this->writesize; 847 848 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len); 849 850 if (ops->mode == MTD_OPS_AUTO_OOB) 851 oobsize = this->ecclayout->oobavail; 852 else 853 oobsize = mtd->oobsize; 854 855 oobcolumn = from & (mtd->oobsize - 1); 856 857 /* Do not allow reads past end of device */ 858 if ((from + len) > mtd->size) { 859 printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n"); 860 ops->retlen = 0; 861 ops->oobretlen = 0; 862 return -EINVAL; 863 } 864 865 stats = mtd->ecc_stats; 866 867 /* Read-while-load method */ 868 /* Note: We can't use this feature in MLC */ 869 870 /* Do first load to bufferRAM */ 871 if (read < len) { 872 if (!onenand_check_bufferram(mtd, from)) { 873 this->main_buf = buf; 874 this->command(mtd, ONENAND_CMD_READ, from, writesize); 875 ret = this->wait(mtd, FL_READING); 876 if (unlikely(ret)) 877 ret = onenand_recover_lsb(mtd, from, ret); 878 onenand_update_bufferram(mtd, from, !ret); 879 if (ret == -EBADMSG) 880 ret = 0; 881 } 882 } 883 884 thislen = min_t(int, writesize, len - read); 885 column = from & (writesize - 1); 886 if (column + thislen > writesize) 887 thislen = writesize - column; 888 889 while (!ret) { 890 /* If there is more to load then start next load */ 891 from += thislen; 892 if (!ONENAND_IS_4KB_PAGE(this) && read + thislen < len) { 893 this->main_buf = buf + thislen; 894 this->command(mtd, ONENAND_CMD_READ, from, writesize); 895 /* 896 * Chip boundary handling in DDP 897 * Now we issued chip 1 read and pointed chip 1 898 * bufferam so we have to point chip 0 bufferam. 899 */ 900 if (ONENAND_IS_DDP(this) && 901 unlikely(from == (this->chipsize >> 1))) { 902 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2); 903 boundary = 1; 904 } else 905 boundary = 0; 906 ONENAND_SET_PREV_BUFFERRAM(this); 907 } 908 909 /* While load is going, read from last bufferRAM */ 910 this->read_bufferram(mtd, from - thislen, ONENAND_DATARAM, buf, column, thislen); 911 912 /* Read oob area if needed */ 913 if (oobbuf) { 914 thisooblen = oobsize - oobcolumn; 915 thisooblen = min_t(int, thisooblen, ooblen - oobread); 916 917 if (ops->mode == MTD_OPS_AUTO_OOB) 918 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen); 919 else 920 this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen); 921 oobread += thisooblen; 922 oobbuf += thisooblen; 923 oobcolumn = 0; 924 } 925 926 if (ONENAND_IS_4KB_PAGE(this) && (read + thislen < len)) { 927 this->command(mtd, ONENAND_CMD_READ, from, writesize); 928 ret = this->wait(mtd, FL_READING); 929 if (unlikely(ret)) 930 ret = onenand_recover_lsb(mtd, from, ret); 931 onenand_update_bufferram(mtd, from, !ret); 932 if (mtd_is_eccerr(ret)) 933 ret = 0; 934 } 935 936 /* See if we are done */ 937 read += thislen; 938 if (read == len) 939 break; 940 /* Set up for next read from bufferRAM */ 941 if (unlikely(boundary)) 942 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2); 943 if (!ONENAND_IS_4KB_PAGE(this)) 944 ONENAND_SET_NEXT_BUFFERRAM(this); 945 buf += thislen; 946 thislen = min_t(int, writesize, len - read); 947 column = 0; 948 949 if (!ONENAND_IS_4KB_PAGE(this)) { 950 /* Now wait for load */ 951 ret = this->wait(mtd, FL_READING); 952 onenand_update_bufferram(mtd, from, !ret); 953 if (mtd_is_eccerr(ret)) 954 ret = 0; 955 } 956 } 957 958 /* 959 * Return success, if no ECC failures, else -EBADMSG 960 * fs driver will take care of that, because 961 * retlen == desired len and result == -EBADMSG 962 */ 963 ops->retlen = read; 964 ops->oobretlen = oobread; 965 966 if (ret) 967 return ret; 968 969 if (mtd->ecc_stats.failed - stats.failed) 970 return -EBADMSG; 971 972 /* return max bitflips per ecc step; ONENANDs correct 1 bit only */ 973 return mtd->ecc_stats.corrected != stats.corrected ? 1 : 0; 974 } 975 976 /** 977 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band 978 * @param mtd MTD device structure 979 * @param from offset to read from 980 * @param ops oob operation description structure 981 * 982 * OneNAND read out-of-band data from the spare area 983 */ 984 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from, 985 struct mtd_oob_ops *ops) 986 { 987 struct onenand_chip *this = mtd->priv; 988 struct mtd_ecc_stats stats; 989 int read = 0, thislen, column, oobsize; 990 size_t len = ops->ooblen; 991 unsigned int mode = ops->mode; 992 u_char *buf = ops->oobbuf; 993 int ret = 0, readcmd; 994 995 from += ops->ooboffs; 996 997 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len); 998 999 /* Initialize return length value */ 1000 ops->oobretlen = 0; 1001 1002 if (mode == MTD_OPS_AUTO_OOB) 1003 oobsize = this->ecclayout->oobavail; 1004 else 1005 oobsize = mtd->oobsize; 1006 1007 column = from & (mtd->oobsize - 1); 1008 1009 if (unlikely(column >= oobsize)) { 1010 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n"); 1011 return -EINVAL; 1012 } 1013 1014 /* Do not allow reads past end of device */ 1015 if (unlikely(from >= mtd->size || 1016 column + len > ((mtd->size >> this->page_shift) - 1017 (from >> this->page_shift)) * oobsize)) { 1018 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n"); 1019 return -EINVAL; 1020 } 1021 1022 stats = mtd->ecc_stats; 1023 1024 readcmd = ONENAND_IS_4KB_PAGE(this) ? 1025 ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1026 1027 while (read < len) { 1028 thislen = oobsize - column; 1029 thislen = min_t(int, thislen, len); 1030 1031 this->spare_buf = buf; 1032 this->command(mtd, readcmd, from, mtd->oobsize); 1033 1034 onenand_update_bufferram(mtd, from, 0); 1035 1036 ret = this->wait(mtd, FL_READING); 1037 if (unlikely(ret)) 1038 ret = onenand_recover_lsb(mtd, from, ret); 1039 1040 if (ret && ret != -EBADMSG) { 1041 printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret); 1042 break; 1043 } 1044 1045 if (mode == MTD_OPS_AUTO_OOB) 1046 onenand_transfer_auto_oob(mtd, buf, column, thislen); 1047 else 1048 this->read_bufferram(mtd, 0, ONENAND_SPARERAM, buf, column, thislen); 1049 1050 read += thislen; 1051 1052 if (read == len) 1053 break; 1054 1055 buf += thislen; 1056 1057 /* Read more? */ 1058 if (read < len) { 1059 /* Page size */ 1060 from += mtd->writesize; 1061 column = 0; 1062 } 1063 } 1064 1065 ops->oobretlen = read; 1066 1067 if (ret) 1068 return ret; 1069 1070 if (mtd->ecc_stats.failed - stats.failed) 1071 return -EBADMSG; 1072 1073 return 0; 1074 } 1075 1076 /** 1077 * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc 1078 * @param mtd MTD device structure 1079 * @param from offset to read from 1080 * @param len number of bytes to read 1081 * @param retlen pointer to variable to store the number of read bytes 1082 * @param buf the databuffer to put data 1083 * 1084 * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL 1085 */ 1086 int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, 1087 size_t * retlen, u_char * buf) 1088 { 1089 struct mtd_oob_ops ops = { 1090 .len = len, 1091 .ooblen = 0, 1092 .datbuf = buf, 1093 .oobbuf = NULL, 1094 }; 1095 int ret; 1096 1097 onenand_get_device(mtd, FL_READING); 1098 ret = onenand_read_ops_nolock(mtd, from, &ops); 1099 onenand_release_device(mtd); 1100 1101 *retlen = ops.retlen; 1102 return ret; 1103 } 1104 1105 /** 1106 * onenand_read_oob - [MTD Interface] OneNAND read out-of-band 1107 * @param mtd MTD device structure 1108 * @param from offset to read from 1109 * @param ops oob operations description structure 1110 * 1111 * OneNAND main and/or out-of-band 1112 */ 1113 int onenand_read_oob(struct mtd_info *mtd, loff_t from, 1114 struct mtd_oob_ops *ops) 1115 { 1116 int ret; 1117 1118 switch (ops->mode) { 1119 case MTD_OPS_PLACE_OOB: 1120 case MTD_OPS_AUTO_OOB: 1121 break; 1122 case MTD_OPS_RAW: 1123 /* Not implemented yet */ 1124 default: 1125 return -EINVAL; 1126 } 1127 1128 onenand_get_device(mtd, FL_READING); 1129 if (ops->datbuf) 1130 ret = onenand_read_ops_nolock(mtd, from, ops); 1131 else 1132 ret = onenand_read_oob_nolock(mtd, from, ops); 1133 onenand_release_device(mtd); 1134 1135 return ret; 1136 } 1137 1138 /** 1139 * onenand_bbt_wait - [DEFAULT] wait until the command is done 1140 * @param mtd MTD device structure 1141 * @param state state to select the max. timeout value 1142 * 1143 * Wait for command done. 1144 */ 1145 static int onenand_bbt_wait(struct mtd_info *mtd, int state) 1146 { 1147 struct onenand_chip *this = mtd->priv; 1148 unsigned int flags = ONENAND_INT_MASTER; 1149 unsigned int interrupt; 1150 unsigned int ctrl; 1151 1152 while (1) { 1153 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1154 if (interrupt & flags) 1155 break; 1156 } 1157 1158 /* To get correct interrupt status in timeout case */ 1159 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1160 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 1161 1162 if (interrupt & ONENAND_INT_READ) { 1163 int ecc = onenand_read_ecc(this); 1164 if (ecc & ONENAND_ECC_2BIT_ALL) { 1165 printk(KERN_INFO "onenand_bbt_wait: ecc error = 0x%04x" 1166 ", controller = 0x%04x\n", ecc, ctrl); 1167 return ONENAND_BBT_READ_ERROR; 1168 } 1169 } else { 1170 printk(KERN_ERR "onenand_bbt_wait: read timeout!" 1171 "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt); 1172 return ONENAND_BBT_READ_FATAL_ERROR; 1173 } 1174 1175 /* Initial bad block case: 0x2400 or 0x0400 */ 1176 if (ctrl & ONENAND_CTRL_ERROR) { 1177 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl); 1178 return ONENAND_BBT_READ_ERROR; 1179 } 1180 1181 return 0; 1182 } 1183 1184 /** 1185 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan 1186 * @param mtd MTD device structure 1187 * @param from offset to read from 1188 * @param ops oob operation description structure 1189 * 1190 * OneNAND read out-of-band data from the spare area for bbt scan 1191 */ 1192 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, 1193 struct mtd_oob_ops *ops) 1194 { 1195 struct onenand_chip *this = mtd->priv; 1196 int read = 0, thislen, column; 1197 int ret = 0, readcmd; 1198 size_t len = ops->ooblen; 1199 u_char *buf = ops->oobbuf; 1200 1201 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len); 1202 1203 readcmd = ONENAND_IS_4KB_PAGE(this) ? 1204 ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1205 1206 /* Initialize return value */ 1207 ops->oobretlen = 0; 1208 1209 /* Do not allow reads past end of device */ 1210 if (unlikely((from + len) > mtd->size)) { 1211 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n"); 1212 return ONENAND_BBT_READ_FATAL_ERROR; 1213 } 1214 1215 /* Grab the lock and see if the device is available */ 1216 onenand_get_device(mtd, FL_READING); 1217 1218 column = from & (mtd->oobsize - 1); 1219 1220 while (read < len) { 1221 1222 thislen = mtd->oobsize - column; 1223 thislen = min_t(int, thislen, len); 1224 1225 this->spare_buf = buf; 1226 this->command(mtd, readcmd, from, mtd->oobsize); 1227 1228 onenand_update_bufferram(mtd, from, 0); 1229 1230 ret = this->bbt_wait(mtd, FL_READING); 1231 if (unlikely(ret)) 1232 ret = onenand_recover_lsb(mtd, from, ret); 1233 1234 if (ret) 1235 break; 1236 1237 this->read_bufferram(mtd, 0, ONENAND_SPARERAM, buf, column, thislen); 1238 read += thislen; 1239 if (read == len) 1240 break; 1241 1242 buf += thislen; 1243 1244 /* Read more? */ 1245 if (read < len) { 1246 /* Update Page size */ 1247 from += this->writesize; 1248 column = 0; 1249 } 1250 } 1251 1252 /* Deselect and wake up anyone waiting on the device */ 1253 onenand_release_device(mtd); 1254 1255 ops->oobretlen = read; 1256 return ret; 1257 } 1258 1259 1260 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 1261 /** 1262 * onenand_verify_oob - [GENERIC] verify the oob contents after a write 1263 * @param mtd MTD device structure 1264 * @param buf the databuffer to verify 1265 * @param to offset to read from 1266 */ 1267 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to) 1268 { 1269 struct onenand_chip *this = mtd->priv; 1270 u_char *oob_buf = this->oob_buf; 1271 int status, i, readcmd; 1272 1273 readcmd = ONENAND_IS_4KB_PAGE(this) ? 1274 ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1275 1276 this->command(mtd, readcmd, to, mtd->oobsize); 1277 onenand_update_bufferram(mtd, to, 0); 1278 status = this->wait(mtd, FL_READING); 1279 if (status) 1280 return status; 1281 1282 this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); 1283 for (i = 0; i < mtd->oobsize; i++) 1284 if (buf[i] != 0xFF && buf[i] != oob_buf[i]) 1285 return -EBADMSG; 1286 1287 return 0; 1288 } 1289 1290 /** 1291 * onenand_verify - [GENERIC] verify the chip contents after a write 1292 * @param mtd MTD device structure 1293 * @param buf the databuffer to verify 1294 * @param addr offset to read from 1295 * @param len number of bytes to read and compare 1296 */ 1297 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len) 1298 { 1299 struct onenand_chip *this = mtd->priv; 1300 void __iomem *dataram; 1301 int ret = 0; 1302 int thislen, column; 1303 1304 while (len != 0) { 1305 thislen = min_t(int, this->writesize, len); 1306 column = addr & (this->writesize - 1); 1307 if (column + thislen > this->writesize) 1308 thislen = this->writesize - column; 1309 1310 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize); 1311 1312 onenand_update_bufferram(mtd, addr, 0); 1313 1314 ret = this->wait(mtd, FL_READING); 1315 if (ret) 1316 return ret; 1317 1318 onenand_update_bufferram(mtd, addr, 1); 1319 1320 dataram = this->base + ONENAND_DATARAM; 1321 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM); 1322 1323 if (memcmp(buf, dataram + column, thislen)) 1324 return -EBADMSG; 1325 1326 len -= thislen; 1327 buf += thislen; 1328 addr += thislen; 1329 } 1330 1331 return 0; 1332 } 1333 #else 1334 #define onenand_verify(...) (0) 1335 #define onenand_verify_oob(...) (0) 1336 #endif 1337 1338 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0) 1339 1340 /** 1341 * onenand_fill_auto_oob - [INTERN] oob auto-placement transfer 1342 * @param mtd MTD device structure 1343 * @param oob_buf oob buffer 1344 * @param buf source address 1345 * @param column oob offset to write to 1346 * @param thislen oob length to write 1347 */ 1348 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf, 1349 const u_char *buf, int column, int thislen) 1350 { 1351 struct onenand_chip *this = mtd->priv; 1352 struct nand_oobfree *free; 1353 int writecol = column; 1354 int writeend = column + thislen; 1355 int lastgap = 0; 1356 unsigned int i; 1357 1358 free = this->ecclayout->oobfree; 1359 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 1360 if (writecol >= lastgap) 1361 writecol += free->offset - lastgap; 1362 if (writeend >= lastgap) 1363 writeend += free->offset - lastgap; 1364 lastgap = free->offset + free->length; 1365 } 1366 free = this->ecclayout->oobfree; 1367 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 1368 int free_end = free->offset + free->length; 1369 if (free->offset < writeend && free_end > writecol) { 1370 int st = max_t(int,free->offset,writecol); 1371 int ed = min_t(int,free_end,writeend); 1372 int n = ed - st; 1373 memcpy(oob_buf + st, buf, n); 1374 buf += n; 1375 } else if (column == 0) 1376 break; 1377 } 1378 return 0; 1379 } 1380 1381 /** 1382 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band 1383 * @param mtd MTD device structure 1384 * @param to offset to write to 1385 * @param ops oob operation description structure 1386 * 1387 * Write main and/or oob with ECC 1388 */ 1389 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to, 1390 struct mtd_oob_ops *ops) 1391 { 1392 struct onenand_chip *this = mtd->priv; 1393 int written = 0, column, thislen, subpage; 1394 int oobwritten = 0, oobcolumn, thisooblen, oobsize; 1395 size_t len = ops->len; 1396 size_t ooblen = ops->ooblen; 1397 const u_char *buf = ops->datbuf; 1398 const u_char *oob = ops->oobbuf; 1399 u_char *oobbuf; 1400 int ret = 0; 1401 1402 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len); 1403 1404 /* Initialize retlen, in case of early exit */ 1405 ops->retlen = 0; 1406 ops->oobretlen = 0; 1407 1408 /* Reject writes, which are not page aligned */ 1409 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) { 1410 printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n"); 1411 return -EINVAL; 1412 } 1413 1414 if (ops->mode == MTD_OPS_AUTO_OOB) 1415 oobsize = this->ecclayout->oobavail; 1416 else 1417 oobsize = mtd->oobsize; 1418 1419 oobcolumn = to & (mtd->oobsize - 1); 1420 1421 column = to & (mtd->writesize - 1); 1422 1423 /* Loop until all data write */ 1424 while (written < len) { 1425 u_char *wbuf = (u_char *) buf; 1426 1427 thislen = min_t(int, mtd->writesize - column, len - written); 1428 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten); 1429 1430 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen); 1431 1432 /* Partial page write */ 1433 subpage = thislen < mtd->writesize; 1434 if (subpage) { 1435 memset(this->page_buf, 0xff, mtd->writesize); 1436 memcpy(this->page_buf + column, buf, thislen); 1437 wbuf = this->page_buf; 1438 } 1439 1440 this->write_bufferram(mtd, to, ONENAND_DATARAM, wbuf, 0, mtd->writesize); 1441 1442 if (oob) { 1443 oobbuf = this->oob_buf; 1444 1445 /* We send data to spare ram with oobsize 1446 * * to prevent byte access */ 1447 memset(oobbuf, 0xff, mtd->oobsize); 1448 if (ops->mode == MTD_OPS_AUTO_OOB) 1449 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen); 1450 else 1451 memcpy(oobbuf + oobcolumn, oob, thisooblen); 1452 1453 oobwritten += thisooblen; 1454 oob += thisooblen; 1455 oobcolumn = 0; 1456 } else 1457 oobbuf = (u_char *) ffchars; 1458 1459 this->write_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 1460 1461 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize); 1462 1463 ret = this->wait(mtd, FL_WRITING); 1464 1465 /* In partial page write we don't update bufferram */ 1466 onenand_update_bufferram(mtd, to, !ret && !subpage); 1467 if (ONENAND_IS_2PLANE(this)) { 1468 ONENAND_SET_BUFFERRAM1(this); 1469 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage); 1470 } 1471 1472 if (ret) { 1473 printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret); 1474 break; 1475 } 1476 1477 /* Only check verify write turn on */ 1478 ret = onenand_verify(mtd, buf, to, thislen); 1479 if (ret) { 1480 printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret); 1481 break; 1482 } 1483 1484 written += thislen; 1485 1486 if (written == len) 1487 break; 1488 1489 column = 0; 1490 to += thislen; 1491 buf += thislen; 1492 } 1493 1494 ops->retlen = written; 1495 1496 return ret; 1497 } 1498 1499 /** 1500 * onenand_write_oob_nolock - [INTERN] OneNAND write out-of-band 1501 * @param mtd MTD device structure 1502 * @param to offset to write to 1503 * @param len number of bytes to write 1504 * @param retlen pointer to variable to store the number of written bytes 1505 * @param buf the data to write 1506 * @param mode operation mode 1507 * 1508 * OneNAND write out-of-band 1509 */ 1510 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to, 1511 struct mtd_oob_ops *ops) 1512 { 1513 struct onenand_chip *this = mtd->priv; 1514 int column, ret = 0, oobsize; 1515 int written = 0, oobcmd; 1516 u_char *oobbuf; 1517 size_t len = ops->ooblen; 1518 const u_char *buf = ops->oobbuf; 1519 unsigned int mode = ops->mode; 1520 1521 to += ops->ooboffs; 1522 1523 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len); 1524 1525 /* Initialize retlen, in case of early exit */ 1526 ops->oobretlen = 0; 1527 1528 if (mode == MTD_OPS_AUTO_OOB) 1529 oobsize = this->ecclayout->oobavail; 1530 else 1531 oobsize = mtd->oobsize; 1532 1533 column = to & (mtd->oobsize - 1); 1534 1535 if (unlikely(column >= oobsize)) { 1536 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n"); 1537 return -EINVAL; 1538 } 1539 1540 /* For compatibility with NAND: Do not allow write past end of page */ 1541 if (unlikely(column + len > oobsize)) { 1542 printk(KERN_ERR "onenand_write_oob_nolock: " 1543 "Attempt to write past end of page\n"); 1544 return -EINVAL; 1545 } 1546 1547 /* Do not allow reads past end of device */ 1548 if (unlikely(to >= mtd->size || 1549 column + len > ((mtd->size >> this->page_shift) - 1550 (to >> this->page_shift)) * oobsize)) { 1551 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n"); 1552 return -EINVAL; 1553 } 1554 1555 oobbuf = this->oob_buf; 1556 1557 oobcmd = ONENAND_IS_4KB_PAGE(this) ? 1558 ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB; 1559 1560 /* Loop until all data write */ 1561 while (written < len) { 1562 int thislen = min_t(int, oobsize, len - written); 1563 1564 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize); 1565 1566 /* We send data to spare ram with oobsize 1567 * to prevent byte access */ 1568 memset(oobbuf, 0xff, mtd->oobsize); 1569 if (mode == MTD_OPS_AUTO_OOB) 1570 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen); 1571 else 1572 memcpy(oobbuf + column, buf, thislen); 1573 this->write_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 1574 1575 if (ONENAND_IS_4KB_PAGE(this)) { 1576 /* Set main area of DataRAM to 0xff*/ 1577 memset(this->page_buf, 0xff, mtd->writesize); 1578 this->write_bufferram(mtd, 0, ONENAND_DATARAM, 1579 this->page_buf, 0, mtd->writesize); 1580 } 1581 1582 this->command(mtd, oobcmd, to, mtd->oobsize); 1583 1584 onenand_update_bufferram(mtd, to, 0); 1585 if (ONENAND_IS_2PLANE(this)) { 1586 ONENAND_SET_BUFFERRAM1(this); 1587 onenand_update_bufferram(mtd, to + this->writesize, 0); 1588 } 1589 1590 ret = this->wait(mtd, FL_WRITING); 1591 if (ret) { 1592 printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret); 1593 break; 1594 } 1595 1596 ret = onenand_verify_oob(mtd, oobbuf, to); 1597 if (ret) { 1598 printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret); 1599 break; 1600 } 1601 1602 written += thislen; 1603 if (written == len) 1604 break; 1605 1606 to += mtd->writesize; 1607 buf += thislen; 1608 column = 0; 1609 } 1610 1611 ops->oobretlen = written; 1612 1613 return ret; 1614 } 1615 1616 /** 1617 * onenand_write - [MTD Interface] compability function for onenand_write_ecc 1618 * @param mtd MTD device structure 1619 * @param to offset to write to 1620 * @param len number of bytes to write 1621 * @param retlen pointer to variable to store the number of written bytes 1622 * @param buf the data to write 1623 * 1624 * Write with ECC 1625 */ 1626 int onenand_write(struct mtd_info *mtd, loff_t to, size_t len, 1627 size_t * retlen, const u_char * buf) 1628 { 1629 struct mtd_oob_ops ops = { 1630 .len = len, 1631 .ooblen = 0, 1632 .datbuf = (u_char *) buf, 1633 .oobbuf = NULL, 1634 }; 1635 int ret; 1636 1637 onenand_get_device(mtd, FL_WRITING); 1638 ret = onenand_write_ops_nolock(mtd, to, &ops); 1639 onenand_release_device(mtd); 1640 1641 *retlen = ops.retlen; 1642 return ret; 1643 } 1644 1645 /** 1646 * onenand_write_oob - [MTD Interface] OneNAND write out-of-band 1647 * @param mtd MTD device structure 1648 * @param to offset to write to 1649 * @param ops oob operation description structure 1650 * 1651 * OneNAND write main and/or out-of-band 1652 */ 1653 int onenand_write_oob(struct mtd_info *mtd, loff_t to, 1654 struct mtd_oob_ops *ops) 1655 { 1656 int ret; 1657 1658 switch (ops->mode) { 1659 case MTD_OPS_PLACE_OOB: 1660 case MTD_OPS_AUTO_OOB: 1661 break; 1662 case MTD_OPS_RAW: 1663 /* Not implemented yet */ 1664 default: 1665 return -EINVAL; 1666 } 1667 1668 onenand_get_device(mtd, FL_WRITING); 1669 if (ops->datbuf) 1670 ret = onenand_write_ops_nolock(mtd, to, ops); 1671 else 1672 ret = onenand_write_oob_nolock(mtd, to, ops); 1673 onenand_release_device(mtd); 1674 1675 return ret; 1676 1677 } 1678 1679 /** 1680 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad 1681 * @param mtd MTD device structure 1682 * @param ofs offset from device start 1683 * @param allowbbt 1, if its allowed to access the bbt area 1684 * 1685 * Check, if the block is bad, Either by reading the bad block table or 1686 * calling of the scan function. 1687 */ 1688 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt) 1689 { 1690 struct onenand_chip *this = mtd->priv; 1691 struct bbm_info *bbm = this->bbm; 1692 1693 /* Return info from the table */ 1694 return bbm->isbad_bbt(mtd, ofs, allowbbt); 1695 } 1696 1697 1698 /** 1699 * onenand_erase - [MTD Interface] erase block(s) 1700 * @param mtd MTD device structure 1701 * @param instr erase instruction 1702 * 1703 * Erase one ore more blocks 1704 */ 1705 int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) 1706 { 1707 struct onenand_chip *this = mtd->priv; 1708 unsigned int block_size; 1709 loff_t addr = instr->addr; 1710 unsigned int len = instr->len; 1711 int ret = 0, i; 1712 struct mtd_erase_region_info *region = NULL; 1713 unsigned int region_end = 0; 1714 1715 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", 1716 (unsigned int) addr, len); 1717 1718 if (FLEXONENAND(this)) { 1719 /* Find the eraseregion of this address */ 1720 i = flexonenand_region(mtd, addr); 1721 region = &mtd->eraseregions[i]; 1722 1723 block_size = region->erasesize; 1724 region_end = region->offset 1725 + region->erasesize * region->numblocks; 1726 1727 /* Start address within region must align on block boundary. 1728 * Erase region's start offset is always block start address. 1729 */ 1730 if (unlikely((addr - region->offset) & (block_size - 1))) { 1731 MTDDEBUG(MTD_DEBUG_LEVEL0, "onenand_erase:" 1732 " Unaligned address\n"); 1733 return -EINVAL; 1734 } 1735 } else { 1736 block_size = 1 << this->erase_shift; 1737 1738 /* Start address must align on block boundary */ 1739 if (unlikely(addr & (block_size - 1))) { 1740 MTDDEBUG(MTD_DEBUG_LEVEL0, "onenand_erase:" 1741 "Unaligned address\n"); 1742 return -EINVAL; 1743 } 1744 } 1745 1746 /* Length must align on block boundary */ 1747 if (unlikely(len & (block_size - 1))) { 1748 MTDDEBUG (MTD_DEBUG_LEVEL0, 1749 "onenand_erase: Length not block aligned\n"); 1750 return -EINVAL; 1751 } 1752 1753 /* Grab the lock and see if the device is available */ 1754 onenand_get_device(mtd, FL_ERASING); 1755 1756 /* Loop throught the pages */ 1757 instr->state = MTD_ERASING; 1758 1759 while (len) { 1760 1761 /* Check if we have a bad block, we do not erase bad blocks */ 1762 if (instr->priv == 0 && onenand_block_isbad_nolock(mtd, addr, 0)) { 1763 printk(KERN_WARNING "onenand_erase: attempt to erase" 1764 " a bad block at addr 0x%08x\n", 1765 (unsigned int) addr); 1766 instr->state = MTD_ERASE_FAILED; 1767 goto erase_exit; 1768 } 1769 1770 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); 1771 1772 onenand_invalidate_bufferram(mtd, addr, block_size); 1773 1774 ret = this->wait(mtd, FL_ERASING); 1775 /* Check, if it is write protected */ 1776 if (ret) { 1777 if (ret == -EPERM) 1778 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: " 1779 "Device is write protected!!!\n"); 1780 else 1781 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: " 1782 "Failed erase, block %d\n", 1783 onenand_block(this, addr)); 1784 instr->state = MTD_ERASE_FAILED; 1785 instr->fail_addr = addr; 1786 1787 goto erase_exit; 1788 } 1789 1790 len -= block_size; 1791 addr += block_size; 1792 1793 if (addr == region_end) { 1794 if (!len) 1795 break; 1796 region++; 1797 1798 block_size = region->erasesize; 1799 region_end = region->offset 1800 + region->erasesize * region->numblocks; 1801 1802 if (len & (block_size - 1)) { 1803 /* This has been checked at MTD 1804 * partitioning level. */ 1805 printk("onenand_erase: Unaligned address\n"); 1806 goto erase_exit; 1807 } 1808 } 1809 } 1810 1811 instr->state = MTD_ERASE_DONE; 1812 1813 erase_exit: 1814 1815 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; 1816 /* Do call back function */ 1817 if (!ret) 1818 mtd_erase_callback(instr); 1819 1820 /* Deselect and wake up anyone waiting on the device */ 1821 onenand_release_device(mtd); 1822 1823 return ret; 1824 } 1825 1826 /** 1827 * onenand_sync - [MTD Interface] sync 1828 * @param mtd MTD device structure 1829 * 1830 * Sync is actually a wait for chip ready function 1831 */ 1832 void onenand_sync(struct mtd_info *mtd) 1833 { 1834 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_sync: called\n"); 1835 1836 /* Grab the lock and see if the device is available */ 1837 onenand_get_device(mtd, FL_SYNCING); 1838 1839 /* Release it and go back */ 1840 onenand_release_device(mtd); 1841 } 1842 1843 /** 1844 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad 1845 * @param mtd MTD device structure 1846 * @param ofs offset relative to mtd start 1847 * 1848 * Check whether the block is bad 1849 */ 1850 int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs) 1851 { 1852 int ret; 1853 1854 /* Check for invalid offset */ 1855 if (ofs > mtd->size) 1856 return -EINVAL; 1857 1858 onenand_get_device(mtd, FL_READING); 1859 ret = onenand_block_isbad_nolock(mtd,ofs, 0); 1860 onenand_release_device(mtd); 1861 return ret; 1862 } 1863 1864 /** 1865 * onenand_default_block_markbad - [DEFAULT] mark a block bad 1866 * @param mtd MTD device structure 1867 * @param ofs offset from device start 1868 * 1869 * This is the default implementation, which can be overridden by 1870 * a hardware specific driver. 1871 */ 1872 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) 1873 { 1874 struct onenand_chip *this = mtd->priv; 1875 struct bbm_info *bbm = this->bbm; 1876 u_char buf[2] = {0, 0}; 1877 struct mtd_oob_ops ops = { 1878 .mode = MTD_OPS_PLACE_OOB, 1879 .ooblen = 2, 1880 .oobbuf = buf, 1881 .ooboffs = 0, 1882 }; 1883 int block; 1884 1885 /* Get block number */ 1886 block = onenand_block(this, ofs); 1887 if (bbm->bbt) 1888 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); 1889 1890 /* We write two bytes, so we dont have to mess with 16 bit access */ 1891 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01); 1892 return onenand_write_oob_nolock(mtd, ofs, &ops); 1893 } 1894 1895 /** 1896 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad 1897 * @param mtd MTD device structure 1898 * @param ofs offset relative to mtd start 1899 * 1900 * Mark the block as bad 1901 */ 1902 int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs) 1903 { 1904 int ret; 1905 1906 ret = onenand_block_isbad(mtd, ofs); 1907 if (ret) { 1908 /* If it was bad already, return success and do nothing */ 1909 if (ret > 0) 1910 return 0; 1911 return ret; 1912 } 1913 1914 ret = mtd_block_markbad(mtd, ofs); 1915 return ret; 1916 } 1917 1918 /** 1919 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s) 1920 * @param mtd MTD device structure 1921 * @param ofs offset relative to mtd start 1922 * @param len number of bytes to lock or unlock 1923 * @param cmd lock or unlock command 1924 * 1925 * Lock or unlock one or more blocks 1926 */ 1927 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd) 1928 { 1929 struct onenand_chip *this = mtd->priv; 1930 int start, end, block, value, status; 1931 1932 start = onenand_block(this, ofs); 1933 end = onenand_block(this, ofs + len); 1934 1935 /* Continuous lock scheme */ 1936 if (this->options & ONENAND_HAS_CONT_LOCK) { 1937 /* Set start block address */ 1938 this->write_word(start, 1939 this->base + ONENAND_REG_START_BLOCK_ADDRESS); 1940 /* Set end block address */ 1941 this->write_word(end - 1, 1942 this->base + ONENAND_REG_END_BLOCK_ADDRESS); 1943 /* Write unlock command */ 1944 this->command(mtd, cmd, 0, 0); 1945 1946 /* There's no return value */ 1947 this->wait(mtd, FL_UNLOCKING); 1948 1949 /* Sanity check */ 1950 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 1951 & ONENAND_CTRL_ONGO) 1952 continue; 1953 1954 /* Check lock status */ 1955 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 1956 if (!(status & ONENAND_WP_US)) 1957 printk(KERN_ERR "wp status = 0x%x\n", status); 1958 1959 return 0; 1960 } 1961 1962 /* Block lock scheme */ 1963 for (block = start; block < end; block++) { 1964 /* Set block address */ 1965 value = onenand_block_address(this, block); 1966 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 1967 /* Select DataRAM for DDP */ 1968 value = onenand_bufferram_address(this, block); 1969 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 1970 1971 /* Set start block address */ 1972 this->write_word(block, 1973 this->base + ONENAND_REG_START_BLOCK_ADDRESS); 1974 /* Write unlock command */ 1975 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0); 1976 1977 /* There's no return value */ 1978 this->wait(mtd, FL_UNLOCKING); 1979 1980 /* Sanity check */ 1981 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 1982 & ONENAND_CTRL_ONGO) 1983 continue; 1984 1985 /* Check lock status */ 1986 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 1987 if (!(status & ONENAND_WP_US)) 1988 printk(KERN_ERR "block = %d, wp status = 0x%x\n", 1989 block, status); 1990 } 1991 1992 return 0; 1993 } 1994 1995 #ifdef ONENAND_LINUX 1996 /** 1997 * onenand_lock - [MTD Interface] Lock block(s) 1998 * @param mtd MTD device structure 1999 * @param ofs offset relative to mtd start 2000 * @param len number of bytes to unlock 2001 * 2002 * Lock one or more blocks 2003 */ 2004 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len) 2005 { 2006 int ret; 2007 2008 onenand_get_device(mtd, FL_LOCKING); 2009 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK); 2010 onenand_release_device(mtd); 2011 return ret; 2012 } 2013 2014 /** 2015 * onenand_unlock - [MTD Interface] Unlock block(s) 2016 * @param mtd MTD device structure 2017 * @param ofs offset relative to mtd start 2018 * @param len number of bytes to unlock 2019 * 2020 * Unlock one or more blocks 2021 */ 2022 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) 2023 { 2024 int ret; 2025 2026 onenand_get_device(mtd, FL_LOCKING); 2027 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); 2028 onenand_release_device(mtd); 2029 return ret; 2030 } 2031 #endif 2032 2033 /** 2034 * onenand_check_lock_status - [OneNAND Interface] Check lock status 2035 * @param this onenand chip data structure 2036 * 2037 * Check lock status 2038 */ 2039 static int onenand_check_lock_status(struct onenand_chip *this) 2040 { 2041 unsigned int value, block, status; 2042 unsigned int end; 2043 2044 end = this->chipsize >> this->erase_shift; 2045 for (block = 0; block < end; block++) { 2046 /* Set block address */ 2047 value = onenand_block_address(this, block); 2048 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 2049 /* Select DataRAM for DDP */ 2050 value = onenand_bufferram_address(this, block); 2051 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 2052 /* Set start block address */ 2053 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2054 2055 /* Check lock status */ 2056 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2057 if (!(status & ONENAND_WP_US)) { 2058 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status); 2059 return 0; 2060 } 2061 } 2062 2063 return 1; 2064 } 2065 2066 /** 2067 * onenand_unlock_all - [OneNAND Interface] unlock all blocks 2068 * @param mtd MTD device structure 2069 * 2070 * Unlock all blocks 2071 */ 2072 static void onenand_unlock_all(struct mtd_info *mtd) 2073 { 2074 struct onenand_chip *this = mtd->priv; 2075 loff_t ofs = 0; 2076 size_t len = mtd->size; 2077 2078 if (this->options & ONENAND_HAS_UNLOCK_ALL) { 2079 /* Set start block address */ 2080 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2081 /* Write unlock command */ 2082 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0); 2083 2084 /* There's no return value */ 2085 this->wait(mtd, FL_LOCKING); 2086 2087 /* Sanity check */ 2088 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2089 & ONENAND_CTRL_ONGO) 2090 continue; 2091 2092 /* Check lock status */ 2093 if (onenand_check_lock_status(this)) 2094 return; 2095 2096 /* Workaround for all block unlock in DDP */ 2097 if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) { 2098 /* All blocks on another chip */ 2099 ofs = this->chipsize >> 1; 2100 len = this->chipsize >> 1; 2101 } 2102 } 2103 2104 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); 2105 } 2106 2107 2108 /** 2109 * onenand_check_features - Check and set OneNAND features 2110 * @param mtd MTD data structure 2111 * 2112 * Check and set OneNAND features 2113 * - lock scheme 2114 * - two plane 2115 */ 2116 static void onenand_check_features(struct mtd_info *mtd) 2117 { 2118 struct onenand_chip *this = mtd->priv; 2119 unsigned int density, process; 2120 2121 /* Lock scheme depends on density and process */ 2122 density = onenand_get_density(this->device_id); 2123 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT; 2124 2125 /* Lock scheme */ 2126 switch (density) { 2127 case ONENAND_DEVICE_DENSITY_4Gb: 2128 if (ONENAND_IS_DDP(this)) 2129 this->options |= ONENAND_HAS_2PLANE; 2130 else 2131 this->options |= ONENAND_HAS_4KB_PAGE; 2132 2133 case ONENAND_DEVICE_DENSITY_2Gb: 2134 /* 2Gb DDP don't have 2 plane */ 2135 if (!ONENAND_IS_DDP(this)) 2136 this->options |= ONENAND_HAS_2PLANE; 2137 this->options |= ONENAND_HAS_UNLOCK_ALL; 2138 2139 case ONENAND_DEVICE_DENSITY_1Gb: 2140 /* A-Die has all block unlock */ 2141 if (process) 2142 this->options |= ONENAND_HAS_UNLOCK_ALL; 2143 break; 2144 2145 default: 2146 /* Some OneNAND has continuous lock scheme */ 2147 if (!process) 2148 this->options |= ONENAND_HAS_CONT_LOCK; 2149 break; 2150 } 2151 2152 if (ONENAND_IS_MLC(this)) 2153 this->options |= ONENAND_HAS_4KB_PAGE; 2154 2155 if (ONENAND_IS_4KB_PAGE(this)) 2156 this->options &= ~ONENAND_HAS_2PLANE; 2157 2158 if (FLEXONENAND(this)) { 2159 this->options &= ~ONENAND_HAS_CONT_LOCK; 2160 this->options |= ONENAND_HAS_UNLOCK_ALL; 2161 } 2162 2163 if (this->options & ONENAND_HAS_CONT_LOCK) 2164 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n"); 2165 if (this->options & ONENAND_HAS_UNLOCK_ALL) 2166 printk(KERN_DEBUG "Chip support all block unlock\n"); 2167 if (this->options & ONENAND_HAS_2PLANE) 2168 printk(KERN_DEBUG "Chip has 2 plane\n"); 2169 if (this->options & ONENAND_HAS_4KB_PAGE) 2170 printk(KERN_DEBUG "Chip has 4KiB pagesize\n"); 2171 2172 } 2173 2174 /** 2175 * onenand_print_device_info - Print device ID 2176 * @param device device ID 2177 * 2178 * Print device ID 2179 */ 2180 char *onenand_print_device_info(int device, int version) 2181 { 2182 int vcc, demuxed, ddp, density, flexonenand; 2183 char *dev_info = malloc(80); 2184 char *p = dev_info; 2185 2186 vcc = device & ONENAND_DEVICE_VCC_MASK; 2187 demuxed = device & ONENAND_DEVICE_IS_DEMUX; 2188 ddp = device & ONENAND_DEVICE_IS_DDP; 2189 density = onenand_get_density(device); 2190 flexonenand = device & DEVICE_IS_FLEXONENAND; 2191 p += sprintf(dev_info, "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)", 2192 demuxed ? "" : "Muxed ", 2193 flexonenand ? "Flex-" : "", 2194 ddp ? "(DDP)" : "", 2195 (16 << density), vcc ? "2.65/3.3" : "1.8", device); 2196 2197 sprintf(p, "\nOneNAND version = 0x%04x", version); 2198 printk("%s\n", dev_info); 2199 2200 return dev_info; 2201 } 2202 2203 static const struct onenand_manufacturers onenand_manuf_ids[] = { 2204 {ONENAND_MFR_NUMONYX, "Numonyx"}, 2205 {ONENAND_MFR_SAMSUNG, "Samsung"}, 2206 }; 2207 2208 /** 2209 * onenand_check_maf - Check manufacturer ID 2210 * @param manuf manufacturer ID 2211 * 2212 * Check manufacturer ID 2213 */ 2214 static int onenand_check_maf(int manuf) 2215 { 2216 int size = ARRAY_SIZE(onenand_manuf_ids); 2217 int i; 2218 #ifdef ONENAND_DEBUG 2219 char *name; 2220 #endif 2221 2222 for (i = 0; i < size; i++) 2223 if (manuf == onenand_manuf_ids[i].id) 2224 break; 2225 2226 #ifdef ONENAND_DEBUG 2227 if (i < size) 2228 name = onenand_manuf_ids[i].name; 2229 else 2230 name = "Unknown"; 2231 2232 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf); 2233 #endif 2234 2235 return i == size; 2236 } 2237 2238 /** 2239 * flexonenand_get_boundary - Reads the SLC boundary 2240 * @param onenand_info - onenand info structure 2241 * 2242 * Fill up boundary[] field in onenand_chip 2243 **/ 2244 static int flexonenand_get_boundary(struct mtd_info *mtd) 2245 { 2246 struct onenand_chip *this = mtd->priv; 2247 unsigned int die, bdry; 2248 int syscfg, locked; 2249 2250 /* Disable ECC */ 2251 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 2252 this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1); 2253 2254 for (die = 0; die < this->dies; die++) { 2255 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0); 2256 this->wait(mtd, FL_SYNCING); 2257 2258 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0); 2259 this->wait(mtd, FL_READING); 2260 2261 bdry = this->read_word(this->base + ONENAND_DATARAM); 2262 if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3) 2263 locked = 0; 2264 else 2265 locked = 1; 2266 this->boundary[die] = bdry & FLEXONENAND_PI_MASK; 2267 2268 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 2269 this->wait(mtd, FL_RESETING); 2270 2271 printk(KERN_INFO "Die %d boundary: %d%s\n", die, 2272 this->boundary[die], locked ? "(Locked)" : "(Unlocked)"); 2273 } 2274 2275 /* Enable ECC */ 2276 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 2277 return 0; 2278 } 2279 2280 /** 2281 * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info 2282 * boundary[], diesize[], mtd->size, mtd->erasesize, 2283 * mtd->eraseregions 2284 * @param mtd - MTD device structure 2285 */ 2286 static void flexonenand_get_size(struct mtd_info *mtd) 2287 { 2288 struct onenand_chip *this = mtd->priv; 2289 int die, i, eraseshift, density; 2290 int blksperdie, maxbdry; 2291 loff_t ofs; 2292 2293 density = onenand_get_density(this->device_id); 2294 blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift); 2295 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0; 2296 maxbdry = blksperdie - 1; 2297 eraseshift = this->erase_shift - 1; 2298 2299 mtd->numeraseregions = this->dies << 1; 2300 2301 /* This fills up the device boundary */ 2302 flexonenand_get_boundary(mtd); 2303 die = 0; 2304 ofs = 0; 2305 i = -1; 2306 for (; die < this->dies; die++) { 2307 if (!die || this->boundary[die-1] != maxbdry) { 2308 i++; 2309 mtd->eraseregions[i].offset = ofs; 2310 mtd->eraseregions[i].erasesize = 1 << eraseshift; 2311 mtd->eraseregions[i].numblocks = 2312 this->boundary[die] + 1; 2313 ofs += mtd->eraseregions[i].numblocks << eraseshift; 2314 eraseshift++; 2315 } else { 2316 mtd->numeraseregions -= 1; 2317 mtd->eraseregions[i].numblocks += 2318 this->boundary[die] + 1; 2319 ofs += (this->boundary[die] + 1) << (eraseshift - 1); 2320 } 2321 if (this->boundary[die] != maxbdry) { 2322 i++; 2323 mtd->eraseregions[i].offset = ofs; 2324 mtd->eraseregions[i].erasesize = 1 << eraseshift; 2325 mtd->eraseregions[i].numblocks = maxbdry ^ 2326 this->boundary[die]; 2327 ofs += mtd->eraseregions[i].numblocks << eraseshift; 2328 eraseshift--; 2329 } else 2330 mtd->numeraseregions -= 1; 2331 } 2332 2333 /* Expose MLC erase size except when all blocks are SLC */ 2334 mtd->erasesize = 1 << this->erase_shift; 2335 if (mtd->numeraseregions == 1) 2336 mtd->erasesize >>= 1; 2337 2338 printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions); 2339 for (i = 0; i < mtd->numeraseregions; i++) 2340 printk(KERN_INFO "[offset: 0x%08llx, erasesize: 0x%05x," 2341 " numblocks: %04u]\n", mtd->eraseregions[i].offset, 2342 mtd->eraseregions[i].erasesize, 2343 mtd->eraseregions[i].numblocks); 2344 2345 for (die = 0, mtd->size = 0; die < this->dies; die++) { 2346 this->diesize[die] = (loff_t) (blksperdie << this->erase_shift); 2347 this->diesize[die] -= (loff_t) (this->boundary[die] + 1) 2348 << (this->erase_shift - 1); 2349 mtd->size += this->diesize[die]; 2350 } 2351 } 2352 2353 /** 2354 * flexonenand_check_blocks_erased - Check if blocks are erased 2355 * @param mtd_info - mtd info structure 2356 * @param start - first erase block to check 2357 * @param end - last erase block to check 2358 * 2359 * Converting an unerased block from MLC to SLC 2360 * causes byte values to change. Since both data and its ECC 2361 * have changed, reads on the block give uncorrectable error. 2362 * This might lead to the block being detected as bad. 2363 * 2364 * Avoid this by ensuring that the block to be converted is 2365 * erased. 2366 */ 2367 static int flexonenand_check_blocks_erased(struct mtd_info *mtd, 2368 int start, int end) 2369 { 2370 struct onenand_chip *this = mtd->priv; 2371 int i, ret; 2372 int block; 2373 struct mtd_oob_ops ops = { 2374 .mode = MTD_OPS_PLACE_OOB, 2375 .ooboffs = 0, 2376 .ooblen = mtd->oobsize, 2377 .datbuf = NULL, 2378 .oobbuf = this->oob_buf, 2379 }; 2380 loff_t addr; 2381 2382 printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end); 2383 2384 for (block = start; block <= end; block++) { 2385 addr = flexonenand_addr(this, block); 2386 if (onenand_block_isbad_nolock(mtd, addr, 0)) 2387 continue; 2388 2389 /* 2390 * Since main area write results in ECC write to spare, 2391 * it is sufficient to check only ECC bytes for change. 2392 */ 2393 ret = onenand_read_oob_nolock(mtd, addr, &ops); 2394 if (ret) 2395 return ret; 2396 2397 for (i = 0; i < mtd->oobsize; i++) 2398 if (this->oob_buf[i] != 0xff) 2399 break; 2400 2401 if (i != mtd->oobsize) { 2402 printk(KERN_WARNING "Block %d not erased.\n", block); 2403 return 1; 2404 } 2405 } 2406 2407 return 0; 2408 } 2409 2410 /** 2411 * flexonenand_set_boundary - Writes the SLC boundary 2412 * @param mtd - mtd info structure 2413 */ 2414 int flexonenand_set_boundary(struct mtd_info *mtd, int die, 2415 int boundary, int lock) 2416 { 2417 struct onenand_chip *this = mtd->priv; 2418 int ret, density, blksperdie, old, new, thisboundary; 2419 loff_t addr; 2420 2421 if (die >= this->dies) 2422 return -EINVAL; 2423 2424 if (boundary == this->boundary[die]) 2425 return 0; 2426 2427 density = onenand_get_density(this->device_id); 2428 blksperdie = ((16 << density) << 20) >> this->erase_shift; 2429 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0; 2430 2431 if (boundary >= blksperdie) { 2432 printk("flexonenand_set_boundary:" 2433 "Invalid boundary value. " 2434 "Boundary not changed.\n"); 2435 return -EINVAL; 2436 } 2437 2438 /* Check if converting blocks are erased */ 2439 old = this->boundary[die] + (die * this->density_mask); 2440 new = boundary + (die * this->density_mask); 2441 ret = flexonenand_check_blocks_erased(mtd, min(old, new) 2442 + 1, max(old, new)); 2443 if (ret) { 2444 printk(KERN_ERR "flexonenand_set_boundary: Please erase blocks before boundary change\n"); 2445 return ret; 2446 } 2447 2448 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0); 2449 this->wait(mtd, FL_SYNCING); 2450 2451 /* Check is boundary is locked */ 2452 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0); 2453 ret = this->wait(mtd, FL_READING); 2454 2455 thisboundary = this->read_word(this->base + ONENAND_DATARAM); 2456 if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) { 2457 printk(KERN_ERR "flexonenand_set_boundary: boundary locked\n"); 2458 goto out; 2459 } 2460 2461 printk(KERN_INFO "flexonenand_set_boundary: Changing die %d boundary: %d%s\n", 2462 die, boundary, lock ? "(Locked)" : "(Unlocked)"); 2463 2464 boundary &= FLEXONENAND_PI_MASK; 2465 boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT); 2466 2467 addr = die ? this->diesize[0] : 0; 2468 this->command(mtd, ONENAND_CMD_ERASE, addr, 0); 2469 ret = this->wait(mtd, FL_ERASING); 2470 if (ret) { 2471 printk("flexonenand_set_boundary:" 2472 "Failed PI erase for Die %d\n", die); 2473 goto out; 2474 } 2475 2476 this->write_word(boundary, this->base + ONENAND_DATARAM); 2477 this->command(mtd, ONENAND_CMD_PROG, addr, 0); 2478 ret = this->wait(mtd, FL_WRITING); 2479 if (ret) { 2480 printk("flexonenand_set_boundary:" 2481 "Failed PI write for Die %d\n", die); 2482 goto out; 2483 } 2484 2485 this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0); 2486 ret = this->wait(mtd, FL_WRITING); 2487 out: 2488 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND); 2489 this->wait(mtd, FL_RESETING); 2490 if (!ret) 2491 /* Recalculate device size on boundary change*/ 2492 flexonenand_get_size(mtd); 2493 2494 return ret; 2495 } 2496 2497 /** 2498 * onenand_chip_probe - [OneNAND Interface] Probe the OneNAND chip 2499 * @param mtd MTD device structure 2500 * 2501 * OneNAND detection method: 2502 * Compare the the values from command with ones from register 2503 */ 2504 static int onenand_chip_probe(struct mtd_info *mtd) 2505 { 2506 struct onenand_chip *this = mtd->priv; 2507 int bram_maf_id, bram_dev_id, maf_id, dev_id; 2508 int syscfg; 2509 2510 /* Save system configuration 1 */ 2511 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 2512 2513 /* Clear Sync. Burst Read mode to read BootRAM */ 2514 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), 2515 this->base + ONENAND_REG_SYS_CFG1); 2516 2517 /* Send the command for reading device ID from BootRAM */ 2518 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM); 2519 2520 /* Read manufacturer and device IDs from BootRAM */ 2521 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0); 2522 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2); 2523 2524 /* Reset OneNAND to read default register values */ 2525 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM); 2526 2527 /* Wait reset */ 2528 this->wait(mtd, FL_RESETING); 2529 2530 /* Restore system configuration 1 */ 2531 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 2532 2533 /* Check manufacturer ID */ 2534 if (onenand_check_maf(bram_maf_id)) 2535 return -ENXIO; 2536 2537 /* Read manufacturer and device IDs from Register */ 2538 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); 2539 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); 2540 2541 /* Check OneNAND device */ 2542 if (maf_id != bram_maf_id || dev_id != bram_dev_id) 2543 return -ENXIO; 2544 2545 return 0; 2546 } 2547 2548 /** 2549 * onenand_probe - [OneNAND Interface] Probe the OneNAND device 2550 * @param mtd MTD device structure 2551 * 2552 * OneNAND detection method: 2553 * Compare the the values from command with ones from register 2554 */ 2555 int onenand_probe(struct mtd_info *mtd) 2556 { 2557 struct onenand_chip *this = mtd->priv; 2558 int dev_id, ver_id; 2559 int density; 2560 int ret; 2561 2562 ret = this->chip_probe(mtd); 2563 if (ret) 2564 return ret; 2565 2566 /* Read device IDs from Register */ 2567 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); 2568 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); 2569 this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY); 2570 2571 /* Flash device information */ 2572 mtd->name = onenand_print_device_info(dev_id, ver_id); 2573 this->device_id = dev_id; 2574 this->version_id = ver_id; 2575 2576 /* Check OneNAND features */ 2577 onenand_check_features(mtd); 2578 2579 density = onenand_get_density(dev_id); 2580 if (FLEXONENAND(this)) { 2581 this->dies = ONENAND_IS_DDP(this) ? 2 : 1; 2582 /* Maximum possible erase regions */ 2583 mtd->numeraseregions = this->dies << 1; 2584 mtd->eraseregions = malloc(sizeof(struct mtd_erase_region_info) 2585 * (this->dies << 1)); 2586 if (!mtd->eraseregions) 2587 return -ENOMEM; 2588 } 2589 2590 /* 2591 * For Flex-OneNAND, chipsize represents maximum possible device size. 2592 * mtd->size represents the actual device size. 2593 */ 2594 this->chipsize = (16 << density) << 20; 2595 2596 /* OneNAND page size & block size */ 2597 /* The data buffer size is equal to page size */ 2598 mtd->writesize = 2599 this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); 2600 /* We use the full BufferRAM */ 2601 if (ONENAND_IS_4KB_PAGE(this)) 2602 mtd->writesize <<= 1; 2603 2604 mtd->oobsize = mtd->writesize >> 5; 2605 /* Pagers per block is always 64 in OneNAND */ 2606 mtd->erasesize = mtd->writesize << 6; 2607 /* 2608 * Flex-OneNAND SLC area has 64 pages per block. 2609 * Flex-OneNAND MLC area has 128 pages per block. 2610 * Expose MLC erase size to find erase_shift and page_mask. 2611 */ 2612 if (FLEXONENAND(this)) 2613 mtd->erasesize <<= 1; 2614 2615 this->erase_shift = ffs(mtd->erasesize) - 1; 2616 this->page_shift = ffs(mtd->writesize) - 1; 2617 this->ppb_shift = (this->erase_shift - this->page_shift); 2618 this->page_mask = (mtd->erasesize / mtd->writesize) - 1; 2619 /* Set density mask. it is used for DDP */ 2620 if (ONENAND_IS_DDP(this)) 2621 this->density_mask = this->chipsize >> (this->erase_shift + 1); 2622 /* It's real page size */ 2623 this->writesize = mtd->writesize; 2624 2625 /* REVIST: Multichip handling */ 2626 2627 if (FLEXONENAND(this)) 2628 flexonenand_get_size(mtd); 2629 else 2630 mtd->size = this->chipsize; 2631 2632 mtd->flags = MTD_CAP_NANDFLASH; 2633 mtd->_erase = onenand_erase; 2634 mtd->_read = onenand_read; 2635 mtd->_write = onenand_write; 2636 mtd->_read_oob = onenand_read_oob; 2637 mtd->_write_oob = onenand_write_oob; 2638 mtd->_sync = onenand_sync; 2639 mtd->_block_isbad = onenand_block_isbad; 2640 mtd->_block_markbad = onenand_block_markbad; 2641 2642 return 0; 2643 } 2644 2645 /** 2646 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device 2647 * @param mtd MTD device structure 2648 * @param maxchips Number of chips to scan for 2649 * 2650 * This fills out all the not initialized function pointers 2651 * with the defaults. 2652 * The flash ID is read and the mtd/chip structures are 2653 * filled with the appropriate values. 2654 */ 2655 int onenand_scan(struct mtd_info *mtd, int maxchips) 2656 { 2657 int i; 2658 struct onenand_chip *this = mtd->priv; 2659 2660 if (!this->read_word) 2661 this->read_word = onenand_readw; 2662 if (!this->write_word) 2663 this->write_word = onenand_writew; 2664 2665 if (!this->command) 2666 this->command = onenand_command; 2667 if (!this->wait) 2668 this->wait = onenand_wait; 2669 if (!this->bbt_wait) 2670 this->bbt_wait = onenand_bbt_wait; 2671 2672 if (!this->read_bufferram) 2673 this->read_bufferram = onenand_read_bufferram; 2674 if (!this->write_bufferram) 2675 this->write_bufferram = onenand_write_bufferram; 2676 2677 if (!this->chip_probe) 2678 this->chip_probe = onenand_chip_probe; 2679 2680 if (!this->block_markbad) 2681 this->block_markbad = onenand_default_block_markbad; 2682 if (!this->scan_bbt) 2683 this->scan_bbt = onenand_default_bbt; 2684 2685 if (onenand_probe(mtd)) 2686 return -ENXIO; 2687 2688 /* Set Sync. Burst Read after probing */ 2689 if (this->mmcontrol) { 2690 printk(KERN_INFO "OneNAND Sync. Burst Read support\n"); 2691 this->read_bufferram = onenand_sync_read_bufferram; 2692 } 2693 2694 /* Allocate buffers, if necessary */ 2695 if (!this->page_buf) { 2696 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL); 2697 if (!this->page_buf) { 2698 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n"); 2699 return -ENOMEM; 2700 } 2701 this->options |= ONENAND_PAGEBUF_ALLOC; 2702 } 2703 if (!this->oob_buf) { 2704 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL); 2705 if (!this->oob_buf) { 2706 printk(KERN_ERR "onenand_scan: Can't allocate oob_buf\n"); 2707 if (this->options & ONENAND_PAGEBUF_ALLOC) { 2708 this->options &= ~ONENAND_PAGEBUF_ALLOC; 2709 kfree(this->page_buf); 2710 } 2711 return -ENOMEM; 2712 } 2713 this->options |= ONENAND_OOBBUF_ALLOC; 2714 } 2715 2716 this->state = FL_READY; 2717 2718 /* 2719 * Allow subpage writes up to oobsize. 2720 */ 2721 switch (mtd->oobsize) { 2722 case 128: 2723 this->ecclayout = &onenand_oob_128; 2724 mtd->subpage_sft = 0; 2725 break; 2726 2727 case 64: 2728 this->ecclayout = &onenand_oob_64; 2729 mtd->subpage_sft = 2; 2730 break; 2731 2732 case 32: 2733 this->ecclayout = &onenand_oob_32; 2734 mtd->subpage_sft = 1; 2735 break; 2736 2737 default: 2738 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n", 2739 mtd->oobsize); 2740 mtd->subpage_sft = 0; 2741 /* To prevent kernel oops */ 2742 this->ecclayout = &onenand_oob_32; 2743 break; 2744 } 2745 2746 this->subpagesize = mtd->writesize >> mtd->subpage_sft; 2747 2748 /* 2749 * The number of bytes available for a client to place data into 2750 * the out of band area 2751 */ 2752 this->ecclayout->oobavail = 0; 2753 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && 2754 this->ecclayout->oobfree[i].length; i++) 2755 this->ecclayout->oobavail += 2756 this->ecclayout->oobfree[i].length; 2757 mtd->oobavail = this->ecclayout->oobavail; 2758 2759 mtd->ecclayout = this->ecclayout; 2760 2761 /* Unlock whole block */ 2762 onenand_unlock_all(mtd); 2763 2764 return this->scan_bbt(mtd); 2765 } 2766 2767 /** 2768 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device 2769 * @param mtd MTD device structure 2770 */ 2771 void onenand_release(struct mtd_info *mtd) 2772 { 2773 } 2774