nand_spl_load_image(uint32_t offs,unsigned int size,void * dst)1*a430fa06SMiquel Raynal int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
2*a430fa06SMiquel Raynal {
3*a430fa06SMiquel Raynal unsigned int block, lastblock;
4*a430fa06SMiquel Raynal unsigned int page, page_offset;
5*a430fa06SMiquel Raynal
6*a430fa06SMiquel Raynal /* offs has to be aligned to a page address! */
7*a430fa06SMiquel Raynal block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
8*a430fa06SMiquel Raynal lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
9*a430fa06SMiquel Raynal page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
10*a430fa06SMiquel Raynal page_offset = offs % CONFIG_SYS_NAND_PAGE_SIZE;
11*a430fa06SMiquel Raynal
12*a430fa06SMiquel Raynal while (block <= lastblock) {
13*a430fa06SMiquel Raynal if (!nand_is_bad_block(block)) {
14*a430fa06SMiquel Raynal /* Skip bad blocks */
15*a430fa06SMiquel Raynal while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
16*a430fa06SMiquel Raynal nand_read_page(block, page, dst);
17*a430fa06SMiquel Raynal /*
18*a430fa06SMiquel Raynal * When offs is not aligned to page address the
19*a430fa06SMiquel Raynal * extra offset is copied to dst as well. Copy
20*a430fa06SMiquel Raynal * the image such that its first byte will be
21*a430fa06SMiquel Raynal * at the dst.
22*a430fa06SMiquel Raynal */
23*a430fa06SMiquel Raynal if (unlikely(page_offset)) {
24*a430fa06SMiquel Raynal memmove(dst, dst + page_offset,
25*a430fa06SMiquel Raynal CONFIG_SYS_NAND_PAGE_SIZE);
26*a430fa06SMiquel Raynal dst = (void *)((int)dst - page_offset);
27*a430fa06SMiquel Raynal page_offset = 0;
28*a430fa06SMiquel Raynal }
29*a430fa06SMiquel Raynal dst += CONFIG_SYS_NAND_PAGE_SIZE;
30*a430fa06SMiquel Raynal page++;
31*a430fa06SMiquel Raynal }
32*a430fa06SMiquel Raynal
33*a430fa06SMiquel Raynal page = 0;
34*a430fa06SMiquel Raynal } else {
35*a430fa06SMiquel Raynal lastblock++;
36*a430fa06SMiquel Raynal }
37*a430fa06SMiquel Raynal
38*a430fa06SMiquel Raynal block++;
39*a430fa06SMiquel Raynal }
40*a430fa06SMiquel Raynal
41*a430fa06SMiquel Raynal return 0;
42*a430fa06SMiquel Raynal }
43*a430fa06SMiquel Raynal
44*a430fa06SMiquel Raynal #ifdef CONFIG_SPL_UBI
45*a430fa06SMiquel Raynal /*
46*a430fa06SMiquel Raynal * Temporary storage for non NAND page aligned and non NAND page sized
47*a430fa06SMiquel Raynal * reads. Note: This does not support runtime detected FLASH yet, but
48*a430fa06SMiquel Raynal * that should be reasonably easy to fix by making the buffer large
49*a430fa06SMiquel Raynal * enough :)
50*a430fa06SMiquel Raynal */
51*a430fa06SMiquel Raynal static u8 scratch_buf[CONFIG_SYS_NAND_PAGE_SIZE];
52*a430fa06SMiquel Raynal
53*a430fa06SMiquel Raynal /**
54*a430fa06SMiquel Raynal * nand_spl_read_block - Read data from physical eraseblock into a buffer
55*a430fa06SMiquel Raynal * @block: Number of the physical eraseblock
56*a430fa06SMiquel Raynal * @offset: Data offset from the start of @peb
57*a430fa06SMiquel Raynal * @len: Data size to read
58*a430fa06SMiquel Raynal * @dst: Address of the destination buffer
59*a430fa06SMiquel Raynal *
60*a430fa06SMiquel Raynal * This could be further optimized if we'd have a subpage read
61*a430fa06SMiquel Raynal * function in the simple code. On NAND which allows subpage reads
62*a430fa06SMiquel Raynal * this would spare quite some time to readout e.g. the VID header of
63*a430fa06SMiquel Raynal * UBI.
64*a430fa06SMiquel Raynal *
65*a430fa06SMiquel Raynal * Notes:
66*a430fa06SMiquel Raynal * @offset + @len are not allowed to be larger than a physical
67*a430fa06SMiquel Raynal * erase block. No sanity check done for simplicity reasons.
68*a430fa06SMiquel Raynal *
69*a430fa06SMiquel Raynal * To support runtime detected flash this needs to be extended by
70*a430fa06SMiquel Raynal * information about the actual flash geometry, but thats beyond the
71*a430fa06SMiquel Raynal * scope of this effort and for most applications where fast boot is
72*a430fa06SMiquel Raynal * required it is not an issue anyway.
73*a430fa06SMiquel Raynal */
nand_spl_read_block(int block,int offset,int len,void * dst)74*a430fa06SMiquel Raynal int nand_spl_read_block(int block, int offset, int len, void *dst)
75*a430fa06SMiquel Raynal {
76*a430fa06SMiquel Raynal int page, read;
77*a430fa06SMiquel Raynal
78*a430fa06SMiquel Raynal /* Calculate the page number */
79*a430fa06SMiquel Raynal page = offset / CONFIG_SYS_NAND_PAGE_SIZE;
80*a430fa06SMiquel Raynal
81*a430fa06SMiquel Raynal /* Offset to the start of a flash page */
82*a430fa06SMiquel Raynal offset = offset % CONFIG_SYS_NAND_PAGE_SIZE;
83*a430fa06SMiquel Raynal
84*a430fa06SMiquel Raynal while (len) {
85*a430fa06SMiquel Raynal /*
86*a430fa06SMiquel Raynal * Non page aligned reads go to the scratch buffer.
87*a430fa06SMiquel Raynal * Page aligned reads go directly to the destination.
88*a430fa06SMiquel Raynal */
89*a430fa06SMiquel Raynal if (offset || len < CONFIG_SYS_NAND_PAGE_SIZE) {
90*a430fa06SMiquel Raynal nand_read_page(block, page, scratch_buf);
91*a430fa06SMiquel Raynal read = min(len, CONFIG_SYS_NAND_PAGE_SIZE - offset);
92*a430fa06SMiquel Raynal memcpy(dst, scratch_buf + offset, read);
93*a430fa06SMiquel Raynal offset = 0;
94*a430fa06SMiquel Raynal } else {
95*a430fa06SMiquel Raynal nand_read_page(block, page, dst);
96*a430fa06SMiquel Raynal read = CONFIG_SYS_NAND_PAGE_SIZE;
97*a430fa06SMiquel Raynal }
98*a430fa06SMiquel Raynal page++;
99*a430fa06SMiquel Raynal len -= read;
100*a430fa06SMiquel Raynal dst += read;
101*a430fa06SMiquel Raynal }
102*a430fa06SMiquel Raynal return 0;
103*a430fa06SMiquel Raynal }
104*a430fa06SMiquel Raynal #endif
105