1*a430fa06SMiquel Raynal /* 2*a430fa06SMiquel Raynal * Genericish driver for memory mapped NAND devices 3*a430fa06SMiquel Raynal * 4*a430fa06SMiquel Raynal * Copyright (c) 2006-2009 Analog Devices Inc. 5*a430fa06SMiquel Raynal * Licensed under the GPL-2 or later. 6*a430fa06SMiquel Raynal */ 7*a430fa06SMiquel Raynal 8*a430fa06SMiquel Raynal /* Your board must implement the following macros: 9*a430fa06SMiquel Raynal * NAND_PLAT_WRITE_CMD(chip, cmd) 10*a430fa06SMiquel Raynal * NAND_PLAT_WRITE_ADR(chip, cmd) 11*a430fa06SMiquel Raynal * NAND_PLAT_INIT() 12*a430fa06SMiquel Raynal * 13*a430fa06SMiquel Raynal * It may also implement the following: 14*a430fa06SMiquel Raynal * NAND_PLAT_DEV_READY(chip) 15*a430fa06SMiquel Raynal */ 16*a430fa06SMiquel Raynal 17*a430fa06SMiquel Raynal #include <common.h> 18*a430fa06SMiquel Raynal #include <asm/io.h> 19*a430fa06SMiquel Raynal #ifdef NAND_PLAT_GPIO_DEV_READY 20*a430fa06SMiquel Raynal # include <asm/gpio.h> 21*a430fa06SMiquel Raynal # define NAND_PLAT_DEV_READY(chip) gpio_get_value(NAND_PLAT_GPIO_DEV_READY) 22*a430fa06SMiquel Raynal #endif 23*a430fa06SMiquel Raynal 24*a430fa06SMiquel Raynal #include <nand.h> 25*a430fa06SMiquel Raynal plat_cmd_ctrl(struct mtd_info * mtd,int cmd,unsigned int ctrl)26*a430fa06SMiquel Raynalstatic void plat_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) 27*a430fa06SMiquel Raynal { 28*a430fa06SMiquel Raynal struct nand_chip *this = mtd_to_nand(mtd); 29*a430fa06SMiquel Raynal 30*a430fa06SMiquel Raynal if (cmd == NAND_CMD_NONE) 31*a430fa06SMiquel Raynal return; 32*a430fa06SMiquel Raynal 33*a430fa06SMiquel Raynal if (ctrl & NAND_CLE) 34*a430fa06SMiquel Raynal NAND_PLAT_WRITE_CMD(this, cmd); 35*a430fa06SMiquel Raynal else 36*a430fa06SMiquel Raynal NAND_PLAT_WRITE_ADR(this, cmd); 37*a430fa06SMiquel Raynal } 38*a430fa06SMiquel Raynal 39*a430fa06SMiquel Raynal #ifdef NAND_PLAT_DEV_READY plat_dev_ready(struct mtd_info * mtd)40*a430fa06SMiquel Raynalstatic int plat_dev_ready(struct mtd_info *mtd) 41*a430fa06SMiquel Raynal { 42*a430fa06SMiquel Raynal return NAND_PLAT_DEV_READY((struct nand_chip *)mtd_to_nand(mtd)); 43*a430fa06SMiquel Raynal } 44*a430fa06SMiquel Raynal #else 45*a430fa06SMiquel Raynal # define plat_dev_ready NULL 46*a430fa06SMiquel Raynal #endif 47*a430fa06SMiquel Raynal board_nand_init(struct nand_chip * nand)48*a430fa06SMiquel Raynalint board_nand_init(struct nand_chip *nand) 49*a430fa06SMiquel Raynal { 50*a430fa06SMiquel Raynal #ifdef NAND_PLAT_GPIO_DEV_READY 51*a430fa06SMiquel Raynal gpio_request(NAND_PLAT_GPIO_DEV_READY, "nand-plat"); 52*a430fa06SMiquel Raynal gpio_direction_input(NAND_PLAT_GPIO_DEV_READY); 53*a430fa06SMiquel Raynal #endif 54*a430fa06SMiquel Raynal 55*a430fa06SMiquel Raynal #ifdef NAND_PLAT_INIT 56*a430fa06SMiquel Raynal NAND_PLAT_INIT(); 57*a430fa06SMiquel Raynal #endif 58*a430fa06SMiquel Raynal 59*a430fa06SMiquel Raynal nand->cmd_ctrl = plat_cmd_ctrl; 60*a430fa06SMiquel Raynal nand->dev_ready = plat_dev_ready; 61*a430fa06SMiquel Raynal nand->ecc.mode = NAND_ECC_SOFT; 62*a430fa06SMiquel Raynal 63*a430fa06SMiquel Raynal return 0; 64*a430fa06SMiquel Raynal } 65