1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2017 Socionext Inc. 4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 5 */ 6 7 #include <clk.h> 8 #include <dm.h> 9 #include <linux/io.h> 10 #include <linux/ioport.h> 11 #include <linux/printk.h> 12 13 #include "denali.h" 14 15 struct denali_dt_data { 16 unsigned int revision; 17 unsigned int caps; 18 const struct nand_ecc_caps *ecc_caps; 19 }; 20 21 NAND_ECC_CAPS_SINGLE(denali_socfpga_ecc_caps, denali_calc_ecc_bytes, 22 512, 8, 15); 23 static const struct denali_dt_data denali_socfpga_data = { 24 .caps = DENALI_CAP_HW_ECC_FIXUP, 25 .ecc_caps = &denali_socfpga_ecc_caps, 26 }; 27 28 NAND_ECC_CAPS_SINGLE(denali_uniphier_v5a_ecc_caps, denali_calc_ecc_bytes, 29 1024, 8, 16, 24); 30 static const struct denali_dt_data denali_uniphier_v5a_data = { 31 .caps = DENALI_CAP_HW_ECC_FIXUP | 32 DENALI_CAP_DMA_64BIT, 33 .ecc_caps = &denali_uniphier_v5a_ecc_caps, 34 }; 35 36 NAND_ECC_CAPS_SINGLE(denali_uniphier_v5b_ecc_caps, denali_calc_ecc_bytes, 37 1024, 8, 16); 38 static const struct denali_dt_data denali_uniphier_v5b_data = { 39 .revision = 0x0501, 40 .caps = DENALI_CAP_HW_ECC_FIXUP | 41 DENALI_CAP_DMA_64BIT, 42 .ecc_caps = &denali_uniphier_v5b_ecc_caps, 43 }; 44 45 static const struct udevice_id denali_nand_dt_ids[] = { 46 { 47 .compatible = "altr,socfpga-denali-nand", 48 .data = (unsigned long)&denali_socfpga_data, 49 }, 50 { 51 .compatible = "socionext,uniphier-denali-nand-v5a", 52 .data = (unsigned long)&denali_uniphier_v5a_data, 53 }, 54 { 55 .compatible = "socionext,uniphier-denali-nand-v5b", 56 .data = (unsigned long)&denali_uniphier_v5b_data, 57 }, 58 { /* sentinel */ } 59 }; 60 61 static int denali_dt_probe(struct udevice *dev) 62 { 63 struct denali_nand_info *denali = dev_get_priv(dev); 64 const struct denali_dt_data *data; 65 struct clk clk; 66 struct resource res; 67 int ret; 68 69 data = (void *)dev_get_driver_data(dev); 70 if (data) { 71 denali->revision = data->revision; 72 denali->caps = data->caps; 73 denali->ecc_caps = data->ecc_caps; 74 } 75 76 denali->dev = dev; 77 78 ret = dev_read_resource_byname(dev, "denali_reg", &res); 79 if (ret) 80 return ret; 81 82 denali->reg = devm_ioremap(dev, res.start, resource_size(&res)); 83 84 ret = dev_read_resource_byname(dev, "nand_data", &res); 85 if (ret) 86 return ret; 87 88 denali->host = devm_ioremap(dev, res.start, resource_size(&res)); 89 90 ret = clk_get_by_index(dev, 0, &clk); 91 if (ret) 92 return ret; 93 94 ret = clk_enable(&clk); 95 if (ret) 96 return ret; 97 98 denali->clk_x_rate = clk_get_rate(&clk); 99 100 return denali_init(denali); 101 } 102 103 U_BOOT_DRIVER(denali_nand_dt) = { 104 .name = "denali-nand-dt", 105 .id = UCLASS_MISC, 106 .of_match = denali_nand_dt_ids, 107 .probe = denali_dt_probe, 108 .priv_auto_alloc_size = sizeof(struct denali_nand_info), 109 }; 110 111 void board_nand_init(void) 112 { 113 struct udevice *dev; 114 int ret; 115 116 ret = uclass_get_device_by_driver(UCLASS_MISC, 117 DM_GET_DRIVER(denali_nand_dt), 118 &dev); 119 if (ret && ret != -ENODEV) 120 pr_err("Failed to initialize Denali NAND controller. (error %d)\n", 121 ret); 122 } 123