1 2menuconfig NAND 3 bool "NAND Device Support" 4if NAND 5 6config SYS_NAND_SELF_INIT 7 bool 8 help 9 This option, if enabled, provides more flexible and linux-like 10 NAND initialization process. 11 12config NAND_ATMEL 13 bool "Support Atmel NAND controller" 14 imply SYS_NAND_USE_FLASH_BBT 15 help 16 Enable this driver for NAND flash platforms using an Atmel NAND 17 controller. 18 19config NAND_DENALI 20 bool 21 select SYS_NAND_SELF_INIT 22 imply CMD_NAND 23 24config NAND_DENALI_DT 25 bool "Support Denali NAND controller as a DT device" 26 select NAND_DENALI 27 depends on OF_CONTROL && DM 28 help 29 Enable the driver for NAND flash on platforms using a Denali NAND 30 controller as a DT device. 31 32config NAND_DENALI_SPARE_AREA_SKIP_BYTES 33 int "Number of bytes skipped in OOB area" 34 depends on NAND_DENALI 35 range 0 63 36 help 37 This option specifies the number of bytes to skip from the beginning 38 of OOB area before last ECC sector data starts. This is potentially 39 used to preserve the bad block marker in the OOB area. 40 41config NAND_LPC32XX_SLC 42 bool "Support LPC32XX_SLC controller" 43 help 44 Enable the LPC32XX SLC NAND controller. 45 46config NAND_OMAP_GPMC 47 bool "Support OMAP GPMC NAND controller" 48 depends on ARCH_OMAP2PLUS 49 help 50 Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms. 51 GPMC controller is used for parallel NAND flash devices, and can 52 do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8 53 and BCH16 ECC algorithms. 54 55config NAND_OMAP_GPMC_PREFETCH 56 bool "Enable GPMC Prefetch" 57 depends on NAND_OMAP_GPMC 58 default y 59 help 60 On OMAP platforms that use the GPMC controller 61 (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that 62 uses the prefetch mode to speed up read operations. 63 64config NAND_OMAP_ELM 65 bool "Enable ELM driver for OMAPxx and AMxx platforms." 66 depends on NAND_OMAP_GPMC && !OMAP34XX 67 help 68 ELM controller is used for ECC error detection (not ECC calculation) 69 of BCH4, BCH8 and BCH16 ECC algorithms. 70 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, 71 thus such SoC platforms need to depend on software library for ECC error 72 detection. However ECC calculation on such plaforms would still be 73 done by GPMC controller. 74 75config NAND_VF610_NFC 76 bool "Support for Freescale NFC for VF610" 77 select SYS_NAND_SELF_INIT 78 imply CMD_NAND 79 help 80 Enables support for NAND Flash Controller on some Freescale 81 processors like the VF610, MCF54418 or Kinetis K70. 82 The driver supports a maximum 2k page size. The driver 83 currently does not support hardware ECC. 84 85choice 86 prompt "Hardware ECC strength" 87 depends on NAND_VF610_NFC 88 default SYS_NAND_VF610_NFC_45_ECC_BYTES 89 help 90 Select the ECC strength used in the hardware BCH ECC block. 91 92config SYS_NAND_VF610_NFC_45_ECC_BYTES 93 bool "24-error correction (45 ECC bytes)" 94 95config SYS_NAND_VF610_NFC_60_ECC_BYTES 96 bool "32-error correction (60 ECC bytes)" 97 98endchoice 99 100config NAND_PXA3XX 101 bool "Support for NAND on PXA3xx and Armada 370/XP/38x" 102 select SYS_NAND_SELF_INIT 103 imply CMD_NAND 104 help 105 This enables the driver for the NAND flash device found on 106 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2). 107 108config NAND_SUNXI 109 bool "Support for NAND on Allwinner SoCs" 110 default ARCH_SUNXI 111 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I 112 select SYS_NAND_SELF_INIT 113 select SYS_NAND_U_BOOT_LOCATIONS 114 select SPL_NAND_SUPPORT 115 imply CMD_NAND 116 ---help--- 117 Enable support for NAND. This option enables the standard and 118 SPL drivers. 119 The SPL driver only supports reading from the NAND using DMA 120 transfers. 121 122if NAND_SUNXI 123 124config NAND_SUNXI_SPL_ECC_STRENGTH 125 int "Allwinner NAND SPL ECC Strength" 126 default 64 127 128config NAND_SUNXI_SPL_ECC_SIZE 129 int "Allwinner NAND SPL ECC Step Size" 130 default 1024 131 132config NAND_SUNXI_SPL_USABLE_PAGE_SIZE 133 int "Allwinner NAND SPL Usable Page Size" 134 default 1024 135 136endif 137 138config NAND_ARASAN 139 bool "Configure Arasan Nand" 140 select SYS_NAND_SELF_INIT 141 imply CMD_NAND 142 help 143 This enables Nand driver support for Arasan nand flash 144 controller. This uses the hardware ECC for read and 145 write operations. 146 147config NAND_MXC 148 bool "MXC NAND support" 149 depends on CPU_ARM926EJS || CPU_ARM1136 || MX5 150 imply CMD_NAND 151 help 152 This enables the NAND driver for the NAND flash controller on the 153 i.MX27 / i.MX31 / i.MX5 rocessors. 154 155config NAND_MXS 156 bool "MXS NAND support" 157 depends on MX23 || MX28 || MX6 || MX7 158 select SYS_NAND_SELF_INIT 159 imply CMD_NAND 160 select APBH_DMA 161 select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7 162 select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7 163 help 164 This enables NAND driver for the NAND flash controller on the 165 MXS processors. 166 167if NAND_MXS 168 169config NAND_MXS_DT 170 bool "Support MXS NAND controller as a DT device" 171 depends on OF_CONTROL && MTD 172 help 173 Enable the driver for MXS NAND flash on platforms using 174 device tree. 175 176config NAND_MXS_USE_MINIMUM_ECC 177 bool "Use minimum ECC strength supported by the controller" 178 default false 179 180endif 181 182config NAND_ZYNQ 183 bool "Support for Zynq Nand controller" 184 select SYS_NAND_SELF_INIT 185 imply CMD_NAND 186 help 187 This enables Nand driver support for Nand flash controller 188 found on Zynq SoC. 189 190config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS 191 bool "Enable use of 1st stage bootloader timing for NAND" 192 depends on NAND_ZYNQ 193 help 194 This flag prevent U-boot reconfigure NAND flash controller and reuse 195 the NAND timing from 1st stage bootloader. 196 197comment "Generic NAND options" 198 199config SYS_NAND_BLOCK_SIZE 200 hex "NAND chip eraseblock size" 201 depends on ARCH_SUNXI 202 help 203 Number of data bytes in one eraseblock for the NAND chip on the 204 board. This is the multiple of NAND_PAGE_SIZE and the number of 205 pages. 206 207config SYS_NAND_PAGE_SIZE 208 hex "NAND chip page size" 209 depends on ARCH_SUNXI 210 help 211 Number of data bytes in one page for the NAND chip on the 212 board, not including the OOB area. 213 214config SYS_NAND_OOBSIZE 215 hex "NAND chip OOB size" 216 depends on ARCH_SUNXI 217 help 218 Number of bytes in the Out-Of-Band area for the NAND chip on 219 the board. 220 221# Enhance depends when converting drivers to Kconfig which use this config 222# option (mxc_nand, ndfc, omap_gpmc). 223config SYS_NAND_BUSWIDTH_16BIT 224 bool "Use 16-bit NAND interface" 225 depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI 226 help 227 Indicates that NAND device has 16-bit wide data-bus. In absence of this 228 config, bus-width of NAND device is assumed to be either 8-bit and later 229 determined by reading ONFI params. 230 Above config is useful when NAND device's bus-width information cannot 231 be determined from on-chip ONFI params, like in following scenarios: 232 - SPL boot does not support reading of ONFI parameters. This is done to 233 keep SPL code foot-print small. 234 - In current U-Boot flow using nand_init(), driver initialization 235 happens in board_nand_init() which is called before any device probe 236 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are 237 not available while configuring controller. So a static CONFIG_NAND_xx 238 is needed to know the device's bus-width in advance. 239 240if SPL 241 242config SYS_NAND_U_BOOT_LOCATIONS 243 bool "Define U-boot binaries locations in NAND" 244 help 245 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig. 246 This option should not be enabled when compiling U-boot for boards 247 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h 248 file. 249 250config SYS_NAND_U_BOOT_OFFS 251 hex "Location in NAND to read U-Boot from" 252 default 0x800000 if NAND_SUNXI 253 depends on SYS_NAND_U_BOOT_LOCATIONS 254 help 255 Set the offset from the start of the nand where u-boot should be 256 loaded from. 257 258config SYS_NAND_U_BOOT_OFFS_REDUND 259 hex "Location in NAND to read U-Boot from" 260 default SYS_NAND_U_BOOT_OFFS 261 depends on SYS_NAND_U_BOOT_LOCATIONS 262 help 263 Set the offset from the start of the nand where the redundant u-boot 264 should be loaded from. 265 266config SPL_NAND_AM33XX_BCH 267 bool "Enables SPL-NAND driver which supports ELM based" 268 depends on NAND_OMAP_GPMC && !OMAP34XX 269 default y 270 help 271 Hardware ECC correction. This is useful for platforms which have ELM 272 hardware engine and use NAND boot mode. 273 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, 274 so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling 275 SPL-NAND driver with software ECC correction support. 276 277config SPL_NAND_DENALI 278 bool "Support Denali NAND controller for SPL" 279 help 280 This is a small implementation of the Denali NAND controller 281 for use on SPL. 282 283config SPL_NAND_SIMPLE 284 bool "Use simple SPL NAND driver" 285 depends on !SPL_NAND_AM33XX_BCH 286 help 287 Support for NAND boot using simple NAND drivers that 288 expose the cmd_ctrl() interface. 289endif 290 291endif # if NAND 292