xref: /openbmc/u-boot/drivers/mtd/nand/Kconfig (revision a22bbfda)
1
2menuconfig NAND
3	bool "NAND Device Support"
4if NAND
5
6config SYS_NAND_SELF_INIT
7	bool
8	help
9	  This option, if enabled, provides more flexible and linux-like
10	  NAND initialization process.
11
12config NAND_DENALI
13	bool "Support Denali NAND controller"
14	select SYS_NAND_SELF_INIT
15	imply CMD_NAND
16	help
17	  Enable support for the Denali NAND controller.
18
19config SYS_NAND_DENALI_64BIT
20	bool "Use 64-bit variant of Denali NAND controller"
21	depends on NAND_DENALI
22	help
23	  The Denali NAND controller IP has some variations in terms of
24	  the bus interface.  The DMA setup sequence is completely differenct
25	  between 32bit / 64bit AXI bus variants.
26
27	  If your Denali NAND controller is the 64-bit variant, say Y.
28	  Otherwise (32 bit), say N.
29
30config NAND_DENALI_SPARE_AREA_SKIP_BYTES
31	int "Number of bytes skipped in OOB area"
32	depends on NAND_DENALI
33	range 0 63
34	help
35	  This option specifies the number of bytes to skip from the beginning
36	  of OOB area before last ECC sector data starts.  This is potentially
37	  used to preserve the bad block marker in the OOB area.
38
39config NAND_VF610_NFC
40	bool "Support for Freescale NFC for VF610"
41	select SYS_NAND_SELF_INIT
42	imply CMD_NAND
43	help
44	  Enables support for NAND Flash Controller on some Freescale
45	  processors like the VF610, MCF54418 or Kinetis K70.
46	  The driver supports a maximum 2k page size. The driver
47	  currently does not support hardware ECC.
48
49choice
50	prompt "Hardware ECC strength"
51	depends on NAND_VF610_NFC
52	default SYS_NAND_VF610_NFC_45_ECC_BYTES
53	help
54	  Select the ECC strength used in the hardware BCH ECC block.
55
56config SYS_NAND_VF610_NFC_45_ECC_BYTES
57	bool "24-error correction (45 ECC bytes)"
58
59config SYS_NAND_VF610_NFC_60_ECC_BYTES
60	bool "32-error correction (60 ECC bytes)"
61
62endchoice
63
64config NAND_PXA3XX
65	bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
66	select SYS_NAND_SELF_INIT
67	imply CMD_NAND
68	help
69	  This enables the driver for the NAND flash device found on
70	  PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
71
72config NAND_SUNXI
73	bool "Support for NAND on Allwinner SoCs"
74	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
75	select SYS_NAND_SELF_INIT
76	select SYS_NAND_U_BOOT_LOCATIONS
77	imply CMD_NAND
78	---help---
79	Enable support for NAND. This option enables the standard and
80	SPL drivers.
81	The SPL driver only supports reading from the NAND using DMA
82	transfers.
83
84if NAND_SUNXI
85
86config NAND_SUNXI_SPL_ECC_STRENGTH
87	int "Allwinner NAND SPL ECC Strength"
88	default 64
89
90config NAND_SUNXI_SPL_ECC_SIZE
91	int "Allwinner NAND SPL ECC Step Size"
92	default 1024
93
94config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
95	int "Allwinner NAND SPL Usable Page Size"
96	default 1024
97
98endif
99
100config NAND_ARASAN
101	bool "Configure Arasan Nand"
102	imply CMD_NAND
103	help
104	  This enables Nand driver support for Arasan nand flash
105	  controller. This uses the hardware ECC for read and
106	  write operations.
107
108config NAND_MXS
109	bool "MXS NAND support"
110	depends on MX6 || MX7
111	imply CMD_NAND
112	help
113	  This enables NAND driver for the NAND flash controller on the
114	  MXS processors.
115
116config NAND_ZYNQ
117	bool "Support for Zynq Nand controller"
118	select SYS_NAND_SELF_INIT
119	imply CMD_NAND
120	help
121	  This enables Nand driver support for Nand flash controller
122	  found on Zynq SoC.
123
124comment "Generic NAND options"
125
126# Enhance depends when converting drivers to Kconfig which use this config
127# option (mxc_nand, ndfc, omap_gpmc).
128config SYS_NAND_BUSWIDTH_16BIT
129	bool "Use 16-bit NAND interface"
130	depends on NAND_VF610_NFC
131	help
132	  Indicates that NAND device has 16-bit wide data-bus. In absence of this
133	  config, bus-width of NAND device is assumed to be either 8-bit and later
134	  determined by reading ONFI params.
135	  Above config is useful when NAND device's bus-width information cannot
136	  be determined from on-chip ONFI params, like in following scenarios:
137	  - SPL boot does not support reading of ONFI parameters. This is done to
138	    keep SPL code foot-print small.
139	  - In current U-Boot flow using nand_init(), driver initialization
140	    happens in board_nand_init() which is called before any device probe
141	    (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
142	    not available while configuring controller. So a static CONFIG_NAND_xx
143	    is needed to know the device's bus-width in advance.
144
145if SPL
146
147config SYS_NAND_U_BOOT_LOCATIONS
148	bool "Define U-boot binaries locations in NAND"
149	help
150	Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
151	This option should not be enabled when compiling U-boot for boards
152	defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
153	file.
154
155config SYS_NAND_U_BOOT_OFFS
156	hex "Location in NAND to read U-Boot from"
157	default 0x800000 if NAND_SUNXI
158	depends on SYS_NAND_U_BOOT_LOCATIONS
159	help
160	Set the offset from the start of the nand where u-boot should be
161	loaded from.
162
163config SYS_NAND_U_BOOT_OFFS_REDUND
164	hex "Location in NAND to read U-Boot from"
165	default SYS_NAND_U_BOOT_OFFS
166	depends on SYS_NAND_U_BOOT_LOCATIONS
167	help
168	Set the offset from the start of the nand where the redundant u-boot
169	should be loaded from.
170
171config SPL_NAND_DENALI
172	bool "Support Denali NAND controller for SPL"
173	help
174	  This is a small implementation of the Denali NAND controller
175	  for use on SPL.
176
177endif
178
179endif   # if NAND
180