1 2menuconfig NAND 3 bool "NAND Device Support" 4if NAND 5 6config SYS_NAND_SELF_INIT 7 bool 8 help 9 This option, if enabled, provides more flexible and linux-like 10 NAND initialization process. 11 12config NAND_DENALI 13 bool 14 select SYS_NAND_SELF_INIT 15 imply CMD_NAND 16 17config NAND_DENALI_DT 18 bool "Support Denali NAND controller as a DT device" 19 select NAND_DENALI 20 depends on OF_CONTROL && DM 21 help 22 Enable the driver for NAND flash on platforms using a Denali NAND 23 controller as a DT device. 24 25config NAND_DENALI_SPARE_AREA_SKIP_BYTES 26 int "Number of bytes skipped in OOB area" 27 depends on NAND_DENALI 28 range 0 63 29 help 30 This option specifies the number of bytes to skip from the beginning 31 of OOB area before last ECC sector data starts. This is potentially 32 used to preserve the bad block marker in the OOB area. 33 34config NAND_OMAP_GPMC 35 bool "Support OMAP GPMC NAND controller" 36 depends on ARCH_OMAP2PLUS 37 help 38 Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms. 39 GPMC controller is used for parallel NAND flash devices, and can 40 do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8 41 and BCH16 ECC algorithms. 42 43config NAND_OMAP_GPMC_PREFETCH 44 bool "Enable GPMC Prefetch" 45 depends on NAND_OMAP_GPMC 46 default y 47 help 48 On OMAP platforms that use the GPMC controller 49 (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that 50 uses the prefetch mode to speed up read operations. 51 52config NAND_OMAP_ELM 53 bool "Enable ELM driver for OMAPxx and AMxx platforms." 54 depends on NAND_OMAP_GPMC && !OMAP34XX 55 help 56 ELM controller is used for ECC error detection (not ECC calculation) 57 of BCH4, BCH8 and BCH16 ECC algorithms. 58 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, 59 thus such SoC platforms need to depend on software library for ECC error 60 detection. However ECC calculation on such plaforms would still be 61 done by GPMC controller. 62 63config NAND_VF610_NFC 64 bool "Support for Freescale NFC for VF610" 65 select SYS_NAND_SELF_INIT 66 imply CMD_NAND 67 help 68 Enables support for NAND Flash Controller on some Freescale 69 processors like the VF610, MCF54418 or Kinetis K70. 70 The driver supports a maximum 2k page size. The driver 71 currently does not support hardware ECC. 72 73choice 74 prompt "Hardware ECC strength" 75 depends on NAND_VF610_NFC 76 default SYS_NAND_VF610_NFC_45_ECC_BYTES 77 help 78 Select the ECC strength used in the hardware BCH ECC block. 79 80config SYS_NAND_VF610_NFC_45_ECC_BYTES 81 bool "24-error correction (45 ECC bytes)" 82 83config SYS_NAND_VF610_NFC_60_ECC_BYTES 84 bool "32-error correction (60 ECC bytes)" 85 86endchoice 87 88config NAND_PXA3XX 89 bool "Support for NAND on PXA3xx and Armada 370/XP/38x" 90 select SYS_NAND_SELF_INIT 91 imply CMD_NAND 92 help 93 This enables the driver for the NAND flash device found on 94 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2). 95 96config NAND_SUNXI 97 bool "Support for NAND on Allwinner SoCs" 98 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I 99 select SYS_NAND_SELF_INIT 100 select SYS_NAND_U_BOOT_LOCATIONS 101 select SPL_NAND_SUPPORT 102 imply CMD_NAND 103 ---help--- 104 Enable support for NAND. This option enables the standard and 105 SPL drivers. 106 The SPL driver only supports reading from the NAND using DMA 107 transfers. 108 109if NAND_SUNXI 110 111config NAND_SUNXI_SPL_ECC_STRENGTH 112 int "Allwinner NAND SPL ECC Strength" 113 default 64 114 115config NAND_SUNXI_SPL_ECC_SIZE 116 int "Allwinner NAND SPL ECC Step Size" 117 default 1024 118 119config NAND_SUNXI_SPL_USABLE_PAGE_SIZE 120 int "Allwinner NAND SPL Usable Page Size" 121 default 1024 122 123endif 124 125config NAND_ARASAN 126 bool "Configure Arasan Nand" 127 select SYS_NAND_SELF_INIT 128 imply CMD_NAND 129 help 130 This enables Nand driver support for Arasan nand flash 131 controller. This uses the hardware ECC for read and 132 write operations. 133 134config NAND_MXC 135 bool "MXC NAND support" 136 depends on CPU_ARM926EJS || CPU_ARM1136 || MX5 137 imply CMD_NAND 138 help 139 This enables the NAND driver for the NAND flash controller on the 140 i.MX27 / i.MX31 / i.MX5 rocessors. 141 142config NAND_MXS 143 bool "MXS NAND support" 144 depends on MX23 || MX28 || MX6 || MX7 145 imply CMD_NAND 146 select APBH_DMA 147 select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7 148 select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7 149 help 150 This enables NAND driver for the NAND flash controller on the 151 MXS processors. 152 153config NAND_ZYNQ 154 bool "Support for Zynq Nand controller" 155 select SYS_NAND_SELF_INIT 156 imply CMD_NAND 157 help 158 This enables Nand driver support for Nand flash controller 159 found on Zynq SoC. 160 161config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS 162 bool "Enable use of 1st stage bootloader timing for NAND" 163 depends on NAND_ZYNQ 164 help 165 This flag prevent U-boot reconfigure NAND flash controller and reuse 166 the NAND timing from 1st stage bootloader. 167 168comment "Generic NAND options" 169 170# Enhance depends when converting drivers to Kconfig which use this config 171# option (mxc_nand, ndfc, omap_gpmc). 172config SYS_NAND_BUSWIDTH_16BIT 173 bool "Use 16-bit NAND interface" 174 depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI 175 help 176 Indicates that NAND device has 16-bit wide data-bus. In absence of this 177 config, bus-width of NAND device is assumed to be either 8-bit and later 178 determined by reading ONFI params. 179 Above config is useful when NAND device's bus-width information cannot 180 be determined from on-chip ONFI params, like in following scenarios: 181 - SPL boot does not support reading of ONFI parameters. This is done to 182 keep SPL code foot-print small. 183 - In current U-Boot flow using nand_init(), driver initialization 184 happens in board_nand_init() which is called before any device probe 185 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are 186 not available while configuring controller. So a static CONFIG_NAND_xx 187 is needed to know the device's bus-width in advance. 188 189if SPL 190 191config SYS_NAND_U_BOOT_LOCATIONS 192 bool "Define U-boot binaries locations in NAND" 193 help 194 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig. 195 This option should not be enabled when compiling U-boot for boards 196 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h 197 file. 198 199config SYS_NAND_U_BOOT_OFFS 200 hex "Location in NAND to read U-Boot from" 201 default 0x800000 if NAND_SUNXI 202 depends on SYS_NAND_U_BOOT_LOCATIONS 203 help 204 Set the offset from the start of the nand where u-boot should be 205 loaded from. 206 207config SYS_NAND_U_BOOT_OFFS_REDUND 208 hex "Location in NAND to read U-Boot from" 209 default SYS_NAND_U_BOOT_OFFS 210 depends on SYS_NAND_U_BOOT_LOCATIONS 211 help 212 Set the offset from the start of the nand where the redundant u-boot 213 should be loaded from. 214 215config SPL_NAND_AM33XX_BCH 216 bool "Enables SPL-NAND driver which supports ELM based" 217 depends on NAND_OMAP_GPMC && !OMAP34XX 218 default y 219 help 220 Hardware ECC correction. This is useful for platforms which have ELM 221 hardware engine and use NAND boot mode. 222 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, 223 so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling 224 SPL-NAND driver with software ECC correction support. 225 226config SPL_NAND_DENALI 227 bool "Support Denali NAND controller for SPL" 228 help 229 This is a small implementation of the Denali NAND controller 230 for use on SPL. 231 232config SPL_NAND_SIMPLE 233 bool "Use simple SPL NAND driver" 234 depends on !SPL_NAND_AM33XX_BCH 235 help 236 Support for NAND boot using simple NAND drivers that 237 expose the cmd_ctrl() interface. 238endif 239 240endif # if NAND 241