1menu "NAND Device Support" 2 3config SYS_NAND_SELF_INIT 4 bool 5 help 6 This option, if enabled, provides more flexible and linux-like 7 NAND initialization process. 8 9config NAND_DENALI 10 bool "Support Denali NAND controller" 11 select SYS_NAND_SELF_INIT 12 help 13 Enable support for the Denali NAND controller. 14 15config SYS_NAND_DENALI_64BIT 16 bool "Use 64-bit variant of Denali NAND controller" 17 depends on NAND_DENALI 18 help 19 The Denali NAND controller IP has some variations in terms of 20 the bus interface. The DMA setup sequence is completely differenct 21 between 32bit / 64bit AXI bus variants. 22 23 If your Denali NAND controller is the 64-bit variant, say Y. 24 Otherwise (32 bit), say N. 25 26config NAND_DENALI_SPARE_AREA_SKIP_BYTES 27 int "Number of bytes skipped in OOB area" 28 depends on NAND_DENALI 29 range 0 63 30 help 31 This option specifies the number of bytes to skip from the beginning 32 of OOB area before last ECC sector data starts. This is potentially 33 used to preserve the bad block marker in the OOB area. 34 35config NAND_VF610_NFC 36 bool "Support for Freescale NFC for VF610" 37 select SYS_NAND_SELF_INIT 38 help 39 Enables support for NAND Flash Controller on some Freescale 40 processors like the VF610, MCF54418 or Kinetis K70. 41 The driver supports a maximum 2k page size. The driver 42 currently does not support hardware ECC. 43 44choice 45 prompt "Hardware ECC strength" 46 depends on NAND_VF610_NFC 47 default SYS_NAND_VF610_NFC_45_ECC_BYTES 48 help 49 Select the ECC strength used in the hardware BCH ECC block. 50 51config SYS_NAND_VF610_NFC_45_ECC_BYTES 52 bool "24-error correction (45 ECC bytes)" 53 54config SYS_NAND_VF610_NFC_60_ECC_BYTES 55 bool "32-error correction (60 ECC bytes)" 56 57endchoice 58 59config NAND_PXA3XX 60 bool "Support for NAND on PXA3xx and Armada 370/XP/38x" 61 select SYS_NAND_SELF_INIT 62 help 63 This enables the driver for the NAND flash device found on 64 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2). 65 66config NAND_SUNXI 67 bool "Support for NAND on Allwinner SoCs" 68 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I 69 select SYS_NAND_SELF_INIT 70 select SYS_NAND_U_BOOT_LOCATIONS 71 ---help--- 72 Enable support for NAND. This option enables the standard and 73 SPL drivers. 74 The SPL driver only supports reading from the NAND using DMA 75 transfers. 76 77if NAND_SUNXI 78 79config NAND_SUNXI_SPL_ECC_STRENGTH 80 int "Allwinner NAND SPL ECC Strength" 81 default 64 82 83config NAND_SUNXI_SPL_ECC_SIZE 84 int "Allwinner NAND SPL ECC Step Size" 85 default 1024 86 87config NAND_SUNXI_SPL_USABLE_PAGE_SIZE 88 int "Allwinner NAND SPL Usable Page Size" 89 default 1024 90 91endif 92 93config NAND_ARASAN 94 bool "Configure Arasan Nand" 95 help 96 This enables Nand driver support for Arasan nand flash 97 controller. This uses the hardware ECC for read and 98 write operations. 99 100config NAND_MXS 101 bool "MXS NAND support" 102 depends on MX6 || MX7 103 help 104 This enables NAND driver for the NAND flash controller on the 105 MXS processors. 106 107config NAND_ZYNQ 108 bool "Support for Zynq Nand controller" 109 select SYS_NAND_SELF_INIT 110 help 111 This enables Nand driver support for Nand flash controller 112 found on Zynq SoC. 113 114comment "Generic NAND options" 115 116# Enhance depends when converting drivers to Kconfig which use this config 117# option (mxc_nand, ndfc, omap_gpmc). 118config SYS_NAND_BUSWIDTH_16BIT 119 bool "Use 16-bit NAND interface" 120 depends on NAND_VF610_NFC 121 help 122 Indicates that NAND device has 16-bit wide data-bus. In absence of this 123 config, bus-width of NAND device is assumed to be either 8-bit and later 124 determined by reading ONFI params. 125 Above config is useful when NAND device's bus-width information cannot 126 be determined from on-chip ONFI params, like in following scenarios: 127 - SPL boot does not support reading of ONFI parameters. This is done to 128 keep SPL code foot-print small. 129 - In current U-Boot flow using nand_init(), driver initialization 130 happens in board_nand_init() which is called before any device probe 131 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are 132 not available while configuring controller. So a static CONFIG_NAND_xx 133 is needed to know the device's bus-width in advance. 134 135if SPL 136 137config SYS_NAND_U_BOOT_LOCATIONS 138 bool "Define U-boot binaries locations in NAND" 139 help 140 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig. 141 This option should not be enabled when compiling U-boot for boards 142 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h 143 file. 144 145config SYS_NAND_U_BOOT_OFFS 146 hex "Location in NAND to read U-Boot from" 147 default 0x800000 if NAND_SUNXI 148 depends on SYS_NAND_U_BOOT_LOCATIONS 149 help 150 Set the offset from the start of the nand where u-boot should be 151 loaded from. 152 153config SYS_NAND_U_BOOT_OFFS_REDUND 154 hex "Location in NAND to read U-Boot from" 155 default SYS_NAND_U_BOOT_OFFS 156 depends on SYS_NAND_U_BOOT_LOCATIONS 157 help 158 Set the offset from the start of the nand where the redundant u-boot 159 should be loaded from. 160 161config SPL_NAND_DENALI 162 bool "Support Denali NAND controller for SPL" 163 help 164 This is a small implementation of the Denali NAND controller 165 for use on SPL. 166 167endif 168 169endmenu 170