1 2menuconfig NAND 3 bool "NAND Device Support" 4if NAND 5 6config SYS_NAND_SELF_INIT 7 bool 8 help 9 This option, if enabled, provides more flexible and linux-like 10 NAND initialization process. 11 12config NAND_DENALI 13 bool "Support Denali NAND controller" 14 select SYS_NAND_SELF_INIT 15 imply CMD_NAND 16 help 17 Enable support for the Denali NAND controller. 18 19config NAND_DENALI_DT 20 bool "Support Denali NAND controller as a DT device" 21 depends on NAND_DENALI && OF_CONTROL && DM 22 help 23 Enable the driver for NAND flash on platforms using a Denali NAND 24 controller as a DT device. 25 26config SYS_NAND_DENALI_64BIT 27 bool "Use 64-bit variant of Denali NAND controller" 28 depends on NAND_DENALI 29 help 30 The Denali NAND controller IP has some variations in terms of 31 the bus interface. The DMA setup sequence is completely differenct 32 between 32bit / 64bit AXI bus variants. 33 34 If your Denali NAND controller is the 64-bit variant, say Y. 35 Otherwise (32 bit), say N. 36 37config NAND_DENALI_SPARE_AREA_SKIP_BYTES 38 int "Number of bytes skipped in OOB area" 39 depends on NAND_DENALI 40 range 0 63 41 help 42 This option specifies the number of bytes to skip from the beginning 43 of OOB area before last ECC sector data starts. This is potentially 44 used to preserve the bad block marker in the OOB area. 45 46config NAND_OMAP_GPMC 47 bool "Support OMAP GPMC NAND controller" 48 depends on ARCH_OMAP2PLUS 49 help 50 Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms. 51 GPMC controller is used for parallel NAND flash devices, and can 52 do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8 53 and BCH16 ECC algorithms. 54 55config NAND_OMAP_GPMC_PREFETCH 56 bool "Enable GPMC Prefetch" 57 depends on NAND_OMAP_GPMC 58 help 59 On OMAP platforms that use the GPMC controller 60 (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that 61 uses the prefetch mode to speed up read operations. 62 63config NAND_OMAP_ELM 64 bool "Enable ELM driver for OMAPxx and AMxx platforms." 65 depends on NAND_OMAP_GPMC && !OMAP34XX 66 help 67 ELM controller is used for ECC error detection (not ECC calculation) 68 of BCH4, BCH8 and BCH16 ECC algorithms. 69 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, 70 thus such SoC platforms need to depend on software library for ECC error 71 detection. However ECC calculation on such plaforms would still be 72 done by GPMC controller. 73 74config NAND_VF610_NFC 75 bool "Support for Freescale NFC for VF610" 76 select SYS_NAND_SELF_INIT 77 imply CMD_NAND 78 help 79 Enables support for NAND Flash Controller on some Freescale 80 processors like the VF610, MCF54418 or Kinetis K70. 81 The driver supports a maximum 2k page size. The driver 82 currently does not support hardware ECC. 83 84choice 85 prompt "Hardware ECC strength" 86 depends on NAND_VF610_NFC 87 default SYS_NAND_VF610_NFC_45_ECC_BYTES 88 help 89 Select the ECC strength used in the hardware BCH ECC block. 90 91config SYS_NAND_VF610_NFC_45_ECC_BYTES 92 bool "24-error correction (45 ECC bytes)" 93 94config SYS_NAND_VF610_NFC_60_ECC_BYTES 95 bool "32-error correction (60 ECC bytes)" 96 97endchoice 98 99config NAND_PXA3XX 100 bool "Support for NAND on PXA3xx and Armada 370/XP/38x" 101 select SYS_NAND_SELF_INIT 102 imply CMD_NAND 103 help 104 This enables the driver for the NAND flash device found on 105 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2). 106 107config NAND_SUNXI 108 bool "Support for NAND on Allwinner SoCs" 109 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I 110 select SYS_NAND_SELF_INIT 111 select SYS_NAND_U_BOOT_LOCATIONS 112 imply CMD_NAND 113 ---help--- 114 Enable support for NAND. This option enables the standard and 115 SPL drivers. 116 The SPL driver only supports reading from the NAND using DMA 117 transfers. 118 119if NAND_SUNXI 120 121config NAND_SUNXI_SPL_ECC_STRENGTH 122 int "Allwinner NAND SPL ECC Strength" 123 default 64 124 125config NAND_SUNXI_SPL_ECC_SIZE 126 int "Allwinner NAND SPL ECC Step Size" 127 default 1024 128 129config NAND_SUNXI_SPL_USABLE_PAGE_SIZE 130 int "Allwinner NAND SPL Usable Page Size" 131 default 1024 132 133endif 134 135config NAND_ARASAN 136 bool "Configure Arasan Nand" 137 imply CMD_NAND 138 help 139 This enables Nand driver support for Arasan nand flash 140 controller. This uses the hardware ECC for read and 141 write operations. 142 143config NAND_MXC 144 bool "MXC NAND support" 145 depends on CPU_ARM926EJS || CPU_ARM1136 || MX5 146 imply CMD_NAND 147 help 148 This enables the NAND driver for the NAND flash controller on the 149 i.MX27 / i.MX31 / i.MX5 rocessors. 150 151config NAND_MXS 152 bool "MXS NAND support" 153 depends on MX6 || MX7 154 imply CMD_NAND 155 help 156 This enables NAND driver for the NAND flash controller on the 157 MXS processors. 158 159config NAND_ZYNQ 160 bool "Support for Zynq Nand controller" 161 select SYS_NAND_SELF_INIT 162 imply CMD_NAND 163 help 164 This enables Nand driver support for Nand flash controller 165 found on Zynq SoC. 166 167comment "Generic NAND options" 168 169# Enhance depends when converting drivers to Kconfig which use this config 170# option (mxc_nand, ndfc, omap_gpmc). 171config SYS_NAND_BUSWIDTH_16BIT 172 bool "Use 16-bit NAND interface" 173 depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI 174 help 175 Indicates that NAND device has 16-bit wide data-bus. In absence of this 176 config, bus-width of NAND device is assumed to be either 8-bit and later 177 determined by reading ONFI params. 178 Above config is useful when NAND device's bus-width information cannot 179 be determined from on-chip ONFI params, like in following scenarios: 180 - SPL boot does not support reading of ONFI parameters. This is done to 181 keep SPL code foot-print small. 182 - In current U-Boot flow using nand_init(), driver initialization 183 happens in board_nand_init() which is called before any device probe 184 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are 185 not available while configuring controller. So a static CONFIG_NAND_xx 186 is needed to know the device's bus-width in advance. 187 188if SPL 189 190config SYS_NAND_U_BOOT_LOCATIONS 191 bool "Define U-boot binaries locations in NAND" 192 help 193 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig. 194 This option should not be enabled when compiling U-boot for boards 195 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h 196 file. 197 198config SYS_NAND_U_BOOT_OFFS 199 hex "Location in NAND to read U-Boot from" 200 default 0x800000 if NAND_SUNXI 201 depends on SYS_NAND_U_BOOT_LOCATIONS 202 help 203 Set the offset from the start of the nand where u-boot should be 204 loaded from. 205 206config SYS_NAND_U_BOOT_OFFS_REDUND 207 hex "Location in NAND to read U-Boot from" 208 default SYS_NAND_U_BOOT_OFFS 209 depends on SYS_NAND_U_BOOT_LOCATIONS 210 help 211 Set the offset from the start of the nand where the redundant u-boot 212 should be loaded from. 213 214config SPL_NAND_AM33XX_BCH 215 bool "Enables SPL-NAND driver which supports ELM based" 216 depends on NAND_OMAP_GPMC && !OMAP34XX 217 default y 218 help 219 Hardware ECC correction. This is useful for platforms which have ELM 220 hardware engine and use NAND boot mode. 221 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, 222 so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling 223 SPL-NAND driver with software ECC correction support. 224 225config SPL_NAND_DENALI 226 bool "Support Denali NAND controller for SPL" 227 help 228 This is a small implementation of the Denali NAND controller 229 for use on SPL. 230 231config SPL_NAND_SIMPLE 232 bool "Use simple SPL NAND driver" 233 depends on !SPL_NAND_AM33XX_BCH 234 help 235 Support for NAND boot using simple NAND drivers that 236 expose the cmd_ctrl() interface. 237endif 238 239endif # if NAND 240