1 2menuconfig NAND 3 bool "NAND Device Support" 4if NAND 5 6config SYS_NAND_SELF_INIT 7 bool 8 help 9 This option, if enabled, provides more flexible and linux-like 10 NAND initialization process. 11 12config NAND_DENALI 13 bool "Support Denali NAND controller" 14 select SYS_NAND_SELF_INIT 15 imply CMD_NAND 16 help 17 Enable support for the Denali NAND controller. 18 19config NAND_DENALI_DT 20 bool "Support Denali NAND controller as a DT device" 21 depends on NAND_DENALI && OF_CONTROL && DM 22 help 23 Enable the driver for NAND flash on platforms using a Denali NAND 24 controller as a DT device. 25 26config SYS_NAND_DENALI_64BIT 27 bool "Use 64-bit variant of Denali NAND controller" 28 depends on NAND_DENALI 29 help 30 The Denali NAND controller IP has some variations in terms of 31 the bus interface. The DMA setup sequence is completely differenct 32 between 32bit / 64bit AXI bus variants. 33 34 If your Denali NAND controller is the 64-bit variant, say Y. 35 Otherwise (32 bit), say N. 36 37config NAND_DENALI_SPARE_AREA_SKIP_BYTES 38 int "Number of bytes skipped in OOB area" 39 depends on NAND_DENALI 40 range 0 63 41 help 42 This option specifies the number of bytes to skip from the beginning 43 of OOB area before last ECC sector data starts. This is potentially 44 used to preserve the bad block marker in the OOB area. 45 46config NAND_OMAP_GPMC 47 bool "Support OMAP GPMC NAND controller" 48 depends on ARCH_OMAP2PLUS 49 help 50 Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms. 51 GPMC controller is used for parallel NAND flash devices, and can 52 do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8 53 and BCH16 ECC algorithms. 54 55config NAND_OMAP_GPMC_PREFETCH 56 bool "Enable GPMC Prefetch" 57 depends on NAND_OMAP_GPMC 58 default y 59 help 60 On OMAP platforms that use the GPMC controller 61 (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that 62 uses the prefetch mode to speed up read operations. 63 64config NAND_OMAP_ELM 65 bool "Enable ELM driver for OMAPxx and AMxx platforms." 66 depends on NAND_OMAP_GPMC && !OMAP34XX 67 help 68 ELM controller is used for ECC error detection (not ECC calculation) 69 of BCH4, BCH8 and BCH16 ECC algorithms. 70 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, 71 thus such SoC platforms need to depend on software library for ECC error 72 detection. However ECC calculation on such plaforms would still be 73 done by GPMC controller. 74 75config NAND_VF610_NFC 76 bool "Support for Freescale NFC for VF610" 77 select SYS_NAND_SELF_INIT 78 imply CMD_NAND 79 help 80 Enables support for NAND Flash Controller on some Freescale 81 processors like the VF610, MCF54418 or Kinetis K70. 82 The driver supports a maximum 2k page size. The driver 83 currently does not support hardware ECC. 84 85choice 86 prompt "Hardware ECC strength" 87 depends on NAND_VF610_NFC 88 default SYS_NAND_VF610_NFC_45_ECC_BYTES 89 help 90 Select the ECC strength used in the hardware BCH ECC block. 91 92config SYS_NAND_VF610_NFC_45_ECC_BYTES 93 bool "24-error correction (45 ECC bytes)" 94 95config SYS_NAND_VF610_NFC_60_ECC_BYTES 96 bool "32-error correction (60 ECC bytes)" 97 98endchoice 99 100config NAND_PXA3XX 101 bool "Support for NAND on PXA3xx and Armada 370/XP/38x" 102 select SYS_NAND_SELF_INIT 103 imply CMD_NAND 104 help 105 This enables the driver for the NAND flash device found on 106 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2). 107 108config NAND_SUNXI 109 bool "Support for NAND on Allwinner SoCs" 110 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I 111 select SYS_NAND_SELF_INIT 112 select SYS_NAND_U_BOOT_LOCATIONS 113 imply CMD_NAND 114 ---help--- 115 Enable support for NAND. This option enables the standard and 116 SPL drivers. 117 The SPL driver only supports reading from the NAND using DMA 118 transfers. 119 120if NAND_SUNXI 121 122config NAND_SUNXI_SPL_ECC_STRENGTH 123 int "Allwinner NAND SPL ECC Strength" 124 default 64 125 126config NAND_SUNXI_SPL_ECC_SIZE 127 int "Allwinner NAND SPL ECC Step Size" 128 default 1024 129 130config NAND_SUNXI_SPL_USABLE_PAGE_SIZE 131 int "Allwinner NAND SPL Usable Page Size" 132 default 1024 133 134endif 135 136config NAND_ARASAN 137 bool "Configure Arasan Nand" 138 imply CMD_NAND 139 help 140 This enables Nand driver support for Arasan nand flash 141 controller. This uses the hardware ECC for read and 142 write operations. 143 144config NAND_MXC 145 bool "MXC NAND support" 146 depends on CPU_ARM926EJS || CPU_ARM1136 || MX5 147 imply CMD_NAND 148 help 149 This enables the NAND driver for the NAND flash controller on the 150 i.MX27 / i.MX31 / i.MX5 rocessors. 151 152config NAND_MXS 153 bool "MXS NAND support" 154 depends on MX6 || MX7 155 imply CMD_NAND 156 help 157 This enables NAND driver for the NAND flash controller on the 158 MXS processors. 159 160config NAND_ZYNQ 161 bool "Support for Zynq Nand controller" 162 select SYS_NAND_SELF_INIT 163 imply CMD_NAND 164 help 165 This enables Nand driver support for Nand flash controller 166 found on Zynq SoC. 167 168comment "Generic NAND options" 169 170# Enhance depends when converting drivers to Kconfig which use this config 171# option (mxc_nand, ndfc, omap_gpmc). 172config SYS_NAND_BUSWIDTH_16BIT 173 bool "Use 16-bit NAND interface" 174 depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI 175 help 176 Indicates that NAND device has 16-bit wide data-bus. In absence of this 177 config, bus-width of NAND device is assumed to be either 8-bit and later 178 determined by reading ONFI params. 179 Above config is useful when NAND device's bus-width information cannot 180 be determined from on-chip ONFI params, like in following scenarios: 181 - SPL boot does not support reading of ONFI parameters. This is done to 182 keep SPL code foot-print small. 183 - In current U-Boot flow using nand_init(), driver initialization 184 happens in board_nand_init() which is called before any device probe 185 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are 186 not available while configuring controller. So a static CONFIG_NAND_xx 187 is needed to know the device's bus-width in advance. 188 189if SPL 190 191config SYS_NAND_U_BOOT_LOCATIONS 192 bool "Define U-boot binaries locations in NAND" 193 help 194 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig. 195 This option should not be enabled when compiling U-boot for boards 196 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h 197 file. 198 199config SYS_NAND_U_BOOT_OFFS 200 hex "Location in NAND to read U-Boot from" 201 default 0x800000 if NAND_SUNXI 202 depends on SYS_NAND_U_BOOT_LOCATIONS 203 help 204 Set the offset from the start of the nand where u-boot should be 205 loaded from. 206 207config SYS_NAND_U_BOOT_OFFS_REDUND 208 hex "Location in NAND to read U-Boot from" 209 default SYS_NAND_U_BOOT_OFFS 210 depends on SYS_NAND_U_BOOT_LOCATIONS 211 help 212 Set the offset from the start of the nand where the redundant u-boot 213 should be loaded from. 214 215config SPL_NAND_AM33XX_BCH 216 bool "Enables SPL-NAND driver which supports ELM based" 217 depends on NAND_OMAP_GPMC && !OMAP34XX 218 default y 219 help 220 Hardware ECC correction. This is useful for platforms which have ELM 221 hardware engine and use NAND boot mode. 222 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, 223 so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling 224 SPL-NAND driver with software ECC correction support. 225 226config SPL_NAND_DENALI 227 bool "Support Denali NAND controller for SPL" 228 help 229 This is a small implementation of the Denali NAND controller 230 for use on SPL. 231 232config SPL_NAND_SIMPLE 233 bool "Use simple SPL NAND driver" 234 depends on !SPL_NAND_AM33XX_BCH 235 help 236 Support for NAND boot using simple NAND drivers that 237 expose the cmd_ctrl() interface. 238endif 239 240endif # if NAND 241