xref: /openbmc/u-boot/drivers/mtd/jedec_flash.c (revision 90447ecb)
181b20cccSMichael Schwingen /*
281b20cccSMichael Schwingen  * (C) Copyright 2007
381b20cccSMichael Schwingen  * Michael Schwingen, <michael@schwingen.org>
481b20cccSMichael Schwingen  *
581b20cccSMichael Schwingen  * based in great part on jedec_probe.c from linux kernel:
681b20cccSMichael Schwingen  * (C) 2000 Red Hat. GPL'd.
781b20cccSMichael Schwingen  * Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com
881b20cccSMichael Schwingen  *
981b20cccSMichael Schwingen  * See file CREDITS for list of people who contributed to this
1081b20cccSMichael Schwingen  * project.
1181b20cccSMichael Schwingen  *
1281b20cccSMichael Schwingen  * This program is free software; you can redistribute it and/or
1381b20cccSMichael Schwingen  * modify it under the terms of the GNU General Public License as
1481b20cccSMichael Schwingen  * published by the Free Software Foundation; either version 2 of
1581b20cccSMichael Schwingen  * the License, or (at your option) any later version.
1681b20cccSMichael Schwingen  *
1781b20cccSMichael Schwingen  * This program is distributed in the hope that it will be useful,
1881b20cccSMichael Schwingen  * but WITHOUT ANY WARRANTY; without even the implied warranty of
1981b20cccSMichael Schwingen  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
2081b20cccSMichael Schwingen  * GNU General Public License for more details.
2181b20cccSMichael Schwingen  *
2281b20cccSMichael Schwingen  * You should have received a copy of the GNU General Public License
2381b20cccSMichael Schwingen  * along with this program; if not, write to the Free Software
2481b20cccSMichael Schwingen  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
2581b20cccSMichael Schwingen  * MA 02111-1307 USA
2681b20cccSMichael Schwingen  *
2781b20cccSMichael Schwingen  */
2881b20cccSMichael Schwingen 
2981b20cccSMichael Schwingen /* The DEBUG define must be before common to enable debugging */
3081b20cccSMichael Schwingen /*#define DEBUG*/
3181b20cccSMichael Schwingen 
3281b20cccSMichael Schwingen #include <common.h>
3381b20cccSMichael Schwingen #include <asm/processor.h>
3481b20cccSMichael Schwingen #include <asm/io.h>
3581b20cccSMichael Schwingen #include <asm/byteorder.h>
3681b20cccSMichael Schwingen #include <environment.h>
3781b20cccSMichael Schwingen 
3881b20cccSMichael Schwingen #define P_ID_AMD_STD CFI_CMDSET_AMD_LEGACY
3981b20cccSMichael Schwingen 
4081b20cccSMichael Schwingen /* Manufacturers */
4181b20cccSMichael Schwingen #define MANUFACTURER_AMD	0x0001
4281b20cccSMichael Schwingen #define MANUFACTURER_SST	0x00BF
4381b20cccSMichael Schwingen 
4481b20cccSMichael Schwingen /* AMD */
4581b20cccSMichael Schwingen #define AM29DL800BB	0x22C8
4681b20cccSMichael Schwingen #define AM29DL800BT	0x224A
4781b20cccSMichael Schwingen 
4881b20cccSMichael Schwingen #define AM29F800BB	0x2258
4981b20cccSMichael Schwingen #define AM29F800BT	0x22D6
5081b20cccSMichael Schwingen #define AM29LV400BB	0x22BA
5181b20cccSMichael Schwingen #define AM29LV400BT	0x22B9
5281b20cccSMichael Schwingen #define AM29LV800BB	0x225B
5381b20cccSMichael Schwingen #define AM29LV800BT	0x22DA
5481b20cccSMichael Schwingen #define AM29LV160DT	0x22C4
5581b20cccSMichael Schwingen #define AM29LV160DB	0x2249
5681b20cccSMichael Schwingen #define AM29F017D	0x003D
5781b20cccSMichael Schwingen #define AM29F016D	0x00AD
5881b20cccSMichael Schwingen #define AM29F080	0x00D5
5981b20cccSMichael Schwingen #define AM29F040	0x00A4
6081b20cccSMichael Schwingen #define AM29LV040B	0x004F
6181b20cccSMichael Schwingen #define AM29F032B	0x0041
6281b20cccSMichael Schwingen #define AM29F002T	0x00B0
6381b20cccSMichael Schwingen 
6481b20cccSMichael Schwingen /* SST */
6581b20cccSMichael Schwingen #define SST39LF800	0x2781
6681b20cccSMichael Schwingen #define SST39LF160	0x2782
6781b20cccSMichael Schwingen #define SST39VF1601	0x234b
6881b20cccSMichael Schwingen #define SST39LF512	0x00D4
6981b20cccSMichael Schwingen #define SST39LF010	0x00D5
7081b20cccSMichael Schwingen #define SST39LF020	0x00D6
7181b20cccSMichael Schwingen #define SST39LF040	0x00D7
7281b20cccSMichael Schwingen #define SST39SF010A	0x00B5
7381b20cccSMichael Schwingen #define SST39SF020A	0x00B6
7481b20cccSMichael Schwingen 
7581b20cccSMichael Schwingen 
7681b20cccSMichael Schwingen /*
7781b20cccSMichael Schwingen  * Unlock address sets for AMD command sets.
7881b20cccSMichael Schwingen  * Intel command sets use the MTD_UADDR_UNNECESSARY.
7981b20cccSMichael Schwingen  * Each identifier, except MTD_UADDR_UNNECESSARY, and
8081b20cccSMichael Schwingen  * MTD_UADDR_NO_SUPPORT must be defined below in unlock_addrs[].
8181b20cccSMichael Schwingen  * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure
8281b20cccSMichael Schwingen  * initialization need not require initializing all of the
8381b20cccSMichael Schwingen  * unlock addresses for all bit widths.
8481b20cccSMichael Schwingen  */
8581b20cccSMichael Schwingen enum uaddr {
8681b20cccSMichael Schwingen 	MTD_UADDR_NOT_SUPPORTED = 0,	/* data width not supported */
8781b20cccSMichael Schwingen 	MTD_UADDR_0x0555_0x02AA,
8881b20cccSMichael Schwingen 	MTD_UADDR_0x0555_0x0AAA,
8981b20cccSMichael Schwingen 	MTD_UADDR_0x5555_0x2AAA,
9081b20cccSMichael Schwingen 	MTD_UADDR_0x0AAA_0x0555,
9181b20cccSMichael Schwingen 	MTD_UADDR_DONT_CARE,		/* Requires an arbitrary address */
9281b20cccSMichael Schwingen 	MTD_UADDR_UNNECESSARY,		/* Does not require any address */
9381b20cccSMichael Schwingen };
9481b20cccSMichael Schwingen 
9581b20cccSMichael Schwingen 
9681b20cccSMichael Schwingen struct unlock_addr {
9781b20cccSMichael Schwingen 	u32 addr1;
9881b20cccSMichael Schwingen 	u32 addr2;
9981b20cccSMichael Schwingen };
10081b20cccSMichael Schwingen 
10181b20cccSMichael Schwingen 
10281b20cccSMichael Schwingen /*
10381b20cccSMichael Schwingen  * I don't like the fact that the first entry in unlock_addrs[]
10481b20cccSMichael Schwingen  * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore,
10581b20cccSMichael Schwingen  * should not be used.  The  problem is that structures with
10681b20cccSMichael Schwingen  * initializers have extra fields initialized to 0.  It is _very_
10781b20cccSMichael Schwingen  * desireable to have the unlock address entries for unsupported
10881b20cccSMichael Schwingen  * data widths automatically initialized - that means that
10981b20cccSMichael Schwingen  * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here
11081b20cccSMichael Schwingen  * must go unused.
11181b20cccSMichael Schwingen  */
11281b20cccSMichael Schwingen static const struct unlock_addr  unlock_addrs[] = {
11381b20cccSMichael Schwingen 	[MTD_UADDR_NOT_SUPPORTED] = {
11481b20cccSMichael Schwingen 		.addr1 = 0xffff,
11581b20cccSMichael Schwingen 		.addr2 = 0xffff
11681b20cccSMichael Schwingen 	},
11781b20cccSMichael Schwingen 
11881b20cccSMichael Schwingen 	[MTD_UADDR_0x0555_0x02AA] = {
11981b20cccSMichael Schwingen 		.addr1 = 0x0555,
12081b20cccSMichael Schwingen 		.addr2 = 0x02aa
12181b20cccSMichael Schwingen 	},
12281b20cccSMichael Schwingen 
12381b20cccSMichael Schwingen 	[MTD_UADDR_0x0555_0x0AAA] = {
12481b20cccSMichael Schwingen 		.addr1 = 0x0555,
12581b20cccSMichael Schwingen 		.addr2 = 0x0aaa
12681b20cccSMichael Schwingen 	},
12781b20cccSMichael Schwingen 
12881b20cccSMichael Schwingen 	[MTD_UADDR_0x5555_0x2AAA] = {
12981b20cccSMichael Schwingen 		.addr1 = 0x5555,
13081b20cccSMichael Schwingen 		.addr2 = 0x2aaa
13181b20cccSMichael Schwingen 	},
13281b20cccSMichael Schwingen 
13381b20cccSMichael Schwingen 	[MTD_UADDR_0x0AAA_0x0555] = {
13481b20cccSMichael Schwingen 		.addr1 = 0x0AAA,
13581b20cccSMichael Schwingen 		.addr2 = 0x0555
13681b20cccSMichael Schwingen 	},
13781b20cccSMichael Schwingen 
13881b20cccSMichael Schwingen 	[MTD_UADDR_DONT_CARE] = {
13981b20cccSMichael Schwingen 		.addr1 = 0x0000,      /* Doesn't matter which address */
14081b20cccSMichael Schwingen 		.addr2 = 0x0000       /* is used - must be last entry */
14181b20cccSMichael Schwingen 	},
14281b20cccSMichael Schwingen 
14381b20cccSMichael Schwingen 	[MTD_UADDR_UNNECESSARY] = {
14481b20cccSMichael Schwingen 		.addr1 = 0x0000,
14581b20cccSMichael Schwingen 		.addr2 = 0x0000
14681b20cccSMichael Schwingen 	}
14781b20cccSMichael Schwingen };
14881b20cccSMichael Schwingen 
14981b20cccSMichael Schwingen 
15081b20cccSMichael Schwingen struct amd_flash_info {
15181b20cccSMichael Schwingen 	const __u16 mfr_id;
15281b20cccSMichael Schwingen 	const __u16 dev_id;
15381b20cccSMichael Schwingen 	const char *name;
15481b20cccSMichael Schwingen 	const int DevSize;
15581b20cccSMichael Schwingen 	const int NumEraseRegions;
15681b20cccSMichael Schwingen 	const int CmdSet;
15781b20cccSMichael Schwingen 	const __u8 uaddr[4];		/* unlock addrs for 8, 16, 32, 64 */
15881b20cccSMichael Schwingen 	const ulong regions[6];
15981b20cccSMichael Schwingen };
16081b20cccSMichael Schwingen 
16181b20cccSMichael Schwingen #define ERASEINFO(size,blocks) (size<<8)|(blocks-1)
16281b20cccSMichael Schwingen 
16381b20cccSMichael Schwingen #define SIZE_64KiB  16
16481b20cccSMichael Schwingen #define SIZE_128KiB 17
16581b20cccSMichael Schwingen #define SIZE_256KiB 18
16681b20cccSMichael Schwingen #define SIZE_512KiB 19
16781b20cccSMichael Schwingen #define SIZE_1MiB   20
16881b20cccSMichael Schwingen #define SIZE_2MiB   21
16981b20cccSMichael Schwingen #define SIZE_4MiB   22
17081b20cccSMichael Schwingen #define SIZE_8MiB   23
17181b20cccSMichael Schwingen 
17281b20cccSMichael Schwingen static const struct amd_flash_info jedec_table[] = {
17381b20cccSMichael Schwingen #ifdef CFG_FLASH_LEGACY_256Kx8
17481b20cccSMichael Schwingen 	{
17581b20cccSMichael Schwingen 		.mfr_id		= MANUFACTURER_SST,
17681b20cccSMichael Schwingen 		.dev_id		= SST39LF020,
17781b20cccSMichael Schwingen 		.name		= "SST 39LF020",
17881b20cccSMichael Schwingen 		.uaddr		= {
17981b20cccSMichael Schwingen 			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
18081b20cccSMichael Schwingen 		},
18181b20cccSMichael Schwingen 		.DevSize	= SIZE_256KiB,
18281b20cccSMichael Schwingen 		.CmdSet		= P_ID_AMD_STD,
18381b20cccSMichael Schwingen 		.NumEraseRegions= 1,
18481b20cccSMichael Schwingen 		.regions	= {
18581b20cccSMichael Schwingen 			ERASEINFO(0x01000,64),
18681b20cccSMichael Schwingen 		}
18781b20cccSMichael Schwingen 	},
18881b20cccSMichael Schwingen #endif
18981b20cccSMichael Schwingen #ifdef CFG_FLASH_LEGACY_512Kx8
19081b20cccSMichael Schwingen 	{
19181b20cccSMichael Schwingen 		.mfr_id		= MANUFACTURER_AMD,
19281b20cccSMichael Schwingen 		.dev_id		= AM29LV040B,
19381b20cccSMichael Schwingen 		.name		= "AMD AM29LV040B",
19481b20cccSMichael Schwingen 		.uaddr		= {
19581b20cccSMichael Schwingen 			[0] = MTD_UADDR_0x0555_0x02AA /* x8 */
19681b20cccSMichael Schwingen 		},
19781b20cccSMichael Schwingen 		.DevSize	= SIZE_512KiB,
19881b20cccSMichael Schwingen 		.CmdSet		= P_ID_AMD_STD,
19981b20cccSMichael Schwingen 		.NumEraseRegions= 1,
20081b20cccSMichael Schwingen 		.regions	= {
20181b20cccSMichael Schwingen 			ERASEINFO(0x10000,8),
20281b20cccSMichael Schwingen 		}
20381b20cccSMichael Schwingen 	},
20481b20cccSMichael Schwingen 	{
20581b20cccSMichael Schwingen 		.mfr_id		= MANUFACTURER_SST,
20681b20cccSMichael Schwingen 		.dev_id		= SST39LF040,
20781b20cccSMichael Schwingen 		.name		= "SST 39LF040",
20881b20cccSMichael Schwingen 		.uaddr		= {
20981b20cccSMichael Schwingen 			[0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
21081b20cccSMichael Schwingen 		},
21181b20cccSMichael Schwingen 		.DevSize	= SIZE_512KiB,
21281b20cccSMichael Schwingen 		.CmdSet		= P_ID_AMD_STD,
21381b20cccSMichael Schwingen 		.NumEraseRegions= 1,
21481b20cccSMichael Schwingen 		.regions	= {
21581b20cccSMichael Schwingen 			ERASEINFO(0x01000,128),
21681b20cccSMichael Schwingen 		}
21781b20cccSMichael Schwingen 	},
21881b20cccSMichael Schwingen #endif
219*90447ecbSTor Krill #ifdef CFG_FLASH_LEGACY_512Kx16
220*90447ecbSTor Krill 	{
221*90447ecbSTor Krill 		.mfr_id		= MANUFACTURER_AMD,
222*90447ecbSTor Krill 		.dev_id		= AM29LV400BB,
223*90447ecbSTor Krill 		.name		= "AMD AM29LV400BB",
224*90447ecbSTor Krill 		.uaddr		= {
225*90447ecbSTor Krill 			[1] = MTD_UADDR_0x0555_0x02AA /* x16 */
226*90447ecbSTor Krill 		},
227*90447ecbSTor Krill 		.DevSize	= SIZE_512KiB,
228*90447ecbSTor Krill 		.CmdSet		= CFI_CMDSET_AMD_LEGACY,
229*90447ecbSTor Krill 		.NumEraseRegions= 4,
230*90447ecbSTor Krill 		.regions	= {
231*90447ecbSTor Krill 			ERASEINFO(0x04000,1),
232*90447ecbSTor Krill 			ERASEINFO(0x02000,2),
233*90447ecbSTor Krill 			ERASEINFO(0x08000,1),
234*90447ecbSTor Krill 			ERASEINFO(0x10000,7),
235*90447ecbSTor Krill 		}
236*90447ecbSTor Krill 	},
237*90447ecbSTor Krill #endif
23881b20cccSMichael Schwingen };
23981b20cccSMichael Schwingen 
24081b20cccSMichael Schwingen static inline void fill_info(flash_info_t *info, const struct amd_flash_info *jedec_entry, ulong base)
24181b20cccSMichael Schwingen {
24281b20cccSMichael Schwingen 	int i,j;
24381b20cccSMichael Schwingen 	int sect_cnt;
24481b20cccSMichael Schwingen 	int size_ratio;
24581b20cccSMichael Schwingen 	int total_size;
24681b20cccSMichael Schwingen 	enum uaddr uaddr_idx;
24781b20cccSMichael Schwingen 
24881b20cccSMichael Schwingen 	size_ratio = info->portwidth / info->chipwidth;
24981b20cccSMichael Schwingen 
25081b20cccSMichael Schwingen 	debug("Found JEDEC Flash: %s\n", jedec_entry->name);
25181b20cccSMichael Schwingen 	info->vendor = jedec_entry->CmdSet;
25281b20cccSMichael Schwingen 	/* Todo: do we need device-specific timeouts? */
25381b20cccSMichael Schwingen 	info->erase_blk_tout = 30000;
25481b20cccSMichael Schwingen 	info->buffer_write_tout = 1000;
25581b20cccSMichael Schwingen 	info->write_tout = 100;
25681b20cccSMichael Schwingen 	info->name = jedec_entry->name;
25781b20cccSMichael Schwingen 
25881b20cccSMichael Schwingen 	/* copy unlock addresses from device table to CFI info struct. This
25981b20cccSMichael Schwingen 	   is just here because the addresses are in the table anyway - if
26081b20cccSMichael Schwingen 	   the flash is not detected due to wrong unlock addresses,
26181b20cccSMichael Schwingen 	   flash_detect_legacy would have to try all of them before we even
26281b20cccSMichael Schwingen 	   get here. */
26381b20cccSMichael Schwingen 	switch(info->chipwidth) {
26481b20cccSMichael Schwingen 	case FLASH_CFI_8BIT:
26581b20cccSMichael Schwingen 		uaddr_idx = jedec_entry->uaddr[0];
26681b20cccSMichael Schwingen 		break;
26781b20cccSMichael Schwingen 	case FLASH_CFI_16BIT:
26881b20cccSMichael Schwingen 		uaddr_idx = jedec_entry->uaddr[1];
26981b20cccSMichael Schwingen 		break;
27081b20cccSMichael Schwingen 	case FLASH_CFI_32BIT:
27181b20cccSMichael Schwingen 		uaddr_idx = jedec_entry->uaddr[2];
27281b20cccSMichael Schwingen 		break;
27381b20cccSMichael Schwingen 	default:
27481b20cccSMichael Schwingen 		uaddr_idx = MTD_UADDR_NOT_SUPPORTED;
27581b20cccSMichael Schwingen 		break;
27681b20cccSMichael Schwingen 	}
27781b20cccSMichael Schwingen 
27881b20cccSMichael Schwingen 	debug("unlock address index %d\n", uaddr_idx);
27981b20cccSMichael Schwingen 	info->addr_unlock1 = unlock_addrs[uaddr_idx].addr1;
28081b20cccSMichael Schwingen 	info->addr_unlock2 = unlock_addrs[uaddr_idx].addr2;
28181b20cccSMichael Schwingen 	debug("unlock addresses are 0x%x/0x%x\n", info->addr_unlock1, info->addr_unlock2);
28281b20cccSMichael Schwingen 
28381b20cccSMichael Schwingen 	sect_cnt = 0;
28481b20cccSMichael Schwingen 	total_size = 0;
28581b20cccSMichael Schwingen 	for (i = 0; i < jedec_entry->NumEraseRegions; i++) {
28681b20cccSMichael Schwingen 		ulong erase_region_size = jedec_entry->regions[i] >> 8;
28781b20cccSMichael Schwingen 		ulong erase_region_count = (jedec_entry->regions[i] & 0xff) + 1;
28881b20cccSMichael Schwingen 
28981b20cccSMichael Schwingen 		total_size += erase_region_size * erase_region_count;
29081b20cccSMichael Schwingen 		debug ("erase_region_count = %d erase_region_size = %d\n",
29181b20cccSMichael Schwingen 		       erase_region_count, erase_region_size);
29281b20cccSMichael Schwingen 		for (j = 0; j < erase_region_count; j++) {
29381b20cccSMichael Schwingen 			if (sect_cnt >= CFG_MAX_FLASH_SECT) {
29481b20cccSMichael Schwingen 				printf("ERROR: too many flash sectors\n");
29581b20cccSMichael Schwingen 				break;
29681b20cccSMichael Schwingen 			}
29781b20cccSMichael Schwingen 			info->start[sect_cnt] = base;
29881b20cccSMichael Schwingen 			base += (erase_region_size * size_ratio);
29981b20cccSMichael Schwingen 			sect_cnt++;
30081b20cccSMichael Schwingen 		}
30181b20cccSMichael Schwingen 	}
30281b20cccSMichael Schwingen 	info->sector_count = sect_cnt;
30381b20cccSMichael Schwingen 	info->size = total_size * size_ratio;
30481b20cccSMichael Schwingen }
30581b20cccSMichael Schwingen 
30681b20cccSMichael Schwingen /*-----------------------------------------------------------------------
30781b20cccSMichael Schwingen  * match jedec ids against table. If a match is found, fill flash_info entry
30881b20cccSMichael Schwingen  */
30981b20cccSMichael Schwingen int jedec_flash_match(flash_info_t *info, ulong base)
31081b20cccSMichael Schwingen {
31181b20cccSMichael Schwingen 	int ret = 0;
31281b20cccSMichael Schwingen 	int i;
31381b20cccSMichael Schwingen 	ulong mask = 0xFFFF;
31481b20cccSMichael Schwingen 	if (info->chipwidth == 1)
31581b20cccSMichael Schwingen 		mask = 0xFF;
31681b20cccSMichael Schwingen 
31781b20cccSMichael Schwingen 	for (i = 0; i < ARRAY_SIZE(jedec_table); i++) {
31881b20cccSMichael Schwingen 		if ((jedec_table[i].mfr_id & mask) == (info->manufacturer_id & mask) &&
31981b20cccSMichael Schwingen 		    (jedec_table[i].dev_id & mask) == (info->device_id & mask)) {
32081b20cccSMichael Schwingen 			fill_info(info, &jedec_table[i], base);
32181b20cccSMichael Schwingen 			ret = 1;
32281b20cccSMichael Schwingen 			break;
32381b20cccSMichael Schwingen 		}
32481b20cccSMichael Schwingen 	}
32581b20cccSMichael Schwingen 	return ret;
32681b20cccSMichael Schwingen }
327