1 /* 2 * (C) Copyright 2002-2004 3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com 4 * 5 * Copyright (C) 2003 Arabella Software Ltd. 6 * Yuli Barcohen <yuli@arabellasw.com> 7 * 8 * Copyright (C) 2004 9 * Ed Okerson 10 * 11 * Copyright (C) 2006 12 * Tolunay Orkun <listmember@orkun.us> 13 * 14 * SPDX-License-Identifier: GPL-2.0+ 15 */ 16 17 /* The DEBUG define must be before common to enable debugging */ 18 /* #define DEBUG */ 19 20 #include <common.h> 21 #include <asm/processor.h> 22 #include <asm/io.h> 23 #include <asm/byteorder.h> 24 #include <asm/unaligned.h> 25 #include <environment.h> 26 #include <mtd/cfi_flash.h> 27 #include <watchdog.h> 28 29 /* 30 * This file implements a Common Flash Interface (CFI) driver for 31 * U-Boot. 32 * 33 * The width of the port and the width of the chips are determined at 34 * initialization. These widths are used to calculate the address for 35 * access CFI data structures. 36 * 37 * References 38 * JEDEC Standard JESD68 - Common Flash Interface (CFI) 39 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes 40 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets 41 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet 42 * AMD CFI Specification, Release 2.0 December 1, 2001 43 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte 44 * Device IDs, Publication Number 25538 Revision A, November 8, 2001 45 * 46 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between 47 * reading and writing ... (yes there is such a Hardware). 48 */ 49 50 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; 51 #ifdef CONFIG_FLASH_CFI_MTD 52 static uint flash_verbose = 1; 53 #else 54 #define flash_verbose 1 55 #endif 56 57 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ 58 59 /* 60 * Check if chip width is defined. If not, start detecting with 8bit. 61 */ 62 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH 63 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT 64 #endif 65 66 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 67 #define __maybe_weak __weak 68 #else 69 #define __maybe_weak static 70 #endif 71 72 /* 73 * 0xffff is an undefined value for the configuration register. When 74 * this value is returned, the configuration register shall not be 75 * written at all (default mode). 76 */ 77 static u16 cfi_flash_config_reg(int i) 78 { 79 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS 80 return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i]; 81 #else 82 return 0xffff; 83 #endif 84 } 85 86 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT) 87 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT; 88 #endif 89 90 __weak phys_addr_t cfi_flash_bank_addr(int i) 91 { 92 return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i]; 93 } 94 95 __weak unsigned long cfi_flash_bank_size(int i) 96 { 97 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES 98 return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i]; 99 #else 100 return 0; 101 #endif 102 } 103 104 __maybe_weak void flash_write8(u8 value, void *addr) 105 { 106 __raw_writeb(value, addr); 107 } 108 109 __maybe_weak void flash_write16(u16 value, void *addr) 110 { 111 __raw_writew(value, addr); 112 } 113 114 __maybe_weak void flash_write32(u32 value, void *addr) 115 { 116 __raw_writel(value, addr); 117 } 118 119 __maybe_weak void flash_write64(u64 value, void *addr) 120 { 121 /* No architectures currently implement __raw_writeq() */ 122 *(volatile u64 *)addr = value; 123 } 124 125 __maybe_weak u8 flash_read8(void *addr) 126 { 127 return __raw_readb(addr); 128 } 129 130 __maybe_weak u16 flash_read16(void *addr) 131 { 132 return __raw_readw(addr); 133 } 134 135 __maybe_weak u32 flash_read32(void *addr) 136 { 137 return __raw_readl(addr); 138 } 139 140 __maybe_weak u64 flash_read64(void *addr) 141 { 142 /* No architectures currently implement __raw_readq() */ 143 return *(volatile u64 *)addr; 144 } 145 146 /*----------------------------------------------------------------------- 147 */ 148 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 149 flash_info_t *flash_get_info(ulong base) 150 { 151 int i; 152 flash_info_t *info; 153 154 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { 155 info = &flash_info[i]; 156 if (info->size && info->start[0] <= base && 157 base <= info->start[0] + info->size - 1) 158 return info; 159 } 160 161 return NULL; 162 } 163 #endif 164 165 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) 166 { 167 if (sect != (info->sector_count - 1)) 168 return info->start[sect + 1] - info->start[sect]; 169 else 170 return info->start[0] + info->size - info->start[sect]; 171 } 172 173 /*----------------------------------------------------------------------- 174 * create an address based on the offset and the port width 175 */ 176 static inline void * 177 flash_map (flash_info_t * info, flash_sect_t sect, uint offset) 178 { 179 unsigned int byte_offset = offset * info->portwidth; 180 181 return (void *)(info->start[sect] + byte_offset); 182 } 183 184 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, 185 unsigned int offset, void *addr) 186 { 187 } 188 189 /*----------------------------------------------------------------------- 190 * make a proper sized command based on the port and chip widths 191 */ 192 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) 193 { 194 int i; 195 int cword_offset; 196 int cp_offset; 197 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 198 u32 cmd_le = cpu_to_le32(cmd); 199 #endif 200 uchar val; 201 uchar *cp = (uchar *) cmdbuf; 202 203 for (i = info->portwidth; i > 0; i--){ 204 cword_offset = (info->portwidth-i)%info->chipwidth; 205 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 206 cp_offset = info->portwidth - i; 207 val = *((uchar*)&cmd_le + cword_offset); 208 #else 209 cp_offset = i - 1; 210 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1); 211 #endif 212 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val; 213 } 214 } 215 216 #ifdef DEBUG 217 /*----------------------------------------------------------------------- 218 * Debug support 219 */ 220 static void print_longlong (char *str, unsigned long long data) 221 { 222 int i; 223 char *cp; 224 225 cp = (char *) &data; 226 for (i = 0; i < 8; i++) 227 sprintf (&str[i * 2], "%2.2x", *cp++); 228 } 229 230 static void flash_printqry (struct cfi_qry *qry) 231 { 232 u8 *p = (u8 *)qry; 233 int x, y; 234 235 for (x = 0; x < sizeof(struct cfi_qry); x += 16) { 236 debug("%02x : ", x); 237 for (y = 0; y < 16; y++) 238 debug("%2.2x ", p[x + y]); 239 debug(" "); 240 for (y = 0; y < 16; y++) { 241 unsigned char c = p[x + y]; 242 if (c >= 0x20 && c <= 0x7e) 243 debug("%c", c); 244 else 245 debug("."); 246 } 247 debug("\n"); 248 } 249 } 250 #endif 251 252 253 /*----------------------------------------------------------------------- 254 * read a character at a port width address 255 */ 256 static inline uchar flash_read_uchar (flash_info_t * info, uint offset) 257 { 258 uchar *cp; 259 uchar retval; 260 261 cp = flash_map (info, 0, offset); 262 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 263 retval = flash_read8(cp); 264 #else 265 retval = flash_read8(cp + info->portwidth - 1); 266 #endif 267 flash_unmap (info, 0, offset, cp); 268 return retval; 269 } 270 271 /*----------------------------------------------------------------------- 272 * read a word at a port width address, assume 16bit bus 273 */ 274 static inline ushort flash_read_word (flash_info_t * info, uint offset) 275 { 276 ushort *addr, retval; 277 278 addr = flash_map (info, 0, offset); 279 retval = flash_read16 (addr); 280 flash_unmap (info, 0, offset, addr); 281 return retval; 282 } 283 284 285 /*----------------------------------------------------------------------- 286 * read a long word by picking the least significant byte of each maximum 287 * port size word. Swap for ppc format. 288 */ 289 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, 290 uint offset) 291 { 292 uchar *addr; 293 ulong retval; 294 295 #ifdef DEBUG 296 int x; 297 #endif 298 addr = flash_map (info, sect, offset); 299 300 #ifdef DEBUG 301 debug ("long addr is at %p info->portwidth = %d\n", addr, 302 info->portwidth); 303 for (x = 0; x < 4 * info->portwidth; x++) { 304 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); 305 } 306 #endif 307 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 308 retval = ((flash_read8(addr) << 16) | 309 (flash_read8(addr + info->portwidth) << 24) | 310 (flash_read8(addr + 2 * info->portwidth)) | 311 (flash_read8(addr + 3 * info->portwidth) << 8)); 312 #else 313 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) | 314 (flash_read8(addr + info->portwidth - 1) << 16) | 315 (flash_read8(addr + 4 * info->portwidth - 1) << 8) | 316 (flash_read8(addr + 3 * info->portwidth - 1))); 317 #endif 318 flash_unmap(info, sect, offset, addr); 319 320 return retval; 321 } 322 323 /* 324 * Write a proper sized command to the correct address 325 */ 326 void flash_write_cmd (flash_info_t * info, flash_sect_t sect, 327 uint offset, u32 cmd) 328 { 329 330 void *addr; 331 cfiword_t cword; 332 333 addr = flash_map (info, sect, offset); 334 flash_make_cmd (info, cmd, &cword); 335 switch (info->portwidth) { 336 case FLASH_CFI_8BIT: 337 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, 338 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 339 flash_write8(cword.c, addr); 340 break; 341 case FLASH_CFI_16BIT: 342 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, 343 cmd, cword.w, 344 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 345 flash_write16(cword.w, addr); 346 break; 347 case FLASH_CFI_32BIT: 348 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr, 349 cmd, cword.l, 350 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 351 flash_write32(cword.l, addr); 352 break; 353 case FLASH_CFI_64BIT: 354 #ifdef DEBUG 355 { 356 char str[20]; 357 358 print_longlong (str, cword.ll); 359 360 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", 361 addr, cmd, str, 362 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 363 } 364 #endif 365 flash_write64(cword.ll, addr); 366 break; 367 } 368 369 /* Ensure all the instructions are fully finished */ 370 sync(); 371 372 flash_unmap(info, sect, offset, addr); 373 } 374 375 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) 376 { 377 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START); 378 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK); 379 } 380 381 /*----------------------------------------------------------------------- 382 */ 383 static int flash_isequal (flash_info_t * info, flash_sect_t sect, 384 uint offset, uchar cmd) 385 { 386 void *addr; 387 cfiword_t cword; 388 int retval; 389 390 addr = flash_map (info, sect, offset); 391 flash_make_cmd (info, cmd, &cword); 392 393 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr); 394 switch (info->portwidth) { 395 case FLASH_CFI_8BIT: 396 debug ("is= %x %x\n", flash_read8(addr), cword.c); 397 retval = (flash_read8(addr) == cword.c); 398 break; 399 case FLASH_CFI_16BIT: 400 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w); 401 retval = (flash_read16(addr) == cword.w); 402 break; 403 case FLASH_CFI_32BIT: 404 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l); 405 retval = (flash_read32(addr) == cword.l); 406 break; 407 case FLASH_CFI_64BIT: 408 #ifdef DEBUG 409 { 410 char str1[20]; 411 char str2[20]; 412 413 print_longlong (str1, flash_read64(addr)); 414 print_longlong (str2, cword.ll); 415 debug ("is= %s %s\n", str1, str2); 416 } 417 #endif 418 retval = (flash_read64(addr) == cword.ll); 419 break; 420 default: 421 retval = 0; 422 break; 423 } 424 flash_unmap(info, sect, offset, addr); 425 426 return retval; 427 } 428 429 /*----------------------------------------------------------------------- 430 */ 431 static int flash_isset (flash_info_t * info, flash_sect_t sect, 432 uint offset, uchar cmd) 433 { 434 void *addr; 435 cfiword_t cword; 436 int retval; 437 438 addr = flash_map (info, sect, offset); 439 flash_make_cmd (info, cmd, &cword); 440 switch (info->portwidth) { 441 case FLASH_CFI_8BIT: 442 retval = ((flash_read8(addr) & cword.c) == cword.c); 443 break; 444 case FLASH_CFI_16BIT: 445 retval = ((flash_read16(addr) & cword.w) == cword.w); 446 break; 447 case FLASH_CFI_32BIT: 448 retval = ((flash_read32(addr) & cword.l) == cword.l); 449 break; 450 case FLASH_CFI_64BIT: 451 retval = ((flash_read64(addr) & cword.ll) == cword.ll); 452 break; 453 default: 454 retval = 0; 455 break; 456 } 457 flash_unmap(info, sect, offset, addr); 458 459 return retval; 460 } 461 462 /*----------------------------------------------------------------------- 463 */ 464 static int flash_toggle (flash_info_t * info, flash_sect_t sect, 465 uint offset, uchar cmd) 466 { 467 void *addr; 468 cfiword_t cword; 469 int retval; 470 471 addr = flash_map (info, sect, offset); 472 flash_make_cmd (info, cmd, &cword); 473 switch (info->portwidth) { 474 case FLASH_CFI_8BIT: 475 retval = flash_read8(addr) != flash_read8(addr); 476 break; 477 case FLASH_CFI_16BIT: 478 retval = flash_read16(addr) != flash_read16(addr); 479 break; 480 case FLASH_CFI_32BIT: 481 retval = flash_read32(addr) != flash_read32(addr); 482 break; 483 case FLASH_CFI_64BIT: 484 retval = ( (flash_read32( addr ) != flash_read32( addr )) || 485 (flash_read32(addr+4) != flash_read32(addr+4)) ); 486 break; 487 default: 488 retval = 0; 489 break; 490 } 491 flash_unmap(info, sect, offset, addr); 492 493 return retval; 494 } 495 496 /* 497 * flash_is_busy - check to see if the flash is busy 498 * 499 * This routine checks the status of the chip and returns true if the 500 * chip is busy. 501 */ 502 static int flash_is_busy (flash_info_t * info, flash_sect_t sect) 503 { 504 int retval; 505 506 switch (info->vendor) { 507 case CFI_CMDSET_INTEL_PROG_REGIONS: 508 case CFI_CMDSET_INTEL_STANDARD: 509 case CFI_CMDSET_INTEL_EXTENDED: 510 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE); 511 break; 512 case CFI_CMDSET_AMD_STANDARD: 513 case CFI_CMDSET_AMD_EXTENDED: 514 #ifdef CONFIG_FLASH_CFI_LEGACY 515 case CFI_CMDSET_AMD_LEGACY: 516 #endif 517 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); 518 break; 519 default: 520 retval = 0; 521 } 522 debug ("flash_is_busy: %d\n", retval); 523 return retval; 524 } 525 526 /*----------------------------------------------------------------------- 527 * wait for XSR.7 to be set. Time out with an error if it does not. 528 * This routine does not set the flash to read-array mode. 529 */ 530 static int flash_status_check (flash_info_t * info, flash_sect_t sector, 531 ulong tout, char *prompt) 532 { 533 ulong start; 534 535 #if CONFIG_SYS_HZ != 1000 536 if ((ulong)CONFIG_SYS_HZ > 100000) 537 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */ 538 else 539 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000); 540 #endif 541 542 /* Wait for command completion */ 543 #ifdef CONFIG_SYS_LOW_RES_TIMER 544 reset_timer(); 545 #endif 546 start = get_timer (0); 547 WATCHDOG_RESET(); 548 while (flash_is_busy (info, sector)) { 549 if (get_timer (start) > tout) { 550 printf ("Flash %s timeout at address %lx data %lx\n", 551 prompt, info->start[sector], 552 flash_read_long (info, sector, 0)); 553 flash_write_cmd (info, sector, 0, info->cmd_reset); 554 udelay(1); 555 return ERR_TIMOUT; 556 } 557 udelay (1); /* also triggers watchdog */ 558 } 559 return ERR_OK; 560 } 561 562 /*----------------------------------------------------------------------- 563 * Wait for XSR.7 to be set, if it times out print an error, otherwise 564 * do a full status check. 565 * 566 * This routine sets the flash to read-array mode. 567 */ 568 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, 569 ulong tout, char *prompt) 570 { 571 int retcode; 572 573 retcode = flash_status_check (info, sector, tout, prompt); 574 switch (info->vendor) { 575 case CFI_CMDSET_INTEL_PROG_REGIONS: 576 case CFI_CMDSET_INTEL_EXTENDED: 577 case CFI_CMDSET_INTEL_STANDARD: 578 if ((retcode == ERR_OK) 579 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { 580 retcode = ERR_INVAL; 581 printf ("Flash %s error at address %lx\n", prompt, 582 info->start[sector]); 583 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | 584 FLASH_STATUS_PSLBS)) { 585 puts ("Command Sequence Error.\n"); 586 } else if (flash_isset (info, sector, 0, 587 FLASH_STATUS_ECLBS)) { 588 puts ("Block Erase Error.\n"); 589 retcode = ERR_NOT_ERASED; 590 } else if (flash_isset (info, sector, 0, 591 FLASH_STATUS_PSLBS)) { 592 puts ("Locking Error\n"); 593 } 594 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) { 595 puts ("Block locked.\n"); 596 retcode = ERR_PROTECTED; 597 } 598 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) 599 puts ("Vpp Low Error.\n"); 600 } 601 flash_write_cmd (info, sector, 0, info->cmd_reset); 602 udelay(1); 603 break; 604 default: 605 break; 606 } 607 return retcode; 608 } 609 610 static int use_flash_status_poll(flash_info_t *info) 611 { 612 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL 613 if (info->vendor == CFI_CMDSET_AMD_EXTENDED || 614 info->vendor == CFI_CMDSET_AMD_STANDARD) 615 return 1; 616 #endif 617 return 0; 618 } 619 620 static int flash_status_poll(flash_info_t *info, void *src, void *dst, 621 ulong tout, char *prompt) 622 { 623 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL 624 ulong start; 625 int ready; 626 627 #if CONFIG_SYS_HZ != 1000 628 if ((ulong)CONFIG_SYS_HZ > 100000) 629 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */ 630 else 631 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000); 632 #endif 633 634 /* Wait for command completion */ 635 #ifdef CONFIG_SYS_LOW_RES_TIMER 636 reset_timer(); 637 #endif 638 start = get_timer(0); 639 WATCHDOG_RESET(); 640 while (1) { 641 switch (info->portwidth) { 642 case FLASH_CFI_8BIT: 643 ready = flash_read8(dst) == flash_read8(src); 644 break; 645 case FLASH_CFI_16BIT: 646 ready = flash_read16(dst) == flash_read16(src); 647 break; 648 case FLASH_CFI_32BIT: 649 ready = flash_read32(dst) == flash_read32(src); 650 break; 651 case FLASH_CFI_64BIT: 652 ready = flash_read64(dst) == flash_read64(src); 653 break; 654 default: 655 ready = 0; 656 break; 657 } 658 if (ready) 659 break; 660 if (get_timer(start) > tout) { 661 printf("Flash %s timeout at address %lx data %lx\n", 662 prompt, (ulong)dst, (ulong)flash_read8(dst)); 663 return ERR_TIMOUT; 664 } 665 udelay(1); /* also triggers watchdog */ 666 } 667 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */ 668 return ERR_OK; 669 } 670 671 /*----------------------------------------------------------------------- 672 */ 673 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) 674 { 675 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 676 unsigned short w; 677 unsigned int l; 678 unsigned long long ll; 679 #endif 680 681 switch (info->portwidth) { 682 case FLASH_CFI_8BIT: 683 cword->c = c; 684 break; 685 case FLASH_CFI_16BIT: 686 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 687 w = c; 688 w <<= 8; 689 cword->w = (cword->w >> 8) | w; 690 #else 691 cword->w = (cword->w << 8) | c; 692 #endif 693 break; 694 case FLASH_CFI_32BIT: 695 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 696 l = c; 697 l <<= 24; 698 cword->l = (cword->l >> 8) | l; 699 #else 700 cword->l = (cword->l << 8) | c; 701 #endif 702 break; 703 case FLASH_CFI_64BIT: 704 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 705 ll = c; 706 ll <<= 56; 707 cword->ll = (cword->ll >> 8) | ll; 708 #else 709 cword->ll = (cword->ll << 8) | c; 710 #endif 711 break; 712 } 713 } 714 715 /* 716 * Loop through the sector table starting from the previously found sector. 717 * Searches forwards or backwards, dependent on the passed address. 718 */ 719 static flash_sect_t find_sector (flash_info_t * info, ulong addr) 720 { 721 static flash_sect_t saved_sector; /* previously found sector */ 722 static flash_info_t *saved_info; /* previously used flash bank */ 723 flash_sect_t sector = saved_sector; 724 725 if ((info != saved_info) || (sector >= info->sector_count)) 726 sector = 0; 727 728 while ((info->start[sector] < addr) 729 && (sector < info->sector_count - 1)) 730 sector++; 731 while ((info->start[sector] > addr) && (sector > 0)) 732 /* 733 * also decrements the sector in case of an overshot 734 * in the first loop 735 */ 736 sector--; 737 738 saved_sector = sector; 739 saved_info = info; 740 return sector; 741 } 742 743 /*----------------------------------------------------------------------- 744 */ 745 static int flash_write_cfiword (flash_info_t * info, ulong dest, 746 cfiword_t cword) 747 { 748 void *dstaddr = (void *)dest; 749 int flag; 750 flash_sect_t sect = 0; 751 char sect_found = 0; 752 753 /* Check if Flash is (sufficiently) erased */ 754 switch (info->portwidth) { 755 case FLASH_CFI_8BIT: 756 flag = ((flash_read8(dstaddr) & cword.c) == cword.c); 757 break; 758 case FLASH_CFI_16BIT: 759 flag = ((flash_read16(dstaddr) & cword.w) == cword.w); 760 break; 761 case FLASH_CFI_32BIT: 762 flag = ((flash_read32(dstaddr) & cword.l) == cword.l); 763 break; 764 case FLASH_CFI_64BIT: 765 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll); 766 break; 767 default: 768 flag = 0; 769 break; 770 } 771 if (!flag) 772 return ERR_NOT_ERASED; 773 774 /* Disable interrupts which might cause a timeout here */ 775 flag = disable_interrupts (); 776 777 switch (info->vendor) { 778 case CFI_CMDSET_INTEL_PROG_REGIONS: 779 case CFI_CMDSET_INTEL_EXTENDED: 780 case CFI_CMDSET_INTEL_STANDARD: 781 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS); 782 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE); 783 break; 784 case CFI_CMDSET_AMD_EXTENDED: 785 case CFI_CMDSET_AMD_STANDARD: 786 sect = find_sector(info, dest); 787 flash_unlock_seq (info, sect); 788 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE); 789 sect_found = 1; 790 break; 791 #ifdef CONFIG_FLASH_CFI_LEGACY 792 case CFI_CMDSET_AMD_LEGACY: 793 sect = find_sector(info, dest); 794 flash_unlock_seq (info, 0); 795 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE); 796 sect_found = 1; 797 break; 798 #endif 799 } 800 801 switch (info->portwidth) { 802 case FLASH_CFI_8BIT: 803 flash_write8(cword.c, dstaddr); 804 break; 805 case FLASH_CFI_16BIT: 806 flash_write16(cword.w, dstaddr); 807 break; 808 case FLASH_CFI_32BIT: 809 flash_write32(cword.l, dstaddr); 810 break; 811 case FLASH_CFI_64BIT: 812 flash_write64(cword.ll, dstaddr); 813 break; 814 } 815 816 /* re-enable interrupts if necessary */ 817 if (flag) 818 enable_interrupts (); 819 820 if (!sect_found) 821 sect = find_sector (info, dest); 822 823 if (use_flash_status_poll(info)) 824 return flash_status_poll(info, &cword, dstaddr, 825 info->write_tout, "write"); 826 else 827 return flash_full_status_check(info, sect, 828 info->write_tout, "write"); 829 } 830 831 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 832 833 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, 834 int len) 835 { 836 flash_sect_t sector; 837 int cnt; 838 int retcode; 839 void *src = cp; 840 void *dst = (void *)dest; 841 void *dst2 = dst; 842 int flag = 1; 843 uint offset = 0; 844 unsigned int shift; 845 uchar write_cmd; 846 847 switch (info->portwidth) { 848 case FLASH_CFI_8BIT: 849 shift = 0; 850 break; 851 case FLASH_CFI_16BIT: 852 shift = 1; 853 break; 854 case FLASH_CFI_32BIT: 855 shift = 2; 856 break; 857 case FLASH_CFI_64BIT: 858 shift = 3; 859 break; 860 default: 861 retcode = ERR_INVAL; 862 goto out_unmap; 863 } 864 865 cnt = len >> shift; 866 867 while ((cnt-- > 0) && (flag == 1)) { 868 switch (info->portwidth) { 869 case FLASH_CFI_8BIT: 870 flag = ((flash_read8(dst2) & flash_read8(src)) == 871 flash_read8(src)); 872 src += 1, dst2 += 1; 873 break; 874 case FLASH_CFI_16BIT: 875 flag = ((flash_read16(dst2) & flash_read16(src)) == 876 flash_read16(src)); 877 src += 2, dst2 += 2; 878 break; 879 case FLASH_CFI_32BIT: 880 flag = ((flash_read32(dst2) & flash_read32(src)) == 881 flash_read32(src)); 882 src += 4, dst2 += 4; 883 break; 884 case FLASH_CFI_64BIT: 885 flag = ((flash_read64(dst2) & flash_read64(src)) == 886 flash_read64(src)); 887 src += 8, dst2 += 8; 888 break; 889 } 890 } 891 if (!flag) { 892 retcode = ERR_NOT_ERASED; 893 goto out_unmap; 894 } 895 896 src = cp; 897 sector = find_sector (info, dest); 898 899 switch (info->vendor) { 900 case CFI_CMDSET_INTEL_PROG_REGIONS: 901 case CFI_CMDSET_INTEL_STANDARD: 902 case CFI_CMDSET_INTEL_EXTENDED: 903 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ? 904 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER; 905 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 906 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS); 907 flash_write_cmd (info, sector, 0, write_cmd); 908 retcode = flash_status_check (info, sector, 909 info->buffer_write_tout, 910 "write to buffer"); 911 if (retcode == ERR_OK) { 912 /* reduce the number of loops by the width of 913 * the port */ 914 cnt = len >> shift; 915 flash_write_cmd (info, sector, 0, cnt - 1); 916 while (cnt-- > 0) { 917 switch (info->portwidth) { 918 case FLASH_CFI_8BIT: 919 flash_write8(flash_read8(src), dst); 920 src += 1, dst += 1; 921 break; 922 case FLASH_CFI_16BIT: 923 flash_write16(flash_read16(src), dst); 924 src += 2, dst += 2; 925 break; 926 case FLASH_CFI_32BIT: 927 flash_write32(flash_read32(src), dst); 928 src += 4, dst += 4; 929 break; 930 case FLASH_CFI_64BIT: 931 flash_write64(flash_read64(src), dst); 932 src += 8, dst += 8; 933 break; 934 default: 935 retcode = ERR_INVAL; 936 goto out_unmap; 937 } 938 } 939 flash_write_cmd (info, sector, 0, 940 FLASH_CMD_WRITE_BUFFER_CONFIRM); 941 retcode = flash_full_status_check ( 942 info, sector, info->buffer_write_tout, 943 "buffer write"); 944 } 945 946 break; 947 948 case CFI_CMDSET_AMD_STANDARD: 949 case CFI_CMDSET_AMD_EXTENDED: 950 flash_unlock_seq(info,0); 951 952 #ifdef CONFIG_FLASH_SPANSION_S29WS_N 953 offset = ((unsigned long)dst - info->start[sector]) >> shift; 954 #endif 955 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER); 956 cnt = len >> shift; 957 flash_write_cmd(info, sector, offset, cnt - 1); 958 959 switch (info->portwidth) { 960 case FLASH_CFI_8BIT: 961 while (cnt-- > 0) { 962 flash_write8(flash_read8(src), dst); 963 src += 1, dst += 1; 964 } 965 break; 966 case FLASH_CFI_16BIT: 967 while (cnt-- > 0) { 968 flash_write16(flash_read16(src), dst); 969 src += 2, dst += 2; 970 } 971 break; 972 case FLASH_CFI_32BIT: 973 while (cnt-- > 0) { 974 flash_write32(flash_read32(src), dst); 975 src += 4, dst += 4; 976 } 977 break; 978 case FLASH_CFI_64BIT: 979 while (cnt-- > 0) { 980 flash_write64(flash_read64(src), dst); 981 src += 8, dst += 8; 982 } 983 break; 984 default: 985 retcode = ERR_INVAL; 986 goto out_unmap; 987 } 988 989 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); 990 if (use_flash_status_poll(info)) 991 retcode = flash_status_poll(info, src - (1 << shift), 992 dst - (1 << shift), 993 info->buffer_write_tout, 994 "buffer write"); 995 else 996 retcode = flash_full_status_check(info, sector, 997 info->buffer_write_tout, 998 "buffer write"); 999 break; 1000 1001 default: 1002 debug ("Unknown Command Set\n"); 1003 retcode = ERR_INVAL; 1004 break; 1005 } 1006 1007 out_unmap: 1008 return retcode; 1009 } 1010 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1011 1012 1013 /*----------------------------------------------------------------------- 1014 */ 1015 int flash_erase (flash_info_t * info, int s_first, int s_last) 1016 { 1017 int rcode = 0; 1018 int prot; 1019 flash_sect_t sect; 1020 int st; 1021 1022 if (info->flash_id != FLASH_MAN_CFI) { 1023 puts ("Can't erase unknown flash type - aborted\n"); 1024 return 1; 1025 } 1026 if ((s_first < 0) || (s_first > s_last)) { 1027 puts ("- no sectors to erase\n"); 1028 return 1; 1029 } 1030 1031 prot = 0; 1032 for (sect = s_first; sect <= s_last; ++sect) { 1033 if (info->protect[sect]) { 1034 prot++; 1035 } 1036 } 1037 if (prot) { 1038 printf ("- Warning: %d protected sectors will not be erased!\n", 1039 prot); 1040 } else if (flash_verbose) { 1041 putc ('\n'); 1042 } 1043 1044 1045 for (sect = s_first; sect <= s_last; sect++) { 1046 if (ctrlc()) { 1047 printf("\n"); 1048 return 1; 1049 } 1050 1051 if (info->protect[sect] == 0) { /* not protected */ 1052 #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE 1053 int k; 1054 int size; 1055 int erased; 1056 u32 *flash; 1057 1058 /* 1059 * Check if whole sector is erased 1060 */ 1061 size = flash_sector_size(info, sect); 1062 erased = 1; 1063 flash = (u32 *)info->start[sect]; 1064 /* divide by 4 for longword access */ 1065 size = size >> 2; 1066 for (k = 0; k < size; k++) { 1067 if (flash_read32(flash++) != 0xffffffff) { 1068 erased = 0; 1069 break; 1070 } 1071 } 1072 if (erased) { 1073 if (flash_verbose) 1074 putc(','); 1075 continue; 1076 } 1077 #endif 1078 switch (info->vendor) { 1079 case CFI_CMDSET_INTEL_PROG_REGIONS: 1080 case CFI_CMDSET_INTEL_STANDARD: 1081 case CFI_CMDSET_INTEL_EXTENDED: 1082 flash_write_cmd (info, sect, 0, 1083 FLASH_CMD_CLEAR_STATUS); 1084 flash_write_cmd (info, sect, 0, 1085 FLASH_CMD_BLOCK_ERASE); 1086 flash_write_cmd (info, sect, 0, 1087 FLASH_CMD_ERASE_CONFIRM); 1088 break; 1089 case CFI_CMDSET_AMD_STANDARD: 1090 case CFI_CMDSET_AMD_EXTENDED: 1091 flash_unlock_seq (info, sect); 1092 flash_write_cmd (info, sect, 1093 info->addr_unlock1, 1094 AMD_CMD_ERASE_START); 1095 flash_unlock_seq (info, sect); 1096 flash_write_cmd (info, sect, 0, 1097 info->cmd_erase_sector); 1098 break; 1099 #ifdef CONFIG_FLASH_CFI_LEGACY 1100 case CFI_CMDSET_AMD_LEGACY: 1101 flash_unlock_seq (info, 0); 1102 flash_write_cmd (info, 0, info->addr_unlock1, 1103 AMD_CMD_ERASE_START); 1104 flash_unlock_seq (info, 0); 1105 flash_write_cmd (info, sect, 0, 1106 AMD_CMD_ERASE_SECTOR); 1107 break; 1108 #endif 1109 default: 1110 debug ("Unkown flash vendor %d\n", 1111 info->vendor); 1112 break; 1113 } 1114 1115 if (use_flash_status_poll(info)) { 1116 cfiword_t cword; 1117 void *dest; 1118 cword.ll = 0xffffffffffffffffULL; 1119 dest = flash_map(info, sect, 0); 1120 st = flash_status_poll(info, &cword, dest, 1121 info->erase_blk_tout, "erase"); 1122 flash_unmap(info, sect, 0, dest); 1123 } else 1124 st = flash_full_status_check(info, sect, 1125 info->erase_blk_tout, 1126 "erase"); 1127 if (st) 1128 rcode = 1; 1129 else if (flash_verbose) 1130 putc ('.'); 1131 } 1132 } 1133 1134 if (flash_verbose) 1135 puts (" done\n"); 1136 1137 return rcode; 1138 } 1139 1140 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 1141 static int sector_erased(flash_info_t *info, int i) 1142 { 1143 int k; 1144 int size; 1145 u32 *flash; 1146 1147 /* 1148 * Check if whole sector is erased 1149 */ 1150 size = flash_sector_size(info, i); 1151 flash = (u32 *)info->start[i]; 1152 /* divide by 4 for longword access */ 1153 size = size >> 2; 1154 1155 for (k = 0; k < size; k++) { 1156 if (flash_read32(flash++) != 0xffffffff) 1157 return 0; /* not erased */ 1158 } 1159 1160 return 1; /* erased */ 1161 } 1162 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */ 1163 1164 void flash_print_info (flash_info_t * info) 1165 { 1166 int i; 1167 1168 if (info->flash_id != FLASH_MAN_CFI) { 1169 puts ("missing or unknown FLASH type\n"); 1170 return; 1171 } 1172 1173 printf ("%s flash (%d x %d)", 1174 info->name, 1175 (info->portwidth << 3), (info->chipwidth << 3)); 1176 if (info->size < 1024*1024) 1177 printf (" Size: %ld kB in %d Sectors\n", 1178 info->size >> 10, info->sector_count); 1179 else 1180 printf (" Size: %ld MB in %d Sectors\n", 1181 info->size >> 20, info->sector_count); 1182 printf (" "); 1183 switch (info->vendor) { 1184 case CFI_CMDSET_INTEL_PROG_REGIONS: 1185 printf ("Intel Prog Regions"); 1186 break; 1187 case CFI_CMDSET_INTEL_STANDARD: 1188 printf ("Intel Standard"); 1189 break; 1190 case CFI_CMDSET_INTEL_EXTENDED: 1191 printf ("Intel Extended"); 1192 break; 1193 case CFI_CMDSET_AMD_STANDARD: 1194 printf ("AMD Standard"); 1195 break; 1196 case CFI_CMDSET_AMD_EXTENDED: 1197 printf ("AMD Extended"); 1198 break; 1199 #ifdef CONFIG_FLASH_CFI_LEGACY 1200 case CFI_CMDSET_AMD_LEGACY: 1201 printf ("AMD Legacy"); 1202 break; 1203 #endif 1204 default: 1205 printf ("Unknown (%d)", info->vendor); 1206 break; 1207 } 1208 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x", 1209 info->manufacturer_id); 1210 printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X", 1211 info->device_id); 1212 if ((info->device_id & 0xff) == 0x7E) { 1213 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X", 1214 info->device_id2); 1215 } 1216 if ((info->vendor == CFI_CMDSET_AMD_STANDARD) && (info->legacy_unlock)) 1217 printf("\n Advanced Sector Protection (PPB) enabled"); 1218 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", 1219 info->erase_blk_tout, 1220 info->write_tout); 1221 if (info->buffer_size > 1) { 1222 printf (" Buffer write timeout: %ld ms, " 1223 "buffer size: %d bytes\n", 1224 info->buffer_write_tout, 1225 info->buffer_size); 1226 } 1227 1228 puts ("\n Sector Start Addresses:"); 1229 for (i = 0; i < info->sector_count; ++i) { 1230 if (ctrlc()) 1231 break; 1232 if ((i % 5) == 0) 1233 putc('\n'); 1234 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 1235 /* print empty and read-only info */ 1236 printf (" %08lX %c %s ", 1237 info->start[i], 1238 sector_erased(info, i) ? 'E' : ' ', 1239 info->protect[i] ? "RO" : " "); 1240 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */ 1241 printf (" %08lX %s ", 1242 info->start[i], 1243 info->protect[i] ? "RO" : " "); 1244 #endif 1245 } 1246 putc ('\n'); 1247 return; 1248 } 1249 1250 /*----------------------------------------------------------------------- 1251 * This is used in a few places in write_buf() to show programming 1252 * progress. Making it a function is nasty because it needs to do side 1253 * effect updates to digit and dots. Repeated code is nasty too, so 1254 * we define it once here. 1255 */ 1256 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1257 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \ 1258 if (flash_verbose) { \ 1259 dots -= dots_sub; \ 1260 if ((scale > 0) && (dots <= 0)) { \ 1261 if ((digit % 5) == 0) \ 1262 printf ("%d", digit / 5); \ 1263 else \ 1264 putc ('.'); \ 1265 digit--; \ 1266 dots += scale; \ 1267 } \ 1268 } 1269 #else 1270 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) 1271 #endif 1272 1273 /*----------------------------------------------------------------------- 1274 * Copy memory to flash, returns: 1275 * 0 - OK 1276 * 1 - write timeout 1277 * 2 - Flash not erased 1278 */ 1279 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) 1280 { 1281 ulong wp; 1282 uchar *p; 1283 int aln; 1284 cfiword_t cword; 1285 int i, rc; 1286 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1287 int buffered_size; 1288 #endif 1289 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1290 int digit = CONFIG_FLASH_SHOW_PROGRESS; 1291 int scale = 0; 1292 int dots = 0; 1293 1294 /* 1295 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes. 1296 */ 1297 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) { 1298 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) / 1299 CONFIG_FLASH_SHOW_PROGRESS); 1300 } 1301 #endif 1302 1303 /* get lower aligned address */ 1304 wp = (addr & ~(info->portwidth - 1)); 1305 1306 /* handle unaligned start */ 1307 if ((aln = addr - wp) != 0) { 1308 cword.l = 0; 1309 p = (uchar *)wp; 1310 for (i = 0; i < aln; ++i) 1311 flash_add_byte (info, &cword, flash_read8(p + i)); 1312 1313 for (; (i < info->portwidth) && (cnt > 0); i++) { 1314 flash_add_byte (info, &cword, *src++); 1315 cnt--; 1316 } 1317 for (; (cnt == 0) && (i < info->portwidth); ++i) 1318 flash_add_byte (info, &cword, flash_read8(p + i)); 1319 1320 rc = flash_write_cfiword (info, wp, cword); 1321 if (rc != 0) 1322 return rc; 1323 1324 wp += i; 1325 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1326 } 1327 1328 /* handle the aligned part */ 1329 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1330 buffered_size = (info->portwidth / info->chipwidth); 1331 buffered_size *= info->buffer_size; 1332 while (cnt >= info->portwidth) { 1333 /* prohibit buffer write when buffer_size is 1 */ 1334 if (info->buffer_size == 1) { 1335 cword.l = 0; 1336 for (i = 0; i < info->portwidth; i++) 1337 flash_add_byte (info, &cword, *src++); 1338 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1339 return rc; 1340 wp += info->portwidth; 1341 cnt -= info->portwidth; 1342 continue; 1343 } 1344 1345 /* write buffer until next buffered_size aligned boundary */ 1346 i = buffered_size - (wp % buffered_size); 1347 if (i > cnt) 1348 i = cnt; 1349 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) 1350 return rc; 1351 i -= i & (info->portwidth - 1); 1352 wp += i; 1353 src += i; 1354 cnt -= i; 1355 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1356 /* Only check every once in a while */ 1357 if ((cnt & 0xFFFF) < buffered_size && ctrlc()) 1358 return ERR_ABORTED; 1359 } 1360 #else 1361 while (cnt >= info->portwidth) { 1362 cword.l = 0; 1363 for (i = 0; i < info->portwidth; i++) { 1364 flash_add_byte (info, &cword, *src++); 1365 } 1366 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1367 return rc; 1368 wp += info->portwidth; 1369 cnt -= info->portwidth; 1370 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth); 1371 /* Only check every once in a while */ 1372 if ((cnt & 0xFFFF) < info->portwidth && ctrlc()) 1373 return ERR_ABORTED; 1374 } 1375 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1376 1377 if (cnt == 0) { 1378 return (0); 1379 } 1380 1381 /* 1382 * handle unaligned tail bytes 1383 */ 1384 cword.l = 0; 1385 p = (uchar *)wp; 1386 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) { 1387 flash_add_byte (info, &cword, *src++); 1388 --cnt; 1389 } 1390 for (; i < info->portwidth; ++i) 1391 flash_add_byte (info, &cword, flash_read8(p + i)); 1392 1393 return flash_write_cfiword (info, wp, cword); 1394 } 1395 1396 static inline int manufact_match(flash_info_t *info, u32 manu) 1397 { 1398 return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16); 1399 } 1400 1401 /*----------------------------------------------------------------------- 1402 */ 1403 #ifdef CONFIG_SYS_FLASH_PROTECTION 1404 1405 static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot) 1406 { 1407 if (manufact_match(info, INTEL_MANUFACT) 1408 && info->device_id == NUMONYX_256MBIT) { 1409 /* 1410 * see errata called 1411 * "Numonyx Axcell P33/P30 Specification Update" :) 1412 */ 1413 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID); 1414 if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT, 1415 prot)) { 1416 /* 1417 * cmd must come before FLASH_CMD_PROTECT + 20us 1418 * Disable interrupts which might cause a timeout here. 1419 */ 1420 int flag = disable_interrupts(); 1421 unsigned short cmd; 1422 1423 if (prot) 1424 cmd = FLASH_CMD_PROTECT_SET; 1425 else 1426 cmd = FLASH_CMD_PROTECT_CLEAR; 1427 flash_write_cmd(info, sector, 0, 1428 FLASH_CMD_PROTECT); 1429 flash_write_cmd(info, sector, 0, cmd); 1430 /* re-enable interrupts if necessary */ 1431 if (flag) 1432 enable_interrupts(); 1433 } 1434 return 1; 1435 } 1436 return 0; 1437 } 1438 1439 int flash_real_protect (flash_info_t * info, long sector, int prot) 1440 { 1441 int retcode = 0; 1442 1443 switch (info->vendor) { 1444 case CFI_CMDSET_INTEL_PROG_REGIONS: 1445 case CFI_CMDSET_INTEL_STANDARD: 1446 case CFI_CMDSET_INTEL_EXTENDED: 1447 if (!cfi_protect_bugfix(info, sector, prot)) { 1448 flash_write_cmd(info, sector, 0, 1449 FLASH_CMD_CLEAR_STATUS); 1450 flash_write_cmd(info, sector, 0, 1451 FLASH_CMD_PROTECT); 1452 if (prot) 1453 flash_write_cmd(info, sector, 0, 1454 FLASH_CMD_PROTECT_SET); 1455 else 1456 flash_write_cmd(info, sector, 0, 1457 FLASH_CMD_PROTECT_CLEAR); 1458 1459 } 1460 break; 1461 case CFI_CMDSET_AMD_EXTENDED: 1462 case CFI_CMDSET_AMD_STANDARD: 1463 /* U-Boot only checks the first byte */ 1464 if (manufact_match(info, ATM_MANUFACT)) { 1465 if (prot) { 1466 flash_unlock_seq (info, 0); 1467 flash_write_cmd (info, 0, 1468 info->addr_unlock1, 1469 ATM_CMD_SOFTLOCK_START); 1470 flash_unlock_seq (info, 0); 1471 flash_write_cmd (info, sector, 0, 1472 ATM_CMD_LOCK_SECT); 1473 } else { 1474 flash_write_cmd (info, 0, 1475 info->addr_unlock1, 1476 AMD_CMD_UNLOCK_START); 1477 if (info->device_id == ATM_ID_BV6416) 1478 flash_write_cmd (info, sector, 1479 0, ATM_CMD_UNLOCK_SECT); 1480 } 1481 } 1482 if (info->legacy_unlock) { 1483 int flag = disable_interrupts(); 1484 int lock_flag; 1485 1486 flash_unlock_seq(info, 0); 1487 flash_write_cmd(info, 0, info->addr_unlock1, 1488 AMD_CMD_SET_PPB_ENTRY); 1489 lock_flag = flash_isset(info, sector, 0, 0x01); 1490 if (prot) { 1491 if (lock_flag) { 1492 flash_write_cmd(info, sector, 0, 1493 AMD_CMD_PPB_LOCK_BC1); 1494 flash_write_cmd(info, sector, 0, 1495 AMD_CMD_PPB_LOCK_BC2); 1496 } 1497 debug("sector %ld %slocked\n", sector, 1498 lock_flag ? "" : "already "); 1499 } else { 1500 if (!lock_flag) { 1501 debug("unlock %ld\n", sector); 1502 flash_write_cmd(info, 0, 0, 1503 AMD_CMD_PPB_UNLOCK_BC1); 1504 flash_write_cmd(info, 0, 0, 1505 AMD_CMD_PPB_UNLOCK_BC2); 1506 } 1507 debug("sector %ld %sunlocked\n", sector, 1508 !lock_flag ? "" : "already "); 1509 } 1510 if (flag) 1511 enable_interrupts(); 1512 1513 if (flash_status_check(info, sector, 1514 info->erase_blk_tout, 1515 prot ? "protect" : "unprotect")) 1516 printf("status check error\n"); 1517 1518 flash_write_cmd(info, 0, 0, 1519 AMD_CMD_SET_PPB_EXIT_BC1); 1520 flash_write_cmd(info, 0, 0, 1521 AMD_CMD_SET_PPB_EXIT_BC2); 1522 } 1523 break; 1524 #ifdef CONFIG_FLASH_CFI_LEGACY 1525 case CFI_CMDSET_AMD_LEGACY: 1526 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 1527 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1528 if (prot) 1529 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); 1530 else 1531 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); 1532 #endif 1533 }; 1534 1535 /* 1536 * Flash needs to be in status register read mode for 1537 * flash_full_status_check() to work correctly 1538 */ 1539 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS); 1540 if ((retcode = 1541 flash_full_status_check (info, sector, info->erase_blk_tout, 1542 prot ? "protect" : "unprotect")) == 0) { 1543 1544 info->protect[sector] = prot; 1545 1546 /* 1547 * On some of Intel's flash chips (marked via legacy_unlock) 1548 * unprotect unprotects all locking. 1549 */ 1550 if ((prot == 0) && (info->legacy_unlock)) { 1551 flash_sect_t i; 1552 1553 for (i = 0; i < info->sector_count; i++) { 1554 if (info->protect[i]) 1555 flash_real_protect (info, i, 1); 1556 } 1557 } 1558 } 1559 return retcode; 1560 } 1561 1562 /*----------------------------------------------------------------------- 1563 * flash_read_user_serial - read the OneTimeProgramming cells 1564 */ 1565 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, 1566 int len) 1567 { 1568 uchar *src; 1569 uchar *dst; 1570 1571 dst = buffer; 1572 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION); 1573 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1574 memcpy (dst, src + offset, len); 1575 flash_write_cmd (info, 0, 0, info->cmd_reset); 1576 udelay(1); 1577 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src); 1578 } 1579 1580 /* 1581 * flash_read_factory_serial - read the device Id from the protection area 1582 */ 1583 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, 1584 int len) 1585 { 1586 uchar *src; 1587 1588 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION); 1589 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1590 memcpy (buffer, src + offset, len); 1591 flash_write_cmd (info, 0, 0, info->cmd_reset); 1592 udelay(1); 1593 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); 1594 } 1595 1596 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 1597 1598 /*----------------------------------------------------------------------- 1599 * Reverse the order of the erase regions in the CFI QRY structure. 1600 * This is needed for chips that are either a) correctly detected as 1601 * top-boot, or b) buggy. 1602 */ 1603 static void cfi_reverse_geometry(struct cfi_qry *qry) 1604 { 1605 unsigned int i, j; 1606 u32 tmp; 1607 1608 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) { 1609 tmp = get_unaligned(&(qry->erase_region_info[i])); 1610 put_unaligned(get_unaligned(&(qry->erase_region_info[j])), 1611 &(qry->erase_region_info[i])); 1612 put_unaligned(tmp, &(qry->erase_region_info[j])); 1613 } 1614 } 1615 1616 /*----------------------------------------------------------------------- 1617 * read jedec ids from device and set corresponding fields in info struct 1618 * 1619 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct 1620 * 1621 */ 1622 static void cmdset_intel_read_jedec_ids(flash_info_t *info) 1623 { 1624 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1625 udelay(1); 1626 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); 1627 udelay(1000); /* some flash are slow to respond */ 1628 info->manufacturer_id = flash_read_uchar (info, 1629 FLASH_OFFSET_MANUFACTURER_ID); 1630 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ? 1631 flash_read_word (info, FLASH_OFFSET_DEVICE_ID) : 1632 flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID); 1633 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1634 } 1635 1636 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) 1637 { 1638 info->cmd_reset = FLASH_CMD_RESET; 1639 1640 cmdset_intel_read_jedec_ids(info); 1641 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1642 1643 #ifdef CONFIG_SYS_FLASH_PROTECTION 1644 /* read legacy lock/unlock bit from intel flash */ 1645 if (info->ext_addr) { 1646 info->legacy_unlock = flash_read_uchar (info, 1647 info->ext_addr + 5) & 0x08; 1648 } 1649 #endif 1650 1651 return 0; 1652 } 1653 1654 static void cmdset_amd_read_jedec_ids(flash_info_t *info) 1655 { 1656 ushort bankId = 0; 1657 uchar manuId; 1658 1659 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1660 flash_unlock_seq(info, 0); 1661 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); 1662 udelay(1000); /* some flash are slow to respond */ 1663 1664 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID); 1665 /* JEDEC JEP106Z specifies ID codes up to bank 7 */ 1666 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) { 1667 bankId += 0x100; 1668 manuId = flash_read_uchar (info, 1669 bankId | FLASH_OFFSET_MANUFACTURER_ID); 1670 } 1671 info->manufacturer_id = manuId; 1672 1673 switch (info->chipwidth){ 1674 case FLASH_CFI_8BIT: 1675 info->device_id = flash_read_uchar (info, 1676 FLASH_OFFSET_DEVICE_ID); 1677 if (info->device_id == 0x7E) { 1678 /* AMD 3-byte (expanded) device ids */ 1679 info->device_id2 = flash_read_uchar (info, 1680 FLASH_OFFSET_DEVICE_ID2); 1681 info->device_id2 <<= 8; 1682 info->device_id2 |= flash_read_uchar (info, 1683 FLASH_OFFSET_DEVICE_ID3); 1684 } 1685 break; 1686 case FLASH_CFI_16BIT: 1687 info->device_id = flash_read_word (info, 1688 FLASH_OFFSET_DEVICE_ID); 1689 if ((info->device_id & 0xff) == 0x7E) { 1690 /* AMD 3-byte (expanded) device ids */ 1691 info->device_id2 = flash_read_uchar (info, 1692 FLASH_OFFSET_DEVICE_ID2); 1693 info->device_id2 <<= 8; 1694 info->device_id2 |= flash_read_uchar (info, 1695 FLASH_OFFSET_DEVICE_ID3); 1696 } 1697 break; 1698 default: 1699 break; 1700 } 1701 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1702 udelay(1); 1703 } 1704 1705 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) 1706 { 1707 info->cmd_reset = AMD_CMD_RESET; 1708 info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR; 1709 1710 cmdset_amd_read_jedec_ids(info); 1711 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1712 1713 #ifdef CONFIG_SYS_FLASH_PROTECTION 1714 if (info->ext_addr) { 1715 /* read sector protect/unprotect scheme (at 0x49) */ 1716 if (flash_read_uchar(info, info->ext_addr + 9) == 0x8) 1717 info->legacy_unlock = 1; 1718 } 1719 #endif 1720 1721 return 0; 1722 } 1723 1724 #ifdef CONFIG_FLASH_CFI_LEGACY 1725 static void flash_read_jedec_ids (flash_info_t * info) 1726 { 1727 info->manufacturer_id = 0; 1728 info->device_id = 0; 1729 info->device_id2 = 0; 1730 1731 switch (info->vendor) { 1732 case CFI_CMDSET_INTEL_PROG_REGIONS: 1733 case CFI_CMDSET_INTEL_STANDARD: 1734 case CFI_CMDSET_INTEL_EXTENDED: 1735 cmdset_intel_read_jedec_ids(info); 1736 break; 1737 case CFI_CMDSET_AMD_STANDARD: 1738 case CFI_CMDSET_AMD_EXTENDED: 1739 cmdset_amd_read_jedec_ids(info); 1740 break; 1741 default: 1742 break; 1743 } 1744 } 1745 1746 /*----------------------------------------------------------------------- 1747 * Call board code to request info about non-CFI flash. 1748 * board_flash_get_legacy needs to fill in at least: 1749 * info->portwidth, info->chipwidth and info->interface for Jedec probing. 1750 */ 1751 static int flash_detect_legacy(phys_addr_t base, int banknum) 1752 { 1753 flash_info_t *info = &flash_info[banknum]; 1754 1755 if (board_flash_get_legacy(base, banknum, info)) { 1756 /* board code may have filled info completely. If not, we 1757 use JEDEC ID probing. */ 1758 if (!info->vendor) { 1759 int modes[] = { 1760 CFI_CMDSET_AMD_STANDARD, 1761 CFI_CMDSET_INTEL_STANDARD 1762 }; 1763 int i; 1764 1765 for (i = 0; i < ARRAY_SIZE(modes); i++) { 1766 info->vendor = modes[i]; 1767 info->start[0] = 1768 (ulong)map_physmem(base, 1769 info->portwidth, 1770 MAP_NOCACHE); 1771 if (info->portwidth == FLASH_CFI_8BIT 1772 && info->interface == FLASH_CFI_X8X16) { 1773 info->addr_unlock1 = 0x2AAA; 1774 info->addr_unlock2 = 0x5555; 1775 } else { 1776 info->addr_unlock1 = 0x5555; 1777 info->addr_unlock2 = 0x2AAA; 1778 } 1779 flash_read_jedec_ids(info); 1780 debug("JEDEC PROBE: ID %x %x %x\n", 1781 info->manufacturer_id, 1782 info->device_id, 1783 info->device_id2); 1784 if (jedec_flash_match(info, info->start[0])) 1785 break; 1786 else 1787 unmap_physmem((void *)info->start[0], 1788 info->portwidth); 1789 } 1790 } 1791 1792 switch(info->vendor) { 1793 case CFI_CMDSET_INTEL_PROG_REGIONS: 1794 case CFI_CMDSET_INTEL_STANDARD: 1795 case CFI_CMDSET_INTEL_EXTENDED: 1796 info->cmd_reset = FLASH_CMD_RESET; 1797 break; 1798 case CFI_CMDSET_AMD_STANDARD: 1799 case CFI_CMDSET_AMD_EXTENDED: 1800 case CFI_CMDSET_AMD_LEGACY: 1801 info->cmd_reset = AMD_CMD_RESET; 1802 break; 1803 } 1804 info->flash_id = FLASH_MAN_CFI; 1805 return 1; 1806 } 1807 return 0; /* use CFI */ 1808 } 1809 #else 1810 static inline int flash_detect_legacy(phys_addr_t base, int banknum) 1811 { 1812 return 0; /* use CFI */ 1813 } 1814 #endif 1815 1816 /*----------------------------------------------------------------------- 1817 * detect if flash is compatible with the Common Flash Interface (CFI) 1818 * http://www.jedec.org/download/search/jesd68.pdf 1819 */ 1820 static void flash_read_cfi (flash_info_t *info, void *buf, 1821 unsigned int start, size_t len) 1822 { 1823 u8 *p = buf; 1824 unsigned int i; 1825 1826 for (i = 0; i < len; i++) 1827 p[i] = flash_read_uchar(info, start + i); 1828 } 1829 1830 static void __flash_cmd_reset(flash_info_t *info) 1831 { 1832 /* 1833 * We do not yet know what kind of commandset to use, so we issue 1834 * the reset command in both Intel and AMD variants, in the hope 1835 * that AMD flash roms ignore the Intel command. 1836 */ 1837 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1838 udelay(1); 1839 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1840 } 1841 void flash_cmd_reset(flash_info_t *info) 1842 __attribute__((weak,alias("__flash_cmd_reset"))); 1843 1844 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1845 { 1846 int cfi_offset; 1847 1848 /* Issue FLASH reset command */ 1849 flash_cmd_reset(info); 1850 1851 for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi); 1852 cfi_offset++) { 1853 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], 1854 FLASH_CMD_CFI); 1855 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') 1856 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') 1857 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { 1858 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, 1859 sizeof(struct cfi_qry)); 1860 info->interface = le16_to_cpu(qry->interface_desc); 1861 1862 info->cfi_offset = flash_offset_cfi[cfi_offset]; 1863 debug ("device interface is %d\n", 1864 info->interface); 1865 debug ("found port %d chip %d ", 1866 info->portwidth, info->chipwidth); 1867 debug ("port %d bits chip %d bits\n", 1868 info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1869 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1870 1871 /* calculate command offsets as in the Linux driver */ 1872 info->addr_unlock1 = 0x555; 1873 info->addr_unlock2 = 0x2aa; 1874 1875 /* 1876 * modify the unlock address if we are 1877 * in compatibility mode 1878 */ 1879 if ( /* x8/x16 in x8 mode */ 1880 ((info->chipwidth == FLASH_CFI_BY8) && 1881 (info->interface == FLASH_CFI_X8X16)) || 1882 /* x16/x32 in x16 mode */ 1883 ((info->chipwidth == FLASH_CFI_BY16) && 1884 (info->interface == FLASH_CFI_X16X32))) 1885 { 1886 info->addr_unlock1 = 0xaaa; 1887 info->addr_unlock2 = 0x555; 1888 } 1889 1890 info->name = "CFI conformant"; 1891 return 1; 1892 } 1893 } 1894 1895 return 0; 1896 } 1897 1898 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1899 { 1900 debug ("flash detect cfi\n"); 1901 1902 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH; 1903 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { 1904 for (info->chipwidth = FLASH_CFI_BY8; 1905 info->chipwidth <= info->portwidth; 1906 info->chipwidth <<= 1) 1907 if (__flash_detect_cfi(info, qry)) 1908 return 1; 1909 } 1910 debug ("not found\n"); 1911 return 0; 1912 } 1913 1914 /* 1915 * Manufacturer-specific quirks. Add workarounds for geometry 1916 * reversal, etc. here. 1917 */ 1918 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry) 1919 { 1920 /* check if flash geometry needs reversal */ 1921 if (qry->num_erase_regions > 1) { 1922 /* reverse geometry if top boot part */ 1923 if (info->cfi_version < 0x3131) { 1924 /* CFI < 1.1, try to guess from device id */ 1925 if ((info->device_id & 0x80) != 0) 1926 cfi_reverse_geometry(qry); 1927 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { 1928 /* CFI >= 1.1, deduct from top/bottom flag */ 1929 /* note: ext_addr is valid since cfi_version > 0 */ 1930 cfi_reverse_geometry(qry); 1931 } 1932 } 1933 } 1934 1935 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry) 1936 { 1937 int reverse_geometry = 0; 1938 1939 /* Check the "top boot" bit in the PRI */ 1940 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1)) 1941 reverse_geometry = 1; 1942 1943 /* AT49BV6416(T) list the erase regions in the wrong order. 1944 * However, the device ID is identical with the non-broken 1945 * AT49BV642D they differ in the high byte. 1946 */ 1947 if (info->device_id == 0xd6 || info->device_id == 0xd2) 1948 reverse_geometry = !reverse_geometry; 1949 1950 if (reverse_geometry) 1951 cfi_reverse_geometry(qry); 1952 } 1953 1954 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry) 1955 { 1956 /* check if flash geometry needs reversal */ 1957 if (qry->num_erase_regions > 1) { 1958 /* reverse geometry if top boot part */ 1959 if (info->cfi_version < 0x3131) { 1960 /* CFI < 1.1, guess by device id */ 1961 if (info->device_id == 0x22CA || /* M29W320DT */ 1962 info->device_id == 0x2256 || /* M29W320ET */ 1963 info->device_id == 0x22D7) { /* M29W800DT */ 1964 cfi_reverse_geometry(qry); 1965 } 1966 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { 1967 /* CFI >= 1.1, deduct from top/bottom flag */ 1968 /* note: ext_addr is valid since cfi_version > 0 */ 1969 cfi_reverse_geometry(qry); 1970 } 1971 } 1972 } 1973 1974 static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry) 1975 { 1976 /* 1977 * SST, for many recent nor parallel flashes, says they are 1978 * CFI-conformant. This is not true, since qry struct. 1979 * reports a std. AMD command set (0x0002), while SST allows to 1980 * erase two different sector sizes for the same memory. 1981 * 64KB sector (SST call it block) needs 0x30 to be erased. 1982 * 4KB sector (SST call it sector) needs 0x50 to be erased. 1983 * Since CFI query detect the 4KB number of sectors, users expects 1984 * a sector granularity of 4KB, and it is here set. 1985 */ 1986 if (info->device_id == 0x5D23 || /* SST39VF3201B */ 1987 info->device_id == 0x5C23) { /* SST39VF3202B */ 1988 /* set sector granularity to 4KB */ 1989 info->cmd_erase_sector=0x50; 1990 } 1991 } 1992 1993 static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry) 1994 { 1995 /* 1996 * The M29EW devices seem to report the CFI information wrong 1997 * when it's in 8 bit mode. 1998 * There's an app note from Numonyx on this issue. 1999 * So adjust the buffer size for M29EW while operating in 8-bit mode 2000 */ 2001 if (((qry->max_buf_write_size) > 0x8) && 2002 (info->device_id == 0x7E) && 2003 (info->device_id2 == 0x2201 || 2004 info->device_id2 == 0x2301 || 2005 info->device_id2 == 0x2801 || 2006 info->device_id2 == 0x4801)) { 2007 debug("Adjusted buffer size on Numonyx flash" 2008 " M29EW family in 8 bit mode\n"); 2009 qry->max_buf_write_size = 0x8; 2010 } 2011 } 2012 2013 /* 2014 * The following code cannot be run from FLASH! 2015 * 2016 */ 2017 ulong flash_get_size (phys_addr_t base, int banknum) 2018 { 2019 flash_info_t *info = &flash_info[banknum]; 2020 int i, j; 2021 flash_sect_t sect_cnt; 2022 phys_addr_t sector; 2023 unsigned long tmp; 2024 int size_ratio; 2025 uchar num_erase_regions; 2026 int erase_region_size; 2027 int erase_region_count; 2028 struct cfi_qry qry; 2029 unsigned long max_size; 2030 2031 memset(&qry, 0, sizeof(qry)); 2032 2033 info->ext_addr = 0; 2034 info->cfi_version = 0; 2035 #ifdef CONFIG_SYS_FLASH_PROTECTION 2036 info->legacy_unlock = 0; 2037 #endif 2038 2039 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE); 2040 2041 if (flash_detect_cfi (info, &qry)) { 2042 info->vendor = le16_to_cpu(get_unaligned(&(qry.p_id))); 2043 info->ext_addr = le16_to_cpu(get_unaligned(&(qry.p_adr))); 2044 num_erase_regions = qry.num_erase_regions; 2045 2046 if (info->ext_addr) { 2047 info->cfi_version = (ushort) flash_read_uchar (info, 2048 info->ext_addr + 3) << 8; 2049 info->cfi_version |= (ushort) flash_read_uchar (info, 2050 info->ext_addr + 4); 2051 } 2052 2053 #ifdef DEBUG 2054 flash_printqry (&qry); 2055 #endif 2056 2057 switch (info->vendor) { 2058 case CFI_CMDSET_INTEL_PROG_REGIONS: 2059 case CFI_CMDSET_INTEL_STANDARD: 2060 case CFI_CMDSET_INTEL_EXTENDED: 2061 cmdset_intel_init(info, &qry); 2062 break; 2063 case CFI_CMDSET_AMD_STANDARD: 2064 case CFI_CMDSET_AMD_EXTENDED: 2065 cmdset_amd_init(info, &qry); 2066 break; 2067 default: 2068 printf("CFI: Unknown command set 0x%x\n", 2069 info->vendor); 2070 /* 2071 * Unfortunately, this means we don't know how 2072 * to get the chip back to Read mode. Might 2073 * as well try an Intel-style reset... 2074 */ 2075 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 2076 return 0; 2077 } 2078 2079 /* Do manufacturer-specific fixups */ 2080 switch (info->manufacturer_id) { 2081 case 0x0001: /* AMD */ 2082 case 0x0037: /* AMIC */ 2083 flash_fixup_amd(info, &qry); 2084 break; 2085 case 0x001f: 2086 flash_fixup_atmel(info, &qry); 2087 break; 2088 case 0x0020: 2089 flash_fixup_stm(info, &qry); 2090 break; 2091 case 0x00bf: /* SST */ 2092 flash_fixup_sst(info, &qry); 2093 break; 2094 case 0x0089: /* Numonyx */ 2095 flash_fixup_num(info, &qry); 2096 break; 2097 } 2098 2099 debug ("manufacturer is %d\n", info->vendor); 2100 debug ("manufacturer id is 0x%x\n", info->manufacturer_id); 2101 debug ("device id is 0x%x\n", info->device_id); 2102 debug ("device id2 is 0x%x\n", info->device_id2); 2103 debug ("cfi version is 0x%04x\n", info->cfi_version); 2104 2105 size_ratio = info->portwidth / info->chipwidth; 2106 /* if the chip is x8/x16 reduce the ratio by half */ 2107 if ((info->interface == FLASH_CFI_X8X16) 2108 && (info->chipwidth == FLASH_CFI_BY8)) { 2109 size_ratio >>= 1; 2110 } 2111 debug ("size_ratio %d port %d bits chip %d bits\n", 2112 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, 2113 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 2114 info->size = 1 << qry.dev_size; 2115 /* multiply the size by the number of chips */ 2116 info->size *= size_ratio; 2117 max_size = cfi_flash_bank_size(banknum); 2118 if (max_size && (info->size > max_size)) { 2119 debug("[truncated from %ldMiB]", info->size >> 20); 2120 info->size = max_size; 2121 } 2122 debug ("found %d erase regions\n", num_erase_regions); 2123 sect_cnt = 0; 2124 sector = base; 2125 for (i = 0; i < num_erase_regions; i++) { 2126 if (i > NUM_ERASE_REGIONS) { 2127 printf ("%d erase regions found, only %d used\n", 2128 num_erase_regions, NUM_ERASE_REGIONS); 2129 break; 2130 } 2131 2132 tmp = le32_to_cpu(get_unaligned( 2133 &(qry.erase_region_info[i]))); 2134 debug("erase region %u: 0x%08lx\n", i, tmp); 2135 2136 erase_region_count = (tmp & 0xffff) + 1; 2137 tmp >>= 16; 2138 erase_region_size = 2139 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; 2140 debug ("erase_region_count = %d erase_region_size = %d\n", 2141 erase_region_count, erase_region_size); 2142 for (j = 0; j < erase_region_count; j++) { 2143 if (sector - base >= info->size) 2144 break; 2145 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { 2146 printf("ERROR: too many flash sectors\n"); 2147 break; 2148 } 2149 info->start[sect_cnt] = 2150 (ulong)map_physmem(sector, 2151 info->portwidth, 2152 MAP_NOCACHE); 2153 sector += (erase_region_size * size_ratio); 2154 2155 /* 2156 * Only read protection status from 2157 * supported devices (intel...) 2158 */ 2159 switch (info->vendor) { 2160 case CFI_CMDSET_INTEL_PROG_REGIONS: 2161 case CFI_CMDSET_INTEL_EXTENDED: 2162 case CFI_CMDSET_INTEL_STANDARD: 2163 /* 2164 * Set flash to read-id mode. Otherwise 2165 * reading protected status is not 2166 * guaranteed. 2167 */ 2168 flash_write_cmd(info, sect_cnt, 0, 2169 FLASH_CMD_READ_ID); 2170 info->protect[sect_cnt] = 2171 flash_isset (info, sect_cnt, 2172 FLASH_OFFSET_PROTECT, 2173 FLASH_STATUS_PROTECT); 2174 break; 2175 case CFI_CMDSET_AMD_EXTENDED: 2176 case CFI_CMDSET_AMD_STANDARD: 2177 if (!info->legacy_unlock) { 2178 /* default: not protected */ 2179 info->protect[sect_cnt] = 0; 2180 break; 2181 } 2182 2183 /* Read protection (PPB) from sector */ 2184 flash_write_cmd(info, 0, 0, 2185 info->cmd_reset); 2186 flash_unlock_seq(info, 0); 2187 flash_write_cmd(info, 0, 2188 info->addr_unlock1, 2189 FLASH_CMD_READ_ID); 2190 info->protect[sect_cnt] = 2191 flash_isset( 2192 info, sect_cnt, 2193 FLASH_OFFSET_PROTECT, 2194 FLASH_STATUS_PROTECT); 2195 break; 2196 default: 2197 /* default: not protected */ 2198 info->protect[sect_cnt] = 0; 2199 } 2200 2201 sect_cnt++; 2202 } 2203 } 2204 2205 info->sector_count = sect_cnt; 2206 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size); 2207 tmp = 1 << qry.block_erase_timeout_typ; 2208 info->erase_blk_tout = tmp * 2209 (1 << qry.block_erase_timeout_max); 2210 tmp = (1 << qry.buf_write_timeout_typ) * 2211 (1 << qry.buf_write_timeout_max); 2212 2213 /* round up when converting to ms */ 2214 info->buffer_write_tout = (tmp + 999) / 1000; 2215 tmp = (1 << qry.word_write_timeout_typ) * 2216 (1 << qry.word_write_timeout_max); 2217 /* round up when converting to ms */ 2218 info->write_tout = (tmp + 999) / 1000; 2219 info->flash_id = FLASH_MAN_CFI; 2220 if ((info->interface == FLASH_CFI_X8X16) && 2221 (info->chipwidth == FLASH_CFI_BY8)) { 2222 /* XXX - Need to test on x8/x16 in parallel. */ 2223 info->portwidth >>= 1; 2224 } 2225 2226 flash_write_cmd (info, 0, 0, info->cmd_reset); 2227 } 2228 2229 return (info->size); 2230 } 2231 2232 #ifdef CONFIG_FLASH_CFI_MTD 2233 void flash_set_verbose(uint v) 2234 { 2235 flash_verbose = v; 2236 } 2237 #endif 2238 2239 static void cfi_flash_set_config_reg(u32 base, u16 val) 2240 { 2241 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS 2242 /* 2243 * Only set this config register if really defined 2244 * to a valid value (0xffff is invalid) 2245 */ 2246 if (val == 0xffff) 2247 return; 2248 2249 /* 2250 * Set configuration register. Data is "encrypted" in the 16 lower 2251 * address bits. 2252 */ 2253 flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1))); 2254 flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1))); 2255 2256 /* 2257 * Finally issue reset-command to bring device back to 2258 * read-array mode 2259 */ 2260 flash_write16(FLASH_CMD_RESET, (void *)base); 2261 #endif 2262 } 2263 2264 /*----------------------------------------------------------------------- 2265 */ 2266 2267 void flash_protect_default(void) 2268 { 2269 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2270 int i; 2271 struct apl_s { 2272 ulong start; 2273 ulong size; 2274 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST; 2275 #endif 2276 2277 /* Monitor protection ON by default */ 2278 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \ 2279 (!defined(CONFIG_MONITOR_IS_IN_RAM)) 2280 flash_protect(FLAG_PROTECT_SET, 2281 CONFIG_SYS_MONITOR_BASE, 2282 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, 2283 flash_get_info(CONFIG_SYS_MONITOR_BASE)); 2284 #endif 2285 2286 /* Environment protection ON by default */ 2287 #ifdef CONFIG_ENV_IS_IN_FLASH 2288 flash_protect(FLAG_PROTECT_SET, 2289 CONFIG_ENV_ADDR, 2290 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, 2291 flash_get_info(CONFIG_ENV_ADDR)); 2292 #endif 2293 2294 /* Redundant environment protection ON by default */ 2295 #ifdef CONFIG_ENV_ADDR_REDUND 2296 flash_protect(FLAG_PROTECT_SET, 2297 CONFIG_ENV_ADDR_REDUND, 2298 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, 2299 flash_get_info(CONFIG_ENV_ADDR_REDUND)); 2300 #endif 2301 2302 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2303 for (i = 0; i < ARRAY_SIZE(apl); i++) { 2304 debug("autoprotecting from %08lx to %08lx\n", 2305 apl[i].start, apl[i].start + apl[i].size - 1); 2306 flash_protect(FLAG_PROTECT_SET, 2307 apl[i].start, 2308 apl[i].start + apl[i].size - 1, 2309 flash_get_info(apl[i].start)); 2310 } 2311 #endif 2312 } 2313 2314 unsigned long flash_init (void) 2315 { 2316 unsigned long size = 0; 2317 int i; 2318 2319 #ifdef CONFIG_SYS_FLASH_PROTECTION 2320 /* read environment from EEPROM */ 2321 char s[64]; 2322 getenv_f("unlock", s, sizeof(s)); 2323 #endif 2324 2325 /* Init: no FLASHes known */ 2326 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { 2327 flash_info[i].flash_id = FLASH_UNKNOWN; 2328 2329 /* Optionally write flash configuration register */ 2330 cfi_flash_set_config_reg(cfi_flash_bank_addr(i), 2331 cfi_flash_config_reg(i)); 2332 2333 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i)) 2334 flash_get_size(cfi_flash_bank_addr(i), i); 2335 size += flash_info[i].size; 2336 if (flash_info[i].flash_id == FLASH_UNKNOWN) { 2337 #ifndef CONFIG_SYS_FLASH_QUIET_TEST 2338 printf ("## Unknown flash on Bank %d " 2339 "- Size = 0x%08lx = %ld MB\n", 2340 i+1, flash_info[i].size, 2341 flash_info[i].size >> 20); 2342 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */ 2343 } 2344 #ifdef CONFIG_SYS_FLASH_PROTECTION 2345 else if (strcmp(s, "yes") == 0) { 2346 /* 2347 * Only the U-Boot image and it's environment 2348 * is protected, all other sectors are 2349 * unprotected (unlocked) if flash hardware 2350 * protection is used (CONFIG_SYS_FLASH_PROTECTION) 2351 * and the environment variable "unlock" is 2352 * set to "yes". 2353 */ 2354 if (flash_info[i].legacy_unlock) { 2355 int k; 2356 2357 /* 2358 * Disable legacy_unlock temporarily, 2359 * since flash_real_protect would 2360 * relock all other sectors again 2361 * otherwise. 2362 */ 2363 flash_info[i].legacy_unlock = 0; 2364 2365 /* 2366 * Legacy unlocking (e.g. Intel J3) -> 2367 * unlock only one sector. This will 2368 * unlock all sectors. 2369 */ 2370 flash_real_protect (&flash_info[i], 0, 0); 2371 2372 flash_info[i].legacy_unlock = 1; 2373 2374 /* 2375 * Manually mark other sectors as 2376 * unlocked (unprotected) 2377 */ 2378 for (k = 1; k < flash_info[i].sector_count; k++) 2379 flash_info[i].protect[k] = 0; 2380 } else { 2381 /* 2382 * No legancy unlocking -> unlock all sectors 2383 */ 2384 flash_protect (FLAG_PROTECT_CLEAR, 2385 flash_info[i].start[0], 2386 flash_info[i].start[0] 2387 + flash_info[i].size - 1, 2388 &flash_info[i]); 2389 } 2390 } 2391 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 2392 } 2393 2394 flash_protect_default(); 2395 #ifdef CONFIG_FLASH_CFI_MTD 2396 cfi_mtd_init(); 2397 #endif 2398 2399 return (size); 2400 } 2401