1 /* 2 * (C) Copyright 2002-2004 3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com 4 * 5 * Copyright (C) 2003 Arabella Software Ltd. 6 * Yuli Barcohen <yuli@arabellasw.com> 7 * 8 * Copyright (C) 2004 9 * Ed Okerson 10 * 11 * Copyright (C) 2006 12 * Tolunay Orkun <listmember@orkun.us> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 * 32 */ 33 34 /* The DEBUG define must be before common to enable debugging */ 35 /* #define DEBUG */ 36 37 #include <common.h> 38 #include <asm/processor.h> 39 #include <asm/io.h> 40 #include <asm/byteorder.h> 41 #include <environment.h> 42 #include <mtd/cfi_flash.h> 43 44 /* 45 * This file implements a Common Flash Interface (CFI) driver for 46 * U-Boot. 47 * 48 * The width of the port and the width of the chips are determined at 49 * initialization. These widths are used to calculate the address for 50 * access CFI data structures. 51 * 52 * References 53 * JEDEC Standard JESD68 - Common Flash Interface (CFI) 54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes 55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets 56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet 57 * AMD CFI Specification, Release 2.0 December 1, 2001 58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte 59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001 60 * 61 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between 62 * reading and writing ... (yes there is such a Hardware). 63 */ 64 65 #ifndef CONFIG_SYS_FLASH_BANKS_LIST 66 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 67 #endif 68 69 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; 70 static uint flash_verbose = 1; 71 72 /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */ 73 #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT 74 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT 75 #else 76 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS 77 #endif 78 79 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ 80 81 /* 82 * Check if chip width is defined. If not, start detecting with 8bit. 83 */ 84 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH 85 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT 86 #endif 87 88 static void __flash_write8(u8 value, void *addr) 89 { 90 __raw_writeb(value, addr); 91 } 92 93 static void __flash_write16(u16 value, void *addr) 94 { 95 __raw_writew(value, addr); 96 } 97 98 static void __flash_write32(u32 value, void *addr) 99 { 100 __raw_writel(value, addr); 101 } 102 103 static void __flash_write64(u64 value, void *addr) 104 { 105 /* No architectures currently implement __raw_writeq() */ 106 *(volatile u64 *)addr = value; 107 } 108 109 static u8 __flash_read8(void *addr) 110 { 111 return __raw_readb(addr); 112 } 113 114 static u16 __flash_read16(void *addr) 115 { 116 return __raw_readw(addr); 117 } 118 119 static u32 __flash_read32(void *addr) 120 { 121 return __raw_readl(addr); 122 } 123 124 static u64 __flash_read64(void *addr) 125 { 126 /* No architectures currently implement __raw_readq() */ 127 return *(volatile u64 *)addr; 128 } 129 130 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 131 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8"))); 132 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16"))); 133 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32"))); 134 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64"))); 135 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8"))); 136 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16"))); 137 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32"))); 138 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); 139 #else 140 #define flash_write8 __flash_write8 141 #define flash_write16 __flash_write16 142 #define flash_write32 __flash_write32 143 #define flash_write64 __flash_write64 144 #define flash_read8 __flash_read8 145 #define flash_read16 __flash_read16 146 #define flash_read32 __flash_read32 147 #define flash_read64 __flash_read64 148 #endif 149 150 /*----------------------------------------------------------------------- 151 */ 152 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 153 flash_info_t *flash_get_info(ulong base) 154 { 155 int i; 156 flash_info_t * info = 0; 157 158 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { 159 info = & flash_info[i]; 160 if (info->size && info->start[0] <= base && 161 base <= info->start[0] + info->size - 1) 162 break; 163 } 164 165 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; 166 } 167 #endif 168 169 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) 170 { 171 if (sect != (info->sector_count - 1)) 172 return info->start[sect + 1] - info->start[sect]; 173 else 174 return info->start[0] + info->size - info->start[sect]; 175 } 176 177 /*----------------------------------------------------------------------- 178 * create an address based on the offset and the port width 179 */ 180 static inline void * 181 flash_map (flash_info_t * info, flash_sect_t sect, uint offset) 182 { 183 unsigned int byte_offset = offset * info->portwidth; 184 185 return (void *)(info->start[sect] + byte_offset); 186 } 187 188 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, 189 unsigned int offset, void *addr) 190 { 191 } 192 193 /*----------------------------------------------------------------------- 194 * make a proper sized command based on the port and chip widths 195 */ 196 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) 197 { 198 int i; 199 int cword_offset; 200 int cp_offset; 201 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 202 u32 cmd_le = cpu_to_le32(cmd); 203 #endif 204 uchar val; 205 uchar *cp = (uchar *) cmdbuf; 206 207 for (i = info->portwidth; i > 0; i--){ 208 cword_offset = (info->portwidth-i)%info->chipwidth; 209 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 210 cp_offset = info->portwidth - i; 211 val = *((uchar*)&cmd_le + cword_offset); 212 #else 213 cp_offset = i - 1; 214 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1); 215 #endif 216 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val; 217 } 218 } 219 220 #ifdef DEBUG 221 /*----------------------------------------------------------------------- 222 * Debug support 223 */ 224 static void print_longlong (char *str, unsigned long long data) 225 { 226 int i; 227 char *cp; 228 229 cp = (char *) &data; 230 for (i = 0; i < 8; i++) 231 sprintf (&str[i * 2], "%2.2x", *cp++); 232 } 233 234 static void flash_printqry (struct cfi_qry *qry) 235 { 236 u8 *p = (u8 *)qry; 237 int x, y; 238 239 for (x = 0; x < sizeof(struct cfi_qry); x += 16) { 240 debug("%02x : ", x); 241 for (y = 0; y < 16; y++) 242 debug("%2.2x ", p[x + y]); 243 debug(" "); 244 for (y = 0; y < 16; y++) { 245 unsigned char c = p[x + y]; 246 if (c >= 0x20 && c <= 0x7e) 247 debug("%c", c); 248 else 249 debug("."); 250 } 251 debug("\n"); 252 } 253 } 254 #endif 255 256 257 /*----------------------------------------------------------------------- 258 * read a character at a port width address 259 */ 260 static inline uchar flash_read_uchar (flash_info_t * info, uint offset) 261 { 262 uchar *cp; 263 uchar retval; 264 265 cp = flash_map (info, 0, offset); 266 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 267 retval = flash_read8(cp); 268 #else 269 retval = flash_read8(cp + info->portwidth - 1); 270 #endif 271 flash_unmap (info, 0, offset, cp); 272 return retval; 273 } 274 275 /*----------------------------------------------------------------------- 276 * read a word at a port width address, assume 16bit bus 277 */ 278 static inline ushort flash_read_word (flash_info_t * info, uint offset) 279 { 280 ushort *addr, retval; 281 282 addr = flash_map (info, 0, offset); 283 retval = flash_read16 (addr); 284 flash_unmap (info, 0, offset, addr); 285 return retval; 286 } 287 288 289 /*----------------------------------------------------------------------- 290 * read a long word by picking the least significant byte of each maximum 291 * port size word. Swap for ppc format. 292 */ 293 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, 294 uint offset) 295 { 296 uchar *addr; 297 ulong retval; 298 299 #ifdef DEBUG 300 int x; 301 #endif 302 addr = flash_map (info, sect, offset); 303 304 #ifdef DEBUG 305 debug ("long addr is at %p info->portwidth = %d\n", addr, 306 info->portwidth); 307 for (x = 0; x < 4 * info->portwidth; x++) { 308 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); 309 } 310 #endif 311 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 312 retval = ((flash_read8(addr) << 16) | 313 (flash_read8(addr + info->portwidth) << 24) | 314 (flash_read8(addr + 2 * info->portwidth)) | 315 (flash_read8(addr + 3 * info->portwidth) << 8)); 316 #else 317 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) | 318 (flash_read8(addr + info->portwidth - 1) << 16) | 319 (flash_read8(addr + 4 * info->portwidth - 1) << 8) | 320 (flash_read8(addr + 3 * info->portwidth - 1))); 321 #endif 322 flash_unmap(info, sect, offset, addr); 323 324 return retval; 325 } 326 327 /* 328 * Write a proper sized command to the correct address 329 */ 330 void flash_write_cmd (flash_info_t * info, flash_sect_t sect, 331 uint offset, u32 cmd) 332 { 333 334 void *addr; 335 cfiword_t cword; 336 337 addr = flash_map (info, sect, offset); 338 flash_make_cmd (info, cmd, &cword); 339 switch (info->portwidth) { 340 case FLASH_CFI_8BIT: 341 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, 342 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 343 flash_write8(cword.c, addr); 344 break; 345 case FLASH_CFI_16BIT: 346 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, 347 cmd, cword.w, 348 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 349 flash_write16(cword.w, addr); 350 break; 351 case FLASH_CFI_32BIT: 352 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr, 353 cmd, cword.l, 354 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 355 flash_write32(cword.l, addr); 356 break; 357 case FLASH_CFI_64BIT: 358 #ifdef DEBUG 359 { 360 char str[20]; 361 362 print_longlong (str, cword.ll); 363 364 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", 365 addr, cmd, str, 366 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 367 } 368 #endif 369 flash_write64(cword.ll, addr); 370 break; 371 } 372 373 /* Ensure all the instructions are fully finished */ 374 sync(); 375 376 flash_unmap(info, sect, offset, addr); 377 } 378 379 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) 380 { 381 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START); 382 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK); 383 } 384 385 /*----------------------------------------------------------------------- 386 */ 387 static int flash_isequal (flash_info_t * info, flash_sect_t sect, 388 uint offset, uchar cmd) 389 { 390 void *addr; 391 cfiword_t cword; 392 int retval; 393 394 addr = flash_map (info, sect, offset); 395 flash_make_cmd (info, cmd, &cword); 396 397 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr); 398 switch (info->portwidth) { 399 case FLASH_CFI_8BIT: 400 debug ("is= %x %x\n", flash_read8(addr), cword.c); 401 retval = (flash_read8(addr) == cword.c); 402 break; 403 case FLASH_CFI_16BIT: 404 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w); 405 retval = (flash_read16(addr) == cword.w); 406 break; 407 case FLASH_CFI_32BIT: 408 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l); 409 retval = (flash_read32(addr) == cword.l); 410 break; 411 case FLASH_CFI_64BIT: 412 #ifdef DEBUG 413 { 414 char str1[20]; 415 char str2[20]; 416 417 print_longlong (str1, flash_read64(addr)); 418 print_longlong (str2, cword.ll); 419 debug ("is= %s %s\n", str1, str2); 420 } 421 #endif 422 retval = (flash_read64(addr) == cword.ll); 423 break; 424 default: 425 retval = 0; 426 break; 427 } 428 flash_unmap(info, sect, offset, addr); 429 430 return retval; 431 } 432 433 /*----------------------------------------------------------------------- 434 */ 435 static int flash_isset (flash_info_t * info, flash_sect_t sect, 436 uint offset, uchar cmd) 437 { 438 void *addr; 439 cfiword_t cword; 440 int retval; 441 442 addr = flash_map (info, sect, offset); 443 flash_make_cmd (info, cmd, &cword); 444 switch (info->portwidth) { 445 case FLASH_CFI_8BIT: 446 retval = ((flash_read8(addr) & cword.c) == cword.c); 447 break; 448 case FLASH_CFI_16BIT: 449 retval = ((flash_read16(addr) & cword.w) == cword.w); 450 break; 451 case FLASH_CFI_32BIT: 452 retval = ((flash_read32(addr) & cword.l) == cword.l); 453 break; 454 case FLASH_CFI_64BIT: 455 retval = ((flash_read64(addr) & cword.ll) == cword.ll); 456 break; 457 default: 458 retval = 0; 459 break; 460 } 461 flash_unmap(info, sect, offset, addr); 462 463 return retval; 464 } 465 466 /*----------------------------------------------------------------------- 467 */ 468 static int flash_toggle (flash_info_t * info, flash_sect_t sect, 469 uint offset, uchar cmd) 470 { 471 void *addr; 472 cfiword_t cword; 473 int retval; 474 475 addr = flash_map (info, sect, offset); 476 flash_make_cmd (info, cmd, &cword); 477 switch (info->portwidth) { 478 case FLASH_CFI_8BIT: 479 retval = flash_read8(addr) != flash_read8(addr); 480 break; 481 case FLASH_CFI_16BIT: 482 retval = flash_read16(addr) != flash_read16(addr); 483 break; 484 case FLASH_CFI_32BIT: 485 retval = flash_read32(addr) != flash_read32(addr); 486 break; 487 case FLASH_CFI_64BIT: 488 retval = ( (flash_read32( addr ) != flash_read32( addr )) || 489 (flash_read32(addr+4) != flash_read32(addr+4)) ); 490 break; 491 default: 492 retval = 0; 493 break; 494 } 495 flash_unmap(info, sect, offset, addr); 496 497 return retval; 498 } 499 500 /* 501 * flash_is_busy - check to see if the flash is busy 502 * 503 * This routine checks the status of the chip and returns true if the 504 * chip is busy. 505 */ 506 static int flash_is_busy (flash_info_t * info, flash_sect_t sect) 507 { 508 int retval; 509 510 switch (info->vendor) { 511 case CFI_CMDSET_INTEL_PROG_REGIONS: 512 case CFI_CMDSET_INTEL_STANDARD: 513 case CFI_CMDSET_INTEL_EXTENDED: 514 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE); 515 break; 516 case CFI_CMDSET_AMD_STANDARD: 517 case CFI_CMDSET_AMD_EXTENDED: 518 #ifdef CONFIG_FLASH_CFI_LEGACY 519 case CFI_CMDSET_AMD_LEGACY: 520 #endif 521 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); 522 break; 523 default: 524 retval = 0; 525 } 526 debug ("flash_is_busy: %d\n", retval); 527 return retval; 528 } 529 530 /*----------------------------------------------------------------------- 531 * wait for XSR.7 to be set. Time out with an error if it does not. 532 * This routine does not set the flash to read-array mode. 533 */ 534 static int flash_status_check (flash_info_t * info, flash_sect_t sector, 535 ulong tout, char *prompt) 536 { 537 ulong start; 538 539 #if CONFIG_SYS_HZ != 1000 540 if ((ulong)CONFIG_SYS_HZ > 100000) 541 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */ 542 else 543 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000); 544 #endif 545 546 /* Wait for command completion */ 547 reset_timer(); 548 start = get_timer (0); 549 while (flash_is_busy (info, sector)) { 550 if (get_timer (start) > tout) { 551 printf ("Flash %s timeout at address %lx data %lx\n", 552 prompt, info->start[sector], 553 flash_read_long (info, sector, 0)); 554 flash_write_cmd (info, sector, 0, info->cmd_reset); 555 return ERR_TIMOUT; 556 } 557 udelay (1); /* also triggers watchdog */ 558 } 559 return ERR_OK; 560 } 561 562 /*----------------------------------------------------------------------- 563 * Wait for XSR.7 to be set, if it times out print an error, otherwise 564 * do a full status check. 565 * 566 * This routine sets the flash to read-array mode. 567 */ 568 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, 569 ulong tout, char *prompt) 570 { 571 int retcode; 572 573 retcode = flash_status_check (info, sector, tout, prompt); 574 switch (info->vendor) { 575 case CFI_CMDSET_INTEL_PROG_REGIONS: 576 case CFI_CMDSET_INTEL_EXTENDED: 577 case CFI_CMDSET_INTEL_STANDARD: 578 if ((retcode != ERR_OK) 579 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { 580 retcode = ERR_INVAL; 581 printf ("Flash %s error at address %lx\n", prompt, 582 info->start[sector]); 583 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | 584 FLASH_STATUS_PSLBS)) { 585 puts ("Command Sequence Error.\n"); 586 } else if (flash_isset (info, sector, 0, 587 FLASH_STATUS_ECLBS)) { 588 puts ("Block Erase Error.\n"); 589 retcode = ERR_NOT_ERASED; 590 } else if (flash_isset (info, sector, 0, 591 FLASH_STATUS_PSLBS)) { 592 puts ("Locking Error\n"); 593 } 594 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) { 595 puts ("Block locked.\n"); 596 retcode = ERR_PROTECTED; 597 } 598 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) 599 puts ("Vpp Low Error.\n"); 600 } 601 flash_write_cmd (info, sector, 0, info->cmd_reset); 602 break; 603 default: 604 break; 605 } 606 return retcode; 607 } 608 609 static int use_flash_status_poll(flash_info_t *info) 610 { 611 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL 612 if (info->vendor == CFI_CMDSET_AMD_EXTENDED || 613 info->vendor == CFI_CMDSET_AMD_STANDARD) 614 return 1; 615 #endif 616 return 0; 617 } 618 619 static int flash_status_poll(flash_info_t *info, void *src, void *dst, 620 ulong tout, char *prompt) 621 { 622 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL 623 ulong start; 624 int ready; 625 626 #if CONFIG_SYS_HZ != 1000 627 if ((ulong)CONFIG_SYS_HZ > 100000) 628 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */ 629 else 630 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000); 631 #endif 632 633 /* Wait for command completion */ 634 reset_timer(); 635 start = get_timer(0); 636 while (1) { 637 switch (info->portwidth) { 638 case FLASH_CFI_8BIT: 639 ready = flash_read8(dst) == flash_read8(src); 640 break; 641 case FLASH_CFI_16BIT: 642 ready = flash_read16(dst) == flash_read16(src); 643 break; 644 case FLASH_CFI_32BIT: 645 ready = flash_read32(dst) == flash_read32(src); 646 break; 647 case FLASH_CFI_64BIT: 648 ready = flash_read64(dst) == flash_read64(src); 649 break; 650 default: 651 ready = 0; 652 break; 653 } 654 if (ready) 655 break; 656 if (get_timer(start) > tout) { 657 printf("Flash %s timeout at address %lx data %lx\n", 658 prompt, (ulong)dst, (ulong)flash_read8(dst)); 659 return ERR_TIMOUT; 660 } 661 udelay(1); /* also triggers watchdog */ 662 } 663 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */ 664 return ERR_OK; 665 } 666 667 /*----------------------------------------------------------------------- 668 */ 669 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) 670 { 671 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 672 unsigned short w; 673 unsigned int l; 674 unsigned long long ll; 675 #endif 676 677 switch (info->portwidth) { 678 case FLASH_CFI_8BIT: 679 cword->c = c; 680 break; 681 case FLASH_CFI_16BIT: 682 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 683 w = c; 684 w <<= 8; 685 cword->w = (cword->w >> 8) | w; 686 #else 687 cword->w = (cword->w << 8) | c; 688 #endif 689 break; 690 case FLASH_CFI_32BIT: 691 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 692 l = c; 693 l <<= 24; 694 cword->l = (cword->l >> 8) | l; 695 #else 696 cword->l = (cword->l << 8) | c; 697 #endif 698 break; 699 case FLASH_CFI_64BIT: 700 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 701 ll = c; 702 ll <<= 56; 703 cword->ll = (cword->ll >> 8) | ll; 704 #else 705 cword->ll = (cword->ll << 8) | c; 706 #endif 707 break; 708 } 709 } 710 711 /* 712 * Loop through the sector table starting from the previously found sector. 713 * Searches forwards or backwards, dependent on the passed address. 714 */ 715 static flash_sect_t find_sector (flash_info_t * info, ulong addr) 716 { 717 static flash_sect_t saved_sector = 0; /* previously found sector */ 718 flash_sect_t sector = saved_sector; 719 720 while ((info->start[sector] < addr) 721 && (sector < info->sector_count - 1)) 722 sector++; 723 while ((info->start[sector] > addr) && (sector > 0)) 724 /* 725 * also decrements the sector in case of an overshot 726 * in the first loop 727 */ 728 sector--; 729 730 saved_sector = sector; 731 return sector; 732 } 733 734 /*----------------------------------------------------------------------- 735 */ 736 static int flash_write_cfiword (flash_info_t * info, ulong dest, 737 cfiword_t cword) 738 { 739 void *dstaddr = (void *)dest; 740 int flag; 741 flash_sect_t sect = 0; 742 char sect_found = 0; 743 744 /* Check if Flash is (sufficiently) erased */ 745 switch (info->portwidth) { 746 case FLASH_CFI_8BIT: 747 flag = ((flash_read8(dstaddr) & cword.c) == cword.c); 748 break; 749 case FLASH_CFI_16BIT: 750 flag = ((flash_read16(dstaddr) & cword.w) == cword.w); 751 break; 752 case FLASH_CFI_32BIT: 753 flag = ((flash_read32(dstaddr) & cword.l) == cword.l); 754 break; 755 case FLASH_CFI_64BIT: 756 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll); 757 break; 758 default: 759 flag = 0; 760 break; 761 } 762 if (!flag) 763 return ERR_NOT_ERASED; 764 765 /* Disable interrupts which might cause a timeout here */ 766 flag = disable_interrupts (); 767 768 switch (info->vendor) { 769 case CFI_CMDSET_INTEL_PROG_REGIONS: 770 case CFI_CMDSET_INTEL_EXTENDED: 771 case CFI_CMDSET_INTEL_STANDARD: 772 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS); 773 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE); 774 break; 775 case CFI_CMDSET_AMD_EXTENDED: 776 case CFI_CMDSET_AMD_STANDARD: 777 sect = find_sector(info, dest); 778 flash_unlock_seq (info, sect); 779 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE); 780 sect_found = 1; 781 break; 782 #ifdef CONFIG_FLASH_CFI_LEGACY 783 case CFI_CMDSET_AMD_LEGACY: 784 sect = find_sector(info, dest); 785 flash_unlock_seq (info, 0); 786 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE); 787 sect_found = 1; 788 break; 789 #endif 790 } 791 792 switch (info->portwidth) { 793 case FLASH_CFI_8BIT: 794 flash_write8(cword.c, dstaddr); 795 break; 796 case FLASH_CFI_16BIT: 797 flash_write16(cword.w, dstaddr); 798 break; 799 case FLASH_CFI_32BIT: 800 flash_write32(cword.l, dstaddr); 801 break; 802 case FLASH_CFI_64BIT: 803 flash_write64(cword.ll, dstaddr); 804 break; 805 } 806 807 /* re-enable interrupts if necessary */ 808 if (flag) 809 enable_interrupts (); 810 811 if (!sect_found) 812 sect = find_sector (info, dest); 813 814 if (use_flash_status_poll(info)) 815 return flash_status_poll(info, &cword, dstaddr, 816 info->write_tout, "write"); 817 else 818 return flash_full_status_check(info, sect, 819 info->write_tout, "write"); 820 } 821 822 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 823 824 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, 825 int len) 826 { 827 flash_sect_t sector; 828 int cnt; 829 int retcode; 830 void *src = cp; 831 void *dst = (void *)dest; 832 void *dst2 = dst; 833 int flag = 0; 834 uint offset = 0; 835 unsigned int shift; 836 uchar write_cmd; 837 838 switch (info->portwidth) { 839 case FLASH_CFI_8BIT: 840 shift = 0; 841 break; 842 case FLASH_CFI_16BIT: 843 shift = 1; 844 break; 845 case FLASH_CFI_32BIT: 846 shift = 2; 847 break; 848 case FLASH_CFI_64BIT: 849 shift = 3; 850 break; 851 default: 852 retcode = ERR_INVAL; 853 goto out_unmap; 854 } 855 856 cnt = len >> shift; 857 858 while ((cnt-- > 0) && (flag == 0)) { 859 switch (info->portwidth) { 860 case FLASH_CFI_8BIT: 861 flag = ((flash_read8(dst2) & flash_read8(src)) == 862 flash_read8(src)); 863 src += 1, dst2 += 1; 864 break; 865 case FLASH_CFI_16BIT: 866 flag = ((flash_read16(dst2) & flash_read16(src)) == 867 flash_read16(src)); 868 src += 2, dst2 += 2; 869 break; 870 case FLASH_CFI_32BIT: 871 flag = ((flash_read32(dst2) & flash_read32(src)) == 872 flash_read32(src)); 873 src += 4, dst2 += 4; 874 break; 875 case FLASH_CFI_64BIT: 876 flag = ((flash_read64(dst2) & flash_read64(src)) == 877 flash_read64(src)); 878 src += 8, dst2 += 8; 879 break; 880 } 881 } 882 if (!flag) { 883 retcode = ERR_NOT_ERASED; 884 goto out_unmap; 885 } 886 887 src = cp; 888 sector = find_sector (info, dest); 889 890 switch (info->vendor) { 891 case CFI_CMDSET_INTEL_PROG_REGIONS: 892 case CFI_CMDSET_INTEL_STANDARD: 893 case CFI_CMDSET_INTEL_EXTENDED: 894 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ? 895 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER; 896 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 897 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS); 898 flash_write_cmd (info, sector, 0, write_cmd); 899 retcode = flash_status_check (info, sector, 900 info->buffer_write_tout, 901 "write to buffer"); 902 if (retcode == ERR_OK) { 903 /* reduce the number of loops by the width of 904 * the port */ 905 cnt = len >> shift; 906 flash_write_cmd (info, sector, 0, cnt - 1); 907 while (cnt-- > 0) { 908 switch (info->portwidth) { 909 case FLASH_CFI_8BIT: 910 flash_write8(flash_read8(src), dst); 911 src += 1, dst += 1; 912 break; 913 case FLASH_CFI_16BIT: 914 flash_write16(flash_read16(src), dst); 915 src += 2, dst += 2; 916 break; 917 case FLASH_CFI_32BIT: 918 flash_write32(flash_read32(src), dst); 919 src += 4, dst += 4; 920 break; 921 case FLASH_CFI_64BIT: 922 flash_write64(flash_read64(src), dst); 923 src += 8, dst += 8; 924 break; 925 default: 926 retcode = ERR_INVAL; 927 goto out_unmap; 928 } 929 } 930 flash_write_cmd (info, sector, 0, 931 FLASH_CMD_WRITE_BUFFER_CONFIRM); 932 retcode = flash_full_status_check ( 933 info, sector, info->buffer_write_tout, 934 "buffer write"); 935 } 936 937 break; 938 939 case CFI_CMDSET_AMD_STANDARD: 940 case CFI_CMDSET_AMD_EXTENDED: 941 flash_unlock_seq(info,0); 942 943 #ifdef CONFIG_FLASH_SPANSION_S29WS_N 944 offset = ((unsigned long)dst - info->start[sector]) >> shift; 945 #endif 946 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER); 947 cnt = len >> shift; 948 flash_write_cmd(info, sector, offset, cnt - 1); 949 950 switch (info->portwidth) { 951 case FLASH_CFI_8BIT: 952 while (cnt-- > 0) { 953 flash_write8(flash_read8(src), dst); 954 src += 1, dst += 1; 955 } 956 break; 957 case FLASH_CFI_16BIT: 958 while (cnt-- > 0) { 959 flash_write16(flash_read16(src), dst); 960 src += 2, dst += 2; 961 } 962 break; 963 case FLASH_CFI_32BIT: 964 while (cnt-- > 0) { 965 flash_write32(flash_read32(src), dst); 966 src += 4, dst += 4; 967 } 968 break; 969 case FLASH_CFI_64BIT: 970 while (cnt-- > 0) { 971 flash_write64(flash_read64(src), dst); 972 src += 8, dst += 8; 973 } 974 break; 975 default: 976 retcode = ERR_INVAL; 977 goto out_unmap; 978 } 979 980 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); 981 if (use_flash_status_poll(info)) 982 retcode = flash_status_poll(info, src - (1 << shift), 983 dst - (1 << shift), 984 info->buffer_write_tout, 985 "buffer write"); 986 else 987 retcode = flash_full_status_check(info, sector, 988 info->buffer_write_tout, 989 "buffer write"); 990 break; 991 992 default: 993 debug ("Unknown Command Set\n"); 994 retcode = ERR_INVAL; 995 break; 996 } 997 998 out_unmap: 999 return retcode; 1000 } 1001 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1002 1003 1004 /*----------------------------------------------------------------------- 1005 */ 1006 int flash_erase (flash_info_t * info, int s_first, int s_last) 1007 { 1008 int rcode = 0; 1009 int prot; 1010 flash_sect_t sect; 1011 int st; 1012 1013 if (info->flash_id != FLASH_MAN_CFI) { 1014 puts ("Can't erase unknown flash type - aborted\n"); 1015 return 1; 1016 } 1017 if ((s_first < 0) || (s_first > s_last)) { 1018 puts ("- no sectors to erase\n"); 1019 return 1; 1020 } 1021 1022 prot = 0; 1023 for (sect = s_first; sect <= s_last; ++sect) { 1024 if (info->protect[sect]) { 1025 prot++; 1026 } 1027 } 1028 if (prot) { 1029 printf ("- Warning: %d protected sectors will not be erased!\n", 1030 prot); 1031 } else if (flash_verbose) { 1032 putc ('\n'); 1033 } 1034 1035 1036 for (sect = s_first; sect <= s_last; sect++) { 1037 if (info->protect[sect] == 0) { /* not protected */ 1038 switch (info->vendor) { 1039 case CFI_CMDSET_INTEL_PROG_REGIONS: 1040 case CFI_CMDSET_INTEL_STANDARD: 1041 case CFI_CMDSET_INTEL_EXTENDED: 1042 flash_write_cmd (info, sect, 0, 1043 FLASH_CMD_CLEAR_STATUS); 1044 flash_write_cmd (info, sect, 0, 1045 FLASH_CMD_BLOCK_ERASE); 1046 flash_write_cmd (info, sect, 0, 1047 FLASH_CMD_ERASE_CONFIRM); 1048 break; 1049 case CFI_CMDSET_AMD_STANDARD: 1050 case CFI_CMDSET_AMD_EXTENDED: 1051 flash_unlock_seq (info, sect); 1052 flash_write_cmd (info, sect, 1053 info->addr_unlock1, 1054 AMD_CMD_ERASE_START); 1055 flash_unlock_seq (info, sect); 1056 flash_write_cmd (info, sect, 0, 1057 AMD_CMD_ERASE_SECTOR); 1058 break; 1059 #ifdef CONFIG_FLASH_CFI_LEGACY 1060 case CFI_CMDSET_AMD_LEGACY: 1061 flash_unlock_seq (info, 0); 1062 flash_write_cmd (info, 0, info->addr_unlock1, 1063 AMD_CMD_ERASE_START); 1064 flash_unlock_seq (info, 0); 1065 flash_write_cmd (info, sect, 0, 1066 AMD_CMD_ERASE_SECTOR); 1067 break; 1068 #endif 1069 default: 1070 debug ("Unkown flash vendor %d\n", 1071 info->vendor); 1072 break; 1073 } 1074 1075 if (use_flash_status_poll(info)) { 1076 cfiword_t cword = (cfiword_t)0xffffffffffffffffULL; 1077 void *dest; 1078 dest = flash_map(info, sect, 0); 1079 st = flash_status_poll(info, &cword, dest, 1080 info->erase_blk_tout, "erase"); 1081 flash_unmap(info, sect, 0, dest); 1082 } else 1083 st = flash_full_status_check(info, sect, 1084 info->erase_blk_tout, 1085 "erase"); 1086 if (st) 1087 rcode = 1; 1088 else if (flash_verbose) 1089 putc ('.'); 1090 } 1091 } 1092 1093 if (flash_verbose) 1094 puts (" done\n"); 1095 1096 return rcode; 1097 } 1098 1099 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 1100 static int sector_erased(flash_info_t *info, int i) 1101 { 1102 int k; 1103 int size; 1104 volatile unsigned long *flash; 1105 1106 /* 1107 * Check if whole sector is erased 1108 */ 1109 size = flash_sector_size(info, i); 1110 flash = (volatile unsigned long *) info->start[i]; 1111 /* divide by 4 for longword access */ 1112 size = size >> 2; 1113 1114 for (k = 0; k < size; k++) { 1115 if (*flash++ != 0xffffffff) 1116 return 0; /* not erased */ 1117 } 1118 1119 return 1; /* erased */ 1120 } 1121 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */ 1122 1123 void flash_print_info (flash_info_t * info) 1124 { 1125 int i; 1126 1127 if (info->flash_id != FLASH_MAN_CFI) { 1128 puts ("missing or unknown FLASH type\n"); 1129 return; 1130 } 1131 1132 printf ("%s FLASH (%d x %d)", 1133 info->name, 1134 (info->portwidth << 3), (info->chipwidth << 3)); 1135 if (info->size < 1024*1024) 1136 printf (" Size: %ld kB in %d Sectors\n", 1137 info->size >> 10, info->sector_count); 1138 else 1139 printf (" Size: %ld MB in %d Sectors\n", 1140 info->size >> 20, info->sector_count); 1141 printf (" "); 1142 switch (info->vendor) { 1143 case CFI_CMDSET_INTEL_PROG_REGIONS: 1144 printf ("Intel Prog Regions"); 1145 break; 1146 case CFI_CMDSET_INTEL_STANDARD: 1147 printf ("Intel Standard"); 1148 break; 1149 case CFI_CMDSET_INTEL_EXTENDED: 1150 printf ("Intel Extended"); 1151 break; 1152 case CFI_CMDSET_AMD_STANDARD: 1153 printf ("AMD Standard"); 1154 break; 1155 case CFI_CMDSET_AMD_EXTENDED: 1156 printf ("AMD Extended"); 1157 break; 1158 #ifdef CONFIG_FLASH_CFI_LEGACY 1159 case CFI_CMDSET_AMD_LEGACY: 1160 printf ("AMD Legacy"); 1161 break; 1162 #endif 1163 default: 1164 printf ("Unknown (%d)", info->vendor); 1165 break; 1166 } 1167 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x", 1168 info->manufacturer_id); 1169 printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X", 1170 info->device_id); 1171 if (info->device_id == 0x7E) { 1172 printf("%04X", info->device_id2); 1173 } 1174 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", 1175 info->erase_blk_tout, 1176 info->write_tout); 1177 if (info->buffer_size > 1) { 1178 printf (" Buffer write timeout: %ld ms, " 1179 "buffer size: %d bytes\n", 1180 info->buffer_write_tout, 1181 info->buffer_size); 1182 } 1183 1184 puts ("\n Sector Start Addresses:"); 1185 for (i = 0; i < info->sector_count; ++i) { 1186 if (ctrlc()) 1187 break; 1188 if ((i % 5) == 0) 1189 putc('\n'); 1190 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 1191 /* print empty and read-only info */ 1192 printf (" %08lX %c %s ", 1193 info->start[i], 1194 sector_erased(info, i) ? 'E' : ' ', 1195 info->protect[i] ? "RO" : " "); 1196 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */ 1197 printf (" %08lX %s ", 1198 info->start[i], 1199 info->protect[i] ? "RO" : " "); 1200 #endif 1201 } 1202 putc ('\n'); 1203 return; 1204 } 1205 1206 /*----------------------------------------------------------------------- 1207 * This is used in a few places in write_buf() to show programming 1208 * progress. Making it a function is nasty because it needs to do side 1209 * effect updates to digit and dots. Repeated code is nasty too, so 1210 * we define it once here. 1211 */ 1212 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1213 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \ 1214 if (flash_verbose) { \ 1215 dots -= dots_sub; \ 1216 if ((scale > 0) && (dots <= 0)) { \ 1217 if ((digit % 5) == 0) \ 1218 printf ("%d", digit / 5); \ 1219 else \ 1220 putc ('.'); \ 1221 digit--; \ 1222 dots += scale; \ 1223 } \ 1224 } 1225 #else 1226 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) 1227 #endif 1228 1229 /*----------------------------------------------------------------------- 1230 * Copy memory to flash, returns: 1231 * 0 - OK 1232 * 1 - write timeout 1233 * 2 - Flash not erased 1234 */ 1235 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) 1236 { 1237 ulong wp; 1238 uchar *p; 1239 int aln; 1240 cfiword_t cword; 1241 int i, rc; 1242 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1243 int buffered_size; 1244 #endif 1245 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1246 int digit = CONFIG_FLASH_SHOW_PROGRESS; 1247 int scale = 0; 1248 int dots = 0; 1249 1250 /* 1251 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes. 1252 */ 1253 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) { 1254 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) / 1255 CONFIG_FLASH_SHOW_PROGRESS); 1256 } 1257 #endif 1258 1259 /* get lower aligned address */ 1260 wp = (addr & ~(info->portwidth - 1)); 1261 1262 /* handle unaligned start */ 1263 if ((aln = addr - wp) != 0) { 1264 cword.l = 0; 1265 p = (uchar *)wp; 1266 for (i = 0; i < aln; ++i) 1267 flash_add_byte (info, &cword, flash_read8(p + i)); 1268 1269 for (; (i < info->portwidth) && (cnt > 0); i++) { 1270 flash_add_byte (info, &cword, *src++); 1271 cnt--; 1272 } 1273 for (; (cnt == 0) && (i < info->portwidth); ++i) 1274 flash_add_byte (info, &cword, flash_read8(p + i)); 1275 1276 rc = flash_write_cfiword (info, wp, cword); 1277 if (rc != 0) 1278 return rc; 1279 1280 wp += i; 1281 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1282 } 1283 1284 /* handle the aligned part */ 1285 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1286 buffered_size = (info->portwidth / info->chipwidth); 1287 buffered_size *= info->buffer_size; 1288 while (cnt >= info->portwidth) { 1289 /* prohibit buffer write when buffer_size is 1 */ 1290 if (info->buffer_size == 1) { 1291 cword.l = 0; 1292 for (i = 0; i < info->portwidth; i++) 1293 flash_add_byte (info, &cword, *src++); 1294 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1295 return rc; 1296 wp += info->portwidth; 1297 cnt -= info->portwidth; 1298 continue; 1299 } 1300 1301 /* write buffer until next buffered_size aligned boundary */ 1302 i = buffered_size - (wp % buffered_size); 1303 if (i > cnt) 1304 i = cnt; 1305 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) 1306 return rc; 1307 i -= i & (info->portwidth - 1); 1308 wp += i; 1309 src += i; 1310 cnt -= i; 1311 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1312 } 1313 #else 1314 while (cnt >= info->portwidth) { 1315 cword.l = 0; 1316 for (i = 0; i < info->portwidth; i++) { 1317 flash_add_byte (info, &cword, *src++); 1318 } 1319 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1320 return rc; 1321 wp += info->portwidth; 1322 cnt -= info->portwidth; 1323 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth); 1324 } 1325 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1326 1327 if (cnt == 0) { 1328 return (0); 1329 } 1330 1331 /* 1332 * handle unaligned tail bytes 1333 */ 1334 cword.l = 0; 1335 p = (uchar *)wp; 1336 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) { 1337 flash_add_byte (info, &cword, *src++); 1338 --cnt; 1339 } 1340 for (; i < info->portwidth; ++i) 1341 flash_add_byte (info, &cword, flash_read8(p + i)); 1342 1343 return flash_write_cfiword (info, wp, cword); 1344 } 1345 1346 /*----------------------------------------------------------------------- 1347 */ 1348 #ifdef CONFIG_SYS_FLASH_PROTECTION 1349 1350 int flash_real_protect (flash_info_t * info, long sector, int prot) 1351 { 1352 int retcode = 0; 1353 1354 switch (info->vendor) { 1355 case CFI_CMDSET_INTEL_PROG_REGIONS: 1356 case CFI_CMDSET_INTEL_STANDARD: 1357 case CFI_CMDSET_INTEL_EXTENDED: 1358 /* 1359 * see errata called 1360 * "Numonyx Axcell P33/P30 Specification Update" :) 1361 */ 1362 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID); 1363 if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT, 1364 prot)) { 1365 /* 1366 * cmd must come before FLASH_CMD_PROTECT + 20us 1367 * Disable interrupts which might cause a timeout here. 1368 */ 1369 int flag = disable_interrupts (); 1370 unsigned short cmd; 1371 1372 if (prot) 1373 cmd = FLASH_CMD_PROTECT_SET; 1374 else 1375 cmd = FLASH_CMD_PROTECT_CLEAR; 1376 1377 flash_write_cmd (info, sector, 0, 1378 FLASH_CMD_PROTECT); 1379 flash_write_cmd (info, sector, 0, cmd); 1380 /* re-enable interrupts if necessary */ 1381 if (flag) 1382 enable_interrupts (); 1383 } 1384 break; 1385 case CFI_CMDSET_AMD_EXTENDED: 1386 case CFI_CMDSET_AMD_STANDARD: 1387 /* U-Boot only checks the first byte */ 1388 if (info->manufacturer_id == (uchar)ATM_MANUFACT) { 1389 if (prot) { 1390 flash_unlock_seq (info, 0); 1391 flash_write_cmd (info, 0, 1392 info->addr_unlock1, 1393 ATM_CMD_SOFTLOCK_START); 1394 flash_unlock_seq (info, 0); 1395 flash_write_cmd (info, sector, 0, 1396 ATM_CMD_LOCK_SECT); 1397 } else { 1398 flash_write_cmd (info, 0, 1399 info->addr_unlock1, 1400 AMD_CMD_UNLOCK_START); 1401 if (info->device_id == ATM_ID_BV6416) 1402 flash_write_cmd (info, sector, 1403 0, ATM_CMD_UNLOCK_SECT); 1404 } 1405 } 1406 break; 1407 #ifdef CONFIG_FLASH_CFI_LEGACY 1408 case CFI_CMDSET_AMD_LEGACY: 1409 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 1410 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1411 if (prot) 1412 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); 1413 else 1414 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); 1415 #endif 1416 }; 1417 1418 if ((retcode = 1419 flash_full_status_check (info, sector, info->erase_blk_tout, 1420 prot ? "protect" : "unprotect")) == 0) { 1421 1422 info->protect[sector] = prot; 1423 1424 /* 1425 * On some of Intel's flash chips (marked via legacy_unlock) 1426 * unprotect unprotects all locking. 1427 */ 1428 if ((prot == 0) && (info->legacy_unlock)) { 1429 flash_sect_t i; 1430 1431 for (i = 0; i < info->sector_count; i++) { 1432 if (info->protect[i]) 1433 flash_real_protect (info, i, 1); 1434 } 1435 } 1436 } 1437 return retcode; 1438 } 1439 1440 /*----------------------------------------------------------------------- 1441 * flash_read_user_serial - read the OneTimeProgramming cells 1442 */ 1443 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, 1444 int len) 1445 { 1446 uchar *src; 1447 uchar *dst; 1448 1449 dst = buffer; 1450 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION); 1451 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1452 memcpy (dst, src + offset, len); 1453 flash_write_cmd (info, 0, 0, info->cmd_reset); 1454 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src); 1455 } 1456 1457 /* 1458 * flash_read_factory_serial - read the device Id from the protection area 1459 */ 1460 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, 1461 int len) 1462 { 1463 uchar *src; 1464 1465 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION); 1466 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1467 memcpy (buffer, src + offset, len); 1468 flash_write_cmd (info, 0, 0, info->cmd_reset); 1469 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); 1470 } 1471 1472 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 1473 1474 /*----------------------------------------------------------------------- 1475 * Reverse the order of the erase regions in the CFI QRY structure. 1476 * This is needed for chips that are either a) correctly detected as 1477 * top-boot, or b) buggy. 1478 */ 1479 static void cfi_reverse_geometry(struct cfi_qry *qry) 1480 { 1481 unsigned int i, j; 1482 u32 tmp; 1483 1484 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) { 1485 tmp = qry->erase_region_info[i]; 1486 qry->erase_region_info[i] = qry->erase_region_info[j]; 1487 qry->erase_region_info[j] = tmp; 1488 } 1489 } 1490 1491 /*----------------------------------------------------------------------- 1492 * read jedec ids from device and set corresponding fields in info struct 1493 * 1494 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct 1495 * 1496 */ 1497 static void cmdset_intel_read_jedec_ids(flash_info_t *info) 1498 { 1499 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1500 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); 1501 udelay(1000); /* some flash are slow to respond */ 1502 info->manufacturer_id = flash_read_uchar (info, 1503 FLASH_OFFSET_MANUFACTURER_ID); 1504 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ? 1505 flash_read_word (info, FLASH_OFFSET_DEVICE_ID) : 1506 flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID); 1507 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1508 } 1509 1510 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) 1511 { 1512 info->cmd_reset = FLASH_CMD_RESET; 1513 1514 cmdset_intel_read_jedec_ids(info); 1515 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1516 1517 #ifdef CONFIG_SYS_FLASH_PROTECTION 1518 /* read legacy lock/unlock bit from intel flash */ 1519 if (info->ext_addr) { 1520 info->legacy_unlock = flash_read_uchar (info, 1521 info->ext_addr + 5) & 0x08; 1522 } 1523 #endif 1524 1525 return 0; 1526 } 1527 1528 static void cmdset_amd_read_jedec_ids(flash_info_t *info) 1529 { 1530 ushort bankId = 0; 1531 uchar manuId; 1532 1533 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1534 flash_unlock_seq(info, 0); 1535 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); 1536 udelay(1000); /* some flash are slow to respond */ 1537 1538 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID); 1539 /* JEDEC JEP106Z specifies ID codes up to bank 7 */ 1540 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) { 1541 bankId += 0x100; 1542 manuId = flash_read_uchar (info, 1543 bankId | FLASH_OFFSET_MANUFACTURER_ID); 1544 } 1545 info->manufacturer_id = manuId; 1546 1547 switch (info->chipwidth){ 1548 case FLASH_CFI_8BIT: 1549 info->device_id = flash_read_uchar (info, 1550 FLASH_OFFSET_DEVICE_ID); 1551 if (info->device_id == 0x7E) { 1552 /* AMD 3-byte (expanded) device ids */ 1553 info->device_id2 = flash_read_uchar (info, 1554 FLASH_OFFSET_DEVICE_ID2); 1555 info->device_id2 <<= 8; 1556 info->device_id2 |= flash_read_uchar (info, 1557 FLASH_OFFSET_DEVICE_ID3); 1558 } 1559 break; 1560 case FLASH_CFI_16BIT: 1561 info->device_id = flash_read_word (info, 1562 FLASH_OFFSET_DEVICE_ID); 1563 break; 1564 default: 1565 break; 1566 } 1567 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1568 } 1569 1570 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) 1571 { 1572 info->cmd_reset = AMD_CMD_RESET; 1573 1574 cmdset_amd_read_jedec_ids(info); 1575 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1576 1577 return 0; 1578 } 1579 1580 #ifdef CONFIG_FLASH_CFI_LEGACY 1581 static void flash_read_jedec_ids (flash_info_t * info) 1582 { 1583 info->manufacturer_id = 0; 1584 info->device_id = 0; 1585 info->device_id2 = 0; 1586 1587 switch (info->vendor) { 1588 case CFI_CMDSET_INTEL_PROG_REGIONS: 1589 case CFI_CMDSET_INTEL_STANDARD: 1590 case CFI_CMDSET_INTEL_EXTENDED: 1591 cmdset_intel_read_jedec_ids(info); 1592 break; 1593 case CFI_CMDSET_AMD_STANDARD: 1594 case CFI_CMDSET_AMD_EXTENDED: 1595 cmdset_amd_read_jedec_ids(info); 1596 break; 1597 default: 1598 break; 1599 } 1600 } 1601 1602 /*----------------------------------------------------------------------- 1603 * Call board code to request info about non-CFI flash. 1604 * board_flash_get_legacy needs to fill in at least: 1605 * info->portwidth, info->chipwidth and info->interface for Jedec probing. 1606 */ 1607 static int flash_detect_legacy(phys_addr_t base, int banknum) 1608 { 1609 flash_info_t *info = &flash_info[banknum]; 1610 1611 if (board_flash_get_legacy(base, banknum, info)) { 1612 /* board code may have filled info completely. If not, we 1613 use JEDEC ID probing. */ 1614 if (!info->vendor) { 1615 int modes[] = { 1616 CFI_CMDSET_AMD_STANDARD, 1617 CFI_CMDSET_INTEL_STANDARD 1618 }; 1619 int i; 1620 1621 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) { 1622 info->vendor = modes[i]; 1623 info->start[0] = 1624 (ulong)map_physmem(base, 1625 info->portwidth, 1626 MAP_NOCACHE); 1627 if (info->portwidth == FLASH_CFI_8BIT 1628 && info->interface == FLASH_CFI_X8X16) { 1629 info->addr_unlock1 = 0x2AAA; 1630 info->addr_unlock2 = 0x5555; 1631 } else { 1632 info->addr_unlock1 = 0x5555; 1633 info->addr_unlock2 = 0x2AAA; 1634 } 1635 flash_read_jedec_ids(info); 1636 debug("JEDEC PROBE: ID %x %x %x\n", 1637 info->manufacturer_id, 1638 info->device_id, 1639 info->device_id2); 1640 if (jedec_flash_match(info, info->start[0])) 1641 break; 1642 else 1643 unmap_physmem((void *)info->start[0], 1644 MAP_NOCACHE); 1645 } 1646 } 1647 1648 switch(info->vendor) { 1649 case CFI_CMDSET_INTEL_PROG_REGIONS: 1650 case CFI_CMDSET_INTEL_STANDARD: 1651 case CFI_CMDSET_INTEL_EXTENDED: 1652 info->cmd_reset = FLASH_CMD_RESET; 1653 break; 1654 case CFI_CMDSET_AMD_STANDARD: 1655 case CFI_CMDSET_AMD_EXTENDED: 1656 case CFI_CMDSET_AMD_LEGACY: 1657 info->cmd_reset = AMD_CMD_RESET; 1658 break; 1659 } 1660 info->flash_id = FLASH_MAN_CFI; 1661 return 1; 1662 } 1663 return 0; /* use CFI */ 1664 } 1665 #else 1666 static inline int flash_detect_legacy(phys_addr_t base, int banknum) 1667 { 1668 return 0; /* use CFI */ 1669 } 1670 #endif 1671 1672 /*----------------------------------------------------------------------- 1673 * detect if flash is compatible with the Common Flash Interface (CFI) 1674 * http://www.jedec.org/download/search/jesd68.pdf 1675 */ 1676 static void flash_read_cfi (flash_info_t *info, void *buf, 1677 unsigned int start, size_t len) 1678 { 1679 u8 *p = buf; 1680 unsigned int i; 1681 1682 for (i = 0; i < len; i++) 1683 p[i] = flash_read_uchar(info, start + i); 1684 } 1685 1686 void __flash_cmd_reset(flash_info_t *info) 1687 { 1688 /* 1689 * We do not yet know what kind of commandset to use, so we issue 1690 * the reset command in both Intel and AMD variants, in the hope 1691 * that AMD flash roms ignore the Intel command. 1692 */ 1693 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1694 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1695 } 1696 void flash_cmd_reset(flash_info_t *info) 1697 __attribute__((weak,alias("__flash_cmd_reset"))); 1698 1699 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1700 { 1701 int cfi_offset; 1702 1703 /* Issue FLASH reset command */ 1704 flash_cmd_reset(info); 1705 1706 for (cfi_offset=0; 1707 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); 1708 cfi_offset++) { 1709 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], 1710 FLASH_CMD_CFI); 1711 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') 1712 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') 1713 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { 1714 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, 1715 sizeof(struct cfi_qry)); 1716 info->interface = le16_to_cpu(qry->interface_desc); 1717 1718 info->cfi_offset = flash_offset_cfi[cfi_offset]; 1719 debug ("device interface is %d\n", 1720 info->interface); 1721 debug ("found port %d chip %d ", 1722 info->portwidth, info->chipwidth); 1723 debug ("port %d bits chip %d bits\n", 1724 info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1725 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1726 1727 /* calculate command offsets as in the Linux driver */ 1728 info->addr_unlock1 = 0x555; 1729 info->addr_unlock2 = 0x2aa; 1730 1731 /* 1732 * modify the unlock address if we are 1733 * in compatibility mode 1734 */ 1735 if ( /* x8/x16 in x8 mode */ 1736 ((info->chipwidth == FLASH_CFI_BY8) && 1737 (info->interface == FLASH_CFI_X8X16)) || 1738 /* x16/x32 in x16 mode */ 1739 ((info->chipwidth == FLASH_CFI_BY16) && 1740 (info->interface == FLASH_CFI_X16X32))) 1741 { 1742 info->addr_unlock1 = 0xaaa; 1743 info->addr_unlock2 = 0x555; 1744 } 1745 1746 info->name = "CFI conformant"; 1747 return 1; 1748 } 1749 } 1750 1751 return 0; 1752 } 1753 1754 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1755 { 1756 debug ("flash detect cfi\n"); 1757 1758 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH; 1759 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { 1760 for (info->chipwidth = FLASH_CFI_BY8; 1761 info->chipwidth <= info->portwidth; 1762 info->chipwidth <<= 1) 1763 if (__flash_detect_cfi(info, qry)) 1764 return 1; 1765 } 1766 debug ("not found\n"); 1767 return 0; 1768 } 1769 1770 /* 1771 * Manufacturer-specific quirks. Add workarounds for geometry 1772 * reversal, etc. here. 1773 */ 1774 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry) 1775 { 1776 /* check if flash geometry needs reversal */ 1777 if (qry->num_erase_regions > 1) { 1778 /* reverse geometry if top boot part */ 1779 if (info->cfi_version < 0x3131) { 1780 /* CFI < 1.1, try to guess from device id */ 1781 if ((info->device_id & 0x80) != 0) 1782 cfi_reverse_geometry(qry); 1783 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { 1784 /* CFI >= 1.1, deduct from top/bottom flag */ 1785 /* note: ext_addr is valid since cfi_version > 0 */ 1786 cfi_reverse_geometry(qry); 1787 } 1788 } 1789 } 1790 1791 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry) 1792 { 1793 int reverse_geometry = 0; 1794 1795 /* Check the "top boot" bit in the PRI */ 1796 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1)) 1797 reverse_geometry = 1; 1798 1799 /* AT49BV6416(T) list the erase regions in the wrong order. 1800 * However, the device ID is identical with the non-broken 1801 * AT49BV642D they differ in the high byte. 1802 */ 1803 if (info->device_id == 0xd6 || info->device_id == 0xd2) 1804 reverse_geometry = !reverse_geometry; 1805 1806 if (reverse_geometry) 1807 cfi_reverse_geometry(qry); 1808 } 1809 1810 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry) 1811 { 1812 /* check if flash geometry needs reversal */ 1813 if (qry->num_erase_regions > 1) { 1814 /* reverse geometry if top boot part */ 1815 if (info->cfi_version < 0x3131) { 1816 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */ 1817 if (info->device_id == 0x22CA || 1818 info->device_id == 0x2256) { 1819 cfi_reverse_geometry(qry); 1820 } 1821 } 1822 } 1823 } 1824 1825 /* 1826 * The following code cannot be run from FLASH! 1827 * 1828 */ 1829 ulong flash_get_size (phys_addr_t base, int banknum) 1830 { 1831 flash_info_t *info = &flash_info[banknum]; 1832 int i, j; 1833 flash_sect_t sect_cnt; 1834 phys_addr_t sector; 1835 unsigned long tmp; 1836 int size_ratio; 1837 uchar num_erase_regions; 1838 int erase_region_size; 1839 int erase_region_count; 1840 struct cfi_qry qry; 1841 1842 memset(&qry, 0, sizeof(qry)); 1843 1844 info->ext_addr = 0; 1845 info->cfi_version = 0; 1846 #ifdef CONFIG_SYS_FLASH_PROTECTION 1847 info->legacy_unlock = 0; 1848 #endif 1849 1850 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE); 1851 1852 if (flash_detect_cfi (info, &qry)) { 1853 info->vendor = le16_to_cpu(qry.p_id); 1854 info->ext_addr = le16_to_cpu(qry.p_adr); 1855 num_erase_regions = qry.num_erase_regions; 1856 1857 if (info->ext_addr) { 1858 info->cfi_version = (ushort) flash_read_uchar (info, 1859 info->ext_addr + 3) << 8; 1860 info->cfi_version |= (ushort) flash_read_uchar (info, 1861 info->ext_addr + 4); 1862 } 1863 1864 #ifdef DEBUG 1865 flash_printqry (&qry); 1866 #endif 1867 1868 switch (info->vendor) { 1869 case CFI_CMDSET_INTEL_PROG_REGIONS: 1870 case CFI_CMDSET_INTEL_STANDARD: 1871 case CFI_CMDSET_INTEL_EXTENDED: 1872 cmdset_intel_init(info, &qry); 1873 break; 1874 case CFI_CMDSET_AMD_STANDARD: 1875 case CFI_CMDSET_AMD_EXTENDED: 1876 cmdset_amd_init(info, &qry); 1877 break; 1878 default: 1879 printf("CFI: Unknown command set 0x%x\n", 1880 info->vendor); 1881 /* 1882 * Unfortunately, this means we don't know how 1883 * to get the chip back to Read mode. Might 1884 * as well try an Intel-style reset... 1885 */ 1886 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1887 return 0; 1888 } 1889 1890 /* Do manufacturer-specific fixups */ 1891 switch (info->manufacturer_id) { 1892 case 0x0001: 1893 flash_fixup_amd(info, &qry); 1894 break; 1895 case 0x001f: 1896 flash_fixup_atmel(info, &qry); 1897 break; 1898 case 0x0020: 1899 flash_fixup_stm(info, &qry); 1900 break; 1901 } 1902 1903 debug ("manufacturer is %d\n", info->vendor); 1904 debug ("manufacturer id is 0x%x\n", info->manufacturer_id); 1905 debug ("device id is 0x%x\n", info->device_id); 1906 debug ("device id2 is 0x%x\n", info->device_id2); 1907 debug ("cfi version is 0x%04x\n", info->cfi_version); 1908 1909 size_ratio = info->portwidth / info->chipwidth; 1910 /* if the chip is x8/x16 reduce the ratio by half */ 1911 if ((info->interface == FLASH_CFI_X8X16) 1912 && (info->chipwidth == FLASH_CFI_BY8)) { 1913 size_ratio >>= 1; 1914 } 1915 debug ("size_ratio %d port %d bits chip %d bits\n", 1916 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1917 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1918 debug ("found %d erase regions\n", num_erase_regions); 1919 sect_cnt = 0; 1920 sector = base; 1921 for (i = 0; i < num_erase_regions; i++) { 1922 if (i > NUM_ERASE_REGIONS) { 1923 printf ("%d erase regions found, only %d used\n", 1924 num_erase_regions, NUM_ERASE_REGIONS); 1925 break; 1926 } 1927 1928 tmp = le32_to_cpu(qry.erase_region_info[i]); 1929 debug("erase region %u: 0x%08lx\n", i, tmp); 1930 1931 erase_region_count = (tmp & 0xffff) + 1; 1932 tmp >>= 16; 1933 erase_region_size = 1934 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; 1935 debug ("erase_region_count = %d erase_region_size = %d\n", 1936 erase_region_count, erase_region_size); 1937 for (j = 0; j < erase_region_count; j++) { 1938 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { 1939 printf("ERROR: too many flash sectors\n"); 1940 break; 1941 } 1942 info->start[sect_cnt] = 1943 (ulong)map_physmem(sector, 1944 info->portwidth, 1945 MAP_NOCACHE); 1946 sector += (erase_region_size * size_ratio); 1947 1948 /* 1949 * Only read protection status from 1950 * supported devices (intel...) 1951 */ 1952 switch (info->vendor) { 1953 case CFI_CMDSET_INTEL_PROG_REGIONS: 1954 case CFI_CMDSET_INTEL_EXTENDED: 1955 case CFI_CMDSET_INTEL_STANDARD: 1956 info->protect[sect_cnt] = 1957 flash_isset (info, sect_cnt, 1958 FLASH_OFFSET_PROTECT, 1959 FLASH_STATUS_PROTECT); 1960 break; 1961 default: 1962 /* default: not protected */ 1963 info->protect[sect_cnt] = 0; 1964 } 1965 1966 sect_cnt++; 1967 } 1968 } 1969 1970 info->sector_count = sect_cnt; 1971 info->size = 1 << qry.dev_size; 1972 /* multiply the size by the number of chips */ 1973 info->size *= size_ratio; 1974 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size); 1975 tmp = 1 << qry.block_erase_timeout_typ; 1976 info->erase_blk_tout = tmp * 1977 (1 << qry.block_erase_timeout_max); 1978 tmp = (1 << qry.buf_write_timeout_typ) * 1979 (1 << qry.buf_write_timeout_max); 1980 1981 /* round up when converting to ms */ 1982 info->buffer_write_tout = (tmp + 999) / 1000; 1983 tmp = (1 << qry.word_write_timeout_typ) * 1984 (1 << qry.word_write_timeout_max); 1985 /* round up when converting to ms */ 1986 info->write_tout = (tmp + 999) / 1000; 1987 info->flash_id = FLASH_MAN_CFI; 1988 if ((info->interface == FLASH_CFI_X8X16) && 1989 (info->chipwidth == FLASH_CFI_BY8)) { 1990 /* XXX - Need to test on x8/x16 in parallel. */ 1991 info->portwidth >>= 1; 1992 } 1993 1994 flash_write_cmd (info, 0, 0, info->cmd_reset); 1995 } 1996 1997 return (info->size); 1998 } 1999 2000 void flash_set_verbose(uint v) 2001 { 2002 flash_verbose = v; 2003 } 2004 2005 /*----------------------------------------------------------------------- 2006 */ 2007 unsigned long flash_init (void) 2008 { 2009 unsigned long size = 0; 2010 int i; 2011 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2012 struct apl_s { 2013 ulong start; 2014 ulong size; 2015 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST; 2016 #endif 2017 2018 #ifdef CONFIG_SYS_FLASH_PROTECTION 2019 /* read environment from EEPROM */ 2020 char s[64]; 2021 getenv_f("unlock", s, sizeof(s)); 2022 #endif 2023 2024 #define BANK_BASE(i) (((phys_addr_t [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i]) 2025 2026 /* Init: no FLASHes known */ 2027 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { 2028 flash_info[i].flash_id = FLASH_UNKNOWN; 2029 2030 if (!flash_detect_legacy (BANK_BASE(i), i)) 2031 flash_get_size (BANK_BASE(i), i); 2032 size += flash_info[i].size; 2033 if (flash_info[i].flash_id == FLASH_UNKNOWN) { 2034 #ifndef CONFIG_SYS_FLASH_QUIET_TEST 2035 printf ("## Unknown FLASH on Bank %d " 2036 "- Size = 0x%08lx = %ld MB\n", 2037 i+1, flash_info[i].size, 2038 flash_info[i].size << 20); 2039 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */ 2040 } 2041 #ifdef CONFIG_SYS_FLASH_PROTECTION 2042 else if ((s != NULL) && (strcmp(s, "yes") == 0)) { 2043 /* 2044 * Only the U-Boot image and it's environment 2045 * is protected, all other sectors are 2046 * unprotected (unlocked) if flash hardware 2047 * protection is used (CONFIG_SYS_FLASH_PROTECTION) 2048 * and the environment variable "unlock" is 2049 * set to "yes". 2050 */ 2051 if (flash_info[i].legacy_unlock) { 2052 int k; 2053 2054 /* 2055 * Disable legacy_unlock temporarily, 2056 * since flash_real_protect would 2057 * relock all other sectors again 2058 * otherwise. 2059 */ 2060 flash_info[i].legacy_unlock = 0; 2061 2062 /* 2063 * Legacy unlocking (e.g. Intel J3) -> 2064 * unlock only one sector. This will 2065 * unlock all sectors. 2066 */ 2067 flash_real_protect (&flash_info[i], 0, 0); 2068 2069 flash_info[i].legacy_unlock = 1; 2070 2071 /* 2072 * Manually mark other sectors as 2073 * unlocked (unprotected) 2074 */ 2075 for (k = 1; k < flash_info[i].sector_count; k++) 2076 flash_info[i].protect[k] = 0; 2077 } else { 2078 /* 2079 * No legancy unlocking -> unlock all sectors 2080 */ 2081 flash_protect (FLAG_PROTECT_CLEAR, 2082 flash_info[i].start[0], 2083 flash_info[i].start[0] 2084 + flash_info[i].size - 1, 2085 &flash_info[i]); 2086 } 2087 } 2088 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 2089 } 2090 2091 /* Monitor protection ON by default */ 2092 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \ 2093 (!defined(CONFIG_MONITOR_IS_IN_RAM)) 2094 flash_protect (FLAG_PROTECT_SET, 2095 CONFIG_SYS_MONITOR_BASE, 2096 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, 2097 flash_get_info(CONFIG_SYS_MONITOR_BASE)); 2098 #endif 2099 2100 /* Environment protection ON by default */ 2101 #ifdef CONFIG_ENV_IS_IN_FLASH 2102 flash_protect (FLAG_PROTECT_SET, 2103 CONFIG_ENV_ADDR, 2104 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, 2105 flash_get_info(CONFIG_ENV_ADDR)); 2106 #endif 2107 2108 /* Redundant environment protection ON by default */ 2109 #ifdef CONFIG_ENV_ADDR_REDUND 2110 flash_protect (FLAG_PROTECT_SET, 2111 CONFIG_ENV_ADDR_REDUND, 2112 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, 2113 flash_get_info(CONFIG_ENV_ADDR_REDUND)); 2114 #endif 2115 2116 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2117 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) { 2118 debug("autoprotecting from %08x to %08x\n", 2119 apl[i].start, apl[i].start + apl[i].size - 1); 2120 flash_protect (FLAG_PROTECT_SET, 2121 apl[i].start, 2122 apl[i].start + apl[i].size - 1, 2123 flash_get_info(apl[i].start)); 2124 } 2125 #endif 2126 2127 #ifdef CONFIG_FLASH_CFI_MTD 2128 cfi_mtd_init(); 2129 #endif 2130 2131 return (size); 2132 } 2133