1 /* 2 * (C) Copyright 2002-2004 3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com 4 * 5 * Copyright (C) 2003 Arabella Software Ltd. 6 * Yuli Barcohen <yuli@arabellasw.com> 7 * 8 * Copyright (C) 2004 9 * Ed Okerson 10 * 11 * Copyright (C) 2006 12 * Tolunay Orkun <listmember@orkun.us> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 * 32 */ 33 34 /* The DEBUG define must be before common to enable debugging */ 35 /* #define DEBUG */ 36 37 #include <common.h> 38 #include <asm/processor.h> 39 #include <asm/io.h> 40 #include <asm/byteorder.h> 41 #include <environment.h> 42 43 /* 44 * This file implements a Common Flash Interface (CFI) driver for 45 * U-Boot. 46 * 47 * The width of the port and the width of the chips are determined at 48 * initialization. These widths are used to calculate the address for 49 * access CFI data structures. 50 * 51 * References 52 * JEDEC Standard JESD68 - Common Flash Interface (CFI) 53 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes 54 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets 55 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet 56 * AMD CFI Specification, Release 2.0 December 1, 2001 57 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte 58 * Device IDs, Publication Number 25538 Revision A, November 8, 2001 59 * 60 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between 61 * reading and writing ... (yes there is such a Hardware). 62 */ 63 64 #ifndef CONFIG_SYS_FLASH_BANKS_LIST 65 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 66 #endif 67 68 #define FLASH_CMD_CFI 0x98 69 #define FLASH_CMD_READ_ID 0x90 70 #define FLASH_CMD_RESET 0xff 71 #define FLASH_CMD_BLOCK_ERASE 0x20 72 #define FLASH_CMD_ERASE_CONFIRM 0xD0 73 #define FLASH_CMD_WRITE 0x40 74 #define FLASH_CMD_PROTECT 0x60 75 #define FLASH_CMD_PROTECT_SET 0x01 76 #define FLASH_CMD_PROTECT_CLEAR 0xD0 77 #define FLASH_CMD_CLEAR_STATUS 0x50 78 #define FLASH_CMD_READ_STATUS 0x70 79 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8 80 #define FLASH_CMD_WRITE_BUFFER_PROG 0xE9 81 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0 82 83 #define FLASH_STATUS_DONE 0x80 84 #define FLASH_STATUS_ESS 0x40 85 #define FLASH_STATUS_ECLBS 0x20 86 #define FLASH_STATUS_PSLBS 0x10 87 #define FLASH_STATUS_VPENS 0x08 88 #define FLASH_STATUS_PSS 0x04 89 #define FLASH_STATUS_DPS 0x02 90 #define FLASH_STATUS_R 0x01 91 #define FLASH_STATUS_PROTECT 0x01 92 93 #define AMD_CMD_RESET 0xF0 94 #define AMD_CMD_WRITE 0xA0 95 #define AMD_CMD_ERASE_START 0x80 96 #define AMD_CMD_ERASE_SECTOR 0x30 97 #define AMD_CMD_UNLOCK_START 0xAA 98 #define AMD_CMD_UNLOCK_ACK 0x55 99 #define AMD_CMD_WRITE_TO_BUFFER 0x25 100 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29 101 102 #define AMD_STATUS_TOGGLE 0x40 103 #define AMD_STATUS_ERROR 0x20 104 105 #define ATM_CMD_UNLOCK_SECT 0x70 106 #define ATM_CMD_SOFTLOCK_START 0x80 107 #define ATM_CMD_LOCK_SECT 0x40 108 109 #define FLASH_OFFSET_MANUFACTURER_ID 0x00 110 #define FLASH_OFFSET_DEVICE_ID 0x01 111 #define FLASH_OFFSET_DEVICE_ID2 0x0E 112 #define FLASH_OFFSET_DEVICE_ID3 0x0F 113 #define FLASH_OFFSET_CFI 0x55 114 #define FLASH_OFFSET_CFI_ALT 0x555 115 #define FLASH_OFFSET_CFI_RESP 0x10 116 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13 117 /* extended query table primary address */ 118 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 119 #define FLASH_OFFSET_WTOUT 0x1F 120 #define FLASH_OFFSET_WBTOUT 0x20 121 #define FLASH_OFFSET_ETOUT 0x21 122 #define FLASH_OFFSET_CETOUT 0x22 123 #define FLASH_OFFSET_WMAX_TOUT 0x23 124 #define FLASH_OFFSET_WBMAX_TOUT 0x24 125 #define FLASH_OFFSET_EMAX_TOUT 0x25 126 #define FLASH_OFFSET_CEMAX_TOUT 0x26 127 #define FLASH_OFFSET_SIZE 0x27 128 #define FLASH_OFFSET_INTERFACE 0x28 129 #define FLASH_OFFSET_BUFFER_SIZE 0x2A 130 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C 131 #define FLASH_OFFSET_ERASE_REGIONS 0x2D 132 #define FLASH_OFFSET_PROTECT 0x02 133 #define FLASH_OFFSET_USER_PROTECTION 0x85 134 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 135 136 #define CFI_CMDSET_NONE 0 137 #define CFI_CMDSET_INTEL_EXTENDED 1 138 #define CFI_CMDSET_AMD_STANDARD 2 139 #define CFI_CMDSET_INTEL_STANDARD 3 140 #define CFI_CMDSET_AMD_EXTENDED 4 141 #define CFI_CMDSET_MITSU_STANDARD 256 142 #define CFI_CMDSET_MITSU_EXTENDED 257 143 #define CFI_CMDSET_SST 258 144 #define CFI_CMDSET_INTEL_PROG_REGIONS 512 145 146 #ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */ 147 # undef FLASH_CMD_RESET 148 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */ 149 #endif 150 151 typedef union { 152 unsigned char c; 153 unsigned short w; 154 unsigned long l; 155 unsigned long long ll; 156 } cfiword_t; 157 158 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */ 159 160 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; 161 static uint flash_verbose = 1; 162 163 /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */ 164 #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT 165 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT 166 #else 167 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS 168 #endif 169 170 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ 171 172 /* 173 * Check if chip width is defined. If not, start detecting with 8bit. 174 */ 175 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH 176 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT 177 #endif 178 179 /* CFI standard query structure */ 180 struct cfi_qry { 181 u8 qry[3]; 182 u16 p_id; 183 u16 p_adr; 184 u16 a_id; 185 u16 a_adr; 186 u8 vcc_min; 187 u8 vcc_max; 188 u8 vpp_min; 189 u8 vpp_max; 190 u8 word_write_timeout_typ; 191 u8 buf_write_timeout_typ; 192 u8 block_erase_timeout_typ; 193 u8 chip_erase_timeout_typ; 194 u8 word_write_timeout_max; 195 u8 buf_write_timeout_max; 196 u8 block_erase_timeout_max; 197 u8 chip_erase_timeout_max; 198 u8 dev_size; 199 u16 interface_desc; 200 u16 max_buf_write_size; 201 u8 num_erase_regions; 202 u32 erase_region_info[NUM_ERASE_REGIONS]; 203 } __attribute__((packed)); 204 205 struct cfi_pri_hdr { 206 u8 pri[3]; 207 u8 major_version; 208 u8 minor_version; 209 } __attribute__((packed)); 210 211 static void __flash_write8(u8 value, void *addr) 212 { 213 __raw_writeb(value, addr); 214 } 215 216 static void __flash_write16(u16 value, void *addr) 217 { 218 __raw_writew(value, addr); 219 } 220 221 static void __flash_write32(u32 value, void *addr) 222 { 223 __raw_writel(value, addr); 224 } 225 226 static void __flash_write64(u64 value, void *addr) 227 { 228 /* No architectures currently implement __raw_writeq() */ 229 *(volatile u64 *)addr = value; 230 } 231 232 static u8 __flash_read8(void *addr) 233 { 234 return __raw_readb(addr); 235 } 236 237 static u16 __flash_read16(void *addr) 238 { 239 return __raw_readw(addr); 240 } 241 242 static u32 __flash_read32(void *addr) 243 { 244 return __raw_readl(addr); 245 } 246 247 static u64 __flash_read64(void *addr) 248 { 249 /* No architectures currently implement __raw_readq() */ 250 return *(volatile u64 *)addr; 251 } 252 253 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 254 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8"))); 255 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16"))); 256 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32"))); 257 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64"))); 258 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8"))); 259 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16"))); 260 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32"))); 261 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); 262 #else 263 #define flash_write8 __flash_write8 264 #define flash_write16 __flash_write16 265 #define flash_write32 __flash_write32 266 #define flash_write64 __flash_write64 267 #define flash_read8 __flash_read8 268 #define flash_read16 __flash_read16 269 #define flash_read32 __flash_read32 270 #define flash_read64 __flash_read64 271 #endif 272 273 /*----------------------------------------------------------------------- 274 */ 275 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 276 flash_info_t *flash_get_info(ulong base) 277 { 278 int i; 279 flash_info_t * info = 0; 280 281 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { 282 info = & flash_info[i]; 283 if (info->size && info->start[0] <= base && 284 base <= info->start[0] + info->size - 1) 285 break; 286 } 287 288 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; 289 } 290 #endif 291 292 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) 293 { 294 if (sect != (info->sector_count - 1)) 295 return info->start[sect + 1] - info->start[sect]; 296 else 297 return info->start[0] + info->size - info->start[sect]; 298 } 299 300 /*----------------------------------------------------------------------- 301 * create an address based on the offset and the port width 302 */ 303 static inline void * 304 flash_map (flash_info_t * info, flash_sect_t sect, uint offset) 305 { 306 unsigned int byte_offset = offset * info->portwidth; 307 308 return (void *)(info->start[sect] + byte_offset); 309 } 310 311 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, 312 unsigned int offset, void *addr) 313 { 314 } 315 316 /*----------------------------------------------------------------------- 317 * make a proper sized command based on the port and chip widths 318 */ 319 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) 320 { 321 int i; 322 int cword_offset; 323 int cp_offset; 324 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 325 u32 cmd_le = cpu_to_le32(cmd); 326 #endif 327 uchar val; 328 uchar *cp = (uchar *) cmdbuf; 329 330 for (i = info->portwidth; i > 0; i--){ 331 cword_offset = (info->portwidth-i)%info->chipwidth; 332 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 333 cp_offset = info->portwidth - i; 334 val = *((uchar*)&cmd_le + cword_offset); 335 #else 336 cp_offset = i - 1; 337 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1); 338 #endif 339 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val; 340 } 341 } 342 343 #ifdef DEBUG 344 /*----------------------------------------------------------------------- 345 * Debug support 346 */ 347 static void print_longlong (char *str, unsigned long long data) 348 { 349 int i; 350 char *cp; 351 352 cp = (char *) &data; 353 for (i = 0; i < 8; i++) 354 sprintf (&str[i * 2], "%2.2x", *cp++); 355 } 356 357 static void flash_printqry (struct cfi_qry *qry) 358 { 359 u8 *p = (u8 *)qry; 360 int x, y; 361 362 for (x = 0; x < sizeof(struct cfi_qry); x += 16) { 363 debug("%02x : ", x); 364 for (y = 0; y < 16; y++) 365 debug("%2.2x ", p[x + y]); 366 debug(" "); 367 for (y = 0; y < 16; y++) { 368 unsigned char c = p[x + y]; 369 if (c >= 0x20 && c <= 0x7e) 370 debug("%c", c); 371 else 372 debug("."); 373 } 374 debug("\n"); 375 } 376 } 377 #endif 378 379 380 /*----------------------------------------------------------------------- 381 * read a character at a port width address 382 */ 383 static inline uchar flash_read_uchar (flash_info_t * info, uint offset) 384 { 385 uchar *cp; 386 uchar retval; 387 388 cp = flash_map (info, 0, offset); 389 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 390 retval = flash_read8(cp); 391 #else 392 retval = flash_read8(cp + info->portwidth - 1); 393 #endif 394 flash_unmap (info, 0, offset, cp); 395 return retval; 396 } 397 398 /*----------------------------------------------------------------------- 399 * read a word at a port width address, assume 16bit bus 400 */ 401 static inline ushort flash_read_word (flash_info_t * info, uint offset) 402 { 403 ushort *addr, retval; 404 405 addr = flash_map (info, 0, offset); 406 retval = flash_read16 (addr); 407 flash_unmap (info, 0, offset, addr); 408 return retval; 409 } 410 411 412 /*----------------------------------------------------------------------- 413 * read a long word by picking the least significant byte of each maximum 414 * port size word. Swap for ppc format. 415 */ 416 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, 417 uint offset) 418 { 419 uchar *addr; 420 ulong retval; 421 422 #ifdef DEBUG 423 int x; 424 #endif 425 addr = flash_map (info, sect, offset); 426 427 #ifdef DEBUG 428 debug ("long addr is at %p info->portwidth = %d\n", addr, 429 info->portwidth); 430 for (x = 0; x < 4 * info->portwidth; x++) { 431 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); 432 } 433 #endif 434 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 435 retval = ((flash_read8(addr) << 16) | 436 (flash_read8(addr + info->portwidth) << 24) | 437 (flash_read8(addr + 2 * info->portwidth)) | 438 (flash_read8(addr + 3 * info->portwidth) << 8)); 439 #else 440 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) | 441 (flash_read8(addr + info->portwidth - 1) << 16) | 442 (flash_read8(addr + 4 * info->portwidth - 1) << 8) | 443 (flash_read8(addr + 3 * info->portwidth - 1))); 444 #endif 445 flash_unmap(info, sect, offset, addr); 446 447 return retval; 448 } 449 450 /* 451 * Write a proper sized command to the correct address 452 */ 453 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, 454 uint offset, u32 cmd) 455 { 456 457 void *addr; 458 cfiword_t cword; 459 460 addr = flash_map (info, sect, offset); 461 flash_make_cmd (info, cmd, &cword); 462 switch (info->portwidth) { 463 case FLASH_CFI_8BIT: 464 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, 465 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 466 flash_write8(cword.c, addr); 467 break; 468 case FLASH_CFI_16BIT: 469 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, 470 cmd, cword.w, 471 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 472 flash_write16(cword.w, addr); 473 break; 474 case FLASH_CFI_32BIT: 475 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr, 476 cmd, cword.l, 477 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 478 flash_write32(cword.l, addr); 479 break; 480 case FLASH_CFI_64BIT: 481 #ifdef DEBUG 482 { 483 char str[20]; 484 485 print_longlong (str, cword.ll); 486 487 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", 488 addr, cmd, str, 489 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 490 } 491 #endif 492 flash_write64(cword.ll, addr); 493 break; 494 } 495 496 /* Ensure all the instructions are fully finished */ 497 sync(); 498 499 flash_unmap(info, sect, offset, addr); 500 } 501 502 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) 503 { 504 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START); 505 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK); 506 } 507 508 /*----------------------------------------------------------------------- 509 */ 510 static int flash_isequal (flash_info_t * info, flash_sect_t sect, 511 uint offset, uchar cmd) 512 { 513 void *addr; 514 cfiword_t cword; 515 int retval; 516 517 addr = flash_map (info, sect, offset); 518 flash_make_cmd (info, cmd, &cword); 519 520 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr); 521 switch (info->portwidth) { 522 case FLASH_CFI_8BIT: 523 debug ("is= %x %x\n", flash_read8(addr), cword.c); 524 retval = (flash_read8(addr) == cword.c); 525 break; 526 case FLASH_CFI_16BIT: 527 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w); 528 retval = (flash_read16(addr) == cword.w); 529 break; 530 case FLASH_CFI_32BIT: 531 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l); 532 retval = (flash_read32(addr) == cword.l); 533 break; 534 case FLASH_CFI_64BIT: 535 #ifdef DEBUG 536 { 537 char str1[20]; 538 char str2[20]; 539 540 print_longlong (str1, flash_read64(addr)); 541 print_longlong (str2, cword.ll); 542 debug ("is= %s %s\n", str1, str2); 543 } 544 #endif 545 retval = (flash_read64(addr) == cword.ll); 546 break; 547 default: 548 retval = 0; 549 break; 550 } 551 flash_unmap(info, sect, offset, addr); 552 553 return retval; 554 } 555 556 /*----------------------------------------------------------------------- 557 */ 558 static int flash_isset (flash_info_t * info, flash_sect_t sect, 559 uint offset, uchar cmd) 560 { 561 void *addr; 562 cfiword_t cword; 563 int retval; 564 565 addr = flash_map (info, sect, offset); 566 flash_make_cmd (info, cmd, &cword); 567 switch (info->portwidth) { 568 case FLASH_CFI_8BIT: 569 retval = ((flash_read8(addr) & cword.c) == cword.c); 570 break; 571 case FLASH_CFI_16BIT: 572 retval = ((flash_read16(addr) & cword.w) == cword.w); 573 break; 574 case FLASH_CFI_32BIT: 575 retval = ((flash_read32(addr) & cword.l) == cword.l); 576 break; 577 case FLASH_CFI_64BIT: 578 retval = ((flash_read64(addr) & cword.ll) == cword.ll); 579 break; 580 default: 581 retval = 0; 582 break; 583 } 584 flash_unmap(info, sect, offset, addr); 585 586 return retval; 587 } 588 589 /*----------------------------------------------------------------------- 590 */ 591 static int flash_toggle (flash_info_t * info, flash_sect_t sect, 592 uint offset, uchar cmd) 593 { 594 void *addr; 595 cfiword_t cword; 596 int retval; 597 598 addr = flash_map (info, sect, offset); 599 flash_make_cmd (info, cmd, &cword); 600 switch (info->portwidth) { 601 case FLASH_CFI_8BIT: 602 retval = flash_read8(addr) != flash_read8(addr); 603 break; 604 case FLASH_CFI_16BIT: 605 retval = flash_read16(addr) != flash_read16(addr); 606 break; 607 case FLASH_CFI_32BIT: 608 retval = flash_read32(addr) != flash_read32(addr); 609 break; 610 case FLASH_CFI_64BIT: 611 retval = ( (flash_read32( addr ) != flash_read32( addr )) || 612 (flash_read32(addr+4) != flash_read32(addr+4)) ); 613 break; 614 default: 615 retval = 0; 616 break; 617 } 618 flash_unmap(info, sect, offset, addr); 619 620 return retval; 621 } 622 623 /* 624 * flash_is_busy - check to see if the flash is busy 625 * 626 * This routine checks the status of the chip and returns true if the 627 * chip is busy. 628 */ 629 static int flash_is_busy (flash_info_t * info, flash_sect_t sect) 630 { 631 int retval; 632 633 switch (info->vendor) { 634 case CFI_CMDSET_INTEL_PROG_REGIONS: 635 case CFI_CMDSET_INTEL_STANDARD: 636 case CFI_CMDSET_INTEL_EXTENDED: 637 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE); 638 break; 639 case CFI_CMDSET_AMD_STANDARD: 640 case CFI_CMDSET_AMD_EXTENDED: 641 #ifdef CONFIG_FLASH_CFI_LEGACY 642 case CFI_CMDSET_AMD_LEGACY: 643 #endif 644 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); 645 break; 646 default: 647 retval = 0; 648 } 649 debug ("flash_is_busy: %d\n", retval); 650 return retval; 651 } 652 653 /*----------------------------------------------------------------------- 654 * wait for XSR.7 to be set. Time out with an error if it does not. 655 * This routine does not set the flash to read-array mode. 656 */ 657 static int flash_status_check (flash_info_t * info, flash_sect_t sector, 658 ulong tout, char *prompt) 659 { 660 ulong start; 661 662 #if CONFIG_SYS_HZ != 1000 663 tout *= CONFIG_SYS_HZ/1000; 664 #endif 665 666 /* Wait for command completion */ 667 start = get_timer (0); 668 while (flash_is_busy (info, sector)) { 669 if (get_timer (start) > tout) { 670 printf ("Flash %s timeout at address %lx data %lx\n", 671 prompt, info->start[sector], 672 flash_read_long (info, sector, 0)); 673 flash_write_cmd (info, sector, 0, info->cmd_reset); 674 return ERR_TIMOUT; 675 } 676 udelay (1); /* also triggers watchdog */ 677 } 678 return ERR_OK; 679 } 680 681 /*----------------------------------------------------------------------- 682 * Wait for XSR.7 to be set, if it times out print an error, otherwise 683 * do a full status check. 684 * 685 * This routine sets the flash to read-array mode. 686 */ 687 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, 688 ulong tout, char *prompt) 689 { 690 int retcode; 691 692 retcode = flash_status_check (info, sector, tout, prompt); 693 switch (info->vendor) { 694 case CFI_CMDSET_INTEL_PROG_REGIONS: 695 case CFI_CMDSET_INTEL_EXTENDED: 696 case CFI_CMDSET_INTEL_STANDARD: 697 if ((retcode != ERR_OK) 698 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { 699 retcode = ERR_INVAL; 700 printf ("Flash %s error at address %lx\n", prompt, 701 info->start[sector]); 702 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | 703 FLASH_STATUS_PSLBS)) { 704 puts ("Command Sequence Error.\n"); 705 } else if (flash_isset (info, sector, 0, 706 FLASH_STATUS_ECLBS)) { 707 puts ("Block Erase Error.\n"); 708 retcode = ERR_NOT_ERASED; 709 } else if (flash_isset (info, sector, 0, 710 FLASH_STATUS_PSLBS)) { 711 puts ("Locking Error\n"); 712 } 713 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) { 714 puts ("Block locked.\n"); 715 retcode = ERR_PROTECTED; 716 } 717 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) 718 puts ("Vpp Low Error.\n"); 719 } 720 flash_write_cmd (info, sector, 0, info->cmd_reset); 721 break; 722 default: 723 break; 724 } 725 return retcode; 726 } 727 728 /*----------------------------------------------------------------------- 729 */ 730 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) 731 { 732 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 733 unsigned short w; 734 unsigned int l; 735 unsigned long long ll; 736 #endif 737 738 switch (info->portwidth) { 739 case FLASH_CFI_8BIT: 740 cword->c = c; 741 break; 742 case FLASH_CFI_16BIT: 743 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 744 w = c; 745 w <<= 8; 746 cword->w = (cword->w >> 8) | w; 747 #else 748 cword->w = (cword->w << 8) | c; 749 #endif 750 break; 751 case FLASH_CFI_32BIT: 752 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 753 l = c; 754 l <<= 24; 755 cword->l = (cword->l >> 8) | l; 756 #else 757 cword->l = (cword->l << 8) | c; 758 #endif 759 break; 760 case FLASH_CFI_64BIT: 761 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 762 ll = c; 763 ll <<= 56; 764 cword->ll = (cword->ll >> 8) | ll; 765 #else 766 cword->ll = (cword->ll << 8) | c; 767 #endif 768 break; 769 } 770 } 771 772 /* 773 * Loop through the sector table starting from the previously found sector. 774 * Searches forwards or backwards, dependent on the passed address. 775 */ 776 static flash_sect_t find_sector (flash_info_t * info, ulong addr) 777 { 778 static flash_sect_t saved_sector = 0; /* previously found sector */ 779 flash_sect_t sector = saved_sector; 780 781 while ((info->start[sector] < addr) 782 && (sector < info->sector_count - 1)) 783 sector++; 784 while ((info->start[sector] > addr) && (sector > 0)) 785 /* 786 * also decrements the sector in case of an overshot 787 * in the first loop 788 */ 789 sector--; 790 791 saved_sector = sector; 792 return sector; 793 } 794 795 /*----------------------------------------------------------------------- 796 */ 797 static int flash_write_cfiword (flash_info_t * info, ulong dest, 798 cfiword_t cword) 799 { 800 void *dstaddr = (void *)dest; 801 int flag; 802 flash_sect_t sect = 0; 803 char sect_found = 0; 804 805 /* Check if Flash is (sufficiently) erased */ 806 switch (info->portwidth) { 807 case FLASH_CFI_8BIT: 808 flag = ((flash_read8(dstaddr) & cword.c) == cword.c); 809 break; 810 case FLASH_CFI_16BIT: 811 flag = ((flash_read16(dstaddr) & cword.w) == cword.w); 812 break; 813 case FLASH_CFI_32BIT: 814 flag = ((flash_read32(dstaddr) & cword.l) == cword.l); 815 break; 816 case FLASH_CFI_64BIT: 817 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll); 818 break; 819 default: 820 flag = 0; 821 break; 822 } 823 if (!flag) 824 return ERR_NOT_ERASED; 825 826 /* Disable interrupts which might cause a timeout here */ 827 flag = disable_interrupts (); 828 829 switch (info->vendor) { 830 case CFI_CMDSET_INTEL_PROG_REGIONS: 831 case CFI_CMDSET_INTEL_EXTENDED: 832 case CFI_CMDSET_INTEL_STANDARD: 833 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS); 834 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE); 835 break; 836 case CFI_CMDSET_AMD_EXTENDED: 837 case CFI_CMDSET_AMD_STANDARD: 838 sect = find_sector(info, dest); 839 flash_unlock_seq (info, sect); 840 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE); 841 sect_found = 1; 842 break; 843 #ifdef CONFIG_FLASH_CFI_LEGACY 844 case CFI_CMDSET_AMD_LEGACY: 845 sect = find_sector(info, dest); 846 flash_unlock_seq (info, 0); 847 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE); 848 sect_found = 1; 849 break; 850 #endif 851 } 852 853 switch (info->portwidth) { 854 case FLASH_CFI_8BIT: 855 flash_write8(cword.c, dstaddr); 856 break; 857 case FLASH_CFI_16BIT: 858 flash_write16(cword.w, dstaddr); 859 break; 860 case FLASH_CFI_32BIT: 861 flash_write32(cword.l, dstaddr); 862 break; 863 case FLASH_CFI_64BIT: 864 flash_write64(cword.ll, dstaddr); 865 break; 866 } 867 868 /* re-enable interrupts if necessary */ 869 if (flag) 870 enable_interrupts (); 871 872 if (!sect_found) 873 sect = find_sector (info, dest); 874 875 return flash_full_status_check (info, sect, info->write_tout, "write"); 876 } 877 878 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 879 880 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, 881 int len) 882 { 883 flash_sect_t sector; 884 int cnt; 885 int retcode; 886 void *src = cp; 887 void *dst = (void *)dest; 888 void *dst2 = dst; 889 int flag = 0; 890 uint offset = 0; 891 unsigned int shift; 892 uchar write_cmd; 893 894 switch (info->portwidth) { 895 case FLASH_CFI_8BIT: 896 shift = 0; 897 break; 898 case FLASH_CFI_16BIT: 899 shift = 1; 900 break; 901 case FLASH_CFI_32BIT: 902 shift = 2; 903 break; 904 case FLASH_CFI_64BIT: 905 shift = 3; 906 break; 907 default: 908 retcode = ERR_INVAL; 909 goto out_unmap; 910 } 911 912 cnt = len >> shift; 913 914 while ((cnt-- > 0) && (flag == 0)) { 915 switch (info->portwidth) { 916 case FLASH_CFI_8BIT: 917 flag = ((flash_read8(dst2) & flash_read8(src)) == 918 flash_read8(src)); 919 src += 1, dst2 += 1; 920 break; 921 case FLASH_CFI_16BIT: 922 flag = ((flash_read16(dst2) & flash_read16(src)) == 923 flash_read16(src)); 924 src += 2, dst2 += 2; 925 break; 926 case FLASH_CFI_32BIT: 927 flag = ((flash_read32(dst2) & flash_read32(src)) == 928 flash_read32(src)); 929 src += 4, dst2 += 4; 930 break; 931 case FLASH_CFI_64BIT: 932 flag = ((flash_read64(dst2) & flash_read64(src)) == 933 flash_read64(src)); 934 src += 8, dst2 += 8; 935 break; 936 } 937 } 938 if (!flag) { 939 retcode = ERR_NOT_ERASED; 940 goto out_unmap; 941 } 942 943 src = cp; 944 sector = find_sector (info, dest); 945 946 switch (info->vendor) { 947 case CFI_CMDSET_INTEL_PROG_REGIONS: 948 case CFI_CMDSET_INTEL_STANDARD: 949 case CFI_CMDSET_INTEL_EXTENDED: 950 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ? 951 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER; 952 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 953 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS); 954 flash_write_cmd (info, sector, 0, write_cmd); 955 retcode = flash_status_check (info, sector, 956 info->buffer_write_tout, 957 "write to buffer"); 958 if (retcode == ERR_OK) { 959 /* reduce the number of loops by the width of 960 * the port */ 961 cnt = len >> shift; 962 flash_write_cmd (info, sector, 0, cnt - 1); 963 while (cnt-- > 0) { 964 switch (info->portwidth) { 965 case FLASH_CFI_8BIT: 966 flash_write8(flash_read8(src), dst); 967 src += 1, dst += 1; 968 break; 969 case FLASH_CFI_16BIT: 970 flash_write16(flash_read16(src), dst); 971 src += 2, dst += 2; 972 break; 973 case FLASH_CFI_32BIT: 974 flash_write32(flash_read32(src), dst); 975 src += 4, dst += 4; 976 break; 977 case FLASH_CFI_64BIT: 978 flash_write64(flash_read64(src), dst); 979 src += 8, dst += 8; 980 break; 981 default: 982 retcode = ERR_INVAL; 983 goto out_unmap; 984 } 985 } 986 flash_write_cmd (info, sector, 0, 987 FLASH_CMD_WRITE_BUFFER_CONFIRM); 988 retcode = flash_full_status_check ( 989 info, sector, info->buffer_write_tout, 990 "buffer write"); 991 } 992 993 break; 994 995 case CFI_CMDSET_AMD_STANDARD: 996 case CFI_CMDSET_AMD_EXTENDED: 997 flash_unlock_seq(info,0); 998 999 #ifdef CONFIG_FLASH_SPANSION_S29WS_N 1000 offset = ((unsigned long)dst - info->start[sector]) >> shift; 1001 #endif 1002 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER); 1003 cnt = len >> shift; 1004 flash_write_cmd(info, sector, offset, (uchar)cnt - 1); 1005 1006 switch (info->portwidth) { 1007 case FLASH_CFI_8BIT: 1008 while (cnt-- > 0) { 1009 flash_write8(flash_read8(src), dst); 1010 src += 1, dst += 1; 1011 } 1012 break; 1013 case FLASH_CFI_16BIT: 1014 while (cnt-- > 0) { 1015 flash_write16(flash_read16(src), dst); 1016 src += 2, dst += 2; 1017 } 1018 break; 1019 case FLASH_CFI_32BIT: 1020 while (cnt-- > 0) { 1021 flash_write32(flash_read32(src), dst); 1022 src += 4, dst += 4; 1023 } 1024 break; 1025 case FLASH_CFI_64BIT: 1026 while (cnt-- > 0) { 1027 flash_write64(flash_read64(src), dst); 1028 src += 8, dst += 8; 1029 } 1030 break; 1031 default: 1032 retcode = ERR_INVAL; 1033 goto out_unmap; 1034 } 1035 1036 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); 1037 retcode = flash_full_status_check (info, sector, 1038 info->buffer_write_tout, 1039 "buffer write"); 1040 break; 1041 1042 default: 1043 debug ("Unknown Command Set\n"); 1044 retcode = ERR_INVAL; 1045 break; 1046 } 1047 1048 out_unmap: 1049 return retcode; 1050 } 1051 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1052 1053 1054 /*----------------------------------------------------------------------- 1055 */ 1056 int flash_erase (flash_info_t * info, int s_first, int s_last) 1057 { 1058 int rcode = 0; 1059 int prot; 1060 flash_sect_t sect; 1061 1062 if (info->flash_id != FLASH_MAN_CFI) { 1063 puts ("Can't erase unknown flash type - aborted\n"); 1064 return 1; 1065 } 1066 if ((s_first < 0) || (s_first > s_last)) { 1067 puts ("- no sectors to erase\n"); 1068 return 1; 1069 } 1070 1071 prot = 0; 1072 for (sect = s_first; sect <= s_last; ++sect) { 1073 if (info->protect[sect]) { 1074 prot++; 1075 } 1076 } 1077 if (prot) { 1078 printf ("- Warning: %d protected sectors will not be erased!\n", 1079 prot); 1080 } else if (flash_verbose) { 1081 putc ('\n'); 1082 } 1083 1084 1085 for (sect = s_first; sect <= s_last; sect++) { 1086 if (info->protect[sect] == 0) { /* not protected */ 1087 switch (info->vendor) { 1088 case CFI_CMDSET_INTEL_PROG_REGIONS: 1089 case CFI_CMDSET_INTEL_STANDARD: 1090 case CFI_CMDSET_INTEL_EXTENDED: 1091 flash_write_cmd (info, sect, 0, 1092 FLASH_CMD_CLEAR_STATUS); 1093 flash_write_cmd (info, sect, 0, 1094 FLASH_CMD_BLOCK_ERASE); 1095 flash_write_cmd (info, sect, 0, 1096 FLASH_CMD_ERASE_CONFIRM); 1097 break; 1098 case CFI_CMDSET_AMD_STANDARD: 1099 case CFI_CMDSET_AMD_EXTENDED: 1100 flash_unlock_seq (info, sect); 1101 flash_write_cmd (info, sect, 1102 info->addr_unlock1, 1103 AMD_CMD_ERASE_START); 1104 flash_unlock_seq (info, sect); 1105 flash_write_cmd (info, sect, 0, 1106 AMD_CMD_ERASE_SECTOR); 1107 break; 1108 #ifdef CONFIG_FLASH_CFI_LEGACY 1109 case CFI_CMDSET_AMD_LEGACY: 1110 flash_unlock_seq (info, 0); 1111 flash_write_cmd (info, 0, info->addr_unlock1, 1112 AMD_CMD_ERASE_START); 1113 flash_unlock_seq (info, 0); 1114 flash_write_cmd (info, sect, 0, 1115 AMD_CMD_ERASE_SECTOR); 1116 break; 1117 #endif 1118 default: 1119 debug ("Unkown flash vendor %d\n", 1120 info->vendor); 1121 break; 1122 } 1123 1124 if (flash_full_status_check 1125 (info, sect, info->erase_blk_tout, "erase")) { 1126 rcode = 1; 1127 } else if (flash_verbose) 1128 putc ('.'); 1129 } 1130 } 1131 1132 if (flash_verbose) 1133 puts (" done\n"); 1134 1135 return rcode; 1136 } 1137 1138 /*----------------------------------------------------------------------- 1139 */ 1140 void flash_print_info (flash_info_t * info) 1141 { 1142 int i; 1143 1144 if (info->flash_id != FLASH_MAN_CFI) { 1145 puts ("missing or unknown FLASH type\n"); 1146 return; 1147 } 1148 1149 printf ("%s FLASH (%d x %d)", 1150 info->name, 1151 (info->portwidth << 3), (info->chipwidth << 3)); 1152 if (info->size < 1024*1024) 1153 printf (" Size: %ld kB in %d Sectors\n", 1154 info->size >> 10, info->sector_count); 1155 else 1156 printf (" Size: %ld MB in %d Sectors\n", 1157 info->size >> 20, info->sector_count); 1158 printf (" "); 1159 switch (info->vendor) { 1160 case CFI_CMDSET_INTEL_PROG_REGIONS: 1161 printf ("Intel Prog Regions"); 1162 break; 1163 case CFI_CMDSET_INTEL_STANDARD: 1164 printf ("Intel Standard"); 1165 break; 1166 case CFI_CMDSET_INTEL_EXTENDED: 1167 printf ("Intel Extended"); 1168 break; 1169 case CFI_CMDSET_AMD_STANDARD: 1170 printf ("AMD Standard"); 1171 break; 1172 case CFI_CMDSET_AMD_EXTENDED: 1173 printf ("AMD Extended"); 1174 break; 1175 #ifdef CONFIG_FLASH_CFI_LEGACY 1176 case CFI_CMDSET_AMD_LEGACY: 1177 printf ("AMD Legacy"); 1178 break; 1179 #endif 1180 default: 1181 printf ("Unknown (%d)", info->vendor); 1182 break; 1183 } 1184 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X", 1185 info->manufacturer_id, info->device_id); 1186 if (info->device_id == 0x7E) { 1187 printf("%04X", info->device_id2); 1188 } 1189 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", 1190 info->erase_blk_tout, 1191 info->write_tout); 1192 if (info->buffer_size > 1) { 1193 printf (" Buffer write timeout: %ld ms, " 1194 "buffer size: %d bytes\n", 1195 info->buffer_write_tout, 1196 info->buffer_size); 1197 } 1198 1199 puts ("\n Sector Start Addresses:"); 1200 for (i = 0; i < info->sector_count; ++i) { 1201 if ((i % 5) == 0) 1202 printf ("\n"); 1203 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 1204 int k; 1205 int size; 1206 int erased; 1207 volatile unsigned long *flash; 1208 1209 /* 1210 * Check if whole sector is erased 1211 */ 1212 size = flash_sector_size(info, i); 1213 erased = 1; 1214 flash = (volatile unsigned long *) info->start[i]; 1215 size = size >> 2; /* divide by 4 for longword access */ 1216 for (k = 0; k < size; k++) { 1217 if (*flash++ != 0xffffffff) { 1218 erased = 0; 1219 break; 1220 } 1221 } 1222 1223 /* print empty and read-only info */ 1224 printf (" %08lX %c %s ", 1225 info->start[i], 1226 erased ? 'E' : ' ', 1227 info->protect[i] ? "RO" : " "); 1228 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */ 1229 printf (" %08lX %s ", 1230 info->start[i], 1231 info->protect[i] ? "RO" : " "); 1232 #endif 1233 } 1234 putc ('\n'); 1235 return; 1236 } 1237 1238 /*----------------------------------------------------------------------- 1239 * This is used in a few places in write_buf() to show programming 1240 * progress. Making it a function is nasty because it needs to do side 1241 * effect updates to digit and dots. Repeated code is nasty too, so 1242 * we define it once here. 1243 */ 1244 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1245 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \ 1246 if (flash_verbose) { \ 1247 dots -= dots_sub; \ 1248 if ((scale > 0) && (dots <= 0)) { \ 1249 if ((digit % 5) == 0) \ 1250 printf ("%d", digit / 5); \ 1251 else \ 1252 putc ('.'); \ 1253 digit--; \ 1254 dots += scale; \ 1255 } \ 1256 } 1257 #else 1258 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) 1259 #endif 1260 1261 /*----------------------------------------------------------------------- 1262 * Copy memory to flash, returns: 1263 * 0 - OK 1264 * 1 - write timeout 1265 * 2 - Flash not erased 1266 */ 1267 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) 1268 { 1269 ulong wp; 1270 uchar *p; 1271 int aln; 1272 cfiword_t cword; 1273 int i, rc; 1274 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1275 int buffered_size; 1276 #endif 1277 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1278 int digit = CONFIG_FLASH_SHOW_PROGRESS; 1279 int scale = 0; 1280 int dots = 0; 1281 1282 /* 1283 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes. 1284 */ 1285 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) { 1286 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) / 1287 CONFIG_FLASH_SHOW_PROGRESS); 1288 } 1289 #endif 1290 1291 /* get lower aligned address */ 1292 wp = (addr & ~(info->portwidth - 1)); 1293 1294 /* handle unaligned start */ 1295 if ((aln = addr - wp) != 0) { 1296 cword.l = 0; 1297 p = (uchar *)wp; 1298 for (i = 0; i < aln; ++i) 1299 flash_add_byte (info, &cword, flash_read8(p + i)); 1300 1301 for (; (i < info->portwidth) && (cnt > 0); i++) { 1302 flash_add_byte (info, &cword, *src++); 1303 cnt--; 1304 } 1305 for (; (cnt == 0) && (i < info->portwidth); ++i) 1306 flash_add_byte (info, &cword, flash_read8(p + i)); 1307 1308 rc = flash_write_cfiword (info, wp, cword); 1309 if (rc != 0) 1310 return rc; 1311 1312 wp += i; 1313 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1314 } 1315 1316 /* handle the aligned part */ 1317 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1318 buffered_size = (info->portwidth / info->chipwidth); 1319 buffered_size *= info->buffer_size; 1320 while (cnt >= info->portwidth) { 1321 /* prohibit buffer write when buffer_size is 1 */ 1322 if (info->buffer_size == 1) { 1323 cword.l = 0; 1324 for (i = 0; i < info->portwidth; i++) 1325 flash_add_byte (info, &cword, *src++); 1326 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1327 return rc; 1328 wp += info->portwidth; 1329 cnt -= info->portwidth; 1330 continue; 1331 } 1332 1333 /* write buffer until next buffered_size aligned boundary */ 1334 i = buffered_size - (wp % buffered_size); 1335 if (i > cnt) 1336 i = cnt; 1337 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) 1338 return rc; 1339 i -= i & (info->portwidth - 1); 1340 wp += i; 1341 src += i; 1342 cnt -= i; 1343 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1344 } 1345 #else 1346 while (cnt >= info->portwidth) { 1347 cword.l = 0; 1348 for (i = 0; i < info->portwidth; i++) { 1349 flash_add_byte (info, &cword, *src++); 1350 } 1351 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1352 return rc; 1353 wp += info->portwidth; 1354 cnt -= info->portwidth; 1355 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth); 1356 } 1357 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1358 1359 if (cnt == 0) { 1360 return (0); 1361 } 1362 1363 /* 1364 * handle unaligned tail bytes 1365 */ 1366 cword.l = 0; 1367 p = (uchar *)wp; 1368 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) { 1369 flash_add_byte (info, &cword, *src++); 1370 --cnt; 1371 } 1372 for (; i < info->portwidth; ++i) 1373 flash_add_byte (info, &cword, flash_read8(p + i)); 1374 1375 return flash_write_cfiword (info, wp, cword); 1376 } 1377 1378 /*----------------------------------------------------------------------- 1379 */ 1380 #ifdef CONFIG_SYS_FLASH_PROTECTION 1381 1382 int flash_real_protect (flash_info_t * info, long sector, int prot) 1383 { 1384 int retcode = 0; 1385 1386 switch (info->vendor) { 1387 case CFI_CMDSET_INTEL_PROG_REGIONS: 1388 case CFI_CMDSET_INTEL_STANDARD: 1389 case CFI_CMDSET_INTEL_EXTENDED: 1390 flash_write_cmd (info, sector, 0, 1391 FLASH_CMD_CLEAR_STATUS); 1392 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1393 if (prot) 1394 flash_write_cmd (info, sector, 0, 1395 FLASH_CMD_PROTECT_SET); 1396 else 1397 flash_write_cmd (info, sector, 0, 1398 FLASH_CMD_PROTECT_CLEAR); 1399 break; 1400 case CFI_CMDSET_AMD_EXTENDED: 1401 case CFI_CMDSET_AMD_STANDARD: 1402 /* U-Boot only checks the first byte */ 1403 if (info->manufacturer_id == (uchar)ATM_MANUFACT) { 1404 if (prot) { 1405 flash_unlock_seq (info, 0); 1406 flash_write_cmd (info, 0, 1407 info->addr_unlock1, 1408 ATM_CMD_SOFTLOCK_START); 1409 flash_unlock_seq (info, 0); 1410 flash_write_cmd (info, sector, 0, 1411 ATM_CMD_LOCK_SECT); 1412 } else { 1413 flash_write_cmd (info, 0, 1414 info->addr_unlock1, 1415 AMD_CMD_UNLOCK_START); 1416 if (info->device_id == ATM_ID_BV6416) 1417 flash_write_cmd (info, sector, 1418 0, ATM_CMD_UNLOCK_SECT); 1419 } 1420 } 1421 break; 1422 #ifdef CONFIG_FLASH_CFI_LEGACY 1423 case CFI_CMDSET_AMD_LEGACY: 1424 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 1425 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1426 if (prot) 1427 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); 1428 else 1429 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); 1430 #endif 1431 }; 1432 1433 if ((retcode = 1434 flash_full_status_check (info, sector, info->erase_blk_tout, 1435 prot ? "protect" : "unprotect")) == 0) { 1436 1437 info->protect[sector] = prot; 1438 1439 /* 1440 * On some of Intel's flash chips (marked via legacy_unlock) 1441 * unprotect unprotects all locking. 1442 */ 1443 if ((prot == 0) && (info->legacy_unlock)) { 1444 flash_sect_t i; 1445 1446 for (i = 0; i < info->sector_count; i++) { 1447 if (info->protect[i]) 1448 flash_real_protect (info, i, 1); 1449 } 1450 } 1451 } 1452 return retcode; 1453 } 1454 1455 /*----------------------------------------------------------------------- 1456 * flash_read_user_serial - read the OneTimeProgramming cells 1457 */ 1458 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, 1459 int len) 1460 { 1461 uchar *src; 1462 uchar *dst; 1463 1464 dst = buffer; 1465 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION); 1466 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1467 memcpy (dst, src + offset, len); 1468 flash_write_cmd (info, 0, 0, info->cmd_reset); 1469 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src); 1470 } 1471 1472 /* 1473 * flash_read_factory_serial - read the device Id from the protection area 1474 */ 1475 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, 1476 int len) 1477 { 1478 uchar *src; 1479 1480 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION); 1481 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1482 memcpy (buffer, src + offset, len); 1483 flash_write_cmd (info, 0, 0, info->cmd_reset); 1484 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); 1485 } 1486 1487 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 1488 1489 /*----------------------------------------------------------------------- 1490 * Reverse the order of the erase regions in the CFI QRY structure. 1491 * This is needed for chips that are either a) correctly detected as 1492 * top-boot, or b) buggy. 1493 */ 1494 static void cfi_reverse_geometry(struct cfi_qry *qry) 1495 { 1496 unsigned int i, j; 1497 u32 tmp; 1498 1499 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) { 1500 tmp = qry->erase_region_info[i]; 1501 qry->erase_region_info[i] = qry->erase_region_info[j]; 1502 qry->erase_region_info[j] = tmp; 1503 } 1504 } 1505 1506 /*----------------------------------------------------------------------- 1507 * read jedec ids from device and set corresponding fields in info struct 1508 * 1509 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct 1510 * 1511 */ 1512 static void cmdset_intel_read_jedec_ids(flash_info_t *info) 1513 { 1514 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1515 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); 1516 udelay(1000); /* some flash are slow to respond */ 1517 info->manufacturer_id = flash_read_uchar (info, 1518 FLASH_OFFSET_MANUFACTURER_ID); 1519 info->device_id = flash_read_uchar (info, 1520 FLASH_OFFSET_DEVICE_ID); 1521 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1522 } 1523 1524 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) 1525 { 1526 info->cmd_reset = FLASH_CMD_RESET; 1527 1528 cmdset_intel_read_jedec_ids(info); 1529 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1530 1531 #ifdef CONFIG_SYS_FLASH_PROTECTION 1532 /* read legacy lock/unlock bit from intel flash */ 1533 if (info->ext_addr) { 1534 info->legacy_unlock = flash_read_uchar (info, 1535 info->ext_addr + 5) & 0x08; 1536 } 1537 #endif 1538 1539 return 0; 1540 } 1541 1542 static void cmdset_amd_read_jedec_ids(flash_info_t *info) 1543 { 1544 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1545 flash_unlock_seq(info, 0); 1546 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); 1547 udelay(1000); /* some flash are slow to respond */ 1548 1549 info->manufacturer_id = flash_read_uchar (info, 1550 FLASH_OFFSET_MANUFACTURER_ID); 1551 1552 switch (info->chipwidth){ 1553 case FLASH_CFI_8BIT: 1554 info->device_id = flash_read_uchar (info, 1555 FLASH_OFFSET_DEVICE_ID); 1556 if (info->device_id == 0x7E) { 1557 /* AMD 3-byte (expanded) device ids */ 1558 info->device_id2 = flash_read_uchar (info, 1559 FLASH_OFFSET_DEVICE_ID2); 1560 info->device_id2 <<= 8; 1561 info->device_id2 |= flash_read_uchar (info, 1562 FLASH_OFFSET_DEVICE_ID3); 1563 } 1564 break; 1565 case FLASH_CFI_16BIT: 1566 info->device_id = flash_read_word (info, 1567 FLASH_OFFSET_DEVICE_ID); 1568 break; 1569 default: 1570 break; 1571 } 1572 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1573 } 1574 1575 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) 1576 { 1577 info->cmd_reset = AMD_CMD_RESET; 1578 1579 cmdset_amd_read_jedec_ids(info); 1580 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1581 1582 return 0; 1583 } 1584 1585 #ifdef CONFIG_FLASH_CFI_LEGACY 1586 static void flash_read_jedec_ids (flash_info_t * info) 1587 { 1588 info->manufacturer_id = 0; 1589 info->device_id = 0; 1590 info->device_id2 = 0; 1591 1592 switch (info->vendor) { 1593 case CFI_CMDSET_INTEL_PROG_REGIONS: 1594 case CFI_CMDSET_INTEL_STANDARD: 1595 case CFI_CMDSET_INTEL_EXTENDED: 1596 cmdset_intel_read_jedec_ids(info); 1597 break; 1598 case CFI_CMDSET_AMD_STANDARD: 1599 case CFI_CMDSET_AMD_EXTENDED: 1600 cmdset_amd_read_jedec_ids(info); 1601 break; 1602 default: 1603 break; 1604 } 1605 } 1606 1607 /*----------------------------------------------------------------------- 1608 * Call board code to request info about non-CFI flash. 1609 * board_flash_get_legacy needs to fill in at least: 1610 * info->portwidth, info->chipwidth and info->interface for Jedec probing. 1611 */ 1612 static int flash_detect_legacy(phys_addr_t base, int banknum) 1613 { 1614 flash_info_t *info = &flash_info[banknum]; 1615 1616 if (board_flash_get_legacy(base, banknum, info)) { 1617 /* board code may have filled info completely. If not, we 1618 use JEDEC ID probing. */ 1619 if (!info->vendor) { 1620 int modes[] = { 1621 CFI_CMDSET_AMD_STANDARD, 1622 CFI_CMDSET_INTEL_STANDARD 1623 }; 1624 int i; 1625 1626 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) { 1627 info->vendor = modes[i]; 1628 info->start[0] = 1629 (ulong)map_physmem(base, 1630 info->portwidth, 1631 MAP_NOCACHE); 1632 if (info->portwidth == FLASH_CFI_8BIT 1633 && info->interface == FLASH_CFI_X8X16) { 1634 info->addr_unlock1 = 0x2AAA; 1635 info->addr_unlock2 = 0x5555; 1636 } else { 1637 info->addr_unlock1 = 0x5555; 1638 info->addr_unlock2 = 0x2AAA; 1639 } 1640 flash_read_jedec_ids(info); 1641 debug("JEDEC PROBE: ID %x %x %x\n", 1642 info->manufacturer_id, 1643 info->device_id, 1644 info->device_id2); 1645 if (jedec_flash_match(info, info->start[0])) 1646 break; 1647 else 1648 unmap_physmem((void *)info->start[0], 1649 MAP_NOCACHE); 1650 } 1651 } 1652 1653 switch(info->vendor) { 1654 case CFI_CMDSET_INTEL_PROG_REGIONS: 1655 case CFI_CMDSET_INTEL_STANDARD: 1656 case CFI_CMDSET_INTEL_EXTENDED: 1657 info->cmd_reset = FLASH_CMD_RESET; 1658 break; 1659 case CFI_CMDSET_AMD_STANDARD: 1660 case CFI_CMDSET_AMD_EXTENDED: 1661 case CFI_CMDSET_AMD_LEGACY: 1662 info->cmd_reset = AMD_CMD_RESET; 1663 break; 1664 } 1665 info->flash_id = FLASH_MAN_CFI; 1666 return 1; 1667 } 1668 return 0; /* use CFI */ 1669 } 1670 #else 1671 static inline int flash_detect_legacy(phys_addr_t base, int banknum) 1672 { 1673 return 0; /* use CFI */ 1674 } 1675 #endif 1676 1677 /*----------------------------------------------------------------------- 1678 * detect if flash is compatible with the Common Flash Interface (CFI) 1679 * http://www.jedec.org/download/search/jesd68.pdf 1680 */ 1681 static void flash_read_cfi (flash_info_t *info, void *buf, 1682 unsigned int start, size_t len) 1683 { 1684 u8 *p = buf; 1685 unsigned int i; 1686 1687 for (i = 0; i < len; i++) 1688 p[i] = flash_read_uchar(info, start + i); 1689 } 1690 1691 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1692 { 1693 int cfi_offset; 1694 1695 /* We do not yet know what kind of commandset to use, so we issue 1696 the reset command in both Intel and AMD variants, in the hope 1697 that AMD flash roms ignore the Intel command. */ 1698 flash_write_cmd (info, 0, 0, AMD_CMD_RESET); 1699 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET); 1700 1701 for (cfi_offset=0; 1702 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); 1703 cfi_offset++) { 1704 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], 1705 FLASH_CMD_CFI); 1706 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') 1707 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') 1708 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { 1709 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, 1710 sizeof(struct cfi_qry)); 1711 info->interface = le16_to_cpu(qry->interface_desc); 1712 1713 info->cfi_offset = flash_offset_cfi[cfi_offset]; 1714 debug ("device interface is %d\n", 1715 info->interface); 1716 debug ("found port %d chip %d ", 1717 info->portwidth, info->chipwidth); 1718 debug ("port %d bits chip %d bits\n", 1719 info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1720 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1721 1722 /* calculate command offsets as in the Linux driver */ 1723 info->addr_unlock1 = 0x555; 1724 info->addr_unlock2 = 0x2aa; 1725 1726 /* 1727 * modify the unlock address if we are 1728 * in compatibility mode 1729 */ 1730 if ( /* x8/x16 in x8 mode */ 1731 ((info->chipwidth == FLASH_CFI_BY8) && 1732 (info->interface == FLASH_CFI_X8X16)) || 1733 /* x16/x32 in x16 mode */ 1734 ((info->chipwidth == FLASH_CFI_BY16) && 1735 (info->interface == FLASH_CFI_X16X32))) 1736 { 1737 info->addr_unlock1 = 0xaaa; 1738 info->addr_unlock2 = 0x555; 1739 } 1740 1741 info->name = "CFI conformant"; 1742 return 1; 1743 } 1744 } 1745 1746 return 0; 1747 } 1748 1749 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1750 { 1751 debug ("flash detect cfi\n"); 1752 1753 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH; 1754 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { 1755 for (info->chipwidth = FLASH_CFI_BY8; 1756 info->chipwidth <= info->portwidth; 1757 info->chipwidth <<= 1) 1758 if (__flash_detect_cfi(info, qry)) 1759 return 1; 1760 } 1761 debug ("not found\n"); 1762 return 0; 1763 } 1764 1765 /* 1766 * Manufacturer-specific quirks. Add workarounds for geometry 1767 * reversal, etc. here. 1768 */ 1769 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry) 1770 { 1771 /* check if flash geometry needs reversal */ 1772 if (qry->num_erase_regions > 1) { 1773 /* reverse geometry if top boot part */ 1774 if (info->cfi_version < 0x3131) { 1775 /* CFI < 1.1, try to guess from device id */ 1776 if ((info->device_id & 0x80) != 0) 1777 cfi_reverse_geometry(qry); 1778 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { 1779 /* CFI >= 1.1, deduct from top/bottom flag */ 1780 /* note: ext_addr is valid since cfi_version > 0 */ 1781 cfi_reverse_geometry(qry); 1782 } 1783 } 1784 } 1785 1786 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry) 1787 { 1788 int reverse_geometry = 0; 1789 1790 /* Check the "top boot" bit in the PRI */ 1791 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1)) 1792 reverse_geometry = 1; 1793 1794 /* AT49BV6416(T) list the erase regions in the wrong order. 1795 * However, the device ID is identical with the non-broken 1796 * AT49BV642D they differ in the high byte. 1797 */ 1798 if (info->device_id == 0xd6 || info->device_id == 0xd2) 1799 reverse_geometry = !reverse_geometry; 1800 1801 if (reverse_geometry) 1802 cfi_reverse_geometry(qry); 1803 } 1804 1805 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry) 1806 { 1807 /* check if flash geometry needs reversal */ 1808 if (qry->num_erase_regions > 1) { 1809 /* reverse geometry if top boot part */ 1810 if (info->cfi_version < 0x3131) { 1811 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */ 1812 if (info->device_id == 0x22CA || 1813 info->device_id == 0x2256) { 1814 cfi_reverse_geometry(qry); 1815 } 1816 } 1817 } 1818 } 1819 1820 /* 1821 * The following code cannot be run from FLASH! 1822 * 1823 */ 1824 ulong flash_get_size (phys_addr_t base, int banknum) 1825 { 1826 flash_info_t *info = &flash_info[banknum]; 1827 int i, j; 1828 flash_sect_t sect_cnt; 1829 phys_addr_t sector; 1830 unsigned long tmp; 1831 int size_ratio; 1832 uchar num_erase_regions; 1833 int erase_region_size; 1834 int erase_region_count; 1835 struct cfi_qry qry; 1836 1837 memset(&qry, 0, sizeof(qry)); 1838 1839 info->ext_addr = 0; 1840 info->cfi_version = 0; 1841 #ifdef CONFIG_SYS_FLASH_PROTECTION 1842 info->legacy_unlock = 0; 1843 #endif 1844 1845 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE); 1846 1847 if (flash_detect_cfi (info, &qry)) { 1848 info->vendor = le16_to_cpu(qry.p_id); 1849 info->ext_addr = le16_to_cpu(qry.p_adr); 1850 num_erase_regions = qry.num_erase_regions; 1851 1852 if (info->ext_addr) { 1853 info->cfi_version = (ushort) flash_read_uchar (info, 1854 info->ext_addr + 3) << 8; 1855 info->cfi_version |= (ushort) flash_read_uchar (info, 1856 info->ext_addr + 4); 1857 } 1858 1859 #ifdef DEBUG 1860 flash_printqry (&qry); 1861 #endif 1862 1863 switch (info->vendor) { 1864 case CFI_CMDSET_INTEL_PROG_REGIONS: 1865 case CFI_CMDSET_INTEL_STANDARD: 1866 case CFI_CMDSET_INTEL_EXTENDED: 1867 cmdset_intel_init(info, &qry); 1868 break; 1869 case CFI_CMDSET_AMD_STANDARD: 1870 case CFI_CMDSET_AMD_EXTENDED: 1871 cmdset_amd_init(info, &qry); 1872 break; 1873 default: 1874 printf("CFI: Unknown command set 0x%x\n", 1875 info->vendor); 1876 /* 1877 * Unfortunately, this means we don't know how 1878 * to get the chip back to Read mode. Might 1879 * as well try an Intel-style reset... 1880 */ 1881 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1882 return 0; 1883 } 1884 1885 /* Do manufacturer-specific fixups */ 1886 switch (info->manufacturer_id) { 1887 case 0x0001: 1888 flash_fixup_amd(info, &qry); 1889 break; 1890 case 0x001f: 1891 flash_fixup_atmel(info, &qry); 1892 break; 1893 case 0x0020: 1894 flash_fixup_stm(info, &qry); 1895 break; 1896 } 1897 1898 debug ("manufacturer is %d\n", info->vendor); 1899 debug ("manufacturer id is 0x%x\n", info->manufacturer_id); 1900 debug ("device id is 0x%x\n", info->device_id); 1901 debug ("device id2 is 0x%x\n", info->device_id2); 1902 debug ("cfi version is 0x%04x\n", info->cfi_version); 1903 1904 size_ratio = info->portwidth / info->chipwidth; 1905 /* if the chip is x8/x16 reduce the ratio by half */ 1906 if ((info->interface == FLASH_CFI_X8X16) 1907 && (info->chipwidth == FLASH_CFI_BY8)) { 1908 size_ratio >>= 1; 1909 } 1910 debug ("size_ratio %d port %d bits chip %d bits\n", 1911 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1912 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1913 debug ("found %d erase regions\n", num_erase_regions); 1914 sect_cnt = 0; 1915 sector = base; 1916 for (i = 0; i < num_erase_regions; i++) { 1917 if (i > NUM_ERASE_REGIONS) { 1918 printf ("%d erase regions found, only %d used\n", 1919 num_erase_regions, NUM_ERASE_REGIONS); 1920 break; 1921 } 1922 1923 tmp = le32_to_cpu(qry.erase_region_info[i]); 1924 debug("erase region %u: 0x%08lx\n", i, tmp); 1925 1926 erase_region_count = (tmp & 0xffff) + 1; 1927 tmp >>= 16; 1928 erase_region_size = 1929 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; 1930 debug ("erase_region_count = %d erase_region_size = %d\n", 1931 erase_region_count, erase_region_size); 1932 for (j = 0; j < erase_region_count; j++) { 1933 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { 1934 printf("ERROR: too many flash sectors\n"); 1935 break; 1936 } 1937 info->start[sect_cnt] = 1938 (ulong)map_physmem(sector, 1939 info->portwidth, 1940 MAP_NOCACHE); 1941 sector += (erase_region_size * size_ratio); 1942 1943 /* 1944 * Only read protection status from 1945 * supported devices (intel...) 1946 */ 1947 switch (info->vendor) { 1948 case CFI_CMDSET_INTEL_PROG_REGIONS: 1949 case CFI_CMDSET_INTEL_EXTENDED: 1950 case CFI_CMDSET_INTEL_STANDARD: 1951 info->protect[sect_cnt] = 1952 flash_isset (info, sect_cnt, 1953 FLASH_OFFSET_PROTECT, 1954 FLASH_STATUS_PROTECT); 1955 break; 1956 default: 1957 /* default: not protected */ 1958 info->protect[sect_cnt] = 0; 1959 } 1960 1961 sect_cnt++; 1962 } 1963 } 1964 1965 info->sector_count = sect_cnt; 1966 info->size = 1 << qry.dev_size; 1967 /* multiply the size by the number of chips */ 1968 info->size *= size_ratio; 1969 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size); 1970 tmp = 1 << qry.block_erase_timeout_typ; 1971 info->erase_blk_tout = tmp * 1972 (1 << qry.block_erase_timeout_max); 1973 tmp = (1 << qry.buf_write_timeout_typ) * 1974 (1 << qry.buf_write_timeout_max); 1975 1976 /* round up when converting to ms */ 1977 info->buffer_write_tout = (tmp + 999) / 1000; 1978 tmp = (1 << qry.word_write_timeout_typ) * 1979 (1 << qry.word_write_timeout_max); 1980 /* round up when converting to ms */ 1981 info->write_tout = (tmp + 999) / 1000; 1982 info->flash_id = FLASH_MAN_CFI; 1983 if ((info->interface == FLASH_CFI_X8X16) && 1984 (info->chipwidth == FLASH_CFI_BY8)) { 1985 /* XXX - Need to test on x8/x16 in parallel. */ 1986 info->portwidth >>= 1; 1987 } 1988 1989 flash_write_cmd (info, 0, 0, info->cmd_reset); 1990 } 1991 1992 return (info->size); 1993 } 1994 1995 void flash_set_verbose(uint v) 1996 { 1997 flash_verbose = v; 1998 } 1999 2000 /*----------------------------------------------------------------------- 2001 */ 2002 unsigned long flash_init (void) 2003 { 2004 unsigned long size = 0; 2005 int i; 2006 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2007 struct apl_s { 2008 ulong start; 2009 ulong size; 2010 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST; 2011 #endif 2012 2013 #ifdef CONFIG_SYS_FLASH_PROTECTION 2014 /* read environment from EEPROM */ 2015 char s[64]; 2016 getenv_r ("unlock", s, sizeof(s)); 2017 #endif 2018 2019 #define BANK_BASE(i) (((phys_addr_t [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i]) 2020 2021 /* Init: no FLASHes known */ 2022 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { 2023 flash_info[i].flash_id = FLASH_UNKNOWN; 2024 2025 if (!flash_detect_legacy (BANK_BASE(i), i)) 2026 flash_get_size (BANK_BASE(i), i); 2027 size += flash_info[i].size; 2028 if (flash_info[i].flash_id == FLASH_UNKNOWN) { 2029 #ifndef CONFIG_SYS_FLASH_QUIET_TEST 2030 printf ("## Unknown FLASH on Bank %d " 2031 "- Size = 0x%08lx = %ld MB\n", 2032 i+1, flash_info[i].size, 2033 flash_info[i].size << 20); 2034 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */ 2035 } 2036 #ifdef CONFIG_SYS_FLASH_PROTECTION 2037 else if ((s != NULL) && (strcmp(s, "yes") == 0)) { 2038 /* 2039 * Only the U-Boot image and it's environment 2040 * is protected, all other sectors are 2041 * unprotected (unlocked) if flash hardware 2042 * protection is used (CONFIG_SYS_FLASH_PROTECTION) 2043 * and the environment variable "unlock" is 2044 * set to "yes". 2045 */ 2046 if (flash_info[i].legacy_unlock) { 2047 int k; 2048 2049 /* 2050 * Disable legacy_unlock temporarily, 2051 * since flash_real_protect would 2052 * relock all other sectors again 2053 * otherwise. 2054 */ 2055 flash_info[i].legacy_unlock = 0; 2056 2057 /* 2058 * Legacy unlocking (e.g. Intel J3) -> 2059 * unlock only one sector. This will 2060 * unlock all sectors. 2061 */ 2062 flash_real_protect (&flash_info[i], 0, 0); 2063 2064 flash_info[i].legacy_unlock = 1; 2065 2066 /* 2067 * Manually mark other sectors as 2068 * unlocked (unprotected) 2069 */ 2070 for (k = 1; k < flash_info[i].sector_count; k++) 2071 flash_info[i].protect[k] = 0; 2072 } else { 2073 /* 2074 * No legancy unlocking -> unlock all sectors 2075 */ 2076 flash_protect (FLAG_PROTECT_CLEAR, 2077 flash_info[i].start[0], 2078 flash_info[i].start[0] 2079 + flash_info[i].size - 1, 2080 &flash_info[i]); 2081 } 2082 } 2083 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 2084 } 2085 2086 /* Monitor protection ON by default */ 2087 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 2088 flash_protect (FLAG_PROTECT_SET, 2089 CONFIG_SYS_MONITOR_BASE, 2090 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, 2091 flash_get_info(CONFIG_SYS_MONITOR_BASE)); 2092 #endif 2093 2094 /* Environment protection ON by default */ 2095 #ifdef CONFIG_ENV_IS_IN_FLASH 2096 flash_protect (FLAG_PROTECT_SET, 2097 CONFIG_ENV_ADDR, 2098 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, 2099 flash_get_info(CONFIG_ENV_ADDR)); 2100 #endif 2101 2102 /* Redundant environment protection ON by default */ 2103 #ifdef CONFIG_ENV_ADDR_REDUND 2104 flash_protect (FLAG_PROTECT_SET, 2105 CONFIG_ENV_ADDR_REDUND, 2106 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, 2107 flash_get_info(CONFIG_ENV_ADDR_REDUND)); 2108 #endif 2109 2110 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2111 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) { 2112 debug("autoprotecting from %08x to %08x\n", 2113 apl[i].start, apl[i].start + apl[i].size - 1); 2114 flash_protect (FLAG_PROTECT_SET, 2115 apl[i].start, 2116 apl[i].start + apl[i].size - 1, 2117 flash_get_info(apl[i].start)); 2118 } 2119 #endif 2120 2121 #ifdef CONFIG_FLASH_CFI_MTD 2122 cfi_mtd_init(); 2123 #endif 2124 2125 return (size); 2126 } 2127