1 /* 2 * (C) Copyright 2002-2004 3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com 4 * 5 * Copyright (C) 2003 Arabella Software Ltd. 6 * Yuli Barcohen <yuli@arabellasw.com> 7 * 8 * Copyright (C) 2004 9 * Ed Okerson 10 * 11 * Copyright (C) 2006 12 * Tolunay Orkun <listmember@orkun.us> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 * 32 */ 33 34 /* The DEBUG define must be before common to enable debugging */ 35 /* #define DEBUG */ 36 37 #include <common.h> 38 #include <asm/processor.h> 39 #include <asm/io.h> 40 #include <asm/byteorder.h> 41 #include <environment.h> 42 #ifdef CFG_FLASH_CFI_DRIVER 43 44 /* 45 * This file implements a Common Flash Interface (CFI) driver for 46 * U-Boot. 47 * 48 * The width of the port and the width of the chips are determined at 49 * initialization. These widths are used to calculate the address for 50 * access CFI data structures. 51 * 52 * References 53 * JEDEC Standard JESD68 - Common Flash Interface (CFI) 54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes 55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets 56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet 57 * AMD CFI Specification, Release 2.0 December 1, 2001 58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte 59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001 60 * 61 * Define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between 62 * reading and writing ... (yes there is such a Hardware). 63 */ 64 65 #ifndef CFG_FLASH_BANKS_LIST 66 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } 67 #endif 68 69 #define FLASH_CMD_CFI 0x98 70 #define FLASH_CMD_READ_ID 0x90 71 #define FLASH_CMD_RESET 0xff 72 #define FLASH_CMD_BLOCK_ERASE 0x20 73 #define FLASH_CMD_ERASE_CONFIRM 0xD0 74 #define FLASH_CMD_WRITE 0x40 75 #define FLASH_CMD_PROTECT 0x60 76 #define FLASH_CMD_PROTECT_SET 0x01 77 #define FLASH_CMD_PROTECT_CLEAR 0xD0 78 #define FLASH_CMD_CLEAR_STATUS 0x50 79 #define FLASH_CMD_READ_STATUS 0x70 80 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8 81 #define FLASH_CMD_WRITE_BUFFER_PROG 0xE9 82 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0 83 84 #define FLASH_STATUS_DONE 0x80 85 #define FLASH_STATUS_ESS 0x40 86 #define FLASH_STATUS_ECLBS 0x20 87 #define FLASH_STATUS_PSLBS 0x10 88 #define FLASH_STATUS_VPENS 0x08 89 #define FLASH_STATUS_PSS 0x04 90 #define FLASH_STATUS_DPS 0x02 91 #define FLASH_STATUS_R 0x01 92 #define FLASH_STATUS_PROTECT 0x01 93 94 #define AMD_CMD_RESET 0xF0 95 #define AMD_CMD_WRITE 0xA0 96 #define AMD_CMD_ERASE_START 0x80 97 #define AMD_CMD_ERASE_SECTOR 0x30 98 #define AMD_CMD_UNLOCK_START 0xAA 99 #define AMD_CMD_UNLOCK_ACK 0x55 100 #define AMD_CMD_WRITE_TO_BUFFER 0x25 101 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29 102 103 #define AMD_STATUS_TOGGLE 0x40 104 #define AMD_STATUS_ERROR 0x20 105 106 #define FLASH_OFFSET_MANUFACTURER_ID 0x00 107 #define FLASH_OFFSET_DEVICE_ID 0x01 108 #define FLASH_OFFSET_DEVICE_ID2 0x0E 109 #define FLASH_OFFSET_DEVICE_ID3 0x0F 110 #define FLASH_OFFSET_CFI 0x55 111 #define FLASH_OFFSET_CFI_ALT 0x555 112 #define FLASH_OFFSET_CFI_RESP 0x10 113 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13 114 /* extended query table primary address */ 115 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 116 #define FLASH_OFFSET_WTOUT 0x1F 117 #define FLASH_OFFSET_WBTOUT 0x20 118 #define FLASH_OFFSET_ETOUT 0x21 119 #define FLASH_OFFSET_CETOUT 0x22 120 #define FLASH_OFFSET_WMAX_TOUT 0x23 121 #define FLASH_OFFSET_WBMAX_TOUT 0x24 122 #define FLASH_OFFSET_EMAX_TOUT 0x25 123 #define FLASH_OFFSET_CEMAX_TOUT 0x26 124 #define FLASH_OFFSET_SIZE 0x27 125 #define FLASH_OFFSET_INTERFACE 0x28 126 #define FLASH_OFFSET_BUFFER_SIZE 0x2A 127 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C 128 #define FLASH_OFFSET_ERASE_REGIONS 0x2D 129 #define FLASH_OFFSET_PROTECT 0x02 130 #define FLASH_OFFSET_USER_PROTECTION 0x85 131 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 132 133 #define CFI_CMDSET_NONE 0 134 #define CFI_CMDSET_INTEL_EXTENDED 1 135 #define CFI_CMDSET_AMD_STANDARD 2 136 #define CFI_CMDSET_INTEL_STANDARD 3 137 #define CFI_CMDSET_AMD_EXTENDED 4 138 #define CFI_CMDSET_MITSU_STANDARD 256 139 #define CFI_CMDSET_MITSU_EXTENDED 257 140 #define CFI_CMDSET_SST 258 141 #define CFI_CMDSET_INTEL_PROG_REGIONS 512 142 143 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */ 144 # undef FLASH_CMD_RESET 145 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */ 146 #endif 147 148 typedef union { 149 unsigned char c; 150 unsigned short w; 151 unsigned long l; 152 unsigned long long ll; 153 } cfiword_t; 154 155 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */ 156 157 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; 158 159 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */ 160 #ifdef CFG_MAX_FLASH_BANKS_DETECT 161 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST; 162 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */ 163 #else 164 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST; 165 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */ 166 #endif 167 168 /* 169 * Check if chip width is defined. If not, start detecting with 8bit. 170 */ 171 #ifndef CFG_FLASH_CFI_WIDTH 172 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT 173 #endif 174 175 typedef unsigned long flash_sect_t; 176 177 /* CFI standard query structure */ 178 struct cfi_qry { 179 u8 qry[3]; 180 u16 p_id; 181 u16 p_adr; 182 u16 a_id; 183 u16 a_adr; 184 u8 vcc_min; 185 u8 vcc_max; 186 u8 vpp_min; 187 u8 vpp_max; 188 u8 word_write_timeout_typ; 189 u8 buf_write_timeout_typ; 190 u8 block_erase_timeout_typ; 191 u8 chip_erase_timeout_typ; 192 u8 word_write_timeout_max; 193 u8 buf_write_timeout_max; 194 u8 block_erase_timeout_max; 195 u8 chip_erase_timeout_max; 196 u8 dev_size; 197 u16 interface_desc; 198 u16 max_buf_write_size; 199 u8 num_erase_regions; 200 u32 erase_region_info[NUM_ERASE_REGIONS]; 201 } __attribute__((packed)); 202 203 struct cfi_pri_hdr { 204 u8 pri[3]; 205 u8 major_version; 206 u8 minor_version; 207 } __attribute__((packed)); 208 209 static void flash_write8(u8 value, void *addr) 210 { 211 __raw_writeb(value, addr); 212 } 213 214 static void flash_write16(u16 value, void *addr) 215 { 216 __raw_writew(value, addr); 217 } 218 219 static void flash_write32(u32 value, void *addr) 220 { 221 __raw_writel(value, addr); 222 } 223 224 static void flash_write64(u64 value, void *addr) 225 { 226 /* No architectures currently implement __raw_writeq() */ 227 *(volatile u64 *)addr = value; 228 } 229 230 static u8 flash_read8(void *addr) 231 { 232 return __raw_readb(addr); 233 } 234 235 static u16 flash_read16(void *addr) 236 { 237 return __raw_readw(addr); 238 } 239 240 static u32 flash_read32(void *addr) 241 { 242 return __raw_readl(addr); 243 } 244 245 static u64 __flash_read64(void *addr) 246 { 247 /* No architectures currently implement __raw_readq() */ 248 return *(volatile u64 *)addr; 249 } 250 251 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); 252 253 /*----------------------------------------------------------------------- 254 */ 255 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE) 256 static flash_info_t *flash_get_info(ulong base) 257 { 258 int i; 259 flash_info_t * info = 0; 260 261 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { 262 info = & flash_info[i]; 263 if (info->size && info->start[0] <= base && 264 base <= info->start[0] + info->size - 1) 265 break; 266 } 267 268 return i == CFG_MAX_FLASH_BANKS ? 0 : info; 269 } 270 #endif 271 272 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) 273 { 274 if (sect != (info->sector_count - 1)) 275 return info->start[sect + 1] - info->start[sect]; 276 else 277 return info->start[0] + info->size - info->start[sect]; 278 } 279 280 /*----------------------------------------------------------------------- 281 * create an address based on the offset and the port width 282 */ 283 static inline void * 284 flash_map (flash_info_t * info, flash_sect_t sect, uint offset) 285 { 286 unsigned int byte_offset = offset * info->portwidth; 287 288 return map_physmem(info->start[sect] + byte_offset, 289 flash_sector_size(info, sect) - byte_offset, 290 MAP_NOCACHE); 291 } 292 293 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, 294 unsigned int offset, void *addr) 295 { 296 unsigned int byte_offset = offset * info->portwidth; 297 298 unmap_physmem(addr, flash_sector_size(info, sect) - byte_offset); 299 } 300 301 /*----------------------------------------------------------------------- 302 * make a proper sized command based on the port and chip widths 303 */ 304 static void flash_make_cmd (flash_info_t * info, ulong cmd, void *cmdbuf) 305 { 306 int i; 307 int cword_offset; 308 int cp_offset; 309 uchar val; 310 uchar *cp = (uchar *) cmdbuf; 311 312 for (i = info->portwidth; i > 0; i--){ 313 cword_offset = (info->portwidth-i)%info->chipwidth; 314 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) 315 cp_offset = info->portwidth - i; 316 val = *((uchar*)&cmd + cword_offset); 317 #else 318 cp_offset = i - 1; 319 val = *((uchar*)&cmd + sizeof(ulong) - cword_offset - 1); 320 #endif 321 cp[cp_offset] = (cword_offset >= sizeof(ulong)) ? 0x00 : val; 322 } 323 } 324 325 #ifdef DEBUG 326 /*----------------------------------------------------------------------- 327 * Debug support 328 */ 329 static void print_longlong (char *str, unsigned long long data) 330 { 331 int i; 332 char *cp; 333 334 cp = (unsigned char *) &data; 335 for (i = 0; i < 8; i++) 336 sprintf (&str[i * 2], "%2.2x", *cp++); 337 } 338 339 static void flash_printqry (struct cfi_qry *qry) 340 { 341 u8 *p = (u8 *)qry; 342 int x, y; 343 344 for (x = 0; x < sizeof(struct cfi_qry); x += 16) { 345 debug("%02x : ", x); 346 for (y = 0; y < 16; y++) 347 debug("%2.2x ", p[x + y]); 348 debug(" "); 349 for (y = 0; y < 16; y++) { 350 unsigned char c = p[x + y]; 351 if (c >= 0x20 && c <= 0x7e) 352 debug("%c", c); 353 else 354 debug("."); 355 } 356 debug("\n"); 357 } 358 } 359 #endif 360 361 362 /*----------------------------------------------------------------------- 363 * read a character at a port width address 364 */ 365 static inline uchar flash_read_uchar (flash_info_t * info, uint offset) 366 { 367 uchar *cp; 368 uchar retval; 369 370 cp = flash_map (info, 0, offset); 371 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) 372 retval = flash_read8(cp); 373 #else 374 retval = flash_read8(cp + info->portwidth - 1); 375 #endif 376 flash_unmap (info, 0, offset, cp); 377 return retval; 378 } 379 380 /*----------------------------------------------------------------------- 381 * read a word at a port width address, assume 16bit bus 382 */ 383 static inline ushort flash_read_word (flash_info_t * info, uint offset) 384 { 385 ushort *addr, retval; 386 387 addr = flash_map (info, 0, offset); 388 retval = flash_read16 (addr); 389 flash_unmap (info, 0, offset, addr); 390 return retval; 391 } 392 393 394 /*----------------------------------------------------------------------- 395 * read a long word by picking the least significant byte of each maximum 396 * port size word. Swap for ppc format. 397 */ 398 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, 399 uint offset) 400 { 401 uchar *addr; 402 ulong retval; 403 404 #ifdef DEBUG 405 int x; 406 #endif 407 addr = flash_map (info, sect, offset); 408 409 #ifdef DEBUG 410 debug ("long addr is at %p info->portwidth = %d\n", addr, 411 info->portwidth); 412 for (x = 0; x < 4 * info->portwidth; x++) { 413 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); 414 } 415 #endif 416 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) 417 retval = ((flash_read8(addr) << 16) | 418 (flash_read8(addr + info->portwidth) << 24) | 419 (flash_read8(addr + 2 * info->portwidth)) | 420 (flash_read8(addr + 3 * info->portwidth) << 8)); 421 #else 422 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) | 423 (flash_read8(addr + info->portwidth - 1) << 16) | 424 (flash_read8(addr + 4 * info->portwidth - 1) << 8) | 425 (flash_read8(addr + 3 * info->portwidth - 1))); 426 #endif 427 flash_unmap(info, sect, offset, addr); 428 429 return retval; 430 } 431 432 /* 433 * Write a proper sized command to the correct address 434 */ 435 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, 436 uint offset, ulong cmd) 437 { 438 439 void *addr; 440 cfiword_t cword; 441 442 addr = flash_map (info, sect, offset); 443 flash_make_cmd (info, cmd, &cword); 444 switch (info->portwidth) { 445 case FLASH_CFI_8BIT: 446 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, 447 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 448 flash_write8(cword.c, addr); 449 break; 450 case FLASH_CFI_16BIT: 451 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, 452 cmd, cword.w, 453 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 454 flash_write16(cword.w, addr); 455 break; 456 case FLASH_CFI_32BIT: 457 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr, 458 cmd, cword.l, 459 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 460 flash_write32(cword.l, addr); 461 break; 462 case FLASH_CFI_64BIT: 463 #ifdef DEBUG 464 { 465 char str[20]; 466 467 print_longlong (str, cword.ll); 468 469 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", 470 addr, cmd, str, 471 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 472 } 473 #endif 474 flash_write64(cword.ll, addr); 475 break; 476 } 477 478 /* Ensure all the instructions are fully finished */ 479 sync(); 480 481 flash_unmap(info, sect, offset, addr); 482 } 483 484 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) 485 { 486 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START); 487 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK); 488 } 489 490 /*----------------------------------------------------------------------- 491 */ 492 static int flash_isequal (flash_info_t * info, flash_sect_t sect, 493 uint offset, uchar cmd) 494 { 495 void *addr; 496 cfiword_t cword; 497 int retval; 498 499 addr = flash_map (info, sect, offset); 500 flash_make_cmd (info, cmd, &cword); 501 502 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr); 503 switch (info->portwidth) { 504 case FLASH_CFI_8BIT: 505 debug ("is= %x %x\n", flash_read8(addr), cword.c); 506 retval = (flash_read8(addr) == cword.c); 507 break; 508 case FLASH_CFI_16BIT: 509 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w); 510 retval = (flash_read16(addr) == cword.w); 511 break; 512 case FLASH_CFI_32BIT: 513 debug ("is= %8.8lx %8.8lx\n", flash_read32(addr), cword.l); 514 retval = (flash_read32(addr) == cword.l); 515 break; 516 case FLASH_CFI_64BIT: 517 #ifdef DEBUG 518 { 519 char str1[20]; 520 char str2[20]; 521 522 print_longlong (str1, flash_read64(addr)); 523 print_longlong (str2, cword.ll); 524 debug ("is= %s %s\n", str1, str2); 525 } 526 #endif 527 retval = (flash_read64(addr) == cword.ll); 528 break; 529 default: 530 retval = 0; 531 break; 532 } 533 flash_unmap(info, sect, offset, addr); 534 535 return retval; 536 } 537 538 /*----------------------------------------------------------------------- 539 */ 540 static int flash_isset (flash_info_t * info, flash_sect_t sect, 541 uint offset, uchar cmd) 542 { 543 void *addr; 544 cfiword_t cword; 545 int retval; 546 547 addr = flash_map (info, sect, offset); 548 flash_make_cmd (info, cmd, &cword); 549 switch (info->portwidth) { 550 case FLASH_CFI_8BIT: 551 retval = ((flash_read8(addr) & cword.c) == cword.c); 552 break; 553 case FLASH_CFI_16BIT: 554 retval = ((flash_read16(addr) & cword.w) == cword.w); 555 break; 556 case FLASH_CFI_32BIT: 557 retval = ((flash_read32(addr) & cword.l) == cword.l); 558 break; 559 case FLASH_CFI_64BIT: 560 retval = ((flash_read64(addr) & cword.ll) == cword.ll); 561 break; 562 default: 563 retval = 0; 564 break; 565 } 566 flash_unmap(info, sect, offset, addr); 567 568 return retval; 569 } 570 571 /*----------------------------------------------------------------------- 572 */ 573 static int flash_toggle (flash_info_t * info, flash_sect_t sect, 574 uint offset, uchar cmd) 575 { 576 void *addr; 577 cfiword_t cword; 578 int retval; 579 580 addr = flash_map (info, sect, offset); 581 flash_make_cmd (info, cmd, &cword); 582 switch (info->portwidth) { 583 case FLASH_CFI_8BIT: 584 retval = ((flash_read8(addr) & cword.c) != 585 (flash_read8(addr) & cword.c)); 586 break; 587 case FLASH_CFI_16BIT: 588 retval = ((flash_read16(addr) & cword.w) != 589 (flash_read16(addr) & cword.w)); 590 break; 591 case FLASH_CFI_32BIT: 592 retval = ((flash_read32(addr) & cword.l) != 593 (flash_read32(addr) & cword.l)); 594 break; 595 case FLASH_CFI_64BIT: 596 retval = ((flash_read64(addr) & cword.ll) != 597 (flash_read64(addr) & cword.ll)); 598 break; 599 default: 600 retval = 0; 601 break; 602 } 603 flash_unmap(info, sect, offset, addr); 604 605 return retval; 606 } 607 608 /* 609 * flash_is_busy - check to see if the flash is busy 610 * 611 * This routine checks the status of the chip and returns true if the 612 * chip is busy. 613 */ 614 static int flash_is_busy (flash_info_t * info, flash_sect_t sect) 615 { 616 int retval; 617 618 switch (info->vendor) { 619 case CFI_CMDSET_INTEL_PROG_REGIONS: 620 case CFI_CMDSET_INTEL_STANDARD: 621 case CFI_CMDSET_INTEL_EXTENDED: 622 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE); 623 break; 624 case CFI_CMDSET_AMD_STANDARD: 625 case CFI_CMDSET_AMD_EXTENDED: 626 #ifdef CONFIG_FLASH_CFI_LEGACY 627 case CFI_CMDSET_AMD_LEGACY: 628 #endif 629 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); 630 break; 631 default: 632 retval = 0; 633 } 634 debug ("flash_is_busy: %d\n", retval); 635 return retval; 636 } 637 638 /*----------------------------------------------------------------------- 639 * wait for XSR.7 to be set. Time out with an error if it does not. 640 * This routine does not set the flash to read-array mode. 641 */ 642 static int flash_status_check (flash_info_t * info, flash_sect_t sector, 643 ulong tout, char *prompt) 644 { 645 ulong start; 646 647 #if CFG_HZ != 1000 648 tout *= CFG_HZ/1000; 649 #endif 650 651 /* Wait for command completion */ 652 start = get_timer (0); 653 while (flash_is_busy (info, sector)) { 654 if (get_timer (start) > tout) { 655 printf ("Flash %s timeout at address %lx data %lx\n", 656 prompt, info->start[sector], 657 flash_read_long (info, sector, 0)); 658 flash_write_cmd (info, sector, 0, info->cmd_reset); 659 return ERR_TIMOUT; 660 } 661 udelay (1); /* also triggers watchdog */ 662 } 663 return ERR_OK; 664 } 665 666 /*----------------------------------------------------------------------- 667 * Wait for XSR.7 to be set, if it times out print an error, otherwise 668 * do a full status check. 669 * 670 * This routine sets the flash to read-array mode. 671 */ 672 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, 673 ulong tout, char *prompt) 674 { 675 int retcode; 676 677 retcode = flash_status_check (info, sector, tout, prompt); 678 switch (info->vendor) { 679 case CFI_CMDSET_INTEL_PROG_REGIONS: 680 case CFI_CMDSET_INTEL_EXTENDED: 681 case CFI_CMDSET_INTEL_STANDARD: 682 if ((retcode == ERR_OK) 683 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { 684 retcode = ERR_INVAL; 685 printf ("Flash %s error at address %lx\n", prompt, 686 info->start[sector]); 687 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | 688 FLASH_STATUS_PSLBS)) { 689 puts ("Command Sequence Error.\n"); 690 } else if (flash_isset (info, sector, 0, 691 FLASH_STATUS_ECLBS)) { 692 puts ("Block Erase Error.\n"); 693 retcode = ERR_NOT_ERASED; 694 } else if (flash_isset (info, sector, 0, 695 FLASH_STATUS_PSLBS)) { 696 puts ("Locking Error\n"); 697 } 698 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) { 699 puts ("Block locked.\n"); 700 retcode = ERR_PROTECTED; 701 } 702 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) 703 puts ("Vpp Low Error.\n"); 704 } 705 flash_write_cmd (info, sector, 0, info->cmd_reset); 706 break; 707 default: 708 break; 709 } 710 return retcode; 711 } 712 713 /*----------------------------------------------------------------------- 714 */ 715 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) 716 { 717 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) 718 unsigned short w; 719 unsigned int l; 720 unsigned long long ll; 721 #endif 722 723 switch (info->portwidth) { 724 case FLASH_CFI_8BIT: 725 cword->c = c; 726 break; 727 case FLASH_CFI_16BIT: 728 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) 729 w = c; 730 w <<= 8; 731 cword->w = (cword->w >> 8) | w; 732 #else 733 cword->w = (cword->w << 8) | c; 734 #endif 735 break; 736 case FLASH_CFI_32BIT: 737 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) 738 l = c; 739 l <<= 24; 740 cword->l = (cword->l >> 8) | l; 741 #else 742 cword->l = (cword->l << 8) | c; 743 #endif 744 break; 745 case FLASH_CFI_64BIT: 746 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) 747 ll = c; 748 ll <<= 56; 749 cword->ll = (cword->ll >> 8) | ll; 750 #else 751 cword->ll = (cword->ll << 8) | c; 752 #endif 753 break; 754 } 755 } 756 757 /* loop through the sectors from the highest address when the passed 758 * address is greater or equal to the sector address we have a match 759 */ 760 static flash_sect_t find_sector (flash_info_t * info, ulong addr) 761 { 762 flash_sect_t sector; 763 764 for (sector = info->sector_count - 1; sector >= 0; sector--) { 765 if (addr >= info->start[sector]) 766 break; 767 } 768 return sector; 769 } 770 771 /*----------------------------------------------------------------------- 772 */ 773 static int flash_write_cfiword (flash_info_t * info, ulong dest, 774 cfiword_t cword) 775 { 776 void *dstaddr; 777 int flag; 778 779 dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE); 780 781 /* Check if Flash is (sufficiently) erased */ 782 switch (info->portwidth) { 783 case FLASH_CFI_8BIT: 784 flag = ((flash_read8(dstaddr) & cword.c) == cword.c); 785 break; 786 case FLASH_CFI_16BIT: 787 flag = ((flash_read16(dstaddr) & cword.w) == cword.w); 788 break; 789 case FLASH_CFI_32BIT: 790 flag = ((flash_read32(dstaddr) & cword.l) == cword.l); 791 break; 792 case FLASH_CFI_64BIT: 793 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll); 794 break; 795 default: 796 flag = 0; 797 break; 798 } 799 if (!flag) { 800 unmap_physmem(dstaddr, info->portwidth); 801 return ERR_NOT_ERASED; 802 } 803 804 /* Disable interrupts which might cause a timeout here */ 805 flag = disable_interrupts (); 806 807 switch (info->vendor) { 808 case CFI_CMDSET_INTEL_PROG_REGIONS: 809 case CFI_CMDSET_INTEL_EXTENDED: 810 case CFI_CMDSET_INTEL_STANDARD: 811 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS); 812 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE); 813 break; 814 case CFI_CMDSET_AMD_EXTENDED: 815 case CFI_CMDSET_AMD_STANDARD: 816 #ifdef CONFIG_FLASH_CFI_LEGACY 817 case CFI_CMDSET_AMD_LEGACY: 818 #endif 819 flash_unlock_seq (info, 0); 820 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE); 821 break; 822 } 823 824 switch (info->portwidth) { 825 case FLASH_CFI_8BIT: 826 flash_write8(cword.c, dstaddr); 827 break; 828 case FLASH_CFI_16BIT: 829 flash_write16(cword.w, dstaddr); 830 break; 831 case FLASH_CFI_32BIT: 832 flash_write32(cword.l, dstaddr); 833 break; 834 case FLASH_CFI_64BIT: 835 flash_write64(cword.ll, dstaddr); 836 break; 837 } 838 839 /* re-enable interrupts if necessary */ 840 if (flag) 841 enable_interrupts (); 842 843 unmap_physmem(dstaddr, info->portwidth); 844 845 return flash_full_status_check (info, find_sector (info, dest), 846 info->write_tout, "write"); 847 } 848 849 #ifdef CFG_FLASH_USE_BUFFER_WRITE 850 851 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, 852 int len) 853 { 854 flash_sect_t sector; 855 int cnt; 856 int retcode; 857 void *src = cp; 858 void *dst = map_physmem(dest, len, MAP_NOCACHE); 859 void *dst2 = dst; 860 int flag = 0; 861 uint offset = 0; 862 unsigned int shift; 863 uchar write_cmd; 864 865 switch (info->portwidth) { 866 case FLASH_CFI_8BIT: 867 shift = 0; 868 break; 869 case FLASH_CFI_16BIT: 870 shift = 1; 871 break; 872 case FLASH_CFI_32BIT: 873 shift = 2; 874 break; 875 case FLASH_CFI_64BIT: 876 shift = 3; 877 break; 878 default: 879 retcode = ERR_INVAL; 880 goto out_unmap; 881 } 882 883 cnt = len >> shift; 884 885 while ((cnt-- > 0) && (flag == 0)) { 886 switch (info->portwidth) { 887 case FLASH_CFI_8BIT: 888 flag = ((flash_read8(dst2) & flash_read8(src)) == 889 flash_read8(src)); 890 src += 1, dst2 += 1; 891 break; 892 case FLASH_CFI_16BIT: 893 flag = ((flash_read16(dst2) & flash_read16(src)) == 894 flash_read16(src)); 895 src += 2, dst2 += 2; 896 break; 897 case FLASH_CFI_32BIT: 898 flag = ((flash_read32(dst2) & flash_read32(src)) == 899 flash_read32(src)); 900 src += 4, dst2 += 4; 901 break; 902 case FLASH_CFI_64BIT: 903 flag = ((flash_read64(dst2) & flash_read64(src)) == 904 flash_read64(src)); 905 src += 8, dst2 += 8; 906 break; 907 } 908 } 909 if (!flag) { 910 retcode = ERR_NOT_ERASED; 911 goto out_unmap; 912 } 913 914 src = cp; 915 sector = find_sector (info, dest); 916 917 switch (info->vendor) { 918 case CFI_CMDSET_INTEL_PROG_REGIONS: 919 case CFI_CMDSET_INTEL_STANDARD: 920 case CFI_CMDSET_INTEL_EXTENDED: 921 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ? 922 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER; 923 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 924 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS); 925 flash_write_cmd (info, sector, 0, write_cmd); 926 retcode = flash_status_check (info, sector, 927 info->buffer_write_tout, 928 "write to buffer"); 929 if (retcode == ERR_OK) { 930 /* reduce the number of loops by the width of 931 * the port */ 932 cnt = len >> shift; 933 flash_write_cmd (info, sector, 0, cnt - 1); 934 while (cnt-- > 0) { 935 switch (info->portwidth) { 936 case FLASH_CFI_8BIT: 937 flash_write8(flash_read8(src), dst); 938 src += 1, dst += 1; 939 break; 940 case FLASH_CFI_16BIT: 941 flash_write16(flash_read16(src), dst); 942 src += 2, dst += 2; 943 break; 944 case FLASH_CFI_32BIT: 945 flash_write32(flash_read32(src), dst); 946 src += 4, dst += 4; 947 break; 948 case FLASH_CFI_64BIT: 949 flash_write64(flash_read64(src), dst); 950 src += 8, dst += 8; 951 break; 952 default: 953 retcode = ERR_INVAL; 954 goto out_unmap; 955 } 956 } 957 flash_write_cmd (info, sector, 0, 958 FLASH_CMD_WRITE_BUFFER_CONFIRM); 959 retcode = flash_full_status_check ( 960 info, sector, info->buffer_write_tout, 961 "buffer write"); 962 } 963 964 break; 965 966 case CFI_CMDSET_AMD_STANDARD: 967 case CFI_CMDSET_AMD_EXTENDED: 968 flash_unlock_seq(info,0); 969 970 #ifdef CONFIG_FLASH_SPANSION_S29WS_N 971 offset = ((unsigned long)dst - info->start[sector]) >> shift; 972 #endif 973 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER); 974 cnt = len >> shift; 975 flash_write_cmd(info, sector, offset, (uchar)cnt - 1); 976 977 switch (info->portwidth) { 978 case FLASH_CFI_8BIT: 979 while (cnt-- > 0) { 980 flash_write8(flash_read8(src), dst); 981 src += 1, dst += 1; 982 } 983 break; 984 case FLASH_CFI_16BIT: 985 while (cnt-- > 0) { 986 flash_write16(flash_read16(src), dst); 987 src += 2, dst += 2; 988 } 989 break; 990 case FLASH_CFI_32BIT: 991 while (cnt-- > 0) { 992 flash_write32(flash_read32(src), dst); 993 src += 4, dst += 4; 994 } 995 break; 996 case FLASH_CFI_64BIT: 997 while (cnt-- > 0) { 998 flash_write64(flash_read64(src), dst); 999 src += 8, dst += 8; 1000 } 1001 break; 1002 default: 1003 retcode = ERR_INVAL; 1004 goto out_unmap; 1005 } 1006 1007 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); 1008 retcode = flash_full_status_check (info, sector, 1009 info->buffer_write_tout, 1010 "buffer write"); 1011 break; 1012 1013 default: 1014 debug ("Unknown Command Set\n"); 1015 retcode = ERR_INVAL; 1016 break; 1017 } 1018 1019 out_unmap: 1020 unmap_physmem(dst, len); 1021 return retcode; 1022 } 1023 #endif /* CFG_FLASH_USE_BUFFER_WRITE */ 1024 1025 1026 /*----------------------------------------------------------------------- 1027 */ 1028 int flash_erase (flash_info_t * info, int s_first, int s_last) 1029 { 1030 int rcode = 0; 1031 int prot; 1032 flash_sect_t sect; 1033 1034 if (info->flash_id != FLASH_MAN_CFI) { 1035 puts ("Can't erase unknown flash type - aborted\n"); 1036 return 1; 1037 } 1038 if ((s_first < 0) || (s_first > s_last)) { 1039 puts ("- no sectors to erase\n"); 1040 return 1; 1041 } 1042 1043 prot = 0; 1044 for (sect = s_first; sect <= s_last; ++sect) { 1045 if (info->protect[sect]) { 1046 prot++; 1047 } 1048 } 1049 if (prot) { 1050 printf ("- Warning: %d protected sectors will not be erased!\n", 1051 prot); 1052 } else { 1053 putc ('\n'); 1054 } 1055 1056 1057 for (sect = s_first; sect <= s_last; sect++) { 1058 if (info->protect[sect] == 0) { /* not protected */ 1059 switch (info->vendor) { 1060 case CFI_CMDSET_INTEL_PROG_REGIONS: 1061 case CFI_CMDSET_INTEL_STANDARD: 1062 case CFI_CMDSET_INTEL_EXTENDED: 1063 flash_write_cmd (info, sect, 0, 1064 FLASH_CMD_CLEAR_STATUS); 1065 flash_write_cmd (info, sect, 0, 1066 FLASH_CMD_BLOCK_ERASE); 1067 flash_write_cmd (info, sect, 0, 1068 FLASH_CMD_ERASE_CONFIRM); 1069 break; 1070 case CFI_CMDSET_AMD_STANDARD: 1071 case CFI_CMDSET_AMD_EXTENDED: 1072 flash_unlock_seq (info, sect); 1073 flash_write_cmd (info, sect, 1074 info->addr_unlock1, 1075 AMD_CMD_ERASE_START); 1076 flash_unlock_seq (info, sect); 1077 flash_write_cmd (info, sect, 0, 1078 AMD_CMD_ERASE_SECTOR); 1079 break; 1080 #ifdef CONFIG_FLASH_CFI_LEGACY 1081 case CFI_CMDSET_AMD_LEGACY: 1082 flash_unlock_seq (info, 0); 1083 flash_write_cmd (info, 0, info->addr_unlock1, 1084 AMD_CMD_ERASE_START); 1085 flash_unlock_seq (info, 0); 1086 flash_write_cmd (info, sect, 0, 1087 AMD_CMD_ERASE_SECTOR); 1088 break; 1089 #endif 1090 default: 1091 debug ("Unkown flash vendor %d\n", 1092 info->vendor); 1093 break; 1094 } 1095 1096 if (flash_full_status_check 1097 (info, sect, info->erase_blk_tout, "erase")) { 1098 rcode = 1; 1099 } else 1100 putc ('.'); 1101 } 1102 } 1103 puts (" done\n"); 1104 return rcode; 1105 } 1106 1107 /*----------------------------------------------------------------------- 1108 */ 1109 void flash_print_info (flash_info_t * info) 1110 { 1111 int i; 1112 1113 if (info->flash_id != FLASH_MAN_CFI) { 1114 puts ("missing or unknown FLASH type\n"); 1115 return; 1116 } 1117 1118 printf ("%s FLASH (%d x %d)", 1119 info->name, 1120 (info->portwidth << 3), (info->chipwidth << 3)); 1121 if (info->size < 1024*1024) 1122 printf (" Size: %ld kB in %d Sectors\n", 1123 info->size >> 10, info->sector_count); 1124 else 1125 printf (" Size: %ld MB in %d Sectors\n", 1126 info->size >> 20, info->sector_count); 1127 printf (" "); 1128 switch (info->vendor) { 1129 case CFI_CMDSET_INTEL_PROG_REGIONS: 1130 printf ("Intel Prog Regions"); 1131 break; 1132 case CFI_CMDSET_INTEL_STANDARD: 1133 printf ("Intel Standard"); 1134 break; 1135 case CFI_CMDSET_INTEL_EXTENDED: 1136 printf ("Intel Extended"); 1137 break; 1138 case CFI_CMDSET_AMD_STANDARD: 1139 printf ("AMD Standard"); 1140 break; 1141 case CFI_CMDSET_AMD_EXTENDED: 1142 printf ("AMD Extended"); 1143 break; 1144 #ifdef CONFIG_FLASH_CFI_LEGACY 1145 case CFI_CMDSET_AMD_LEGACY: 1146 printf ("AMD Legacy"); 1147 break; 1148 #endif 1149 default: 1150 printf ("Unknown (%d)", info->vendor); 1151 break; 1152 } 1153 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X", 1154 info->manufacturer_id, info->device_id); 1155 if (info->device_id == 0x7E) { 1156 printf("%04X", info->device_id2); 1157 } 1158 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", 1159 info->erase_blk_tout, 1160 info->write_tout); 1161 if (info->buffer_size > 1) { 1162 printf (" Buffer write timeout: %ld ms, " 1163 "buffer size: %d bytes\n", 1164 info->buffer_write_tout, 1165 info->buffer_size); 1166 } 1167 1168 puts ("\n Sector Start Addresses:"); 1169 for (i = 0; i < info->sector_count; ++i) { 1170 if ((i % 5) == 0) 1171 printf ("\n"); 1172 #ifdef CFG_FLASH_EMPTY_INFO 1173 int k; 1174 int size; 1175 int erased; 1176 volatile unsigned long *flash; 1177 1178 /* 1179 * Check if whole sector is erased 1180 */ 1181 size = flash_sector_size(info, i); 1182 erased = 1; 1183 flash = (volatile unsigned long *) info->start[i]; 1184 size = size >> 2; /* divide by 4 for longword access */ 1185 for (k = 0; k < size; k++) { 1186 if (*flash++ != 0xffffffff) { 1187 erased = 0; 1188 break; 1189 } 1190 } 1191 1192 /* print empty and read-only info */ 1193 printf (" %08lX %c %s ", 1194 info->start[i], 1195 erased ? 'E' : ' ', 1196 info->protect[i] ? "RO" : " "); 1197 #else /* ! CFG_FLASH_EMPTY_INFO */ 1198 printf (" %08lX %s ", 1199 info->start[i], 1200 info->protect[i] ? "RO" : " "); 1201 #endif 1202 } 1203 putc ('\n'); 1204 return; 1205 } 1206 1207 /*----------------------------------------------------------------------- 1208 * This is used in a few places in write_buf() to show programming 1209 * progress. Making it a function is nasty because it needs to do side 1210 * effect updates to digit and dots. Repeated code is nasty too, so 1211 * we define it once here. 1212 */ 1213 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1214 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \ 1215 dots -= dots_sub; \ 1216 if ((scale > 0) && (dots <= 0)) { \ 1217 if ((digit % 5) == 0) \ 1218 printf ("%d", digit / 5); \ 1219 else \ 1220 putc ('.'); \ 1221 digit--; \ 1222 dots += scale; \ 1223 } 1224 #else 1225 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) 1226 #endif 1227 1228 /*----------------------------------------------------------------------- 1229 * Copy memory to flash, returns: 1230 * 0 - OK 1231 * 1 - write timeout 1232 * 2 - Flash not erased 1233 */ 1234 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) 1235 { 1236 ulong wp; 1237 uchar *p; 1238 int aln; 1239 cfiword_t cword; 1240 int i, rc; 1241 #ifdef CFG_FLASH_USE_BUFFER_WRITE 1242 int buffered_size; 1243 #endif 1244 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1245 int digit = CONFIG_FLASH_SHOW_PROGRESS; 1246 int scale = 0; 1247 int dots = 0; 1248 1249 /* 1250 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes. 1251 */ 1252 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) { 1253 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) / 1254 CONFIG_FLASH_SHOW_PROGRESS); 1255 } 1256 #endif 1257 1258 /* get lower aligned address */ 1259 wp = (addr & ~(info->portwidth - 1)); 1260 1261 /* handle unaligned start */ 1262 if ((aln = addr - wp) != 0) { 1263 cword.l = 0; 1264 p = map_physmem(wp, info->portwidth, MAP_NOCACHE); 1265 for (i = 0; i < aln; ++i) 1266 flash_add_byte (info, &cword, flash_read8(p + i)); 1267 1268 for (; (i < info->portwidth) && (cnt > 0); i++) { 1269 flash_add_byte (info, &cword, *src++); 1270 cnt--; 1271 } 1272 for (; (cnt == 0) && (i < info->portwidth); ++i) 1273 flash_add_byte (info, &cword, flash_read8(p + i)); 1274 1275 rc = flash_write_cfiword (info, wp, cword); 1276 unmap_physmem(p, info->portwidth); 1277 if (rc != 0) 1278 return rc; 1279 1280 wp += i; 1281 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1282 } 1283 1284 /* handle the aligned part */ 1285 #ifdef CFG_FLASH_USE_BUFFER_WRITE 1286 buffered_size = (info->portwidth / info->chipwidth); 1287 buffered_size *= info->buffer_size; 1288 while (cnt >= info->portwidth) { 1289 /* prohibit buffer write when buffer_size is 1 */ 1290 if (info->buffer_size == 1) { 1291 cword.l = 0; 1292 for (i = 0; i < info->portwidth; i++) 1293 flash_add_byte (info, &cword, *src++); 1294 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1295 return rc; 1296 wp += info->portwidth; 1297 cnt -= info->portwidth; 1298 continue; 1299 } 1300 1301 /* write buffer until next buffered_size aligned boundary */ 1302 i = buffered_size - (wp % buffered_size); 1303 if (i > cnt) 1304 i = cnt; 1305 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) 1306 return rc; 1307 i -= i & (info->portwidth - 1); 1308 wp += i; 1309 src += i; 1310 cnt -= i; 1311 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1312 } 1313 #else 1314 while (cnt >= info->portwidth) { 1315 cword.l = 0; 1316 for (i = 0; i < info->portwidth; i++) { 1317 flash_add_byte (info, &cword, *src++); 1318 } 1319 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1320 return rc; 1321 wp += info->portwidth; 1322 cnt -= info->portwidth; 1323 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth); 1324 } 1325 #endif /* CFG_FLASH_USE_BUFFER_WRITE */ 1326 1327 if (cnt == 0) { 1328 return (0); 1329 } 1330 1331 /* 1332 * handle unaligned tail bytes 1333 */ 1334 cword.l = 0; 1335 p = map_physmem(wp, info->portwidth, MAP_NOCACHE); 1336 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) { 1337 flash_add_byte (info, &cword, *src++); 1338 --cnt; 1339 } 1340 for (; i < info->portwidth; ++i) 1341 flash_add_byte (info, &cword, flash_read8(p + i)); 1342 unmap_physmem(p, info->portwidth); 1343 1344 return flash_write_cfiword (info, wp, cword); 1345 } 1346 1347 /*----------------------------------------------------------------------- 1348 */ 1349 #ifdef CFG_FLASH_PROTECTION 1350 1351 int flash_real_protect (flash_info_t * info, long sector, int prot) 1352 { 1353 int retcode = 0; 1354 1355 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 1356 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1357 if (prot) 1358 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); 1359 else 1360 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); 1361 1362 if ((retcode = 1363 flash_full_status_check (info, sector, info->erase_blk_tout, 1364 prot ? "protect" : "unprotect")) == 0) { 1365 1366 info->protect[sector] = prot; 1367 1368 /* 1369 * On some of Intel's flash chips (marked via legacy_unlock) 1370 * unprotect unprotects all locking. 1371 */ 1372 if ((prot == 0) && (info->legacy_unlock)) { 1373 flash_sect_t i; 1374 1375 for (i = 0; i < info->sector_count; i++) { 1376 if (info->protect[i]) 1377 flash_real_protect (info, i, 1); 1378 } 1379 } 1380 } 1381 return retcode; 1382 } 1383 1384 /*----------------------------------------------------------------------- 1385 * flash_read_user_serial - read the OneTimeProgramming cells 1386 */ 1387 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, 1388 int len) 1389 { 1390 uchar *src; 1391 uchar *dst; 1392 1393 dst = buffer; 1394 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION); 1395 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1396 memcpy (dst, src + offset, len); 1397 flash_write_cmd (info, 0, 0, info->cmd_reset); 1398 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src); 1399 } 1400 1401 /* 1402 * flash_read_factory_serial - read the device Id from the protection area 1403 */ 1404 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, 1405 int len) 1406 { 1407 uchar *src; 1408 1409 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION); 1410 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1411 memcpy (buffer, src + offset, len); 1412 flash_write_cmd (info, 0, 0, info->cmd_reset); 1413 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); 1414 } 1415 1416 #endif /* CFG_FLASH_PROTECTION */ 1417 1418 /*----------------------------------------------------------------------- 1419 * Reverse the order of the erase regions in the CFI QRY structure. 1420 * This is needed for chips that are either a) correctly detected as 1421 * top-boot, or b) buggy. 1422 */ 1423 static void cfi_reverse_geometry(struct cfi_qry *qry) 1424 { 1425 unsigned int i, j; 1426 u32 tmp; 1427 1428 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) { 1429 tmp = qry->erase_region_info[i]; 1430 qry->erase_region_info[i] = qry->erase_region_info[j]; 1431 qry->erase_region_info[j] = tmp; 1432 } 1433 } 1434 1435 /*----------------------------------------------------------------------- 1436 * read jedec ids from device and set corresponding fields in info struct 1437 * 1438 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct 1439 * 1440 */ 1441 static void cmdset_intel_read_jedec_ids(flash_info_t *info) 1442 { 1443 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1444 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); 1445 udelay(1000); /* some flash are slow to respond */ 1446 info->manufacturer_id = flash_read_uchar (info, 1447 FLASH_OFFSET_MANUFACTURER_ID); 1448 info->device_id = flash_read_uchar (info, 1449 FLASH_OFFSET_DEVICE_ID); 1450 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1451 } 1452 1453 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) 1454 { 1455 info->cmd_reset = FLASH_CMD_RESET; 1456 1457 cmdset_intel_read_jedec_ids(info); 1458 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1459 1460 #ifdef CFG_FLASH_PROTECTION 1461 /* read legacy lock/unlock bit from intel flash */ 1462 if (info->ext_addr) { 1463 info->legacy_unlock = flash_read_uchar (info, 1464 info->ext_addr + 5) & 0x08; 1465 } 1466 #endif 1467 1468 return 0; 1469 } 1470 1471 static void cmdset_amd_read_jedec_ids(flash_info_t *info) 1472 { 1473 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1474 flash_unlock_seq(info, 0); 1475 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); 1476 udelay(1000); /* some flash are slow to respond */ 1477 1478 info->manufacturer_id = flash_read_uchar (info, 1479 FLASH_OFFSET_MANUFACTURER_ID); 1480 1481 switch (info->chipwidth){ 1482 case FLASH_CFI_8BIT: 1483 info->device_id = flash_read_uchar (info, 1484 FLASH_OFFSET_DEVICE_ID); 1485 if (info->device_id == 0x7E) { 1486 /* AMD 3-byte (expanded) device ids */ 1487 info->device_id2 = flash_read_uchar (info, 1488 FLASH_OFFSET_DEVICE_ID2); 1489 info->device_id2 <<= 8; 1490 info->device_id2 |= flash_read_uchar (info, 1491 FLASH_OFFSET_DEVICE_ID3); 1492 } 1493 break; 1494 case FLASH_CFI_16BIT: 1495 info->device_id = flash_read_word (info, 1496 FLASH_OFFSET_DEVICE_ID); 1497 break; 1498 default: 1499 break; 1500 } 1501 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1502 } 1503 1504 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) 1505 { 1506 info->cmd_reset = AMD_CMD_RESET; 1507 1508 cmdset_amd_read_jedec_ids(info); 1509 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1510 1511 return 0; 1512 } 1513 1514 #ifdef CONFIG_FLASH_CFI_LEGACY 1515 static void flash_read_jedec_ids (flash_info_t * info) 1516 { 1517 info->manufacturer_id = 0; 1518 info->device_id = 0; 1519 info->device_id2 = 0; 1520 1521 switch (info->vendor) { 1522 case CFI_CMDSET_INTEL_PROG_REGIONS: 1523 case CFI_CMDSET_INTEL_STANDARD: 1524 case CFI_CMDSET_INTEL_EXTENDED: 1525 cmdset_intel_read_jedec_ids(info); 1526 break; 1527 case CFI_CMDSET_AMD_STANDARD: 1528 case CFI_CMDSET_AMD_EXTENDED: 1529 cmdset_amd_read_jedec_ids(info); 1530 break; 1531 default: 1532 break; 1533 } 1534 } 1535 1536 /*----------------------------------------------------------------------- 1537 * Call board code to request info about non-CFI flash. 1538 * board_flash_get_legacy needs to fill in at least: 1539 * info->portwidth, info->chipwidth and info->interface for Jedec probing. 1540 */ 1541 static int flash_detect_legacy(ulong base, int banknum) 1542 { 1543 flash_info_t *info = &flash_info[banknum]; 1544 1545 if (board_flash_get_legacy(base, banknum, info)) { 1546 /* board code may have filled info completely. If not, we 1547 use JEDEC ID probing. */ 1548 if (!info->vendor) { 1549 int modes[] = { 1550 CFI_CMDSET_AMD_STANDARD, 1551 CFI_CMDSET_INTEL_STANDARD 1552 }; 1553 int i; 1554 1555 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) { 1556 info->vendor = modes[i]; 1557 info->start[0] = base; 1558 if (info->portwidth == FLASH_CFI_8BIT 1559 && info->interface == FLASH_CFI_X8X16) { 1560 info->addr_unlock1 = 0x2AAA; 1561 info->addr_unlock2 = 0x5555; 1562 } else { 1563 info->addr_unlock1 = 0x5555; 1564 info->addr_unlock2 = 0x2AAA; 1565 } 1566 flash_read_jedec_ids(info); 1567 debug("JEDEC PROBE: ID %x %x %x\n", 1568 info->manufacturer_id, 1569 info->device_id, 1570 info->device_id2); 1571 if (jedec_flash_match(info, base)) 1572 break; 1573 } 1574 } 1575 1576 switch(info->vendor) { 1577 case CFI_CMDSET_INTEL_PROG_REGIONS: 1578 case CFI_CMDSET_INTEL_STANDARD: 1579 case CFI_CMDSET_INTEL_EXTENDED: 1580 info->cmd_reset = FLASH_CMD_RESET; 1581 break; 1582 case CFI_CMDSET_AMD_STANDARD: 1583 case CFI_CMDSET_AMD_EXTENDED: 1584 case CFI_CMDSET_AMD_LEGACY: 1585 info->cmd_reset = AMD_CMD_RESET; 1586 break; 1587 } 1588 info->flash_id = FLASH_MAN_CFI; 1589 return 1; 1590 } 1591 return 0; /* use CFI */ 1592 } 1593 #else 1594 static inline int flash_detect_legacy(ulong base, int banknum) 1595 { 1596 return 0; /* use CFI */ 1597 } 1598 #endif 1599 1600 /*----------------------------------------------------------------------- 1601 * detect if flash is compatible with the Common Flash Interface (CFI) 1602 * http://www.jedec.org/download/search/jesd68.pdf 1603 */ 1604 static void flash_read_cfi (flash_info_t *info, void *buf, 1605 unsigned int start, size_t len) 1606 { 1607 u8 *p = buf; 1608 unsigned int i; 1609 1610 for (i = 0; i < len; i++) 1611 p[i] = flash_read_uchar(info, start + i); 1612 } 1613 1614 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1615 { 1616 int cfi_offset; 1617 1618 /* We do not yet know what kind of commandset to use, so we issue 1619 the reset command in both Intel and AMD variants, in the hope 1620 that AMD flash roms ignore the Intel command. */ 1621 flash_write_cmd (info, 0, 0, AMD_CMD_RESET); 1622 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET); 1623 1624 for (cfi_offset=0; 1625 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); 1626 cfi_offset++) { 1627 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], 1628 FLASH_CMD_CFI); 1629 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') 1630 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') 1631 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { 1632 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, 1633 sizeof(struct cfi_qry)); 1634 info->interface = le16_to_cpu(qry->interface_desc); 1635 1636 info->cfi_offset = flash_offset_cfi[cfi_offset]; 1637 debug ("device interface is %d\n", 1638 info->interface); 1639 debug ("found port %d chip %d ", 1640 info->portwidth, info->chipwidth); 1641 debug ("port %d bits chip %d bits\n", 1642 info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1643 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1644 1645 /* calculate command offsets as in the Linux driver */ 1646 info->addr_unlock1 = 0x555; 1647 info->addr_unlock2 = 0x2aa; 1648 1649 /* 1650 * modify the unlock address if we are 1651 * in compatibility mode 1652 */ 1653 if ( /* x8/x16 in x8 mode */ 1654 ((info->chipwidth == FLASH_CFI_BY8) && 1655 (info->interface == FLASH_CFI_X8X16)) || 1656 /* x16/x32 in x16 mode */ 1657 ((info->chipwidth == FLASH_CFI_BY16) && 1658 (info->interface == FLASH_CFI_X16X32))) 1659 { 1660 info->addr_unlock1 = 0xaaa; 1661 info->addr_unlock2 = 0x555; 1662 } 1663 1664 info->name = "CFI conformant"; 1665 return 1; 1666 } 1667 } 1668 1669 return 0; 1670 } 1671 1672 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1673 { 1674 debug ("flash detect cfi\n"); 1675 1676 for (info->portwidth = CFG_FLASH_CFI_WIDTH; 1677 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { 1678 for (info->chipwidth = FLASH_CFI_BY8; 1679 info->chipwidth <= info->portwidth; 1680 info->chipwidth <<= 1) 1681 if (__flash_detect_cfi(info, qry)) 1682 return 1; 1683 } 1684 debug ("not found\n"); 1685 return 0; 1686 } 1687 1688 /* 1689 * Manufacturer-specific quirks. Add workarounds for geometry 1690 * reversal, etc. here. 1691 */ 1692 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry) 1693 { 1694 /* check if flash geometry needs reversal */ 1695 if (qry->num_erase_regions > 1) { 1696 /* reverse geometry if top boot part */ 1697 if (info->cfi_version < 0x3131) { 1698 /* CFI < 1.1, try to guess from device id */ 1699 if ((info->device_id & 0x80) != 0) 1700 cfi_reverse_geometry(qry); 1701 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { 1702 /* CFI >= 1.1, deduct from top/bottom flag */ 1703 /* note: ext_addr is valid since cfi_version > 0 */ 1704 cfi_reverse_geometry(qry); 1705 } 1706 } 1707 } 1708 1709 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry) 1710 { 1711 int reverse_geometry = 0; 1712 1713 /* Check the "top boot" bit in the PRI */ 1714 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1)) 1715 reverse_geometry = 1; 1716 1717 /* AT49BV6416(T) list the erase regions in the wrong order. 1718 * However, the device ID is identical with the non-broken 1719 * AT49BV642D since u-boot only reads the low byte (they 1720 * differ in the high byte.) So leave out this fixup for now. 1721 */ 1722 #if 0 1723 if (info->device_id == 0xd6 || info->device_id == 0xd2) 1724 reverse_geometry = !reverse_geometry; 1725 #endif 1726 1727 if (reverse_geometry) 1728 cfi_reverse_geometry(qry); 1729 } 1730 1731 /* 1732 * The following code cannot be run from FLASH! 1733 * 1734 */ 1735 ulong flash_get_size (ulong base, int banknum) 1736 { 1737 flash_info_t *info = &flash_info[banknum]; 1738 int i, j; 1739 flash_sect_t sect_cnt; 1740 unsigned long sector; 1741 unsigned long tmp; 1742 int size_ratio; 1743 uchar num_erase_regions; 1744 int erase_region_size; 1745 int erase_region_count; 1746 struct cfi_qry qry; 1747 1748 memset(&qry, 0, sizeof(qry)); 1749 1750 info->ext_addr = 0; 1751 info->cfi_version = 0; 1752 #ifdef CFG_FLASH_PROTECTION 1753 info->legacy_unlock = 0; 1754 #endif 1755 1756 info->start[0] = base; 1757 1758 if (flash_detect_cfi (info, &qry)) { 1759 info->vendor = le16_to_cpu(qry.p_id); 1760 info->ext_addr = le16_to_cpu(qry.p_adr); 1761 num_erase_regions = qry.num_erase_regions; 1762 1763 if (info->ext_addr) { 1764 info->cfi_version = (ushort) flash_read_uchar (info, 1765 info->ext_addr + 3) << 8; 1766 info->cfi_version |= (ushort) flash_read_uchar (info, 1767 info->ext_addr + 4); 1768 } 1769 1770 #ifdef DEBUG 1771 flash_printqry (&qry); 1772 #endif 1773 1774 switch (info->vendor) { 1775 case CFI_CMDSET_INTEL_PROG_REGIONS: 1776 case CFI_CMDSET_INTEL_STANDARD: 1777 case CFI_CMDSET_INTEL_EXTENDED: 1778 cmdset_intel_init(info, &qry); 1779 break; 1780 case CFI_CMDSET_AMD_STANDARD: 1781 case CFI_CMDSET_AMD_EXTENDED: 1782 cmdset_amd_init(info, &qry); 1783 break; 1784 default: 1785 printf("CFI: Unknown command set 0x%x\n", 1786 info->vendor); 1787 /* 1788 * Unfortunately, this means we don't know how 1789 * to get the chip back to Read mode. Might 1790 * as well try an Intel-style reset... 1791 */ 1792 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1793 return 0; 1794 } 1795 1796 /* Do manufacturer-specific fixups */ 1797 switch (info->manufacturer_id) { 1798 case 0x0001: 1799 flash_fixup_amd(info, &qry); 1800 break; 1801 case 0x001f: 1802 flash_fixup_atmel(info, &qry); 1803 break; 1804 } 1805 1806 debug ("manufacturer is %d\n", info->vendor); 1807 debug ("manufacturer id is 0x%x\n", info->manufacturer_id); 1808 debug ("device id is 0x%x\n", info->device_id); 1809 debug ("device id2 is 0x%x\n", info->device_id2); 1810 debug ("cfi version is 0x%04x\n", info->cfi_version); 1811 1812 size_ratio = info->portwidth / info->chipwidth; 1813 /* if the chip is x8/x16 reduce the ratio by half */ 1814 if ((info->interface == FLASH_CFI_X8X16) 1815 && (info->chipwidth == FLASH_CFI_BY8)) { 1816 size_ratio >>= 1; 1817 } 1818 debug ("size_ratio %d port %d bits chip %d bits\n", 1819 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1820 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1821 debug ("found %d erase regions\n", num_erase_regions); 1822 sect_cnt = 0; 1823 sector = base; 1824 for (i = 0; i < num_erase_regions; i++) { 1825 if (i > NUM_ERASE_REGIONS) { 1826 printf ("%d erase regions found, only %d used\n", 1827 num_erase_regions, NUM_ERASE_REGIONS); 1828 break; 1829 } 1830 1831 tmp = le32_to_cpu(qry.erase_region_info[i]); 1832 debug("erase region %u: 0x%08lx\n", i, tmp); 1833 1834 erase_region_count = (tmp & 0xffff) + 1; 1835 tmp >>= 16; 1836 erase_region_size = 1837 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; 1838 debug ("erase_region_count = %d erase_region_size = %d\n", 1839 erase_region_count, erase_region_size); 1840 for (j = 0; j < erase_region_count; j++) { 1841 if (sect_cnt >= CFG_MAX_FLASH_SECT) { 1842 printf("ERROR: too many flash sectors\n"); 1843 break; 1844 } 1845 info->start[sect_cnt] = sector; 1846 sector += (erase_region_size * size_ratio); 1847 1848 /* 1849 * Only read protection status from 1850 * supported devices (intel...) 1851 */ 1852 switch (info->vendor) { 1853 case CFI_CMDSET_INTEL_PROG_REGIONS: 1854 case CFI_CMDSET_INTEL_EXTENDED: 1855 case CFI_CMDSET_INTEL_STANDARD: 1856 info->protect[sect_cnt] = 1857 flash_isset (info, sect_cnt, 1858 FLASH_OFFSET_PROTECT, 1859 FLASH_STATUS_PROTECT); 1860 break; 1861 default: 1862 /* default: not protected */ 1863 info->protect[sect_cnt] = 0; 1864 } 1865 1866 sect_cnt++; 1867 } 1868 } 1869 1870 info->sector_count = sect_cnt; 1871 info->size = 1 << qry.dev_size; 1872 /* multiply the size by the number of chips */ 1873 info->size *= size_ratio; 1874 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size); 1875 tmp = 1 << qry.block_erase_timeout_typ; 1876 info->erase_blk_tout = tmp * 1877 (1 << qry.block_erase_timeout_max); 1878 tmp = (1 << qry.buf_write_timeout_typ) * 1879 (1 << qry.buf_write_timeout_max); 1880 1881 /* round up when converting to ms */ 1882 info->buffer_write_tout = (tmp + 999) / 1000; 1883 tmp = (1 << qry.word_write_timeout_typ) * 1884 (1 << qry.word_write_timeout_max); 1885 /* round up when converting to ms */ 1886 info->write_tout = (tmp + 999) / 1000; 1887 info->flash_id = FLASH_MAN_CFI; 1888 if ((info->interface == FLASH_CFI_X8X16) && 1889 (info->chipwidth == FLASH_CFI_BY8)) { 1890 /* XXX - Need to test on x8/x16 in parallel. */ 1891 info->portwidth >>= 1; 1892 } 1893 } 1894 1895 flash_write_cmd (info, 0, 0, info->cmd_reset); 1896 return (info->size); 1897 } 1898 1899 /*----------------------------------------------------------------------- 1900 */ 1901 unsigned long flash_init (void) 1902 { 1903 unsigned long size = 0; 1904 int i; 1905 #if defined(CFG_FLASH_AUTOPROTECT_LIST) 1906 struct apl_s { 1907 ulong start; 1908 ulong size; 1909 } apl[] = CFG_FLASH_AUTOPROTECT_LIST; 1910 #endif 1911 1912 #ifdef CFG_FLASH_PROTECTION 1913 char *s = getenv("unlock"); 1914 #endif 1915 1916 /* Init: no FLASHes known */ 1917 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { 1918 flash_info[i].flash_id = FLASH_UNKNOWN; 1919 1920 if (!flash_detect_legacy (bank_base[i], i)) 1921 flash_get_size (bank_base[i], i); 1922 size += flash_info[i].size; 1923 if (flash_info[i].flash_id == FLASH_UNKNOWN) { 1924 #ifndef CFG_FLASH_QUIET_TEST 1925 printf ("## Unknown FLASH on Bank %d " 1926 "- Size = 0x%08lx = %ld MB\n", 1927 i+1, flash_info[i].size, 1928 flash_info[i].size << 20); 1929 #endif /* CFG_FLASH_QUIET_TEST */ 1930 } 1931 #ifdef CFG_FLASH_PROTECTION 1932 else if ((s != NULL) && (strcmp(s, "yes") == 0)) { 1933 /* 1934 * Only the U-Boot image and it's environment 1935 * is protected, all other sectors are 1936 * unprotected (unlocked) if flash hardware 1937 * protection is used (CFG_FLASH_PROTECTION) 1938 * and the environment variable "unlock" is 1939 * set to "yes". 1940 */ 1941 if (flash_info[i].legacy_unlock) { 1942 int k; 1943 1944 /* 1945 * Disable legacy_unlock temporarily, 1946 * since flash_real_protect would 1947 * relock all other sectors again 1948 * otherwise. 1949 */ 1950 flash_info[i].legacy_unlock = 0; 1951 1952 /* 1953 * Legacy unlocking (e.g. Intel J3) -> 1954 * unlock only one sector. This will 1955 * unlock all sectors. 1956 */ 1957 flash_real_protect (&flash_info[i], 0, 0); 1958 1959 flash_info[i].legacy_unlock = 1; 1960 1961 /* 1962 * Manually mark other sectors as 1963 * unlocked (unprotected) 1964 */ 1965 for (k = 1; k < flash_info[i].sector_count; k++) 1966 flash_info[i].protect[k] = 0; 1967 } else { 1968 /* 1969 * No legancy unlocking -> unlock all sectors 1970 */ 1971 flash_protect (FLAG_PROTECT_CLEAR, 1972 flash_info[i].start[0], 1973 flash_info[i].start[0] 1974 + flash_info[i].size - 1, 1975 &flash_info[i]); 1976 } 1977 } 1978 #endif /* CFG_FLASH_PROTECTION */ 1979 } 1980 1981 /* Monitor protection ON by default */ 1982 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE) 1983 flash_protect (FLAG_PROTECT_SET, 1984 CFG_MONITOR_BASE, 1985 CFG_MONITOR_BASE + monitor_flash_len - 1, 1986 flash_get_info(CFG_MONITOR_BASE)); 1987 #endif 1988 1989 /* Environment protection ON by default */ 1990 #ifdef CFG_ENV_IS_IN_FLASH 1991 flash_protect (FLAG_PROTECT_SET, 1992 CFG_ENV_ADDR, 1993 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1, 1994 flash_get_info(CFG_ENV_ADDR)); 1995 #endif 1996 1997 /* Redundant environment protection ON by default */ 1998 #ifdef CFG_ENV_ADDR_REDUND 1999 flash_protect (FLAG_PROTECT_SET, 2000 CFG_ENV_ADDR_REDUND, 2001 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1, 2002 flash_get_info(CFG_ENV_ADDR_REDUND)); 2003 #endif 2004 2005 #if defined(CFG_FLASH_AUTOPROTECT_LIST) 2006 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) { 2007 debug("autoprotecting from %08x to %08x\n", 2008 apl[i].start, apl[i].start + apl[i].size - 1); 2009 flash_protect (FLAG_PROTECT_SET, 2010 apl[i].start, 2011 apl[i].start + apl[i].size - 1, 2012 flash_get_info(apl[i].start)); 2013 } 2014 #endif 2015 return (size); 2016 } 2017 2018 #endif /* CFG_FLASH_CFI */ 2019