1 /* 2 * (C) Copyright 2002-2004 3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com 4 * 5 * Copyright (C) 2003 Arabella Software Ltd. 6 * Yuli Barcohen <yuli@arabellasw.com> 7 * 8 * Copyright (C) 2004 9 * Ed Okerson 10 * 11 * Copyright (C) 2006 12 * Tolunay Orkun <listmember@orkun.us> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 * 32 */ 33 34 /* The DEBUG define must be before common to enable debugging */ 35 /* #define DEBUG */ 36 37 #include <common.h> 38 #include <asm/processor.h> 39 #include <asm/io.h> 40 #include <asm/byteorder.h> 41 #include <environment.h> 42 43 /* 44 * This file implements a Common Flash Interface (CFI) driver for 45 * U-Boot. 46 * 47 * The width of the port and the width of the chips are determined at 48 * initialization. These widths are used to calculate the address for 49 * access CFI data structures. 50 * 51 * References 52 * JEDEC Standard JESD68 - Common Flash Interface (CFI) 53 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes 54 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets 55 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet 56 * AMD CFI Specification, Release 2.0 December 1, 2001 57 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte 58 * Device IDs, Publication Number 25538 Revision A, November 8, 2001 59 * 60 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between 61 * reading and writing ... (yes there is such a Hardware). 62 */ 63 64 #ifndef CONFIG_SYS_FLASH_BANKS_LIST 65 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 66 #endif 67 68 #define FLASH_CMD_CFI 0x98 69 #define FLASH_CMD_READ_ID 0x90 70 #define FLASH_CMD_RESET 0xff 71 #define FLASH_CMD_BLOCK_ERASE 0x20 72 #define FLASH_CMD_ERASE_CONFIRM 0xD0 73 #define FLASH_CMD_WRITE 0x40 74 #define FLASH_CMD_PROTECT 0x60 75 #define FLASH_CMD_PROTECT_SET 0x01 76 #define FLASH_CMD_PROTECT_CLEAR 0xD0 77 #define FLASH_CMD_CLEAR_STATUS 0x50 78 #define FLASH_CMD_READ_STATUS 0x70 79 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8 80 #define FLASH_CMD_WRITE_BUFFER_PROG 0xE9 81 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0 82 83 #define FLASH_STATUS_DONE 0x80 84 #define FLASH_STATUS_ESS 0x40 85 #define FLASH_STATUS_ECLBS 0x20 86 #define FLASH_STATUS_PSLBS 0x10 87 #define FLASH_STATUS_VPENS 0x08 88 #define FLASH_STATUS_PSS 0x04 89 #define FLASH_STATUS_DPS 0x02 90 #define FLASH_STATUS_R 0x01 91 #define FLASH_STATUS_PROTECT 0x01 92 93 #define AMD_CMD_RESET 0xF0 94 #define AMD_CMD_WRITE 0xA0 95 #define AMD_CMD_ERASE_START 0x80 96 #define AMD_CMD_ERASE_SECTOR 0x30 97 #define AMD_CMD_UNLOCK_START 0xAA 98 #define AMD_CMD_UNLOCK_ACK 0x55 99 #define AMD_CMD_WRITE_TO_BUFFER 0x25 100 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29 101 102 #define AMD_STATUS_TOGGLE 0x40 103 #define AMD_STATUS_ERROR 0x20 104 105 #define ATM_CMD_UNLOCK_SECT 0x70 106 #define ATM_CMD_SOFTLOCK_START 0x80 107 #define ATM_CMD_LOCK_SECT 0x40 108 109 #define FLASH_CONTINUATION_CODE 0x7F 110 111 #define FLASH_OFFSET_MANUFACTURER_ID 0x00 112 #define FLASH_OFFSET_DEVICE_ID 0x01 113 #define FLASH_OFFSET_DEVICE_ID2 0x0E 114 #define FLASH_OFFSET_DEVICE_ID3 0x0F 115 #define FLASH_OFFSET_CFI 0x55 116 #define FLASH_OFFSET_CFI_ALT 0x555 117 #define FLASH_OFFSET_CFI_RESP 0x10 118 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13 119 /* extended query table primary address */ 120 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 121 #define FLASH_OFFSET_WTOUT 0x1F 122 #define FLASH_OFFSET_WBTOUT 0x20 123 #define FLASH_OFFSET_ETOUT 0x21 124 #define FLASH_OFFSET_CETOUT 0x22 125 #define FLASH_OFFSET_WMAX_TOUT 0x23 126 #define FLASH_OFFSET_WBMAX_TOUT 0x24 127 #define FLASH_OFFSET_EMAX_TOUT 0x25 128 #define FLASH_OFFSET_CEMAX_TOUT 0x26 129 #define FLASH_OFFSET_SIZE 0x27 130 #define FLASH_OFFSET_INTERFACE 0x28 131 #define FLASH_OFFSET_BUFFER_SIZE 0x2A 132 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C 133 #define FLASH_OFFSET_ERASE_REGIONS 0x2D 134 #define FLASH_OFFSET_PROTECT 0x02 135 #define FLASH_OFFSET_USER_PROTECTION 0x85 136 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 137 138 #define CFI_CMDSET_NONE 0 139 #define CFI_CMDSET_INTEL_EXTENDED 1 140 #define CFI_CMDSET_AMD_STANDARD 2 141 #define CFI_CMDSET_INTEL_STANDARD 3 142 #define CFI_CMDSET_AMD_EXTENDED 4 143 #define CFI_CMDSET_MITSU_STANDARD 256 144 #define CFI_CMDSET_MITSU_EXTENDED 257 145 #define CFI_CMDSET_SST 258 146 #define CFI_CMDSET_INTEL_PROG_REGIONS 512 147 148 #ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */ 149 # undef FLASH_CMD_RESET 150 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */ 151 #endif 152 153 typedef union { 154 unsigned char c; 155 unsigned short w; 156 unsigned long l; 157 unsigned long long ll; 158 } cfiword_t; 159 160 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */ 161 162 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; 163 static uint flash_verbose = 1; 164 165 /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */ 166 #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT 167 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT 168 #else 169 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS 170 #endif 171 172 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ 173 174 /* 175 * Check if chip width is defined. If not, start detecting with 8bit. 176 */ 177 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH 178 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT 179 #endif 180 181 /* CFI standard query structure */ 182 struct cfi_qry { 183 u8 qry[3]; 184 u16 p_id; 185 u16 p_adr; 186 u16 a_id; 187 u16 a_adr; 188 u8 vcc_min; 189 u8 vcc_max; 190 u8 vpp_min; 191 u8 vpp_max; 192 u8 word_write_timeout_typ; 193 u8 buf_write_timeout_typ; 194 u8 block_erase_timeout_typ; 195 u8 chip_erase_timeout_typ; 196 u8 word_write_timeout_max; 197 u8 buf_write_timeout_max; 198 u8 block_erase_timeout_max; 199 u8 chip_erase_timeout_max; 200 u8 dev_size; 201 u16 interface_desc; 202 u16 max_buf_write_size; 203 u8 num_erase_regions; 204 u32 erase_region_info[NUM_ERASE_REGIONS]; 205 } __attribute__((packed)); 206 207 struct cfi_pri_hdr { 208 u8 pri[3]; 209 u8 major_version; 210 u8 minor_version; 211 } __attribute__((packed)); 212 213 static void __flash_write8(u8 value, void *addr) 214 { 215 __raw_writeb(value, addr); 216 } 217 218 static void __flash_write16(u16 value, void *addr) 219 { 220 __raw_writew(value, addr); 221 } 222 223 static void __flash_write32(u32 value, void *addr) 224 { 225 __raw_writel(value, addr); 226 } 227 228 static void __flash_write64(u64 value, void *addr) 229 { 230 /* No architectures currently implement __raw_writeq() */ 231 *(volatile u64 *)addr = value; 232 } 233 234 static u8 __flash_read8(void *addr) 235 { 236 return __raw_readb(addr); 237 } 238 239 static u16 __flash_read16(void *addr) 240 { 241 return __raw_readw(addr); 242 } 243 244 static u32 __flash_read32(void *addr) 245 { 246 return __raw_readl(addr); 247 } 248 249 static u64 __flash_read64(void *addr) 250 { 251 /* No architectures currently implement __raw_readq() */ 252 return *(volatile u64 *)addr; 253 } 254 255 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 256 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8"))); 257 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16"))); 258 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32"))); 259 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64"))); 260 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8"))); 261 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16"))); 262 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32"))); 263 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); 264 #else 265 #define flash_write8 __flash_write8 266 #define flash_write16 __flash_write16 267 #define flash_write32 __flash_write32 268 #define flash_write64 __flash_write64 269 #define flash_read8 __flash_read8 270 #define flash_read16 __flash_read16 271 #define flash_read32 __flash_read32 272 #define flash_read64 __flash_read64 273 #endif 274 275 /*----------------------------------------------------------------------- 276 */ 277 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 278 flash_info_t *flash_get_info(ulong base) 279 { 280 int i; 281 flash_info_t * info = 0; 282 283 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { 284 info = & flash_info[i]; 285 if (info->size && info->start[0] <= base && 286 base <= info->start[0] + info->size - 1) 287 break; 288 } 289 290 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; 291 } 292 #endif 293 294 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) 295 { 296 if (sect != (info->sector_count - 1)) 297 return info->start[sect + 1] - info->start[sect]; 298 else 299 return info->start[0] + info->size - info->start[sect]; 300 } 301 302 /*----------------------------------------------------------------------- 303 * create an address based on the offset and the port width 304 */ 305 static inline void * 306 flash_map (flash_info_t * info, flash_sect_t sect, uint offset) 307 { 308 unsigned int byte_offset = offset * info->portwidth; 309 310 return (void *)(info->start[sect] + byte_offset); 311 } 312 313 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, 314 unsigned int offset, void *addr) 315 { 316 } 317 318 /*----------------------------------------------------------------------- 319 * make a proper sized command based on the port and chip widths 320 */ 321 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) 322 { 323 int i; 324 int cword_offset; 325 int cp_offset; 326 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 327 u32 cmd_le = cpu_to_le32(cmd); 328 #endif 329 uchar val; 330 uchar *cp = (uchar *) cmdbuf; 331 332 for (i = info->portwidth; i > 0; i--){ 333 cword_offset = (info->portwidth-i)%info->chipwidth; 334 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 335 cp_offset = info->portwidth - i; 336 val = *((uchar*)&cmd_le + cword_offset); 337 #else 338 cp_offset = i - 1; 339 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1); 340 #endif 341 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val; 342 } 343 } 344 345 #ifdef DEBUG 346 /*----------------------------------------------------------------------- 347 * Debug support 348 */ 349 static void print_longlong (char *str, unsigned long long data) 350 { 351 int i; 352 char *cp; 353 354 cp = (char *) &data; 355 for (i = 0; i < 8; i++) 356 sprintf (&str[i * 2], "%2.2x", *cp++); 357 } 358 359 static void flash_printqry (struct cfi_qry *qry) 360 { 361 u8 *p = (u8 *)qry; 362 int x, y; 363 364 for (x = 0; x < sizeof(struct cfi_qry); x += 16) { 365 debug("%02x : ", x); 366 for (y = 0; y < 16; y++) 367 debug("%2.2x ", p[x + y]); 368 debug(" "); 369 for (y = 0; y < 16; y++) { 370 unsigned char c = p[x + y]; 371 if (c >= 0x20 && c <= 0x7e) 372 debug("%c", c); 373 else 374 debug("."); 375 } 376 debug("\n"); 377 } 378 } 379 #endif 380 381 382 /*----------------------------------------------------------------------- 383 * read a character at a port width address 384 */ 385 static inline uchar flash_read_uchar (flash_info_t * info, uint offset) 386 { 387 uchar *cp; 388 uchar retval; 389 390 cp = flash_map (info, 0, offset); 391 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 392 retval = flash_read8(cp); 393 #else 394 retval = flash_read8(cp + info->portwidth - 1); 395 #endif 396 flash_unmap (info, 0, offset, cp); 397 return retval; 398 } 399 400 /*----------------------------------------------------------------------- 401 * read a word at a port width address, assume 16bit bus 402 */ 403 static inline ushort flash_read_word (flash_info_t * info, uint offset) 404 { 405 ushort *addr, retval; 406 407 addr = flash_map (info, 0, offset); 408 retval = flash_read16 (addr); 409 flash_unmap (info, 0, offset, addr); 410 return retval; 411 } 412 413 414 /*----------------------------------------------------------------------- 415 * read a long word by picking the least significant byte of each maximum 416 * port size word. Swap for ppc format. 417 */ 418 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, 419 uint offset) 420 { 421 uchar *addr; 422 ulong retval; 423 424 #ifdef DEBUG 425 int x; 426 #endif 427 addr = flash_map (info, sect, offset); 428 429 #ifdef DEBUG 430 debug ("long addr is at %p info->portwidth = %d\n", addr, 431 info->portwidth); 432 for (x = 0; x < 4 * info->portwidth; x++) { 433 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); 434 } 435 #endif 436 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 437 retval = ((flash_read8(addr) << 16) | 438 (flash_read8(addr + info->portwidth) << 24) | 439 (flash_read8(addr + 2 * info->portwidth)) | 440 (flash_read8(addr + 3 * info->portwidth) << 8)); 441 #else 442 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) | 443 (flash_read8(addr + info->portwidth - 1) << 16) | 444 (flash_read8(addr + 4 * info->portwidth - 1) << 8) | 445 (flash_read8(addr + 3 * info->portwidth - 1))); 446 #endif 447 flash_unmap(info, sect, offset, addr); 448 449 return retval; 450 } 451 452 /* 453 * Write a proper sized command to the correct address 454 */ 455 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, 456 uint offset, u32 cmd) 457 { 458 459 void *addr; 460 cfiword_t cword; 461 462 addr = flash_map (info, sect, offset); 463 flash_make_cmd (info, cmd, &cword); 464 switch (info->portwidth) { 465 case FLASH_CFI_8BIT: 466 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, 467 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 468 flash_write8(cword.c, addr); 469 break; 470 case FLASH_CFI_16BIT: 471 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, 472 cmd, cword.w, 473 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 474 flash_write16(cword.w, addr); 475 break; 476 case FLASH_CFI_32BIT: 477 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr, 478 cmd, cword.l, 479 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 480 flash_write32(cword.l, addr); 481 break; 482 case FLASH_CFI_64BIT: 483 #ifdef DEBUG 484 { 485 char str[20]; 486 487 print_longlong (str, cword.ll); 488 489 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", 490 addr, cmd, str, 491 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 492 } 493 #endif 494 flash_write64(cword.ll, addr); 495 break; 496 } 497 498 /* Ensure all the instructions are fully finished */ 499 sync(); 500 501 flash_unmap(info, sect, offset, addr); 502 } 503 504 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) 505 { 506 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START); 507 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK); 508 } 509 510 /*----------------------------------------------------------------------- 511 */ 512 static int flash_isequal (flash_info_t * info, flash_sect_t sect, 513 uint offset, uchar cmd) 514 { 515 void *addr; 516 cfiword_t cword; 517 int retval; 518 519 addr = flash_map (info, sect, offset); 520 flash_make_cmd (info, cmd, &cword); 521 522 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr); 523 switch (info->portwidth) { 524 case FLASH_CFI_8BIT: 525 debug ("is= %x %x\n", flash_read8(addr), cword.c); 526 retval = (flash_read8(addr) == cword.c); 527 break; 528 case FLASH_CFI_16BIT: 529 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w); 530 retval = (flash_read16(addr) == cword.w); 531 break; 532 case FLASH_CFI_32BIT: 533 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l); 534 retval = (flash_read32(addr) == cword.l); 535 break; 536 case FLASH_CFI_64BIT: 537 #ifdef DEBUG 538 { 539 char str1[20]; 540 char str2[20]; 541 542 print_longlong (str1, flash_read64(addr)); 543 print_longlong (str2, cword.ll); 544 debug ("is= %s %s\n", str1, str2); 545 } 546 #endif 547 retval = (flash_read64(addr) == cword.ll); 548 break; 549 default: 550 retval = 0; 551 break; 552 } 553 flash_unmap(info, sect, offset, addr); 554 555 return retval; 556 } 557 558 /*----------------------------------------------------------------------- 559 */ 560 static int flash_isset (flash_info_t * info, flash_sect_t sect, 561 uint offset, uchar cmd) 562 { 563 void *addr; 564 cfiword_t cword; 565 int retval; 566 567 addr = flash_map (info, sect, offset); 568 flash_make_cmd (info, cmd, &cword); 569 switch (info->portwidth) { 570 case FLASH_CFI_8BIT: 571 retval = ((flash_read8(addr) & cword.c) == cword.c); 572 break; 573 case FLASH_CFI_16BIT: 574 retval = ((flash_read16(addr) & cword.w) == cword.w); 575 break; 576 case FLASH_CFI_32BIT: 577 retval = ((flash_read32(addr) & cword.l) == cword.l); 578 break; 579 case FLASH_CFI_64BIT: 580 retval = ((flash_read64(addr) & cword.ll) == cword.ll); 581 break; 582 default: 583 retval = 0; 584 break; 585 } 586 flash_unmap(info, sect, offset, addr); 587 588 return retval; 589 } 590 591 /*----------------------------------------------------------------------- 592 */ 593 static int flash_toggle (flash_info_t * info, flash_sect_t sect, 594 uint offset, uchar cmd) 595 { 596 void *addr; 597 cfiword_t cword; 598 int retval; 599 600 addr = flash_map (info, sect, offset); 601 flash_make_cmd (info, cmd, &cword); 602 switch (info->portwidth) { 603 case FLASH_CFI_8BIT: 604 retval = flash_read8(addr) != flash_read8(addr); 605 break; 606 case FLASH_CFI_16BIT: 607 retval = flash_read16(addr) != flash_read16(addr); 608 break; 609 case FLASH_CFI_32BIT: 610 retval = flash_read32(addr) != flash_read32(addr); 611 break; 612 case FLASH_CFI_64BIT: 613 retval = ( (flash_read32( addr ) != flash_read32( addr )) || 614 (flash_read32(addr+4) != flash_read32(addr+4)) ); 615 break; 616 default: 617 retval = 0; 618 break; 619 } 620 flash_unmap(info, sect, offset, addr); 621 622 return retval; 623 } 624 625 /* 626 * flash_is_busy - check to see if the flash is busy 627 * 628 * This routine checks the status of the chip and returns true if the 629 * chip is busy. 630 */ 631 static int flash_is_busy (flash_info_t * info, flash_sect_t sect) 632 { 633 int retval; 634 635 switch (info->vendor) { 636 case CFI_CMDSET_INTEL_PROG_REGIONS: 637 case CFI_CMDSET_INTEL_STANDARD: 638 case CFI_CMDSET_INTEL_EXTENDED: 639 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE); 640 break; 641 case CFI_CMDSET_AMD_STANDARD: 642 case CFI_CMDSET_AMD_EXTENDED: 643 #ifdef CONFIG_FLASH_CFI_LEGACY 644 case CFI_CMDSET_AMD_LEGACY: 645 #endif 646 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); 647 break; 648 default: 649 retval = 0; 650 } 651 debug ("flash_is_busy: %d\n", retval); 652 return retval; 653 } 654 655 /*----------------------------------------------------------------------- 656 * wait for XSR.7 to be set. Time out with an error if it does not. 657 * This routine does not set the flash to read-array mode. 658 */ 659 static int flash_status_check (flash_info_t * info, flash_sect_t sector, 660 ulong tout, char *prompt) 661 { 662 ulong start; 663 664 #if CONFIG_SYS_HZ != 1000 665 tout *= CONFIG_SYS_HZ/1000; 666 #endif 667 668 /* Wait for command completion */ 669 start = get_timer (0); 670 while (flash_is_busy (info, sector)) { 671 if (get_timer (start) > tout) { 672 printf ("Flash %s timeout at address %lx data %lx\n", 673 prompt, info->start[sector], 674 flash_read_long (info, sector, 0)); 675 flash_write_cmd (info, sector, 0, info->cmd_reset); 676 return ERR_TIMOUT; 677 } 678 udelay (1); /* also triggers watchdog */ 679 } 680 return ERR_OK; 681 } 682 683 /*----------------------------------------------------------------------- 684 * Wait for XSR.7 to be set, if it times out print an error, otherwise 685 * do a full status check. 686 * 687 * This routine sets the flash to read-array mode. 688 */ 689 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, 690 ulong tout, char *prompt) 691 { 692 int retcode; 693 694 retcode = flash_status_check (info, sector, tout, prompt); 695 switch (info->vendor) { 696 case CFI_CMDSET_INTEL_PROG_REGIONS: 697 case CFI_CMDSET_INTEL_EXTENDED: 698 case CFI_CMDSET_INTEL_STANDARD: 699 if ((retcode != ERR_OK) 700 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { 701 retcode = ERR_INVAL; 702 printf ("Flash %s error at address %lx\n", prompt, 703 info->start[sector]); 704 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | 705 FLASH_STATUS_PSLBS)) { 706 puts ("Command Sequence Error.\n"); 707 } else if (flash_isset (info, sector, 0, 708 FLASH_STATUS_ECLBS)) { 709 puts ("Block Erase Error.\n"); 710 retcode = ERR_NOT_ERASED; 711 } else if (flash_isset (info, sector, 0, 712 FLASH_STATUS_PSLBS)) { 713 puts ("Locking Error\n"); 714 } 715 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) { 716 puts ("Block locked.\n"); 717 retcode = ERR_PROTECTED; 718 } 719 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) 720 puts ("Vpp Low Error.\n"); 721 } 722 flash_write_cmd (info, sector, 0, info->cmd_reset); 723 break; 724 default: 725 break; 726 } 727 return retcode; 728 } 729 730 /*----------------------------------------------------------------------- 731 */ 732 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) 733 { 734 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 735 unsigned short w; 736 unsigned int l; 737 unsigned long long ll; 738 #endif 739 740 switch (info->portwidth) { 741 case FLASH_CFI_8BIT: 742 cword->c = c; 743 break; 744 case FLASH_CFI_16BIT: 745 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 746 w = c; 747 w <<= 8; 748 cword->w = (cword->w >> 8) | w; 749 #else 750 cword->w = (cword->w << 8) | c; 751 #endif 752 break; 753 case FLASH_CFI_32BIT: 754 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 755 l = c; 756 l <<= 24; 757 cword->l = (cword->l >> 8) | l; 758 #else 759 cword->l = (cword->l << 8) | c; 760 #endif 761 break; 762 case FLASH_CFI_64BIT: 763 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 764 ll = c; 765 ll <<= 56; 766 cword->ll = (cword->ll >> 8) | ll; 767 #else 768 cword->ll = (cword->ll << 8) | c; 769 #endif 770 break; 771 } 772 } 773 774 /* 775 * Loop through the sector table starting from the previously found sector. 776 * Searches forwards or backwards, dependent on the passed address. 777 */ 778 static flash_sect_t find_sector (flash_info_t * info, ulong addr) 779 { 780 static flash_sect_t saved_sector = 0; /* previously found sector */ 781 flash_sect_t sector = saved_sector; 782 783 while ((info->start[sector] < addr) 784 && (sector < info->sector_count - 1)) 785 sector++; 786 while ((info->start[sector] > addr) && (sector > 0)) 787 /* 788 * also decrements the sector in case of an overshot 789 * in the first loop 790 */ 791 sector--; 792 793 saved_sector = sector; 794 return sector; 795 } 796 797 /*----------------------------------------------------------------------- 798 */ 799 static int flash_write_cfiword (flash_info_t * info, ulong dest, 800 cfiword_t cword) 801 { 802 void *dstaddr = (void *)dest; 803 int flag; 804 flash_sect_t sect = 0; 805 char sect_found = 0; 806 807 /* Check if Flash is (sufficiently) erased */ 808 switch (info->portwidth) { 809 case FLASH_CFI_8BIT: 810 flag = ((flash_read8(dstaddr) & cword.c) == cword.c); 811 break; 812 case FLASH_CFI_16BIT: 813 flag = ((flash_read16(dstaddr) & cword.w) == cword.w); 814 break; 815 case FLASH_CFI_32BIT: 816 flag = ((flash_read32(dstaddr) & cword.l) == cword.l); 817 break; 818 case FLASH_CFI_64BIT: 819 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll); 820 break; 821 default: 822 flag = 0; 823 break; 824 } 825 if (!flag) 826 return ERR_NOT_ERASED; 827 828 /* Disable interrupts which might cause a timeout here */ 829 flag = disable_interrupts (); 830 831 switch (info->vendor) { 832 case CFI_CMDSET_INTEL_PROG_REGIONS: 833 case CFI_CMDSET_INTEL_EXTENDED: 834 case CFI_CMDSET_INTEL_STANDARD: 835 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS); 836 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE); 837 break; 838 case CFI_CMDSET_AMD_EXTENDED: 839 case CFI_CMDSET_AMD_STANDARD: 840 sect = find_sector(info, dest); 841 flash_unlock_seq (info, sect); 842 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE); 843 sect_found = 1; 844 break; 845 #ifdef CONFIG_FLASH_CFI_LEGACY 846 case CFI_CMDSET_AMD_LEGACY: 847 sect = find_sector(info, dest); 848 flash_unlock_seq (info, 0); 849 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE); 850 sect_found = 1; 851 break; 852 #endif 853 } 854 855 switch (info->portwidth) { 856 case FLASH_CFI_8BIT: 857 flash_write8(cword.c, dstaddr); 858 break; 859 case FLASH_CFI_16BIT: 860 flash_write16(cword.w, dstaddr); 861 break; 862 case FLASH_CFI_32BIT: 863 flash_write32(cword.l, dstaddr); 864 break; 865 case FLASH_CFI_64BIT: 866 flash_write64(cword.ll, dstaddr); 867 break; 868 } 869 870 /* re-enable interrupts if necessary */ 871 if (flag) 872 enable_interrupts (); 873 874 if (!sect_found) 875 sect = find_sector (info, dest); 876 877 return flash_full_status_check (info, sect, info->write_tout, "write"); 878 } 879 880 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 881 882 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, 883 int len) 884 { 885 flash_sect_t sector; 886 int cnt; 887 int retcode; 888 void *src = cp; 889 void *dst = (void *)dest; 890 void *dst2 = dst; 891 int flag = 0; 892 uint offset = 0; 893 unsigned int shift; 894 uchar write_cmd; 895 896 switch (info->portwidth) { 897 case FLASH_CFI_8BIT: 898 shift = 0; 899 break; 900 case FLASH_CFI_16BIT: 901 shift = 1; 902 break; 903 case FLASH_CFI_32BIT: 904 shift = 2; 905 break; 906 case FLASH_CFI_64BIT: 907 shift = 3; 908 break; 909 default: 910 retcode = ERR_INVAL; 911 goto out_unmap; 912 } 913 914 cnt = len >> shift; 915 916 while ((cnt-- > 0) && (flag == 0)) { 917 switch (info->portwidth) { 918 case FLASH_CFI_8BIT: 919 flag = ((flash_read8(dst2) & flash_read8(src)) == 920 flash_read8(src)); 921 src += 1, dst2 += 1; 922 break; 923 case FLASH_CFI_16BIT: 924 flag = ((flash_read16(dst2) & flash_read16(src)) == 925 flash_read16(src)); 926 src += 2, dst2 += 2; 927 break; 928 case FLASH_CFI_32BIT: 929 flag = ((flash_read32(dst2) & flash_read32(src)) == 930 flash_read32(src)); 931 src += 4, dst2 += 4; 932 break; 933 case FLASH_CFI_64BIT: 934 flag = ((flash_read64(dst2) & flash_read64(src)) == 935 flash_read64(src)); 936 src += 8, dst2 += 8; 937 break; 938 } 939 } 940 if (!flag) { 941 retcode = ERR_NOT_ERASED; 942 goto out_unmap; 943 } 944 945 src = cp; 946 sector = find_sector (info, dest); 947 948 switch (info->vendor) { 949 case CFI_CMDSET_INTEL_PROG_REGIONS: 950 case CFI_CMDSET_INTEL_STANDARD: 951 case CFI_CMDSET_INTEL_EXTENDED: 952 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ? 953 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER; 954 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 955 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS); 956 flash_write_cmd (info, sector, 0, write_cmd); 957 retcode = flash_status_check (info, sector, 958 info->buffer_write_tout, 959 "write to buffer"); 960 if (retcode == ERR_OK) { 961 /* reduce the number of loops by the width of 962 * the port */ 963 cnt = len >> shift; 964 flash_write_cmd (info, sector, 0, cnt - 1); 965 while (cnt-- > 0) { 966 switch (info->portwidth) { 967 case FLASH_CFI_8BIT: 968 flash_write8(flash_read8(src), dst); 969 src += 1, dst += 1; 970 break; 971 case FLASH_CFI_16BIT: 972 flash_write16(flash_read16(src), dst); 973 src += 2, dst += 2; 974 break; 975 case FLASH_CFI_32BIT: 976 flash_write32(flash_read32(src), dst); 977 src += 4, dst += 4; 978 break; 979 case FLASH_CFI_64BIT: 980 flash_write64(flash_read64(src), dst); 981 src += 8, dst += 8; 982 break; 983 default: 984 retcode = ERR_INVAL; 985 goto out_unmap; 986 } 987 } 988 flash_write_cmd (info, sector, 0, 989 FLASH_CMD_WRITE_BUFFER_CONFIRM); 990 retcode = flash_full_status_check ( 991 info, sector, info->buffer_write_tout, 992 "buffer write"); 993 } 994 995 break; 996 997 case CFI_CMDSET_AMD_STANDARD: 998 case CFI_CMDSET_AMD_EXTENDED: 999 flash_unlock_seq(info,0); 1000 1001 #ifdef CONFIG_FLASH_SPANSION_S29WS_N 1002 offset = ((unsigned long)dst - info->start[sector]) >> shift; 1003 #endif 1004 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER); 1005 cnt = len >> shift; 1006 flash_write_cmd(info, sector, offset, cnt - 1); 1007 1008 switch (info->portwidth) { 1009 case FLASH_CFI_8BIT: 1010 while (cnt-- > 0) { 1011 flash_write8(flash_read8(src), dst); 1012 src += 1, dst += 1; 1013 } 1014 break; 1015 case FLASH_CFI_16BIT: 1016 while (cnt-- > 0) { 1017 flash_write16(flash_read16(src), dst); 1018 src += 2, dst += 2; 1019 } 1020 break; 1021 case FLASH_CFI_32BIT: 1022 while (cnt-- > 0) { 1023 flash_write32(flash_read32(src), dst); 1024 src += 4, dst += 4; 1025 } 1026 break; 1027 case FLASH_CFI_64BIT: 1028 while (cnt-- > 0) { 1029 flash_write64(flash_read64(src), dst); 1030 src += 8, dst += 8; 1031 } 1032 break; 1033 default: 1034 retcode = ERR_INVAL; 1035 goto out_unmap; 1036 } 1037 1038 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); 1039 retcode = flash_full_status_check (info, sector, 1040 info->buffer_write_tout, 1041 "buffer write"); 1042 break; 1043 1044 default: 1045 debug ("Unknown Command Set\n"); 1046 retcode = ERR_INVAL; 1047 break; 1048 } 1049 1050 out_unmap: 1051 return retcode; 1052 } 1053 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1054 1055 1056 /*----------------------------------------------------------------------- 1057 */ 1058 int flash_erase (flash_info_t * info, int s_first, int s_last) 1059 { 1060 int rcode = 0; 1061 int prot; 1062 flash_sect_t sect; 1063 1064 if (info->flash_id != FLASH_MAN_CFI) { 1065 puts ("Can't erase unknown flash type - aborted\n"); 1066 return 1; 1067 } 1068 if ((s_first < 0) || (s_first > s_last)) { 1069 puts ("- no sectors to erase\n"); 1070 return 1; 1071 } 1072 1073 prot = 0; 1074 for (sect = s_first; sect <= s_last; ++sect) { 1075 if (info->protect[sect]) { 1076 prot++; 1077 } 1078 } 1079 if (prot) { 1080 printf ("- Warning: %d protected sectors will not be erased!\n", 1081 prot); 1082 } else if (flash_verbose) { 1083 putc ('\n'); 1084 } 1085 1086 1087 for (sect = s_first; sect <= s_last; sect++) { 1088 if (info->protect[sect] == 0) { /* not protected */ 1089 switch (info->vendor) { 1090 case CFI_CMDSET_INTEL_PROG_REGIONS: 1091 case CFI_CMDSET_INTEL_STANDARD: 1092 case CFI_CMDSET_INTEL_EXTENDED: 1093 flash_write_cmd (info, sect, 0, 1094 FLASH_CMD_CLEAR_STATUS); 1095 flash_write_cmd (info, sect, 0, 1096 FLASH_CMD_BLOCK_ERASE); 1097 flash_write_cmd (info, sect, 0, 1098 FLASH_CMD_ERASE_CONFIRM); 1099 break; 1100 case CFI_CMDSET_AMD_STANDARD: 1101 case CFI_CMDSET_AMD_EXTENDED: 1102 flash_unlock_seq (info, sect); 1103 flash_write_cmd (info, sect, 1104 info->addr_unlock1, 1105 AMD_CMD_ERASE_START); 1106 flash_unlock_seq (info, sect); 1107 flash_write_cmd (info, sect, 0, 1108 AMD_CMD_ERASE_SECTOR); 1109 break; 1110 #ifdef CONFIG_FLASH_CFI_LEGACY 1111 case CFI_CMDSET_AMD_LEGACY: 1112 flash_unlock_seq (info, 0); 1113 flash_write_cmd (info, 0, info->addr_unlock1, 1114 AMD_CMD_ERASE_START); 1115 flash_unlock_seq (info, 0); 1116 flash_write_cmd (info, sect, 0, 1117 AMD_CMD_ERASE_SECTOR); 1118 break; 1119 #endif 1120 default: 1121 debug ("Unkown flash vendor %d\n", 1122 info->vendor); 1123 break; 1124 } 1125 1126 if (flash_full_status_check 1127 (info, sect, info->erase_blk_tout, "erase")) { 1128 rcode = 1; 1129 } else if (flash_verbose) 1130 putc ('.'); 1131 } 1132 } 1133 1134 if (flash_verbose) 1135 puts (" done\n"); 1136 1137 return rcode; 1138 } 1139 1140 /*----------------------------------------------------------------------- 1141 */ 1142 void flash_print_info (flash_info_t * info) 1143 { 1144 int i; 1145 1146 if (info->flash_id != FLASH_MAN_CFI) { 1147 puts ("missing or unknown FLASH type\n"); 1148 return; 1149 } 1150 1151 printf ("%s FLASH (%d x %d)", 1152 info->name, 1153 (info->portwidth << 3), (info->chipwidth << 3)); 1154 if (info->size < 1024*1024) 1155 printf (" Size: %ld kB in %d Sectors\n", 1156 info->size >> 10, info->sector_count); 1157 else 1158 printf (" Size: %ld MB in %d Sectors\n", 1159 info->size >> 20, info->sector_count); 1160 printf (" "); 1161 switch (info->vendor) { 1162 case CFI_CMDSET_INTEL_PROG_REGIONS: 1163 printf ("Intel Prog Regions"); 1164 break; 1165 case CFI_CMDSET_INTEL_STANDARD: 1166 printf ("Intel Standard"); 1167 break; 1168 case CFI_CMDSET_INTEL_EXTENDED: 1169 printf ("Intel Extended"); 1170 break; 1171 case CFI_CMDSET_AMD_STANDARD: 1172 printf ("AMD Standard"); 1173 break; 1174 case CFI_CMDSET_AMD_EXTENDED: 1175 printf ("AMD Extended"); 1176 break; 1177 #ifdef CONFIG_FLASH_CFI_LEGACY 1178 case CFI_CMDSET_AMD_LEGACY: 1179 printf ("AMD Legacy"); 1180 break; 1181 #endif 1182 default: 1183 printf ("Unknown (%d)", info->vendor); 1184 break; 1185 } 1186 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X", 1187 info->manufacturer_id, info->device_id); 1188 if (info->device_id == 0x7E) { 1189 printf("%04X", info->device_id2); 1190 } 1191 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", 1192 info->erase_blk_tout, 1193 info->write_tout); 1194 if (info->buffer_size > 1) { 1195 printf (" Buffer write timeout: %ld ms, " 1196 "buffer size: %d bytes\n", 1197 info->buffer_write_tout, 1198 info->buffer_size); 1199 } 1200 1201 puts ("\n Sector Start Addresses:"); 1202 for (i = 0; i < info->sector_count; ++i) { 1203 if ((i % 5) == 0) 1204 printf ("\n"); 1205 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 1206 int k; 1207 int size; 1208 int erased; 1209 volatile unsigned long *flash; 1210 1211 /* 1212 * Check if whole sector is erased 1213 */ 1214 size = flash_sector_size(info, i); 1215 erased = 1; 1216 flash = (volatile unsigned long *) info->start[i]; 1217 size = size >> 2; /* divide by 4 for longword access */ 1218 for (k = 0; k < size; k++) { 1219 if (*flash++ != 0xffffffff) { 1220 erased = 0; 1221 break; 1222 } 1223 } 1224 1225 /* print empty and read-only info */ 1226 printf (" %08lX %c %s ", 1227 info->start[i], 1228 erased ? 'E' : ' ', 1229 info->protect[i] ? "RO" : " "); 1230 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */ 1231 printf (" %08lX %s ", 1232 info->start[i], 1233 info->protect[i] ? "RO" : " "); 1234 #endif 1235 } 1236 putc ('\n'); 1237 return; 1238 } 1239 1240 /*----------------------------------------------------------------------- 1241 * This is used in a few places in write_buf() to show programming 1242 * progress. Making it a function is nasty because it needs to do side 1243 * effect updates to digit and dots. Repeated code is nasty too, so 1244 * we define it once here. 1245 */ 1246 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1247 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \ 1248 if (flash_verbose) { \ 1249 dots -= dots_sub; \ 1250 if ((scale > 0) && (dots <= 0)) { \ 1251 if ((digit % 5) == 0) \ 1252 printf ("%d", digit / 5); \ 1253 else \ 1254 putc ('.'); \ 1255 digit--; \ 1256 dots += scale; \ 1257 } \ 1258 } 1259 #else 1260 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) 1261 #endif 1262 1263 /*----------------------------------------------------------------------- 1264 * Copy memory to flash, returns: 1265 * 0 - OK 1266 * 1 - write timeout 1267 * 2 - Flash not erased 1268 */ 1269 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) 1270 { 1271 ulong wp; 1272 uchar *p; 1273 int aln; 1274 cfiword_t cword; 1275 int i, rc; 1276 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1277 int buffered_size; 1278 #endif 1279 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1280 int digit = CONFIG_FLASH_SHOW_PROGRESS; 1281 int scale = 0; 1282 int dots = 0; 1283 1284 /* 1285 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes. 1286 */ 1287 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) { 1288 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) / 1289 CONFIG_FLASH_SHOW_PROGRESS); 1290 } 1291 #endif 1292 1293 /* get lower aligned address */ 1294 wp = (addr & ~(info->portwidth - 1)); 1295 1296 /* handle unaligned start */ 1297 if ((aln = addr - wp) != 0) { 1298 cword.l = 0; 1299 p = (uchar *)wp; 1300 for (i = 0; i < aln; ++i) 1301 flash_add_byte (info, &cword, flash_read8(p + i)); 1302 1303 for (; (i < info->portwidth) && (cnt > 0); i++) { 1304 flash_add_byte (info, &cword, *src++); 1305 cnt--; 1306 } 1307 for (; (cnt == 0) && (i < info->portwidth); ++i) 1308 flash_add_byte (info, &cword, flash_read8(p + i)); 1309 1310 rc = flash_write_cfiword (info, wp, cword); 1311 if (rc != 0) 1312 return rc; 1313 1314 wp += i; 1315 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1316 } 1317 1318 /* handle the aligned part */ 1319 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1320 buffered_size = (info->portwidth / info->chipwidth); 1321 buffered_size *= info->buffer_size; 1322 while (cnt >= info->portwidth) { 1323 /* prohibit buffer write when buffer_size is 1 */ 1324 if (info->buffer_size == 1) { 1325 cword.l = 0; 1326 for (i = 0; i < info->portwidth; i++) 1327 flash_add_byte (info, &cword, *src++); 1328 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1329 return rc; 1330 wp += info->portwidth; 1331 cnt -= info->portwidth; 1332 continue; 1333 } 1334 1335 /* write buffer until next buffered_size aligned boundary */ 1336 i = buffered_size - (wp % buffered_size); 1337 if (i > cnt) 1338 i = cnt; 1339 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) 1340 return rc; 1341 i -= i & (info->portwidth - 1); 1342 wp += i; 1343 src += i; 1344 cnt -= i; 1345 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1346 } 1347 #else 1348 while (cnt >= info->portwidth) { 1349 cword.l = 0; 1350 for (i = 0; i < info->portwidth; i++) { 1351 flash_add_byte (info, &cword, *src++); 1352 } 1353 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1354 return rc; 1355 wp += info->portwidth; 1356 cnt -= info->portwidth; 1357 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth); 1358 } 1359 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1360 1361 if (cnt == 0) { 1362 return (0); 1363 } 1364 1365 /* 1366 * handle unaligned tail bytes 1367 */ 1368 cword.l = 0; 1369 p = (uchar *)wp; 1370 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) { 1371 flash_add_byte (info, &cword, *src++); 1372 --cnt; 1373 } 1374 for (; i < info->portwidth; ++i) 1375 flash_add_byte (info, &cword, flash_read8(p + i)); 1376 1377 return flash_write_cfiword (info, wp, cword); 1378 } 1379 1380 /*----------------------------------------------------------------------- 1381 */ 1382 #ifdef CONFIG_SYS_FLASH_PROTECTION 1383 1384 int flash_real_protect (flash_info_t * info, long sector, int prot) 1385 { 1386 int retcode = 0; 1387 1388 switch (info->vendor) { 1389 case CFI_CMDSET_INTEL_PROG_REGIONS: 1390 case CFI_CMDSET_INTEL_STANDARD: 1391 case CFI_CMDSET_INTEL_EXTENDED: 1392 flash_write_cmd (info, sector, 0, 1393 FLASH_CMD_CLEAR_STATUS); 1394 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1395 if (prot) 1396 flash_write_cmd (info, sector, 0, 1397 FLASH_CMD_PROTECT_SET); 1398 else 1399 flash_write_cmd (info, sector, 0, 1400 FLASH_CMD_PROTECT_CLEAR); 1401 break; 1402 case CFI_CMDSET_AMD_EXTENDED: 1403 case CFI_CMDSET_AMD_STANDARD: 1404 /* U-Boot only checks the first byte */ 1405 if (info->manufacturer_id == (uchar)ATM_MANUFACT) { 1406 if (prot) { 1407 flash_unlock_seq (info, 0); 1408 flash_write_cmd (info, 0, 1409 info->addr_unlock1, 1410 ATM_CMD_SOFTLOCK_START); 1411 flash_unlock_seq (info, 0); 1412 flash_write_cmd (info, sector, 0, 1413 ATM_CMD_LOCK_SECT); 1414 } else { 1415 flash_write_cmd (info, 0, 1416 info->addr_unlock1, 1417 AMD_CMD_UNLOCK_START); 1418 if (info->device_id == ATM_ID_BV6416) 1419 flash_write_cmd (info, sector, 1420 0, ATM_CMD_UNLOCK_SECT); 1421 } 1422 } 1423 break; 1424 #ifdef CONFIG_FLASH_CFI_LEGACY 1425 case CFI_CMDSET_AMD_LEGACY: 1426 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 1427 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1428 if (prot) 1429 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); 1430 else 1431 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); 1432 #endif 1433 }; 1434 1435 if ((retcode = 1436 flash_full_status_check (info, sector, info->erase_blk_tout, 1437 prot ? "protect" : "unprotect")) == 0) { 1438 1439 info->protect[sector] = prot; 1440 1441 /* 1442 * On some of Intel's flash chips (marked via legacy_unlock) 1443 * unprotect unprotects all locking. 1444 */ 1445 if ((prot == 0) && (info->legacy_unlock)) { 1446 flash_sect_t i; 1447 1448 for (i = 0; i < info->sector_count; i++) { 1449 if (info->protect[i]) 1450 flash_real_protect (info, i, 1); 1451 } 1452 } 1453 } 1454 return retcode; 1455 } 1456 1457 /*----------------------------------------------------------------------- 1458 * flash_read_user_serial - read the OneTimeProgramming cells 1459 */ 1460 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, 1461 int len) 1462 { 1463 uchar *src; 1464 uchar *dst; 1465 1466 dst = buffer; 1467 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION); 1468 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1469 memcpy (dst, src + offset, len); 1470 flash_write_cmd (info, 0, 0, info->cmd_reset); 1471 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src); 1472 } 1473 1474 /* 1475 * flash_read_factory_serial - read the device Id from the protection area 1476 */ 1477 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, 1478 int len) 1479 { 1480 uchar *src; 1481 1482 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION); 1483 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1484 memcpy (buffer, src + offset, len); 1485 flash_write_cmd (info, 0, 0, info->cmd_reset); 1486 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); 1487 } 1488 1489 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 1490 1491 /*----------------------------------------------------------------------- 1492 * Reverse the order of the erase regions in the CFI QRY structure. 1493 * This is needed for chips that are either a) correctly detected as 1494 * top-boot, or b) buggy. 1495 */ 1496 static void cfi_reverse_geometry(struct cfi_qry *qry) 1497 { 1498 unsigned int i, j; 1499 u32 tmp; 1500 1501 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) { 1502 tmp = qry->erase_region_info[i]; 1503 qry->erase_region_info[i] = qry->erase_region_info[j]; 1504 qry->erase_region_info[j] = tmp; 1505 } 1506 } 1507 1508 /*----------------------------------------------------------------------- 1509 * read jedec ids from device and set corresponding fields in info struct 1510 * 1511 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct 1512 * 1513 */ 1514 static void cmdset_intel_read_jedec_ids(flash_info_t *info) 1515 { 1516 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1517 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); 1518 udelay(1000); /* some flash are slow to respond */ 1519 info->manufacturer_id = flash_read_uchar (info, 1520 FLASH_OFFSET_MANUFACTURER_ID); 1521 info->device_id = flash_read_uchar (info, 1522 FLASH_OFFSET_DEVICE_ID); 1523 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1524 } 1525 1526 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) 1527 { 1528 info->cmd_reset = FLASH_CMD_RESET; 1529 1530 cmdset_intel_read_jedec_ids(info); 1531 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1532 1533 #ifdef CONFIG_SYS_FLASH_PROTECTION 1534 /* read legacy lock/unlock bit from intel flash */ 1535 if (info->ext_addr) { 1536 info->legacy_unlock = flash_read_uchar (info, 1537 info->ext_addr + 5) & 0x08; 1538 } 1539 #endif 1540 1541 return 0; 1542 } 1543 1544 static void cmdset_amd_read_jedec_ids(flash_info_t *info) 1545 { 1546 ushort bankId = 0; 1547 uchar manuId; 1548 1549 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1550 flash_unlock_seq(info, 0); 1551 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); 1552 udelay(1000); /* some flash are slow to respond */ 1553 1554 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID); 1555 /* JEDEC JEP106Z specifies ID codes up to bank 7 */ 1556 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) { 1557 bankId += 0x100; 1558 manuId = flash_read_uchar (info, 1559 bankId | FLASH_OFFSET_MANUFACTURER_ID); 1560 } 1561 info->manufacturer_id = manuId; 1562 1563 switch (info->chipwidth){ 1564 case FLASH_CFI_8BIT: 1565 info->device_id = flash_read_uchar (info, 1566 FLASH_OFFSET_DEVICE_ID); 1567 if (info->device_id == 0x7E) { 1568 /* AMD 3-byte (expanded) device ids */ 1569 info->device_id2 = flash_read_uchar (info, 1570 FLASH_OFFSET_DEVICE_ID2); 1571 info->device_id2 <<= 8; 1572 info->device_id2 |= flash_read_uchar (info, 1573 FLASH_OFFSET_DEVICE_ID3); 1574 } 1575 break; 1576 case FLASH_CFI_16BIT: 1577 info->device_id = flash_read_word (info, 1578 FLASH_OFFSET_DEVICE_ID); 1579 break; 1580 default: 1581 break; 1582 } 1583 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1584 } 1585 1586 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) 1587 { 1588 info->cmd_reset = AMD_CMD_RESET; 1589 1590 cmdset_amd_read_jedec_ids(info); 1591 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1592 1593 return 0; 1594 } 1595 1596 #ifdef CONFIG_FLASH_CFI_LEGACY 1597 static void flash_read_jedec_ids (flash_info_t * info) 1598 { 1599 info->manufacturer_id = 0; 1600 info->device_id = 0; 1601 info->device_id2 = 0; 1602 1603 switch (info->vendor) { 1604 case CFI_CMDSET_INTEL_PROG_REGIONS: 1605 case CFI_CMDSET_INTEL_STANDARD: 1606 case CFI_CMDSET_INTEL_EXTENDED: 1607 cmdset_intel_read_jedec_ids(info); 1608 break; 1609 case CFI_CMDSET_AMD_STANDARD: 1610 case CFI_CMDSET_AMD_EXTENDED: 1611 cmdset_amd_read_jedec_ids(info); 1612 break; 1613 default: 1614 break; 1615 } 1616 } 1617 1618 /*----------------------------------------------------------------------- 1619 * Call board code to request info about non-CFI flash. 1620 * board_flash_get_legacy needs to fill in at least: 1621 * info->portwidth, info->chipwidth and info->interface for Jedec probing. 1622 */ 1623 static int flash_detect_legacy(phys_addr_t base, int banknum) 1624 { 1625 flash_info_t *info = &flash_info[banknum]; 1626 1627 if (board_flash_get_legacy(base, banknum, info)) { 1628 /* board code may have filled info completely. If not, we 1629 use JEDEC ID probing. */ 1630 if (!info->vendor) { 1631 int modes[] = { 1632 CFI_CMDSET_AMD_STANDARD, 1633 CFI_CMDSET_INTEL_STANDARD 1634 }; 1635 int i; 1636 1637 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) { 1638 info->vendor = modes[i]; 1639 info->start[0] = 1640 (ulong)map_physmem(base, 1641 info->portwidth, 1642 MAP_NOCACHE); 1643 if (info->portwidth == FLASH_CFI_8BIT 1644 && info->interface == FLASH_CFI_X8X16) { 1645 info->addr_unlock1 = 0x2AAA; 1646 info->addr_unlock2 = 0x5555; 1647 } else { 1648 info->addr_unlock1 = 0x5555; 1649 info->addr_unlock2 = 0x2AAA; 1650 } 1651 flash_read_jedec_ids(info); 1652 debug("JEDEC PROBE: ID %x %x %x\n", 1653 info->manufacturer_id, 1654 info->device_id, 1655 info->device_id2); 1656 if (jedec_flash_match(info, info->start[0])) 1657 break; 1658 else 1659 unmap_physmem((void *)info->start[0], 1660 MAP_NOCACHE); 1661 } 1662 } 1663 1664 switch(info->vendor) { 1665 case CFI_CMDSET_INTEL_PROG_REGIONS: 1666 case CFI_CMDSET_INTEL_STANDARD: 1667 case CFI_CMDSET_INTEL_EXTENDED: 1668 info->cmd_reset = FLASH_CMD_RESET; 1669 break; 1670 case CFI_CMDSET_AMD_STANDARD: 1671 case CFI_CMDSET_AMD_EXTENDED: 1672 case CFI_CMDSET_AMD_LEGACY: 1673 info->cmd_reset = AMD_CMD_RESET; 1674 break; 1675 } 1676 info->flash_id = FLASH_MAN_CFI; 1677 return 1; 1678 } 1679 return 0; /* use CFI */ 1680 } 1681 #else 1682 static inline int flash_detect_legacy(phys_addr_t base, int banknum) 1683 { 1684 return 0; /* use CFI */ 1685 } 1686 #endif 1687 1688 /*----------------------------------------------------------------------- 1689 * detect if flash is compatible with the Common Flash Interface (CFI) 1690 * http://www.jedec.org/download/search/jesd68.pdf 1691 */ 1692 static void flash_read_cfi (flash_info_t *info, void *buf, 1693 unsigned int start, size_t len) 1694 { 1695 u8 *p = buf; 1696 unsigned int i; 1697 1698 for (i = 0; i < len; i++) 1699 p[i] = flash_read_uchar(info, start + i); 1700 } 1701 1702 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1703 { 1704 int cfi_offset; 1705 1706 /* We do not yet know what kind of commandset to use, so we issue 1707 the reset command in both Intel and AMD variants, in the hope 1708 that AMD flash roms ignore the Intel command. */ 1709 flash_write_cmd (info, 0, 0, AMD_CMD_RESET); 1710 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET); 1711 1712 for (cfi_offset=0; 1713 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); 1714 cfi_offset++) { 1715 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], 1716 FLASH_CMD_CFI); 1717 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') 1718 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') 1719 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { 1720 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, 1721 sizeof(struct cfi_qry)); 1722 info->interface = le16_to_cpu(qry->interface_desc); 1723 1724 info->cfi_offset = flash_offset_cfi[cfi_offset]; 1725 debug ("device interface is %d\n", 1726 info->interface); 1727 debug ("found port %d chip %d ", 1728 info->portwidth, info->chipwidth); 1729 debug ("port %d bits chip %d bits\n", 1730 info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1731 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1732 1733 /* calculate command offsets as in the Linux driver */ 1734 info->addr_unlock1 = 0x555; 1735 info->addr_unlock2 = 0x2aa; 1736 1737 /* 1738 * modify the unlock address if we are 1739 * in compatibility mode 1740 */ 1741 if ( /* x8/x16 in x8 mode */ 1742 ((info->chipwidth == FLASH_CFI_BY8) && 1743 (info->interface == FLASH_CFI_X8X16)) || 1744 /* x16/x32 in x16 mode */ 1745 ((info->chipwidth == FLASH_CFI_BY16) && 1746 (info->interface == FLASH_CFI_X16X32))) 1747 { 1748 info->addr_unlock1 = 0xaaa; 1749 info->addr_unlock2 = 0x555; 1750 } 1751 1752 info->name = "CFI conformant"; 1753 return 1; 1754 } 1755 } 1756 1757 return 0; 1758 } 1759 1760 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1761 { 1762 debug ("flash detect cfi\n"); 1763 1764 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH; 1765 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { 1766 for (info->chipwidth = FLASH_CFI_BY8; 1767 info->chipwidth <= info->portwidth; 1768 info->chipwidth <<= 1) 1769 if (__flash_detect_cfi(info, qry)) 1770 return 1; 1771 } 1772 debug ("not found\n"); 1773 return 0; 1774 } 1775 1776 /* 1777 * Manufacturer-specific quirks. Add workarounds for geometry 1778 * reversal, etc. here. 1779 */ 1780 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry) 1781 { 1782 /* check if flash geometry needs reversal */ 1783 if (qry->num_erase_regions > 1) { 1784 /* reverse geometry if top boot part */ 1785 if (info->cfi_version < 0x3131) { 1786 /* CFI < 1.1, try to guess from device id */ 1787 if ((info->device_id & 0x80) != 0) 1788 cfi_reverse_geometry(qry); 1789 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { 1790 /* CFI >= 1.1, deduct from top/bottom flag */ 1791 /* note: ext_addr is valid since cfi_version > 0 */ 1792 cfi_reverse_geometry(qry); 1793 } 1794 } 1795 } 1796 1797 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry) 1798 { 1799 int reverse_geometry = 0; 1800 1801 /* Check the "top boot" bit in the PRI */ 1802 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1)) 1803 reverse_geometry = 1; 1804 1805 /* AT49BV6416(T) list the erase regions in the wrong order. 1806 * However, the device ID is identical with the non-broken 1807 * AT49BV642D they differ in the high byte. 1808 */ 1809 if (info->device_id == 0xd6 || info->device_id == 0xd2) 1810 reverse_geometry = !reverse_geometry; 1811 1812 if (reverse_geometry) 1813 cfi_reverse_geometry(qry); 1814 } 1815 1816 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry) 1817 { 1818 /* check if flash geometry needs reversal */ 1819 if (qry->num_erase_regions > 1) { 1820 /* reverse geometry if top boot part */ 1821 if (info->cfi_version < 0x3131) { 1822 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */ 1823 if (info->device_id == 0x22CA || 1824 info->device_id == 0x2256) { 1825 cfi_reverse_geometry(qry); 1826 } 1827 } 1828 } 1829 } 1830 1831 /* 1832 * The following code cannot be run from FLASH! 1833 * 1834 */ 1835 ulong flash_get_size (phys_addr_t base, int banknum) 1836 { 1837 flash_info_t *info = &flash_info[banknum]; 1838 int i, j; 1839 flash_sect_t sect_cnt; 1840 phys_addr_t sector; 1841 unsigned long tmp; 1842 int size_ratio; 1843 uchar num_erase_regions; 1844 int erase_region_size; 1845 int erase_region_count; 1846 struct cfi_qry qry; 1847 1848 memset(&qry, 0, sizeof(qry)); 1849 1850 info->ext_addr = 0; 1851 info->cfi_version = 0; 1852 #ifdef CONFIG_SYS_FLASH_PROTECTION 1853 info->legacy_unlock = 0; 1854 #endif 1855 1856 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE); 1857 1858 if (flash_detect_cfi (info, &qry)) { 1859 info->vendor = le16_to_cpu(qry.p_id); 1860 info->ext_addr = le16_to_cpu(qry.p_adr); 1861 num_erase_regions = qry.num_erase_regions; 1862 1863 if (info->ext_addr) { 1864 info->cfi_version = (ushort) flash_read_uchar (info, 1865 info->ext_addr + 3) << 8; 1866 info->cfi_version |= (ushort) flash_read_uchar (info, 1867 info->ext_addr + 4); 1868 } 1869 1870 #ifdef DEBUG 1871 flash_printqry (&qry); 1872 #endif 1873 1874 switch (info->vendor) { 1875 case CFI_CMDSET_INTEL_PROG_REGIONS: 1876 case CFI_CMDSET_INTEL_STANDARD: 1877 case CFI_CMDSET_INTEL_EXTENDED: 1878 cmdset_intel_init(info, &qry); 1879 break; 1880 case CFI_CMDSET_AMD_STANDARD: 1881 case CFI_CMDSET_AMD_EXTENDED: 1882 cmdset_amd_init(info, &qry); 1883 break; 1884 default: 1885 printf("CFI: Unknown command set 0x%x\n", 1886 info->vendor); 1887 /* 1888 * Unfortunately, this means we don't know how 1889 * to get the chip back to Read mode. Might 1890 * as well try an Intel-style reset... 1891 */ 1892 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1893 return 0; 1894 } 1895 1896 /* Do manufacturer-specific fixups */ 1897 switch (info->manufacturer_id) { 1898 case 0x0001: 1899 flash_fixup_amd(info, &qry); 1900 break; 1901 case 0x001f: 1902 flash_fixup_atmel(info, &qry); 1903 break; 1904 case 0x0020: 1905 flash_fixup_stm(info, &qry); 1906 break; 1907 } 1908 1909 debug ("manufacturer is %d\n", info->vendor); 1910 debug ("manufacturer id is 0x%x\n", info->manufacturer_id); 1911 debug ("device id is 0x%x\n", info->device_id); 1912 debug ("device id2 is 0x%x\n", info->device_id2); 1913 debug ("cfi version is 0x%04x\n", info->cfi_version); 1914 1915 size_ratio = info->portwidth / info->chipwidth; 1916 /* if the chip is x8/x16 reduce the ratio by half */ 1917 if ((info->interface == FLASH_CFI_X8X16) 1918 && (info->chipwidth == FLASH_CFI_BY8)) { 1919 size_ratio >>= 1; 1920 } 1921 debug ("size_ratio %d port %d bits chip %d bits\n", 1922 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1923 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1924 debug ("found %d erase regions\n", num_erase_regions); 1925 sect_cnt = 0; 1926 sector = base; 1927 for (i = 0; i < num_erase_regions; i++) { 1928 if (i > NUM_ERASE_REGIONS) { 1929 printf ("%d erase regions found, only %d used\n", 1930 num_erase_regions, NUM_ERASE_REGIONS); 1931 break; 1932 } 1933 1934 tmp = le32_to_cpu(qry.erase_region_info[i]); 1935 debug("erase region %u: 0x%08lx\n", i, tmp); 1936 1937 erase_region_count = (tmp & 0xffff) + 1; 1938 tmp >>= 16; 1939 erase_region_size = 1940 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; 1941 debug ("erase_region_count = %d erase_region_size = %d\n", 1942 erase_region_count, erase_region_size); 1943 for (j = 0; j < erase_region_count; j++) { 1944 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { 1945 printf("ERROR: too many flash sectors\n"); 1946 break; 1947 } 1948 info->start[sect_cnt] = 1949 (ulong)map_physmem(sector, 1950 info->portwidth, 1951 MAP_NOCACHE); 1952 sector += (erase_region_size * size_ratio); 1953 1954 /* 1955 * Only read protection status from 1956 * supported devices (intel...) 1957 */ 1958 switch (info->vendor) { 1959 case CFI_CMDSET_INTEL_PROG_REGIONS: 1960 case CFI_CMDSET_INTEL_EXTENDED: 1961 case CFI_CMDSET_INTEL_STANDARD: 1962 info->protect[sect_cnt] = 1963 flash_isset (info, sect_cnt, 1964 FLASH_OFFSET_PROTECT, 1965 FLASH_STATUS_PROTECT); 1966 break; 1967 default: 1968 /* default: not protected */ 1969 info->protect[sect_cnt] = 0; 1970 } 1971 1972 sect_cnt++; 1973 } 1974 } 1975 1976 info->sector_count = sect_cnt; 1977 info->size = 1 << qry.dev_size; 1978 /* multiply the size by the number of chips */ 1979 info->size *= size_ratio; 1980 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size); 1981 tmp = 1 << qry.block_erase_timeout_typ; 1982 info->erase_blk_tout = tmp * 1983 (1 << qry.block_erase_timeout_max); 1984 tmp = (1 << qry.buf_write_timeout_typ) * 1985 (1 << qry.buf_write_timeout_max); 1986 1987 /* round up when converting to ms */ 1988 info->buffer_write_tout = (tmp + 999) / 1000; 1989 tmp = (1 << qry.word_write_timeout_typ) * 1990 (1 << qry.word_write_timeout_max); 1991 /* round up when converting to ms */ 1992 info->write_tout = (tmp + 999) / 1000; 1993 info->flash_id = FLASH_MAN_CFI; 1994 if ((info->interface == FLASH_CFI_X8X16) && 1995 (info->chipwidth == FLASH_CFI_BY8)) { 1996 /* XXX - Need to test on x8/x16 in parallel. */ 1997 info->portwidth >>= 1; 1998 } 1999 2000 flash_write_cmd (info, 0, 0, info->cmd_reset); 2001 } 2002 2003 return (info->size); 2004 } 2005 2006 void flash_set_verbose(uint v) 2007 { 2008 flash_verbose = v; 2009 } 2010 2011 /*----------------------------------------------------------------------- 2012 */ 2013 unsigned long flash_init (void) 2014 { 2015 unsigned long size = 0; 2016 int i; 2017 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2018 struct apl_s { 2019 ulong start; 2020 ulong size; 2021 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST; 2022 #endif 2023 2024 #ifdef CONFIG_SYS_FLASH_PROTECTION 2025 /* read environment from EEPROM */ 2026 char s[64]; 2027 getenv_r ("unlock", s, sizeof(s)); 2028 #endif 2029 2030 #define BANK_BASE(i) (((phys_addr_t [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i]) 2031 2032 /* Init: no FLASHes known */ 2033 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { 2034 flash_info[i].flash_id = FLASH_UNKNOWN; 2035 2036 if (!flash_detect_legacy (BANK_BASE(i), i)) 2037 flash_get_size (BANK_BASE(i), i); 2038 size += flash_info[i].size; 2039 if (flash_info[i].flash_id == FLASH_UNKNOWN) { 2040 #ifndef CONFIG_SYS_FLASH_QUIET_TEST 2041 printf ("## Unknown FLASH on Bank %d " 2042 "- Size = 0x%08lx = %ld MB\n", 2043 i+1, flash_info[i].size, 2044 flash_info[i].size << 20); 2045 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */ 2046 } 2047 #ifdef CONFIG_SYS_FLASH_PROTECTION 2048 else if ((s != NULL) && (strcmp(s, "yes") == 0)) { 2049 /* 2050 * Only the U-Boot image and it's environment 2051 * is protected, all other sectors are 2052 * unprotected (unlocked) if flash hardware 2053 * protection is used (CONFIG_SYS_FLASH_PROTECTION) 2054 * and the environment variable "unlock" is 2055 * set to "yes". 2056 */ 2057 if (flash_info[i].legacy_unlock) { 2058 int k; 2059 2060 /* 2061 * Disable legacy_unlock temporarily, 2062 * since flash_real_protect would 2063 * relock all other sectors again 2064 * otherwise. 2065 */ 2066 flash_info[i].legacy_unlock = 0; 2067 2068 /* 2069 * Legacy unlocking (e.g. Intel J3) -> 2070 * unlock only one sector. This will 2071 * unlock all sectors. 2072 */ 2073 flash_real_protect (&flash_info[i], 0, 0); 2074 2075 flash_info[i].legacy_unlock = 1; 2076 2077 /* 2078 * Manually mark other sectors as 2079 * unlocked (unprotected) 2080 */ 2081 for (k = 1; k < flash_info[i].sector_count; k++) 2082 flash_info[i].protect[k] = 0; 2083 } else { 2084 /* 2085 * No legancy unlocking -> unlock all sectors 2086 */ 2087 flash_protect (FLAG_PROTECT_CLEAR, 2088 flash_info[i].start[0], 2089 flash_info[i].start[0] 2090 + flash_info[i].size - 1, 2091 &flash_info[i]); 2092 } 2093 } 2094 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 2095 } 2096 2097 /* Monitor protection ON by default */ 2098 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 2099 flash_protect (FLAG_PROTECT_SET, 2100 CONFIG_SYS_MONITOR_BASE, 2101 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, 2102 flash_get_info(CONFIG_SYS_MONITOR_BASE)); 2103 #endif 2104 2105 /* Environment protection ON by default */ 2106 #ifdef CONFIG_ENV_IS_IN_FLASH 2107 flash_protect (FLAG_PROTECT_SET, 2108 CONFIG_ENV_ADDR, 2109 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, 2110 flash_get_info(CONFIG_ENV_ADDR)); 2111 #endif 2112 2113 /* Redundant environment protection ON by default */ 2114 #ifdef CONFIG_ENV_ADDR_REDUND 2115 flash_protect (FLAG_PROTECT_SET, 2116 CONFIG_ENV_ADDR_REDUND, 2117 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, 2118 flash_get_info(CONFIG_ENV_ADDR_REDUND)); 2119 #endif 2120 2121 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2122 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) { 2123 debug("autoprotecting from %08x to %08x\n", 2124 apl[i].start, apl[i].start + apl[i].size - 1); 2125 flash_protect (FLAG_PROTECT_SET, 2126 apl[i].start, 2127 apl[i].start + apl[i].size - 1, 2128 flash_get_info(apl[i].start)); 2129 } 2130 #endif 2131 2132 #ifdef CONFIG_FLASH_CFI_MTD 2133 cfi_mtd_init(); 2134 #endif 2135 2136 return (size); 2137 } 2138