1 /* 2 * (C) Copyright 2002-2004 3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com 4 * 5 * Copyright (C) 2003 Arabella Software Ltd. 6 * Yuli Barcohen <yuli@arabellasw.com> 7 * 8 * Copyright (C) 2004 9 * Ed Okerson 10 * 11 * Copyright (C) 2006 12 * Tolunay Orkun <listmember@orkun.us> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 * 32 */ 33 34 /* The DEBUG define must be before common to enable debugging */ 35 /* #define DEBUG */ 36 37 #include <common.h> 38 #include <asm/processor.h> 39 #include <asm/io.h> 40 #include <asm/byteorder.h> 41 #include <environment.h> 42 43 /* 44 * This file implements a Common Flash Interface (CFI) driver for 45 * U-Boot. 46 * 47 * The width of the port and the width of the chips are determined at 48 * initialization. These widths are used to calculate the address for 49 * access CFI data structures. 50 * 51 * References 52 * JEDEC Standard JESD68 - Common Flash Interface (CFI) 53 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes 54 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets 55 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet 56 * AMD CFI Specification, Release 2.0 December 1, 2001 57 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte 58 * Device IDs, Publication Number 25538 Revision A, November 8, 2001 59 * 60 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between 61 * reading and writing ... (yes there is such a Hardware). 62 */ 63 64 #ifndef CONFIG_SYS_FLASH_BANKS_LIST 65 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 66 #endif 67 68 #define FLASH_CMD_CFI 0x98 69 #define FLASH_CMD_READ_ID 0x90 70 #define FLASH_CMD_RESET 0xff 71 #define FLASH_CMD_BLOCK_ERASE 0x20 72 #define FLASH_CMD_ERASE_CONFIRM 0xD0 73 #define FLASH_CMD_WRITE 0x40 74 #define FLASH_CMD_PROTECT 0x60 75 #define FLASH_CMD_PROTECT_SET 0x01 76 #define FLASH_CMD_PROTECT_CLEAR 0xD0 77 #define FLASH_CMD_CLEAR_STATUS 0x50 78 #define FLASH_CMD_READ_STATUS 0x70 79 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8 80 #define FLASH_CMD_WRITE_BUFFER_PROG 0xE9 81 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0 82 83 #define FLASH_STATUS_DONE 0x80 84 #define FLASH_STATUS_ESS 0x40 85 #define FLASH_STATUS_ECLBS 0x20 86 #define FLASH_STATUS_PSLBS 0x10 87 #define FLASH_STATUS_VPENS 0x08 88 #define FLASH_STATUS_PSS 0x04 89 #define FLASH_STATUS_DPS 0x02 90 #define FLASH_STATUS_R 0x01 91 #define FLASH_STATUS_PROTECT 0x01 92 93 #define AMD_CMD_RESET 0xF0 94 #define AMD_CMD_WRITE 0xA0 95 #define AMD_CMD_ERASE_START 0x80 96 #define AMD_CMD_ERASE_SECTOR 0x30 97 #define AMD_CMD_UNLOCK_START 0xAA 98 #define AMD_CMD_UNLOCK_ACK 0x55 99 #define AMD_CMD_WRITE_TO_BUFFER 0x25 100 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29 101 102 #define AMD_STATUS_TOGGLE 0x40 103 #define AMD_STATUS_ERROR 0x20 104 105 #define ATM_CMD_UNLOCK_SECT 0x70 106 #define ATM_CMD_SOFTLOCK_START 0x80 107 #define ATM_CMD_LOCK_SECT 0x40 108 109 #define FLASH_OFFSET_MANUFACTURER_ID 0x00 110 #define FLASH_OFFSET_DEVICE_ID 0x01 111 #define FLASH_OFFSET_DEVICE_ID2 0x0E 112 #define FLASH_OFFSET_DEVICE_ID3 0x0F 113 #define FLASH_OFFSET_CFI 0x55 114 #define FLASH_OFFSET_CFI_ALT 0x555 115 #define FLASH_OFFSET_CFI_RESP 0x10 116 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13 117 /* extended query table primary address */ 118 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 119 #define FLASH_OFFSET_WTOUT 0x1F 120 #define FLASH_OFFSET_WBTOUT 0x20 121 #define FLASH_OFFSET_ETOUT 0x21 122 #define FLASH_OFFSET_CETOUT 0x22 123 #define FLASH_OFFSET_WMAX_TOUT 0x23 124 #define FLASH_OFFSET_WBMAX_TOUT 0x24 125 #define FLASH_OFFSET_EMAX_TOUT 0x25 126 #define FLASH_OFFSET_CEMAX_TOUT 0x26 127 #define FLASH_OFFSET_SIZE 0x27 128 #define FLASH_OFFSET_INTERFACE 0x28 129 #define FLASH_OFFSET_BUFFER_SIZE 0x2A 130 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C 131 #define FLASH_OFFSET_ERASE_REGIONS 0x2D 132 #define FLASH_OFFSET_PROTECT 0x02 133 #define FLASH_OFFSET_USER_PROTECTION 0x85 134 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 135 136 #define CFI_CMDSET_NONE 0 137 #define CFI_CMDSET_INTEL_EXTENDED 1 138 #define CFI_CMDSET_AMD_STANDARD 2 139 #define CFI_CMDSET_INTEL_STANDARD 3 140 #define CFI_CMDSET_AMD_EXTENDED 4 141 #define CFI_CMDSET_MITSU_STANDARD 256 142 #define CFI_CMDSET_MITSU_EXTENDED 257 143 #define CFI_CMDSET_SST 258 144 #define CFI_CMDSET_INTEL_PROG_REGIONS 512 145 146 #ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */ 147 # undef FLASH_CMD_RESET 148 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */ 149 #endif 150 151 typedef union { 152 unsigned char c; 153 unsigned short w; 154 unsigned long l; 155 unsigned long long ll; 156 } cfiword_t; 157 158 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */ 159 160 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; 161 162 /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */ 163 #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT 164 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT 165 #else 166 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS 167 #endif 168 169 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ 170 171 /* 172 * Check if chip width is defined. If not, start detecting with 8bit. 173 */ 174 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH 175 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT 176 #endif 177 178 typedef unsigned long flash_sect_t; 179 180 /* CFI standard query structure */ 181 struct cfi_qry { 182 u8 qry[3]; 183 u16 p_id; 184 u16 p_adr; 185 u16 a_id; 186 u16 a_adr; 187 u8 vcc_min; 188 u8 vcc_max; 189 u8 vpp_min; 190 u8 vpp_max; 191 u8 word_write_timeout_typ; 192 u8 buf_write_timeout_typ; 193 u8 block_erase_timeout_typ; 194 u8 chip_erase_timeout_typ; 195 u8 word_write_timeout_max; 196 u8 buf_write_timeout_max; 197 u8 block_erase_timeout_max; 198 u8 chip_erase_timeout_max; 199 u8 dev_size; 200 u16 interface_desc; 201 u16 max_buf_write_size; 202 u8 num_erase_regions; 203 u32 erase_region_info[NUM_ERASE_REGIONS]; 204 } __attribute__((packed)); 205 206 struct cfi_pri_hdr { 207 u8 pri[3]; 208 u8 major_version; 209 u8 minor_version; 210 } __attribute__((packed)); 211 212 static void flash_write8(u8 value, void *addr) 213 { 214 __raw_writeb(value, addr); 215 } 216 217 static void flash_write16(u16 value, void *addr) 218 { 219 __raw_writew(value, addr); 220 } 221 222 static void flash_write32(u32 value, void *addr) 223 { 224 __raw_writel(value, addr); 225 } 226 227 static void flash_write64(u64 value, void *addr) 228 { 229 /* No architectures currently implement __raw_writeq() */ 230 *(volatile u64 *)addr = value; 231 } 232 233 static u8 flash_read8(void *addr) 234 { 235 return __raw_readb(addr); 236 } 237 238 static u16 flash_read16(void *addr) 239 { 240 return __raw_readw(addr); 241 } 242 243 static u32 flash_read32(void *addr) 244 { 245 return __raw_readl(addr); 246 } 247 248 static u64 __flash_read64(void *addr) 249 { 250 /* No architectures currently implement __raw_readq() */ 251 return *(volatile u64 *)addr; 252 } 253 254 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); 255 256 /*----------------------------------------------------------------------- 257 */ 258 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 259 static flash_info_t *flash_get_info(ulong base) 260 { 261 int i; 262 flash_info_t * info = 0; 263 264 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { 265 info = & flash_info[i]; 266 if (info->size && info->start[0] <= base && 267 base <= info->start[0] + info->size - 1) 268 break; 269 } 270 271 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; 272 } 273 #endif 274 275 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) 276 { 277 if (sect != (info->sector_count - 1)) 278 return info->start[sect + 1] - info->start[sect]; 279 else 280 return info->start[0] + info->size - info->start[sect]; 281 } 282 283 /*----------------------------------------------------------------------- 284 * create an address based on the offset and the port width 285 */ 286 static inline void * 287 flash_map (flash_info_t * info, flash_sect_t sect, uint offset) 288 { 289 unsigned int byte_offset = offset * info->portwidth; 290 291 return map_physmem(info->start[sect] + byte_offset, 292 flash_sector_size(info, sect) - byte_offset, 293 MAP_NOCACHE); 294 } 295 296 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, 297 unsigned int offset, void *addr) 298 { 299 unsigned int byte_offset = offset * info->portwidth; 300 301 unmap_physmem(addr, flash_sector_size(info, sect) - byte_offset); 302 } 303 304 /*----------------------------------------------------------------------- 305 * make a proper sized command based on the port and chip widths 306 */ 307 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) 308 { 309 int i; 310 int cword_offset; 311 int cp_offset; 312 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 313 u32 cmd_le = cpu_to_le32(cmd); 314 #endif 315 uchar val; 316 uchar *cp = (uchar *) cmdbuf; 317 318 for (i = info->portwidth; i > 0; i--){ 319 cword_offset = (info->portwidth-i)%info->chipwidth; 320 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 321 cp_offset = info->portwidth - i; 322 val = *((uchar*)&cmd_le + cword_offset); 323 #else 324 cp_offset = i - 1; 325 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1); 326 #endif 327 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val; 328 } 329 } 330 331 #ifdef DEBUG 332 /*----------------------------------------------------------------------- 333 * Debug support 334 */ 335 static void print_longlong (char *str, unsigned long long data) 336 { 337 int i; 338 char *cp; 339 340 cp = (unsigned char *) &data; 341 for (i = 0; i < 8; i++) 342 sprintf (&str[i * 2], "%2.2x", *cp++); 343 } 344 345 static void flash_printqry (struct cfi_qry *qry) 346 { 347 u8 *p = (u8 *)qry; 348 int x, y; 349 350 for (x = 0; x < sizeof(struct cfi_qry); x += 16) { 351 debug("%02x : ", x); 352 for (y = 0; y < 16; y++) 353 debug("%2.2x ", p[x + y]); 354 debug(" "); 355 for (y = 0; y < 16; y++) { 356 unsigned char c = p[x + y]; 357 if (c >= 0x20 && c <= 0x7e) 358 debug("%c", c); 359 else 360 debug("."); 361 } 362 debug("\n"); 363 } 364 } 365 #endif 366 367 368 /*----------------------------------------------------------------------- 369 * read a character at a port width address 370 */ 371 static inline uchar flash_read_uchar (flash_info_t * info, uint offset) 372 { 373 uchar *cp; 374 uchar retval; 375 376 cp = flash_map (info, 0, offset); 377 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 378 retval = flash_read8(cp); 379 #else 380 retval = flash_read8(cp + info->portwidth - 1); 381 #endif 382 flash_unmap (info, 0, offset, cp); 383 return retval; 384 } 385 386 /*----------------------------------------------------------------------- 387 * read a word at a port width address, assume 16bit bus 388 */ 389 static inline ushort flash_read_word (flash_info_t * info, uint offset) 390 { 391 ushort *addr, retval; 392 393 addr = flash_map (info, 0, offset); 394 retval = flash_read16 (addr); 395 flash_unmap (info, 0, offset, addr); 396 return retval; 397 } 398 399 400 /*----------------------------------------------------------------------- 401 * read a long word by picking the least significant byte of each maximum 402 * port size word. Swap for ppc format. 403 */ 404 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, 405 uint offset) 406 { 407 uchar *addr; 408 ulong retval; 409 410 #ifdef DEBUG 411 int x; 412 #endif 413 addr = flash_map (info, sect, offset); 414 415 #ifdef DEBUG 416 debug ("long addr is at %p info->portwidth = %d\n", addr, 417 info->portwidth); 418 for (x = 0; x < 4 * info->portwidth; x++) { 419 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); 420 } 421 #endif 422 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 423 retval = ((flash_read8(addr) << 16) | 424 (flash_read8(addr + info->portwidth) << 24) | 425 (flash_read8(addr + 2 * info->portwidth)) | 426 (flash_read8(addr + 3 * info->portwidth) << 8)); 427 #else 428 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) | 429 (flash_read8(addr + info->portwidth - 1) << 16) | 430 (flash_read8(addr + 4 * info->portwidth - 1) << 8) | 431 (flash_read8(addr + 3 * info->portwidth - 1))); 432 #endif 433 flash_unmap(info, sect, offset, addr); 434 435 return retval; 436 } 437 438 /* 439 * Write a proper sized command to the correct address 440 */ 441 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, 442 uint offset, u32 cmd) 443 { 444 445 void *addr; 446 cfiword_t cword; 447 448 addr = flash_map (info, sect, offset); 449 flash_make_cmd (info, cmd, &cword); 450 switch (info->portwidth) { 451 case FLASH_CFI_8BIT: 452 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, 453 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 454 flash_write8(cword.c, addr); 455 break; 456 case FLASH_CFI_16BIT: 457 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, 458 cmd, cword.w, 459 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 460 flash_write16(cword.w, addr); 461 break; 462 case FLASH_CFI_32BIT: 463 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr, 464 cmd, cword.l, 465 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 466 flash_write32(cword.l, addr); 467 break; 468 case FLASH_CFI_64BIT: 469 #ifdef DEBUG 470 { 471 char str[20]; 472 473 print_longlong (str, cword.ll); 474 475 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", 476 addr, cmd, str, 477 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 478 } 479 #endif 480 flash_write64(cword.ll, addr); 481 break; 482 } 483 484 /* Ensure all the instructions are fully finished */ 485 sync(); 486 487 flash_unmap(info, sect, offset, addr); 488 } 489 490 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) 491 { 492 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START); 493 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK); 494 } 495 496 /*----------------------------------------------------------------------- 497 */ 498 static int flash_isequal (flash_info_t * info, flash_sect_t sect, 499 uint offset, uchar cmd) 500 { 501 void *addr; 502 cfiword_t cword; 503 int retval; 504 505 addr = flash_map (info, sect, offset); 506 flash_make_cmd (info, cmd, &cword); 507 508 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr); 509 switch (info->portwidth) { 510 case FLASH_CFI_8BIT: 511 debug ("is= %x %x\n", flash_read8(addr), cword.c); 512 retval = (flash_read8(addr) == cword.c); 513 break; 514 case FLASH_CFI_16BIT: 515 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w); 516 retval = (flash_read16(addr) == cword.w); 517 break; 518 case FLASH_CFI_32BIT: 519 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l); 520 retval = (flash_read32(addr) == cword.l); 521 break; 522 case FLASH_CFI_64BIT: 523 #ifdef DEBUG 524 { 525 char str1[20]; 526 char str2[20]; 527 528 print_longlong (str1, flash_read64(addr)); 529 print_longlong (str2, cword.ll); 530 debug ("is= %s %s\n", str1, str2); 531 } 532 #endif 533 retval = (flash_read64(addr) == cword.ll); 534 break; 535 default: 536 retval = 0; 537 break; 538 } 539 flash_unmap(info, sect, offset, addr); 540 541 return retval; 542 } 543 544 /*----------------------------------------------------------------------- 545 */ 546 static int flash_isset (flash_info_t * info, flash_sect_t sect, 547 uint offset, uchar cmd) 548 { 549 void *addr; 550 cfiword_t cword; 551 int retval; 552 553 addr = flash_map (info, sect, offset); 554 flash_make_cmd (info, cmd, &cword); 555 switch (info->portwidth) { 556 case FLASH_CFI_8BIT: 557 retval = ((flash_read8(addr) & cword.c) == cword.c); 558 break; 559 case FLASH_CFI_16BIT: 560 retval = ((flash_read16(addr) & cword.w) == cword.w); 561 break; 562 case FLASH_CFI_32BIT: 563 retval = ((flash_read32(addr) & cword.l) == cword.l); 564 break; 565 case FLASH_CFI_64BIT: 566 retval = ((flash_read64(addr) & cword.ll) == cword.ll); 567 break; 568 default: 569 retval = 0; 570 break; 571 } 572 flash_unmap(info, sect, offset, addr); 573 574 return retval; 575 } 576 577 /*----------------------------------------------------------------------- 578 */ 579 static int flash_toggle (flash_info_t * info, flash_sect_t sect, 580 uint offset, uchar cmd) 581 { 582 void *addr; 583 cfiword_t cword; 584 int retval; 585 586 addr = flash_map (info, sect, offset); 587 flash_make_cmd (info, cmd, &cword); 588 switch (info->portwidth) { 589 case FLASH_CFI_8BIT: 590 retval = flash_read8(addr) != flash_read8(addr); 591 break; 592 case FLASH_CFI_16BIT: 593 retval = flash_read16(addr) != flash_read16(addr); 594 break; 595 case FLASH_CFI_32BIT: 596 retval = flash_read32(addr) != flash_read32(addr); 597 break; 598 case FLASH_CFI_64BIT: 599 retval = ( (flash_read32( addr ) != flash_read32( addr )) || 600 (flash_read32(addr+4) != flash_read32(addr+4)) ); 601 break; 602 default: 603 retval = 0; 604 break; 605 } 606 flash_unmap(info, sect, offset, addr); 607 608 return retval; 609 } 610 611 /* 612 * flash_is_busy - check to see if the flash is busy 613 * 614 * This routine checks the status of the chip and returns true if the 615 * chip is busy. 616 */ 617 static int flash_is_busy (flash_info_t * info, flash_sect_t sect) 618 { 619 int retval; 620 621 switch (info->vendor) { 622 case CFI_CMDSET_INTEL_PROG_REGIONS: 623 case CFI_CMDSET_INTEL_STANDARD: 624 case CFI_CMDSET_INTEL_EXTENDED: 625 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE); 626 break; 627 case CFI_CMDSET_AMD_STANDARD: 628 case CFI_CMDSET_AMD_EXTENDED: 629 #ifdef CONFIG_FLASH_CFI_LEGACY 630 case CFI_CMDSET_AMD_LEGACY: 631 #endif 632 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); 633 break; 634 default: 635 retval = 0; 636 } 637 debug ("flash_is_busy: %d\n", retval); 638 return retval; 639 } 640 641 /*----------------------------------------------------------------------- 642 * wait for XSR.7 to be set. Time out with an error if it does not. 643 * This routine does not set the flash to read-array mode. 644 */ 645 static int flash_status_check (flash_info_t * info, flash_sect_t sector, 646 ulong tout, char *prompt) 647 { 648 ulong start; 649 650 #if CONFIG_SYS_HZ != 1000 651 tout *= CONFIG_SYS_HZ/1000; 652 #endif 653 654 /* Wait for command completion */ 655 start = get_timer (0); 656 while (flash_is_busy (info, sector)) { 657 if (get_timer (start) > tout) { 658 printf ("Flash %s timeout at address %lx data %lx\n", 659 prompt, info->start[sector], 660 flash_read_long (info, sector, 0)); 661 flash_write_cmd (info, sector, 0, info->cmd_reset); 662 return ERR_TIMOUT; 663 } 664 udelay (1); /* also triggers watchdog */ 665 } 666 return ERR_OK; 667 } 668 669 /*----------------------------------------------------------------------- 670 * Wait for XSR.7 to be set, if it times out print an error, otherwise 671 * do a full status check. 672 * 673 * This routine sets the flash to read-array mode. 674 */ 675 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, 676 ulong tout, char *prompt) 677 { 678 int retcode; 679 680 retcode = flash_status_check (info, sector, tout, prompt); 681 switch (info->vendor) { 682 case CFI_CMDSET_INTEL_PROG_REGIONS: 683 case CFI_CMDSET_INTEL_EXTENDED: 684 case CFI_CMDSET_INTEL_STANDARD: 685 if ((retcode != ERR_OK) 686 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { 687 retcode = ERR_INVAL; 688 printf ("Flash %s error at address %lx\n", prompt, 689 info->start[sector]); 690 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | 691 FLASH_STATUS_PSLBS)) { 692 puts ("Command Sequence Error.\n"); 693 } else if (flash_isset (info, sector, 0, 694 FLASH_STATUS_ECLBS)) { 695 puts ("Block Erase Error.\n"); 696 retcode = ERR_NOT_ERASED; 697 } else if (flash_isset (info, sector, 0, 698 FLASH_STATUS_PSLBS)) { 699 puts ("Locking Error\n"); 700 } 701 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) { 702 puts ("Block locked.\n"); 703 retcode = ERR_PROTECTED; 704 } 705 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) 706 puts ("Vpp Low Error.\n"); 707 } 708 flash_write_cmd (info, sector, 0, info->cmd_reset); 709 break; 710 default: 711 break; 712 } 713 return retcode; 714 } 715 716 /*----------------------------------------------------------------------- 717 */ 718 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) 719 { 720 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 721 unsigned short w; 722 unsigned int l; 723 unsigned long long ll; 724 #endif 725 726 switch (info->portwidth) { 727 case FLASH_CFI_8BIT: 728 cword->c = c; 729 break; 730 case FLASH_CFI_16BIT: 731 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 732 w = c; 733 w <<= 8; 734 cword->w = (cword->w >> 8) | w; 735 #else 736 cword->w = (cword->w << 8) | c; 737 #endif 738 break; 739 case FLASH_CFI_32BIT: 740 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 741 l = c; 742 l <<= 24; 743 cword->l = (cword->l >> 8) | l; 744 #else 745 cword->l = (cword->l << 8) | c; 746 #endif 747 break; 748 case FLASH_CFI_64BIT: 749 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 750 ll = c; 751 ll <<= 56; 752 cword->ll = (cword->ll >> 8) | ll; 753 #else 754 cword->ll = (cword->ll << 8) | c; 755 #endif 756 break; 757 } 758 } 759 760 /* loop through the sectors from the highest address when the passed 761 * address is greater or equal to the sector address we have a match 762 */ 763 static flash_sect_t find_sector (flash_info_t * info, ulong addr) 764 { 765 flash_sect_t sector; 766 767 for (sector = info->sector_count - 1; sector >= 0; sector--) { 768 if (addr >= info->start[sector]) 769 break; 770 } 771 return sector; 772 } 773 774 /*----------------------------------------------------------------------- 775 */ 776 static int flash_write_cfiword (flash_info_t * info, ulong dest, 777 cfiword_t cword) 778 { 779 void *dstaddr; 780 int flag; 781 flash_sect_t sect; 782 783 dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE); 784 785 /* Check if Flash is (sufficiently) erased */ 786 switch (info->portwidth) { 787 case FLASH_CFI_8BIT: 788 flag = ((flash_read8(dstaddr) & cword.c) == cword.c); 789 break; 790 case FLASH_CFI_16BIT: 791 flag = ((flash_read16(dstaddr) & cword.w) == cword.w); 792 break; 793 case FLASH_CFI_32BIT: 794 flag = ((flash_read32(dstaddr) & cword.l) == cword.l); 795 break; 796 case FLASH_CFI_64BIT: 797 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll); 798 break; 799 default: 800 flag = 0; 801 break; 802 } 803 if (!flag) { 804 unmap_physmem(dstaddr, info->portwidth); 805 return ERR_NOT_ERASED; 806 } 807 808 /* Disable interrupts which might cause a timeout here */ 809 flag = disable_interrupts (); 810 811 switch (info->vendor) { 812 case CFI_CMDSET_INTEL_PROG_REGIONS: 813 case CFI_CMDSET_INTEL_EXTENDED: 814 case CFI_CMDSET_INTEL_STANDARD: 815 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS); 816 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE); 817 break; 818 case CFI_CMDSET_AMD_EXTENDED: 819 case CFI_CMDSET_AMD_STANDARD: 820 #ifdef CONFIG_FLASH_CFI_LEGACY 821 case CFI_CMDSET_AMD_LEGACY: 822 #endif 823 sect = find_sector(info, dest); 824 flash_unlock_seq (info, sect); 825 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE); 826 break; 827 } 828 829 switch (info->portwidth) { 830 case FLASH_CFI_8BIT: 831 flash_write8(cword.c, dstaddr); 832 break; 833 case FLASH_CFI_16BIT: 834 flash_write16(cword.w, dstaddr); 835 break; 836 case FLASH_CFI_32BIT: 837 flash_write32(cword.l, dstaddr); 838 break; 839 case FLASH_CFI_64BIT: 840 flash_write64(cword.ll, dstaddr); 841 break; 842 } 843 844 /* re-enable interrupts if necessary */ 845 if (flag) 846 enable_interrupts (); 847 848 unmap_physmem(dstaddr, info->portwidth); 849 850 return flash_full_status_check (info, find_sector (info, dest), 851 info->write_tout, "write"); 852 } 853 854 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 855 856 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, 857 int len) 858 { 859 flash_sect_t sector; 860 int cnt; 861 int retcode; 862 void *src = cp; 863 void *dst = map_physmem(dest, len, MAP_NOCACHE); 864 void *dst2 = dst; 865 int flag = 0; 866 uint offset = 0; 867 unsigned int shift; 868 uchar write_cmd; 869 870 switch (info->portwidth) { 871 case FLASH_CFI_8BIT: 872 shift = 0; 873 break; 874 case FLASH_CFI_16BIT: 875 shift = 1; 876 break; 877 case FLASH_CFI_32BIT: 878 shift = 2; 879 break; 880 case FLASH_CFI_64BIT: 881 shift = 3; 882 break; 883 default: 884 retcode = ERR_INVAL; 885 goto out_unmap; 886 } 887 888 cnt = len >> shift; 889 890 while ((cnt-- > 0) && (flag == 0)) { 891 switch (info->portwidth) { 892 case FLASH_CFI_8BIT: 893 flag = ((flash_read8(dst2) & flash_read8(src)) == 894 flash_read8(src)); 895 src += 1, dst2 += 1; 896 break; 897 case FLASH_CFI_16BIT: 898 flag = ((flash_read16(dst2) & flash_read16(src)) == 899 flash_read16(src)); 900 src += 2, dst2 += 2; 901 break; 902 case FLASH_CFI_32BIT: 903 flag = ((flash_read32(dst2) & flash_read32(src)) == 904 flash_read32(src)); 905 src += 4, dst2 += 4; 906 break; 907 case FLASH_CFI_64BIT: 908 flag = ((flash_read64(dst2) & flash_read64(src)) == 909 flash_read64(src)); 910 src += 8, dst2 += 8; 911 break; 912 } 913 } 914 if (!flag) { 915 retcode = ERR_NOT_ERASED; 916 goto out_unmap; 917 } 918 919 src = cp; 920 sector = find_sector (info, dest); 921 922 switch (info->vendor) { 923 case CFI_CMDSET_INTEL_PROG_REGIONS: 924 case CFI_CMDSET_INTEL_STANDARD: 925 case CFI_CMDSET_INTEL_EXTENDED: 926 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ? 927 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER; 928 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 929 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS); 930 flash_write_cmd (info, sector, 0, write_cmd); 931 retcode = flash_status_check (info, sector, 932 info->buffer_write_tout, 933 "write to buffer"); 934 if (retcode == ERR_OK) { 935 /* reduce the number of loops by the width of 936 * the port */ 937 cnt = len >> shift; 938 flash_write_cmd (info, sector, 0, cnt - 1); 939 while (cnt-- > 0) { 940 switch (info->portwidth) { 941 case FLASH_CFI_8BIT: 942 flash_write8(flash_read8(src), dst); 943 src += 1, dst += 1; 944 break; 945 case FLASH_CFI_16BIT: 946 flash_write16(flash_read16(src), dst); 947 src += 2, dst += 2; 948 break; 949 case FLASH_CFI_32BIT: 950 flash_write32(flash_read32(src), dst); 951 src += 4, dst += 4; 952 break; 953 case FLASH_CFI_64BIT: 954 flash_write64(flash_read64(src), dst); 955 src += 8, dst += 8; 956 break; 957 default: 958 retcode = ERR_INVAL; 959 goto out_unmap; 960 } 961 } 962 flash_write_cmd (info, sector, 0, 963 FLASH_CMD_WRITE_BUFFER_CONFIRM); 964 retcode = flash_full_status_check ( 965 info, sector, info->buffer_write_tout, 966 "buffer write"); 967 } 968 969 break; 970 971 case CFI_CMDSET_AMD_STANDARD: 972 case CFI_CMDSET_AMD_EXTENDED: 973 flash_unlock_seq(info,0); 974 975 #ifdef CONFIG_FLASH_SPANSION_S29WS_N 976 offset = ((unsigned long)dst - info->start[sector]) >> shift; 977 #endif 978 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER); 979 cnt = len >> shift; 980 flash_write_cmd(info, sector, offset, (uchar)cnt - 1); 981 982 switch (info->portwidth) { 983 case FLASH_CFI_8BIT: 984 while (cnt-- > 0) { 985 flash_write8(flash_read8(src), dst); 986 src += 1, dst += 1; 987 } 988 break; 989 case FLASH_CFI_16BIT: 990 while (cnt-- > 0) { 991 flash_write16(flash_read16(src), dst); 992 src += 2, dst += 2; 993 } 994 break; 995 case FLASH_CFI_32BIT: 996 while (cnt-- > 0) { 997 flash_write32(flash_read32(src), dst); 998 src += 4, dst += 4; 999 } 1000 break; 1001 case FLASH_CFI_64BIT: 1002 while (cnt-- > 0) { 1003 flash_write64(flash_read64(src), dst); 1004 src += 8, dst += 8; 1005 } 1006 break; 1007 default: 1008 retcode = ERR_INVAL; 1009 goto out_unmap; 1010 } 1011 1012 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); 1013 retcode = flash_full_status_check (info, sector, 1014 info->buffer_write_tout, 1015 "buffer write"); 1016 break; 1017 1018 default: 1019 debug ("Unknown Command Set\n"); 1020 retcode = ERR_INVAL; 1021 break; 1022 } 1023 1024 out_unmap: 1025 unmap_physmem(dst, len); 1026 return retcode; 1027 } 1028 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1029 1030 1031 /*----------------------------------------------------------------------- 1032 */ 1033 int flash_erase (flash_info_t * info, int s_first, int s_last) 1034 { 1035 int rcode = 0; 1036 int prot; 1037 flash_sect_t sect; 1038 1039 if (info->flash_id != FLASH_MAN_CFI) { 1040 puts ("Can't erase unknown flash type - aborted\n"); 1041 return 1; 1042 } 1043 if ((s_first < 0) || (s_first > s_last)) { 1044 puts ("- no sectors to erase\n"); 1045 return 1; 1046 } 1047 1048 prot = 0; 1049 for (sect = s_first; sect <= s_last; ++sect) { 1050 if (info->protect[sect]) { 1051 prot++; 1052 } 1053 } 1054 if (prot) { 1055 printf ("- Warning: %d protected sectors will not be erased!\n", 1056 prot); 1057 } else { 1058 putc ('\n'); 1059 } 1060 1061 1062 for (sect = s_first; sect <= s_last; sect++) { 1063 if (info->protect[sect] == 0) { /* not protected */ 1064 switch (info->vendor) { 1065 case CFI_CMDSET_INTEL_PROG_REGIONS: 1066 case CFI_CMDSET_INTEL_STANDARD: 1067 case CFI_CMDSET_INTEL_EXTENDED: 1068 flash_write_cmd (info, sect, 0, 1069 FLASH_CMD_CLEAR_STATUS); 1070 flash_write_cmd (info, sect, 0, 1071 FLASH_CMD_BLOCK_ERASE); 1072 flash_write_cmd (info, sect, 0, 1073 FLASH_CMD_ERASE_CONFIRM); 1074 break; 1075 case CFI_CMDSET_AMD_STANDARD: 1076 case CFI_CMDSET_AMD_EXTENDED: 1077 flash_unlock_seq (info, sect); 1078 flash_write_cmd (info, sect, 1079 info->addr_unlock1, 1080 AMD_CMD_ERASE_START); 1081 flash_unlock_seq (info, sect); 1082 flash_write_cmd (info, sect, 0, 1083 AMD_CMD_ERASE_SECTOR); 1084 break; 1085 #ifdef CONFIG_FLASH_CFI_LEGACY 1086 case CFI_CMDSET_AMD_LEGACY: 1087 flash_unlock_seq (info, 0); 1088 flash_write_cmd (info, 0, info->addr_unlock1, 1089 AMD_CMD_ERASE_START); 1090 flash_unlock_seq (info, 0); 1091 flash_write_cmd (info, sect, 0, 1092 AMD_CMD_ERASE_SECTOR); 1093 break; 1094 #endif 1095 default: 1096 debug ("Unkown flash vendor %d\n", 1097 info->vendor); 1098 break; 1099 } 1100 1101 if (flash_full_status_check 1102 (info, sect, info->erase_blk_tout, "erase")) { 1103 rcode = 1; 1104 } else 1105 putc ('.'); 1106 } 1107 } 1108 puts (" done\n"); 1109 return rcode; 1110 } 1111 1112 /*----------------------------------------------------------------------- 1113 */ 1114 void flash_print_info (flash_info_t * info) 1115 { 1116 int i; 1117 1118 if (info->flash_id != FLASH_MAN_CFI) { 1119 puts ("missing or unknown FLASH type\n"); 1120 return; 1121 } 1122 1123 printf ("%s FLASH (%d x %d)", 1124 info->name, 1125 (info->portwidth << 3), (info->chipwidth << 3)); 1126 if (info->size < 1024*1024) 1127 printf (" Size: %ld kB in %d Sectors\n", 1128 info->size >> 10, info->sector_count); 1129 else 1130 printf (" Size: %ld MB in %d Sectors\n", 1131 info->size >> 20, info->sector_count); 1132 printf (" "); 1133 switch (info->vendor) { 1134 case CFI_CMDSET_INTEL_PROG_REGIONS: 1135 printf ("Intel Prog Regions"); 1136 break; 1137 case CFI_CMDSET_INTEL_STANDARD: 1138 printf ("Intel Standard"); 1139 break; 1140 case CFI_CMDSET_INTEL_EXTENDED: 1141 printf ("Intel Extended"); 1142 break; 1143 case CFI_CMDSET_AMD_STANDARD: 1144 printf ("AMD Standard"); 1145 break; 1146 case CFI_CMDSET_AMD_EXTENDED: 1147 printf ("AMD Extended"); 1148 break; 1149 #ifdef CONFIG_FLASH_CFI_LEGACY 1150 case CFI_CMDSET_AMD_LEGACY: 1151 printf ("AMD Legacy"); 1152 break; 1153 #endif 1154 default: 1155 printf ("Unknown (%d)", info->vendor); 1156 break; 1157 } 1158 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X", 1159 info->manufacturer_id, info->device_id); 1160 if (info->device_id == 0x7E) { 1161 printf("%04X", info->device_id2); 1162 } 1163 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", 1164 info->erase_blk_tout, 1165 info->write_tout); 1166 if (info->buffer_size > 1) { 1167 printf (" Buffer write timeout: %ld ms, " 1168 "buffer size: %d bytes\n", 1169 info->buffer_write_tout, 1170 info->buffer_size); 1171 } 1172 1173 puts ("\n Sector Start Addresses:"); 1174 for (i = 0; i < info->sector_count; ++i) { 1175 if ((i % 5) == 0) 1176 printf ("\n"); 1177 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 1178 int k; 1179 int size; 1180 int erased; 1181 volatile unsigned long *flash; 1182 1183 /* 1184 * Check if whole sector is erased 1185 */ 1186 size = flash_sector_size(info, i); 1187 erased = 1; 1188 flash = (volatile unsigned long *) info->start[i]; 1189 size = size >> 2; /* divide by 4 for longword access */ 1190 for (k = 0; k < size; k++) { 1191 if (*flash++ != 0xffffffff) { 1192 erased = 0; 1193 break; 1194 } 1195 } 1196 1197 /* print empty and read-only info */ 1198 printf (" %08lX %c %s ", 1199 info->start[i], 1200 erased ? 'E' : ' ', 1201 info->protect[i] ? "RO" : " "); 1202 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */ 1203 printf (" %08lX %s ", 1204 info->start[i], 1205 info->protect[i] ? "RO" : " "); 1206 #endif 1207 } 1208 putc ('\n'); 1209 return; 1210 } 1211 1212 /*----------------------------------------------------------------------- 1213 * This is used in a few places in write_buf() to show programming 1214 * progress. Making it a function is nasty because it needs to do side 1215 * effect updates to digit and dots. Repeated code is nasty too, so 1216 * we define it once here. 1217 */ 1218 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1219 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \ 1220 dots -= dots_sub; \ 1221 if ((scale > 0) && (dots <= 0)) { \ 1222 if ((digit % 5) == 0) \ 1223 printf ("%d", digit / 5); \ 1224 else \ 1225 putc ('.'); \ 1226 digit--; \ 1227 dots += scale; \ 1228 } 1229 #else 1230 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) 1231 #endif 1232 1233 /*----------------------------------------------------------------------- 1234 * Copy memory to flash, returns: 1235 * 0 - OK 1236 * 1 - write timeout 1237 * 2 - Flash not erased 1238 */ 1239 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) 1240 { 1241 ulong wp; 1242 uchar *p; 1243 int aln; 1244 cfiword_t cword; 1245 int i, rc; 1246 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1247 int buffered_size; 1248 #endif 1249 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1250 int digit = CONFIG_FLASH_SHOW_PROGRESS; 1251 int scale = 0; 1252 int dots = 0; 1253 1254 /* 1255 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes. 1256 */ 1257 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) { 1258 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) / 1259 CONFIG_FLASH_SHOW_PROGRESS); 1260 } 1261 #endif 1262 1263 /* get lower aligned address */ 1264 wp = (addr & ~(info->portwidth - 1)); 1265 1266 /* handle unaligned start */ 1267 if ((aln = addr - wp) != 0) { 1268 cword.l = 0; 1269 p = map_physmem(wp, info->portwidth, MAP_NOCACHE); 1270 for (i = 0; i < aln; ++i) 1271 flash_add_byte (info, &cword, flash_read8(p + i)); 1272 1273 for (; (i < info->portwidth) && (cnt > 0); i++) { 1274 flash_add_byte (info, &cword, *src++); 1275 cnt--; 1276 } 1277 for (; (cnt == 0) && (i < info->portwidth); ++i) 1278 flash_add_byte (info, &cword, flash_read8(p + i)); 1279 1280 rc = flash_write_cfiword (info, wp, cword); 1281 unmap_physmem(p, info->portwidth); 1282 if (rc != 0) 1283 return rc; 1284 1285 wp += i; 1286 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1287 } 1288 1289 /* handle the aligned part */ 1290 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1291 buffered_size = (info->portwidth / info->chipwidth); 1292 buffered_size *= info->buffer_size; 1293 while (cnt >= info->portwidth) { 1294 /* prohibit buffer write when buffer_size is 1 */ 1295 if (info->buffer_size == 1) { 1296 cword.l = 0; 1297 for (i = 0; i < info->portwidth; i++) 1298 flash_add_byte (info, &cword, *src++); 1299 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1300 return rc; 1301 wp += info->portwidth; 1302 cnt -= info->portwidth; 1303 continue; 1304 } 1305 1306 /* write buffer until next buffered_size aligned boundary */ 1307 i = buffered_size - (wp % buffered_size); 1308 if (i > cnt) 1309 i = cnt; 1310 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) 1311 return rc; 1312 i -= i & (info->portwidth - 1); 1313 wp += i; 1314 src += i; 1315 cnt -= i; 1316 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1317 } 1318 #else 1319 while (cnt >= info->portwidth) { 1320 cword.l = 0; 1321 for (i = 0; i < info->portwidth; i++) { 1322 flash_add_byte (info, &cword, *src++); 1323 } 1324 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1325 return rc; 1326 wp += info->portwidth; 1327 cnt -= info->portwidth; 1328 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth); 1329 } 1330 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1331 1332 if (cnt == 0) { 1333 return (0); 1334 } 1335 1336 /* 1337 * handle unaligned tail bytes 1338 */ 1339 cword.l = 0; 1340 p = map_physmem(wp, info->portwidth, MAP_NOCACHE); 1341 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) { 1342 flash_add_byte (info, &cword, *src++); 1343 --cnt; 1344 } 1345 for (; i < info->portwidth; ++i) 1346 flash_add_byte (info, &cword, flash_read8(p + i)); 1347 unmap_physmem(p, info->portwidth); 1348 1349 return flash_write_cfiword (info, wp, cword); 1350 } 1351 1352 /*----------------------------------------------------------------------- 1353 */ 1354 #ifdef CONFIG_SYS_FLASH_PROTECTION 1355 1356 int flash_real_protect (flash_info_t * info, long sector, int prot) 1357 { 1358 int retcode = 0; 1359 1360 switch (info->vendor) { 1361 case CFI_CMDSET_INTEL_PROG_REGIONS: 1362 case CFI_CMDSET_INTEL_STANDARD: 1363 case CFI_CMDSET_INTEL_EXTENDED: 1364 flash_write_cmd (info, sector, 0, 1365 FLASH_CMD_CLEAR_STATUS); 1366 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1367 if (prot) 1368 flash_write_cmd (info, sector, 0, 1369 FLASH_CMD_PROTECT_SET); 1370 else 1371 flash_write_cmd (info, sector, 0, 1372 FLASH_CMD_PROTECT_CLEAR); 1373 break; 1374 case CFI_CMDSET_AMD_EXTENDED: 1375 case CFI_CMDSET_AMD_STANDARD: 1376 /* U-Boot only checks the first byte */ 1377 if (info->manufacturer_id == (uchar)ATM_MANUFACT) { 1378 if (prot) { 1379 flash_unlock_seq (info, 0); 1380 flash_write_cmd (info, 0, 1381 info->addr_unlock1, 1382 ATM_CMD_SOFTLOCK_START); 1383 flash_unlock_seq (info, 0); 1384 flash_write_cmd (info, sector, 0, 1385 ATM_CMD_LOCK_SECT); 1386 } else { 1387 flash_write_cmd (info, 0, 1388 info->addr_unlock1, 1389 AMD_CMD_UNLOCK_START); 1390 if (info->device_id == ATM_ID_BV6416) 1391 flash_write_cmd (info, sector, 1392 0, ATM_CMD_UNLOCK_SECT); 1393 } 1394 } 1395 break; 1396 #ifdef CONFIG_FLASH_CFI_LEGACY 1397 case CFI_CMDSET_AMD_LEGACY: 1398 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 1399 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1400 if (prot) 1401 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); 1402 else 1403 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); 1404 #endif 1405 }; 1406 1407 if ((retcode = 1408 flash_full_status_check (info, sector, info->erase_blk_tout, 1409 prot ? "protect" : "unprotect")) == 0) { 1410 1411 info->protect[sector] = prot; 1412 1413 /* 1414 * On some of Intel's flash chips (marked via legacy_unlock) 1415 * unprotect unprotects all locking. 1416 */ 1417 if ((prot == 0) && (info->legacy_unlock)) { 1418 flash_sect_t i; 1419 1420 for (i = 0; i < info->sector_count; i++) { 1421 if (info->protect[i]) 1422 flash_real_protect (info, i, 1); 1423 } 1424 } 1425 } 1426 return retcode; 1427 } 1428 1429 /*----------------------------------------------------------------------- 1430 * flash_read_user_serial - read the OneTimeProgramming cells 1431 */ 1432 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, 1433 int len) 1434 { 1435 uchar *src; 1436 uchar *dst; 1437 1438 dst = buffer; 1439 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION); 1440 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1441 memcpy (dst, src + offset, len); 1442 flash_write_cmd (info, 0, 0, info->cmd_reset); 1443 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src); 1444 } 1445 1446 /* 1447 * flash_read_factory_serial - read the device Id from the protection area 1448 */ 1449 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, 1450 int len) 1451 { 1452 uchar *src; 1453 1454 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION); 1455 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1456 memcpy (buffer, src + offset, len); 1457 flash_write_cmd (info, 0, 0, info->cmd_reset); 1458 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); 1459 } 1460 1461 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 1462 1463 /*----------------------------------------------------------------------- 1464 * Reverse the order of the erase regions in the CFI QRY structure. 1465 * This is needed for chips that are either a) correctly detected as 1466 * top-boot, or b) buggy. 1467 */ 1468 static void cfi_reverse_geometry(struct cfi_qry *qry) 1469 { 1470 unsigned int i, j; 1471 u32 tmp; 1472 1473 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) { 1474 tmp = qry->erase_region_info[i]; 1475 qry->erase_region_info[i] = qry->erase_region_info[j]; 1476 qry->erase_region_info[j] = tmp; 1477 } 1478 } 1479 1480 /*----------------------------------------------------------------------- 1481 * read jedec ids from device and set corresponding fields in info struct 1482 * 1483 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct 1484 * 1485 */ 1486 static void cmdset_intel_read_jedec_ids(flash_info_t *info) 1487 { 1488 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1489 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); 1490 udelay(1000); /* some flash are slow to respond */ 1491 info->manufacturer_id = flash_read_uchar (info, 1492 FLASH_OFFSET_MANUFACTURER_ID); 1493 info->device_id = flash_read_uchar (info, 1494 FLASH_OFFSET_DEVICE_ID); 1495 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1496 } 1497 1498 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) 1499 { 1500 info->cmd_reset = FLASH_CMD_RESET; 1501 1502 cmdset_intel_read_jedec_ids(info); 1503 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1504 1505 #ifdef CONFIG_SYS_FLASH_PROTECTION 1506 /* read legacy lock/unlock bit from intel flash */ 1507 if (info->ext_addr) { 1508 info->legacy_unlock = flash_read_uchar (info, 1509 info->ext_addr + 5) & 0x08; 1510 } 1511 #endif 1512 1513 return 0; 1514 } 1515 1516 static void cmdset_amd_read_jedec_ids(flash_info_t *info) 1517 { 1518 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1519 flash_unlock_seq(info, 0); 1520 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); 1521 udelay(1000); /* some flash are slow to respond */ 1522 1523 info->manufacturer_id = flash_read_uchar (info, 1524 FLASH_OFFSET_MANUFACTURER_ID); 1525 1526 switch (info->chipwidth){ 1527 case FLASH_CFI_8BIT: 1528 info->device_id = flash_read_uchar (info, 1529 FLASH_OFFSET_DEVICE_ID); 1530 if (info->device_id == 0x7E) { 1531 /* AMD 3-byte (expanded) device ids */ 1532 info->device_id2 = flash_read_uchar (info, 1533 FLASH_OFFSET_DEVICE_ID2); 1534 info->device_id2 <<= 8; 1535 info->device_id2 |= flash_read_uchar (info, 1536 FLASH_OFFSET_DEVICE_ID3); 1537 } 1538 break; 1539 case FLASH_CFI_16BIT: 1540 info->device_id = flash_read_word (info, 1541 FLASH_OFFSET_DEVICE_ID); 1542 break; 1543 default: 1544 break; 1545 } 1546 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1547 } 1548 1549 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) 1550 { 1551 info->cmd_reset = AMD_CMD_RESET; 1552 1553 cmdset_amd_read_jedec_ids(info); 1554 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1555 1556 return 0; 1557 } 1558 1559 #ifdef CONFIG_FLASH_CFI_LEGACY 1560 static void flash_read_jedec_ids (flash_info_t * info) 1561 { 1562 info->manufacturer_id = 0; 1563 info->device_id = 0; 1564 info->device_id2 = 0; 1565 1566 switch (info->vendor) { 1567 case CFI_CMDSET_INTEL_PROG_REGIONS: 1568 case CFI_CMDSET_INTEL_STANDARD: 1569 case CFI_CMDSET_INTEL_EXTENDED: 1570 cmdset_intel_read_jedec_ids(info); 1571 break; 1572 case CFI_CMDSET_AMD_STANDARD: 1573 case CFI_CMDSET_AMD_EXTENDED: 1574 cmdset_amd_read_jedec_ids(info); 1575 break; 1576 default: 1577 break; 1578 } 1579 } 1580 1581 /*----------------------------------------------------------------------- 1582 * Call board code to request info about non-CFI flash. 1583 * board_flash_get_legacy needs to fill in at least: 1584 * info->portwidth, info->chipwidth and info->interface for Jedec probing. 1585 */ 1586 static int flash_detect_legacy(ulong base, int banknum) 1587 { 1588 flash_info_t *info = &flash_info[banknum]; 1589 1590 if (board_flash_get_legacy(base, banknum, info)) { 1591 /* board code may have filled info completely. If not, we 1592 use JEDEC ID probing. */ 1593 if (!info->vendor) { 1594 int modes[] = { 1595 CFI_CMDSET_AMD_STANDARD, 1596 CFI_CMDSET_INTEL_STANDARD 1597 }; 1598 int i; 1599 1600 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) { 1601 info->vendor = modes[i]; 1602 info->start[0] = base; 1603 if (info->portwidth == FLASH_CFI_8BIT 1604 && info->interface == FLASH_CFI_X8X16) { 1605 info->addr_unlock1 = 0x2AAA; 1606 info->addr_unlock2 = 0x5555; 1607 } else { 1608 info->addr_unlock1 = 0x5555; 1609 info->addr_unlock2 = 0x2AAA; 1610 } 1611 flash_read_jedec_ids(info); 1612 debug("JEDEC PROBE: ID %x %x %x\n", 1613 info->manufacturer_id, 1614 info->device_id, 1615 info->device_id2); 1616 if (jedec_flash_match(info, base)) 1617 break; 1618 } 1619 } 1620 1621 switch(info->vendor) { 1622 case CFI_CMDSET_INTEL_PROG_REGIONS: 1623 case CFI_CMDSET_INTEL_STANDARD: 1624 case CFI_CMDSET_INTEL_EXTENDED: 1625 info->cmd_reset = FLASH_CMD_RESET; 1626 break; 1627 case CFI_CMDSET_AMD_STANDARD: 1628 case CFI_CMDSET_AMD_EXTENDED: 1629 case CFI_CMDSET_AMD_LEGACY: 1630 info->cmd_reset = AMD_CMD_RESET; 1631 break; 1632 } 1633 info->flash_id = FLASH_MAN_CFI; 1634 return 1; 1635 } 1636 return 0; /* use CFI */ 1637 } 1638 #else 1639 static inline int flash_detect_legacy(ulong base, int banknum) 1640 { 1641 return 0; /* use CFI */ 1642 } 1643 #endif 1644 1645 /*----------------------------------------------------------------------- 1646 * detect if flash is compatible with the Common Flash Interface (CFI) 1647 * http://www.jedec.org/download/search/jesd68.pdf 1648 */ 1649 static void flash_read_cfi (flash_info_t *info, void *buf, 1650 unsigned int start, size_t len) 1651 { 1652 u8 *p = buf; 1653 unsigned int i; 1654 1655 for (i = 0; i < len; i++) 1656 p[i] = flash_read_uchar(info, start + i); 1657 } 1658 1659 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1660 { 1661 int cfi_offset; 1662 1663 /* We do not yet know what kind of commandset to use, so we issue 1664 the reset command in both Intel and AMD variants, in the hope 1665 that AMD flash roms ignore the Intel command. */ 1666 flash_write_cmd (info, 0, 0, AMD_CMD_RESET); 1667 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET); 1668 1669 for (cfi_offset=0; 1670 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); 1671 cfi_offset++) { 1672 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], 1673 FLASH_CMD_CFI); 1674 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') 1675 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') 1676 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { 1677 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, 1678 sizeof(struct cfi_qry)); 1679 info->interface = le16_to_cpu(qry->interface_desc); 1680 1681 info->cfi_offset = flash_offset_cfi[cfi_offset]; 1682 debug ("device interface is %d\n", 1683 info->interface); 1684 debug ("found port %d chip %d ", 1685 info->portwidth, info->chipwidth); 1686 debug ("port %d bits chip %d bits\n", 1687 info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1688 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1689 1690 /* calculate command offsets as in the Linux driver */ 1691 info->addr_unlock1 = 0x555; 1692 info->addr_unlock2 = 0x2aa; 1693 1694 /* 1695 * modify the unlock address if we are 1696 * in compatibility mode 1697 */ 1698 if ( /* x8/x16 in x8 mode */ 1699 ((info->chipwidth == FLASH_CFI_BY8) && 1700 (info->interface == FLASH_CFI_X8X16)) || 1701 /* x16/x32 in x16 mode */ 1702 ((info->chipwidth == FLASH_CFI_BY16) && 1703 (info->interface == FLASH_CFI_X16X32))) 1704 { 1705 info->addr_unlock1 = 0xaaa; 1706 info->addr_unlock2 = 0x555; 1707 } 1708 1709 info->name = "CFI conformant"; 1710 return 1; 1711 } 1712 } 1713 1714 return 0; 1715 } 1716 1717 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1718 { 1719 debug ("flash detect cfi\n"); 1720 1721 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH; 1722 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { 1723 for (info->chipwidth = FLASH_CFI_BY8; 1724 info->chipwidth <= info->portwidth; 1725 info->chipwidth <<= 1) 1726 if (__flash_detect_cfi(info, qry)) 1727 return 1; 1728 } 1729 debug ("not found\n"); 1730 return 0; 1731 } 1732 1733 /* 1734 * Manufacturer-specific quirks. Add workarounds for geometry 1735 * reversal, etc. here. 1736 */ 1737 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry) 1738 { 1739 /* check if flash geometry needs reversal */ 1740 if (qry->num_erase_regions > 1) { 1741 /* reverse geometry if top boot part */ 1742 if (info->cfi_version < 0x3131) { 1743 /* CFI < 1.1, try to guess from device id */ 1744 if ((info->device_id & 0x80) != 0) 1745 cfi_reverse_geometry(qry); 1746 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { 1747 /* CFI >= 1.1, deduct from top/bottom flag */ 1748 /* note: ext_addr is valid since cfi_version > 0 */ 1749 cfi_reverse_geometry(qry); 1750 } 1751 } 1752 } 1753 1754 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry) 1755 { 1756 int reverse_geometry = 0; 1757 1758 /* Check the "top boot" bit in the PRI */ 1759 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1)) 1760 reverse_geometry = 1; 1761 1762 /* AT49BV6416(T) list the erase regions in the wrong order. 1763 * However, the device ID is identical with the non-broken 1764 * AT49BV642D since u-boot only reads the low byte (they 1765 * differ in the high byte.) So leave out this fixup for now. 1766 */ 1767 #if 0 1768 if (info->device_id == 0xd6 || info->device_id == 0xd2) 1769 reverse_geometry = !reverse_geometry; 1770 #endif 1771 1772 if (reverse_geometry) 1773 cfi_reverse_geometry(qry); 1774 } 1775 1776 /* 1777 * The following code cannot be run from FLASH! 1778 * 1779 */ 1780 ulong flash_get_size (ulong base, int banknum) 1781 { 1782 flash_info_t *info = &flash_info[banknum]; 1783 int i, j; 1784 flash_sect_t sect_cnt; 1785 unsigned long sector; 1786 unsigned long tmp; 1787 int size_ratio; 1788 uchar num_erase_regions; 1789 int erase_region_size; 1790 int erase_region_count; 1791 struct cfi_qry qry; 1792 1793 memset(&qry, 0, sizeof(qry)); 1794 1795 info->ext_addr = 0; 1796 info->cfi_version = 0; 1797 #ifdef CONFIG_SYS_FLASH_PROTECTION 1798 info->legacy_unlock = 0; 1799 #endif 1800 1801 info->start[0] = base; 1802 1803 if (flash_detect_cfi (info, &qry)) { 1804 info->vendor = le16_to_cpu(qry.p_id); 1805 info->ext_addr = le16_to_cpu(qry.p_adr); 1806 num_erase_regions = qry.num_erase_regions; 1807 1808 if (info->ext_addr) { 1809 info->cfi_version = (ushort) flash_read_uchar (info, 1810 info->ext_addr + 3) << 8; 1811 info->cfi_version |= (ushort) flash_read_uchar (info, 1812 info->ext_addr + 4); 1813 } 1814 1815 #ifdef DEBUG 1816 flash_printqry (&qry); 1817 #endif 1818 1819 switch (info->vendor) { 1820 case CFI_CMDSET_INTEL_PROG_REGIONS: 1821 case CFI_CMDSET_INTEL_STANDARD: 1822 case CFI_CMDSET_INTEL_EXTENDED: 1823 cmdset_intel_init(info, &qry); 1824 break; 1825 case CFI_CMDSET_AMD_STANDARD: 1826 case CFI_CMDSET_AMD_EXTENDED: 1827 cmdset_amd_init(info, &qry); 1828 break; 1829 default: 1830 printf("CFI: Unknown command set 0x%x\n", 1831 info->vendor); 1832 /* 1833 * Unfortunately, this means we don't know how 1834 * to get the chip back to Read mode. Might 1835 * as well try an Intel-style reset... 1836 */ 1837 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1838 return 0; 1839 } 1840 1841 /* Do manufacturer-specific fixups */ 1842 switch (info->manufacturer_id) { 1843 case 0x0001: 1844 flash_fixup_amd(info, &qry); 1845 break; 1846 case 0x001f: 1847 flash_fixup_atmel(info, &qry); 1848 break; 1849 } 1850 1851 debug ("manufacturer is %d\n", info->vendor); 1852 debug ("manufacturer id is 0x%x\n", info->manufacturer_id); 1853 debug ("device id is 0x%x\n", info->device_id); 1854 debug ("device id2 is 0x%x\n", info->device_id2); 1855 debug ("cfi version is 0x%04x\n", info->cfi_version); 1856 1857 size_ratio = info->portwidth / info->chipwidth; 1858 /* if the chip is x8/x16 reduce the ratio by half */ 1859 if ((info->interface == FLASH_CFI_X8X16) 1860 && (info->chipwidth == FLASH_CFI_BY8)) { 1861 size_ratio >>= 1; 1862 } 1863 debug ("size_ratio %d port %d bits chip %d bits\n", 1864 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1865 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1866 debug ("found %d erase regions\n", num_erase_regions); 1867 sect_cnt = 0; 1868 sector = base; 1869 for (i = 0; i < num_erase_regions; i++) { 1870 if (i > NUM_ERASE_REGIONS) { 1871 printf ("%d erase regions found, only %d used\n", 1872 num_erase_regions, NUM_ERASE_REGIONS); 1873 break; 1874 } 1875 1876 tmp = le32_to_cpu(qry.erase_region_info[i]); 1877 debug("erase region %u: 0x%08lx\n", i, tmp); 1878 1879 erase_region_count = (tmp & 0xffff) + 1; 1880 tmp >>= 16; 1881 erase_region_size = 1882 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; 1883 debug ("erase_region_count = %d erase_region_size = %d\n", 1884 erase_region_count, erase_region_size); 1885 for (j = 0; j < erase_region_count; j++) { 1886 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { 1887 printf("ERROR: too many flash sectors\n"); 1888 break; 1889 } 1890 info->start[sect_cnt] = sector; 1891 sector += (erase_region_size * size_ratio); 1892 1893 /* 1894 * Only read protection status from 1895 * supported devices (intel...) 1896 */ 1897 switch (info->vendor) { 1898 case CFI_CMDSET_INTEL_PROG_REGIONS: 1899 case CFI_CMDSET_INTEL_EXTENDED: 1900 case CFI_CMDSET_INTEL_STANDARD: 1901 info->protect[sect_cnt] = 1902 flash_isset (info, sect_cnt, 1903 FLASH_OFFSET_PROTECT, 1904 FLASH_STATUS_PROTECT); 1905 break; 1906 default: 1907 /* default: not protected */ 1908 info->protect[sect_cnt] = 0; 1909 } 1910 1911 sect_cnt++; 1912 } 1913 } 1914 1915 info->sector_count = sect_cnt; 1916 info->size = 1 << qry.dev_size; 1917 /* multiply the size by the number of chips */ 1918 info->size *= size_ratio; 1919 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size); 1920 tmp = 1 << qry.block_erase_timeout_typ; 1921 info->erase_blk_tout = tmp * 1922 (1 << qry.block_erase_timeout_max); 1923 tmp = (1 << qry.buf_write_timeout_typ) * 1924 (1 << qry.buf_write_timeout_max); 1925 1926 /* round up when converting to ms */ 1927 info->buffer_write_tout = (tmp + 999) / 1000; 1928 tmp = (1 << qry.word_write_timeout_typ) * 1929 (1 << qry.word_write_timeout_max); 1930 /* round up when converting to ms */ 1931 info->write_tout = (tmp + 999) / 1000; 1932 info->flash_id = FLASH_MAN_CFI; 1933 if ((info->interface == FLASH_CFI_X8X16) && 1934 (info->chipwidth == FLASH_CFI_BY8)) { 1935 /* XXX - Need to test on x8/x16 in parallel. */ 1936 info->portwidth >>= 1; 1937 } 1938 1939 flash_write_cmd (info, 0, 0, info->cmd_reset); 1940 } 1941 1942 return (info->size); 1943 } 1944 1945 /*----------------------------------------------------------------------- 1946 */ 1947 unsigned long flash_init (void) 1948 { 1949 unsigned long size = 0; 1950 int i; 1951 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 1952 struct apl_s { 1953 ulong start; 1954 ulong size; 1955 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST; 1956 #endif 1957 1958 #ifdef CONFIG_SYS_FLASH_PROTECTION 1959 char *s = getenv("unlock"); 1960 #endif 1961 1962 #define BANK_BASE(i) (((unsigned long [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i]) 1963 1964 /* Init: no FLASHes known */ 1965 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { 1966 flash_info[i].flash_id = FLASH_UNKNOWN; 1967 1968 if (!flash_detect_legacy (BANK_BASE(i), i)) 1969 flash_get_size (BANK_BASE(i), i); 1970 size += flash_info[i].size; 1971 if (flash_info[i].flash_id == FLASH_UNKNOWN) { 1972 #ifndef CONFIG_SYS_FLASH_QUIET_TEST 1973 printf ("## Unknown FLASH on Bank %d " 1974 "- Size = 0x%08lx = %ld MB\n", 1975 i+1, flash_info[i].size, 1976 flash_info[i].size << 20); 1977 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */ 1978 } 1979 #ifdef CONFIG_SYS_FLASH_PROTECTION 1980 else if ((s != NULL) && (strcmp(s, "yes") == 0)) { 1981 /* 1982 * Only the U-Boot image and it's environment 1983 * is protected, all other sectors are 1984 * unprotected (unlocked) if flash hardware 1985 * protection is used (CONFIG_SYS_FLASH_PROTECTION) 1986 * and the environment variable "unlock" is 1987 * set to "yes". 1988 */ 1989 if (flash_info[i].legacy_unlock) { 1990 int k; 1991 1992 /* 1993 * Disable legacy_unlock temporarily, 1994 * since flash_real_protect would 1995 * relock all other sectors again 1996 * otherwise. 1997 */ 1998 flash_info[i].legacy_unlock = 0; 1999 2000 /* 2001 * Legacy unlocking (e.g. Intel J3) -> 2002 * unlock only one sector. This will 2003 * unlock all sectors. 2004 */ 2005 flash_real_protect (&flash_info[i], 0, 0); 2006 2007 flash_info[i].legacy_unlock = 1; 2008 2009 /* 2010 * Manually mark other sectors as 2011 * unlocked (unprotected) 2012 */ 2013 for (k = 1; k < flash_info[i].sector_count; k++) 2014 flash_info[i].protect[k] = 0; 2015 } else { 2016 /* 2017 * No legancy unlocking -> unlock all sectors 2018 */ 2019 flash_protect (FLAG_PROTECT_CLEAR, 2020 flash_info[i].start[0], 2021 flash_info[i].start[0] 2022 + flash_info[i].size - 1, 2023 &flash_info[i]); 2024 } 2025 } 2026 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 2027 } 2028 2029 /* Monitor protection ON by default */ 2030 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 2031 flash_protect (FLAG_PROTECT_SET, 2032 CONFIG_SYS_MONITOR_BASE, 2033 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, 2034 flash_get_info(CONFIG_SYS_MONITOR_BASE)); 2035 #endif 2036 2037 /* Environment protection ON by default */ 2038 #ifdef CONFIG_ENV_IS_IN_FLASH 2039 flash_protect (FLAG_PROTECT_SET, 2040 CONFIG_ENV_ADDR, 2041 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, 2042 flash_get_info(CONFIG_ENV_ADDR)); 2043 #endif 2044 2045 /* Redundant environment protection ON by default */ 2046 #ifdef CONFIG_ENV_ADDR_REDUND 2047 flash_protect (FLAG_PROTECT_SET, 2048 CONFIG_ENV_ADDR_REDUND, 2049 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1, 2050 flash_get_info(CONFIG_ENV_ADDR_REDUND)); 2051 #endif 2052 2053 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2054 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) { 2055 debug("autoprotecting from %08x to %08x\n", 2056 apl[i].start, apl[i].start + apl[i].size - 1); 2057 flash_protect (FLAG_PROTECT_SET, 2058 apl[i].start, 2059 apl[i].start + apl[i].size - 1, 2060 flash_get_info(apl[i].start)); 2061 } 2062 #endif 2063 return (size); 2064 } 2065