1 /* 2 * (C) Copyright 2002-2004 3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com 4 * 5 * Copyright (C) 2003 Arabella Software Ltd. 6 * Yuli Barcohen <yuli@arabellasw.com> 7 * 8 * Copyright (C) 2004 9 * Ed Okerson 10 * 11 * Copyright (C) 2006 12 * Tolunay Orkun <listmember@orkun.us> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 * 32 */ 33 34 /* The DEBUG define must be before common to enable debugging */ 35 /* #define DEBUG */ 36 37 #include <common.h> 38 #include <asm/processor.h> 39 #include <asm/io.h> 40 #include <asm/byteorder.h> 41 #include <environment.h> 42 #include <mtd/cfi_flash.h> 43 44 /* 45 * This file implements a Common Flash Interface (CFI) driver for 46 * U-Boot. 47 * 48 * The width of the port and the width of the chips are determined at 49 * initialization. These widths are used to calculate the address for 50 * access CFI data structures. 51 * 52 * References 53 * JEDEC Standard JESD68 - Common Flash Interface (CFI) 54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes 55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets 56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet 57 * AMD CFI Specification, Release 2.0 December 1, 2001 58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte 59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001 60 * 61 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between 62 * reading and writing ... (yes there is such a Hardware). 63 */ 64 65 #ifndef CONFIG_SYS_FLASH_BANKS_LIST 66 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 67 #endif 68 69 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; 70 static uint flash_verbose = 1; 71 72 /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */ 73 #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT 74 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT 75 #else 76 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS 77 #endif 78 79 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ 80 81 /* 82 * Check if chip width is defined. If not, start detecting with 8bit. 83 */ 84 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH 85 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT 86 #endif 87 88 static void __flash_write8(u8 value, void *addr) 89 { 90 __raw_writeb(value, addr); 91 } 92 93 static void __flash_write16(u16 value, void *addr) 94 { 95 __raw_writew(value, addr); 96 } 97 98 static void __flash_write32(u32 value, void *addr) 99 { 100 __raw_writel(value, addr); 101 } 102 103 static void __flash_write64(u64 value, void *addr) 104 { 105 /* No architectures currently implement __raw_writeq() */ 106 *(volatile u64 *)addr = value; 107 } 108 109 static u8 __flash_read8(void *addr) 110 { 111 return __raw_readb(addr); 112 } 113 114 static u16 __flash_read16(void *addr) 115 { 116 return __raw_readw(addr); 117 } 118 119 static u32 __flash_read32(void *addr) 120 { 121 return __raw_readl(addr); 122 } 123 124 static u64 __flash_read64(void *addr) 125 { 126 /* No architectures currently implement __raw_readq() */ 127 return *(volatile u64 *)addr; 128 } 129 130 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 131 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8"))); 132 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16"))); 133 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32"))); 134 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64"))); 135 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8"))); 136 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16"))); 137 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32"))); 138 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); 139 #else 140 #define flash_write8 __flash_write8 141 #define flash_write16 __flash_write16 142 #define flash_write32 __flash_write32 143 #define flash_write64 __flash_write64 144 #define flash_read8 __flash_read8 145 #define flash_read16 __flash_read16 146 #define flash_read32 __flash_read32 147 #define flash_read64 __flash_read64 148 #endif 149 150 /*----------------------------------------------------------------------- 151 */ 152 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 153 flash_info_t *flash_get_info(ulong base) 154 { 155 int i; 156 flash_info_t * info = 0; 157 158 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { 159 info = & flash_info[i]; 160 if (info->size && info->start[0] <= base && 161 base <= info->start[0] + info->size - 1) 162 break; 163 } 164 165 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; 166 } 167 #endif 168 169 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) 170 { 171 if (sect != (info->sector_count - 1)) 172 return info->start[sect + 1] - info->start[sect]; 173 else 174 return info->start[0] + info->size - info->start[sect]; 175 } 176 177 /*----------------------------------------------------------------------- 178 * create an address based on the offset and the port width 179 */ 180 static inline void * 181 flash_map (flash_info_t * info, flash_sect_t sect, uint offset) 182 { 183 unsigned int byte_offset = offset * info->portwidth; 184 185 return (void *)(info->start[sect] + byte_offset); 186 } 187 188 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, 189 unsigned int offset, void *addr) 190 { 191 } 192 193 /*----------------------------------------------------------------------- 194 * make a proper sized command based on the port and chip widths 195 */ 196 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) 197 { 198 int i; 199 int cword_offset; 200 int cp_offset; 201 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 202 u32 cmd_le = cpu_to_le32(cmd); 203 #endif 204 uchar val; 205 uchar *cp = (uchar *) cmdbuf; 206 207 for (i = info->portwidth; i > 0; i--){ 208 cword_offset = (info->portwidth-i)%info->chipwidth; 209 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 210 cp_offset = info->portwidth - i; 211 val = *((uchar*)&cmd_le + cword_offset); 212 #else 213 cp_offset = i - 1; 214 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1); 215 #endif 216 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val; 217 } 218 } 219 220 #ifdef DEBUG 221 /*----------------------------------------------------------------------- 222 * Debug support 223 */ 224 static void print_longlong (char *str, unsigned long long data) 225 { 226 int i; 227 char *cp; 228 229 cp = (char *) &data; 230 for (i = 0; i < 8; i++) 231 sprintf (&str[i * 2], "%2.2x", *cp++); 232 } 233 234 static void flash_printqry (struct cfi_qry *qry) 235 { 236 u8 *p = (u8 *)qry; 237 int x, y; 238 239 for (x = 0; x < sizeof(struct cfi_qry); x += 16) { 240 debug("%02x : ", x); 241 for (y = 0; y < 16; y++) 242 debug("%2.2x ", p[x + y]); 243 debug(" "); 244 for (y = 0; y < 16; y++) { 245 unsigned char c = p[x + y]; 246 if (c >= 0x20 && c <= 0x7e) 247 debug("%c", c); 248 else 249 debug("."); 250 } 251 debug("\n"); 252 } 253 } 254 #endif 255 256 257 /*----------------------------------------------------------------------- 258 * read a character at a port width address 259 */ 260 static inline uchar flash_read_uchar (flash_info_t * info, uint offset) 261 { 262 uchar *cp; 263 uchar retval; 264 265 cp = flash_map (info, 0, offset); 266 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 267 retval = flash_read8(cp); 268 #else 269 retval = flash_read8(cp + info->portwidth - 1); 270 #endif 271 flash_unmap (info, 0, offset, cp); 272 return retval; 273 } 274 275 /*----------------------------------------------------------------------- 276 * read a word at a port width address, assume 16bit bus 277 */ 278 static inline ushort flash_read_word (flash_info_t * info, uint offset) 279 { 280 ushort *addr, retval; 281 282 addr = flash_map (info, 0, offset); 283 retval = flash_read16 (addr); 284 flash_unmap (info, 0, offset, addr); 285 return retval; 286 } 287 288 289 /*----------------------------------------------------------------------- 290 * read a long word by picking the least significant byte of each maximum 291 * port size word. Swap for ppc format. 292 */ 293 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, 294 uint offset) 295 { 296 uchar *addr; 297 ulong retval; 298 299 #ifdef DEBUG 300 int x; 301 #endif 302 addr = flash_map (info, sect, offset); 303 304 #ifdef DEBUG 305 debug ("long addr is at %p info->portwidth = %d\n", addr, 306 info->portwidth); 307 for (x = 0; x < 4 * info->portwidth; x++) { 308 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); 309 } 310 #endif 311 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 312 retval = ((flash_read8(addr) << 16) | 313 (flash_read8(addr + info->portwidth) << 24) | 314 (flash_read8(addr + 2 * info->portwidth)) | 315 (flash_read8(addr + 3 * info->portwidth) << 8)); 316 #else 317 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) | 318 (flash_read8(addr + info->portwidth - 1) << 16) | 319 (flash_read8(addr + 4 * info->portwidth - 1) << 8) | 320 (flash_read8(addr + 3 * info->portwidth - 1))); 321 #endif 322 flash_unmap(info, sect, offset, addr); 323 324 return retval; 325 } 326 327 /* 328 * Write a proper sized command to the correct address 329 */ 330 void flash_write_cmd (flash_info_t * info, flash_sect_t sect, 331 uint offset, u32 cmd) 332 { 333 334 void *addr; 335 cfiword_t cword; 336 337 addr = flash_map (info, sect, offset); 338 flash_make_cmd (info, cmd, &cword); 339 switch (info->portwidth) { 340 case FLASH_CFI_8BIT: 341 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, 342 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 343 flash_write8(cword.c, addr); 344 break; 345 case FLASH_CFI_16BIT: 346 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, 347 cmd, cword.w, 348 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 349 flash_write16(cword.w, addr); 350 break; 351 case FLASH_CFI_32BIT: 352 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr, 353 cmd, cword.l, 354 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 355 flash_write32(cword.l, addr); 356 break; 357 case FLASH_CFI_64BIT: 358 #ifdef DEBUG 359 { 360 char str[20]; 361 362 print_longlong (str, cword.ll); 363 364 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", 365 addr, cmd, str, 366 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 367 } 368 #endif 369 flash_write64(cword.ll, addr); 370 break; 371 } 372 373 /* Ensure all the instructions are fully finished */ 374 sync(); 375 376 flash_unmap(info, sect, offset, addr); 377 } 378 379 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) 380 { 381 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START); 382 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK); 383 } 384 385 /*----------------------------------------------------------------------- 386 */ 387 static int flash_isequal (flash_info_t * info, flash_sect_t sect, 388 uint offset, uchar cmd) 389 { 390 void *addr; 391 cfiword_t cword; 392 int retval; 393 394 addr = flash_map (info, sect, offset); 395 flash_make_cmd (info, cmd, &cword); 396 397 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr); 398 switch (info->portwidth) { 399 case FLASH_CFI_8BIT: 400 debug ("is= %x %x\n", flash_read8(addr), cword.c); 401 retval = (flash_read8(addr) == cword.c); 402 break; 403 case FLASH_CFI_16BIT: 404 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w); 405 retval = (flash_read16(addr) == cword.w); 406 break; 407 case FLASH_CFI_32BIT: 408 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l); 409 retval = (flash_read32(addr) == cword.l); 410 break; 411 case FLASH_CFI_64BIT: 412 #ifdef DEBUG 413 { 414 char str1[20]; 415 char str2[20]; 416 417 print_longlong (str1, flash_read64(addr)); 418 print_longlong (str2, cword.ll); 419 debug ("is= %s %s\n", str1, str2); 420 } 421 #endif 422 retval = (flash_read64(addr) == cword.ll); 423 break; 424 default: 425 retval = 0; 426 break; 427 } 428 flash_unmap(info, sect, offset, addr); 429 430 return retval; 431 } 432 433 /*----------------------------------------------------------------------- 434 */ 435 static int flash_isset (flash_info_t * info, flash_sect_t sect, 436 uint offset, uchar cmd) 437 { 438 void *addr; 439 cfiword_t cword; 440 int retval; 441 442 addr = flash_map (info, sect, offset); 443 flash_make_cmd (info, cmd, &cword); 444 switch (info->portwidth) { 445 case FLASH_CFI_8BIT: 446 retval = ((flash_read8(addr) & cword.c) == cword.c); 447 break; 448 case FLASH_CFI_16BIT: 449 retval = ((flash_read16(addr) & cword.w) == cword.w); 450 break; 451 case FLASH_CFI_32BIT: 452 retval = ((flash_read32(addr) & cword.l) == cword.l); 453 break; 454 case FLASH_CFI_64BIT: 455 retval = ((flash_read64(addr) & cword.ll) == cword.ll); 456 break; 457 default: 458 retval = 0; 459 break; 460 } 461 flash_unmap(info, sect, offset, addr); 462 463 return retval; 464 } 465 466 /*----------------------------------------------------------------------- 467 */ 468 static int flash_toggle (flash_info_t * info, flash_sect_t sect, 469 uint offset, uchar cmd) 470 { 471 void *addr; 472 cfiword_t cword; 473 int retval; 474 475 addr = flash_map (info, sect, offset); 476 flash_make_cmd (info, cmd, &cword); 477 switch (info->portwidth) { 478 case FLASH_CFI_8BIT: 479 retval = flash_read8(addr) != flash_read8(addr); 480 break; 481 case FLASH_CFI_16BIT: 482 retval = flash_read16(addr) != flash_read16(addr); 483 break; 484 case FLASH_CFI_32BIT: 485 retval = flash_read32(addr) != flash_read32(addr); 486 break; 487 case FLASH_CFI_64BIT: 488 retval = ( (flash_read32( addr ) != flash_read32( addr )) || 489 (flash_read32(addr+4) != flash_read32(addr+4)) ); 490 break; 491 default: 492 retval = 0; 493 break; 494 } 495 flash_unmap(info, sect, offset, addr); 496 497 return retval; 498 } 499 500 /* 501 * flash_is_busy - check to see if the flash is busy 502 * 503 * This routine checks the status of the chip and returns true if the 504 * chip is busy. 505 */ 506 static int flash_is_busy (flash_info_t * info, flash_sect_t sect) 507 { 508 int retval; 509 510 switch (info->vendor) { 511 case CFI_CMDSET_INTEL_PROG_REGIONS: 512 case CFI_CMDSET_INTEL_STANDARD: 513 case CFI_CMDSET_INTEL_EXTENDED: 514 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE); 515 break; 516 case CFI_CMDSET_AMD_STANDARD: 517 case CFI_CMDSET_AMD_EXTENDED: 518 #ifdef CONFIG_FLASH_CFI_LEGACY 519 case CFI_CMDSET_AMD_LEGACY: 520 #endif 521 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); 522 break; 523 default: 524 retval = 0; 525 } 526 debug ("flash_is_busy: %d\n", retval); 527 return retval; 528 } 529 530 /*----------------------------------------------------------------------- 531 * wait for XSR.7 to be set. Time out with an error if it does not. 532 * This routine does not set the flash to read-array mode. 533 */ 534 static int flash_status_check (flash_info_t * info, flash_sect_t sector, 535 ulong tout, char *prompt) 536 { 537 ulong start; 538 539 #if CONFIG_SYS_HZ != 1000 540 tout *= CONFIG_SYS_HZ/1000; 541 #endif 542 543 /* Wait for command completion */ 544 start = get_timer (0); 545 while (flash_is_busy (info, sector)) { 546 if (get_timer (start) > tout) { 547 printf ("Flash %s timeout at address %lx data %lx\n", 548 prompt, info->start[sector], 549 flash_read_long (info, sector, 0)); 550 flash_write_cmd (info, sector, 0, info->cmd_reset); 551 return ERR_TIMOUT; 552 } 553 udelay (1); /* also triggers watchdog */ 554 } 555 return ERR_OK; 556 } 557 558 /*----------------------------------------------------------------------- 559 * Wait for XSR.7 to be set, if it times out print an error, otherwise 560 * do a full status check. 561 * 562 * This routine sets the flash to read-array mode. 563 */ 564 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, 565 ulong tout, char *prompt) 566 { 567 int retcode; 568 569 retcode = flash_status_check (info, sector, tout, prompt); 570 switch (info->vendor) { 571 case CFI_CMDSET_INTEL_PROG_REGIONS: 572 case CFI_CMDSET_INTEL_EXTENDED: 573 case CFI_CMDSET_INTEL_STANDARD: 574 if ((retcode != ERR_OK) 575 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { 576 retcode = ERR_INVAL; 577 printf ("Flash %s error at address %lx\n", prompt, 578 info->start[sector]); 579 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | 580 FLASH_STATUS_PSLBS)) { 581 puts ("Command Sequence Error.\n"); 582 } else if (flash_isset (info, sector, 0, 583 FLASH_STATUS_ECLBS)) { 584 puts ("Block Erase Error.\n"); 585 retcode = ERR_NOT_ERASED; 586 } else if (flash_isset (info, sector, 0, 587 FLASH_STATUS_PSLBS)) { 588 puts ("Locking Error\n"); 589 } 590 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) { 591 puts ("Block locked.\n"); 592 retcode = ERR_PROTECTED; 593 } 594 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) 595 puts ("Vpp Low Error.\n"); 596 } 597 flash_write_cmd (info, sector, 0, info->cmd_reset); 598 break; 599 default: 600 break; 601 } 602 return retcode; 603 } 604 605 /*----------------------------------------------------------------------- 606 */ 607 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) 608 { 609 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 610 unsigned short w; 611 unsigned int l; 612 unsigned long long ll; 613 #endif 614 615 switch (info->portwidth) { 616 case FLASH_CFI_8BIT: 617 cword->c = c; 618 break; 619 case FLASH_CFI_16BIT: 620 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 621 w = c; 622 w <<= 8; 623 cword->w = (cword->w >> 8) | w; 624 #else 625 cword->w = (cword->w << 8) | c; 626 #endif 627 break; 628 case FLASH_CFI_32BIT: 629 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 630 l = c; 631 l <<= 24; 632 cword->l = (cword->l >> 8) | l; 633 #else 634 cword->l = (cword->l << 8) | c; 635 #endif 636 break; 637 case FLASH_CFI_64BIT: 638 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 639 ll = c; 640 ll <<= 56; 641 cword->ll = (cword->ll >> 8) | ll; 642 #else 643 cword->ll = (cword->ll << 8) | c; 644 #endif 645 break; 646 } 647 } 648 649 /* 650 * Loop through the sector table starting from the previously found sector. 651 * Searches forwards or backwards, dependent on the passed address. 652 */ 653 static flash_sect_t find_sector (flash_info_t * info, ulong addr) 654 { 655 static flash_sect_t saved_sector = 0; /* previously found sector */ 656 flash_sect_t sector = saved_sector; 657 658 while ((info->start[sector] < addr) 659 && (sector < info->sector_count - 1)) 660 sector++; 661 while ((info->start[sector] > addr) && (sector > 0)) 662 /* 663 * also decrements the sector in case of an overshot 664 * in the first loop 665 */ 666 sector--; 667 668 saved_sector = sector; 669 return sector; 670 } 671 672 /*----------------------------------------------------------------------- 673 */ 674 static int flash_write_cfiword (flash_info_t * info, ulong dest, 675 cfiword_t cword) 676 { 677 void *dstaddr = (void *)dest; 678 int flag; 679 flash_sect_t sect = 0; 680 char sect_found = 0; 681 682 /* Check if Flash is (sufficiently) erased */ 683 switch (info->portwidth) { 684 case FLASH_CFI_8BIT: 685 flag = ((flash_read8(dstaddr) & cword.c) == cword.c); 686 break; 687 case FLASH_CFI_16BIT: 688 flag = ((flash_read16(dstaddr) & cword.w) == cword.w); 689 break; 690 case FLASH_CFI_32BIT: 691 flag = ((flash_read32(dstaddr) & cword.l) == cword.l); 692 break; 693 case FLASH_CFI_64BIT: 694 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll); 695 break; 696 default: 697 flag = 0; 698 break; 699 } 700 if (!flag) 701 return ERR_NOT_ERASED; 702 703 /* Disable interrupts which might cause a timeout here */ 704 flag = disable_interrupts (); 705 706 switch (info->vendor) { 707 case CFI_CMDSET_INTEL_PROG_REGIONS: 708 case CFI_CMDSET_INTEL_EXTENDED: 709 case CFI_CMDSET_INTEL_STANDARD: 710 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS); 711 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE); 712 break; 713 case CFI_CMDSET_AMD_EXTENDED: 714 case CFI_CMDSET_AMD_STANDARD: 715 sect = find_sector(info, dest); 716 flash_unlock_seq (info, sect); 717 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE); 718 sect_found = 1; 719 break; 720 #ifdef CONFIG_FLASH_CFI_LEGACY 721 case CFI_CMDSET_AMD_LEGACY: 722 sect = find_sector(info, dest); 723 flash_unlock_seq (info, 0); 724 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE); 725 sect_found = 1; 726 break; 727 #endif 728 } 729 730 switch (info->portwidth) { 731 case FLASH_CFI_8BIT: 732 flash_write8(cword.c, dstaddr); 733 break; 734 case FLASH_CFI_16BIT: 735 flash_write16(cword.w, dstaddr); 736 break; 737 case FLASH_CFI_32BIT: 738 flash_write32(cword.l, dstaddr); 739 break; 740 case FLASH_CFI_64BIT: 741 flash_write64(cword.ll, dstaddr); 742 break; 743 } 744 745 /* re-enable interrupts if necessary */ 746 if (flag) 747 enable_interrupts (); 748 749 if (!sect_found) 750 sect = find_sector (info, dest); 751 752 return flash_full_status_check (info, sect, info->write_tout, "write"); 753 } 754 755 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 756 757 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, 758 int len) 759 { 760 flash_sect_t sector; 761 int cnt; 762 int retcode; 763 void *src = cp; 764 void *dst = (void *)dest; 765 void *dst2 = dst; 766 int flag = 0; 767 uint offset = 0; 768 unsigned int shift; 769 uchar write_cmd; 770 771 switch (info->portwidth) { 772 case FLASH_CFI_8BIT: 773 shift = 0; 774 break; 775 case FLASH_CFI_16BIT: 776 shift = 1; 777 break; 778 case FLASH_CFI_32BIT: 779 shift = 2; 780 break; 781 case FLASH_CFI_64BIT: 782 shift = 3; 783 break; 784 default: 785 retcode = ERR_INVAL; 786 goto out_unmap; 787 } 788 789 cnt = len >> shift; 790 791 while ((cnt-- > 0) && (flag == 0)) { 792 switch (info->portwidth) { 793 case FLASH_CFI_8BIT: 794 flag = ((flash_read8(dst2) & flash_read8(src)) == 795 flash_read8(src)); 796 src += 1, dst2 += 1; 797 break; 798 case FLASH_CFI_16BIT: 799 flag = ((flash_read16(dst2) & flash_read16(src)) == 800 flash_read16(src)); 801 src += 2, dst2 += 2; 802 break; 803 case FLASH_CFI_32BIT: 804 flag = ((flash_read32(dst2) & flash_read32(src)) == 805 flash_read32(src)); 806 src += 4, dst2 += 4; 807 break; 808 case FLASH_CFI_64BIT: 809 flag = ((flash_read64(dst2) & flash_read64(src)) == 810 flash_read64(src)); 811 src += 8, dst2 += 8; 812 break; 813 } 814 } 815 if (!flag) { 816 retcode = ERR_NOT_ERASED; 817 goto out_unmap; 818 } 819 820 src = cp; 821 sector = find_sector (info, dest); 822 823 switch (info->vendor) { 824 case CFI_CMDSET_INTEL_PROG_REGIONS: 825 case CFI_CMDSET_INTEL_STANDARD: 826 case CFI_CMDSET_INTEL_EXTENDED: 827 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ? 828 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER; 829 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 830 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS); 831 flash_write_cmd (info, sector, 0, write_cmd); 832 retcode = flash_status_check (info, sector, 833 info->buffer_write_tout, 834 "write to buffer"); 835 if (retcode == ERR_OK) { 836 /* reduce the number of loops by the width of 837 * the port */ 838 cnt = len >> shift; 839 flash_write_cmd (info, sector, 0, cnt - 1); 840 while (cnt-- > 0) { 841 switch (info->portwidth) { 842 case FLASH_CFI_8BIT: 843 flash_write8(flash_read8(src), dst); 844 src += 1, dst += 1; 845 break; 846 case FLASH_CFI_16BIT: 847 flash_write16(flash_read16(src), dst); 848 src += 2, dst += 2; 849 break; 850 case FLASH_CFI_32BIT: 851 flash_write32(flash_read32(src), dst); 852 src += 4, dst += 4; 853 break; 854 case FLASH_CFI_64BIT: 855 flash_write64(flash_read64(src), dst); 856 src += 8, dst += 8; 857 break; 858 default: 859 retcode = ERR_INVAL; 860 goto out_unmap; 861 } 862 } 863 flash_write_cmd (info, sector, 0, 864 FLASH_CMD_WRITE_BUFFER_CONFIRM); 865 retcode = flash_full_status_check ( 866 info, sector, info->buffer_write_tout, 867 "buffer write"); 868 } 869 870 break; 871 872 case CFI_CMDSET_AMD_STANDARD: 873 case CFI_CMDSET_AMD_EXTENDED: 874 flash_unlock_seq(info,0); 875 876 #ifdef CONFIG_FLASH_SPANSION_S29WS_N 877 offset = ((unsigned long)dst - info->start[sector]) >> shift; 878 #endif 879 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER); 880 cnt = len >> shift; 881 flash_write_cmd(info, sector, offset, cnt - 1); 882 883 switch (info->portwidth) { 884 case FLASH_CFI_8BIT: 885 while (cnt-- > 0) { 886 flash_write8(flash_read8(src), dst); 887 src += 1, dst += 1; 888 } 889 break; 890 case FLASH_CFI_16BIT: 891 while (cnt-- > 0) { 892 flash_write16(flash_read16(src), dst); 893 src += 2, dst += 2; 894 } 895 break; 896 case FLASH_CFI_32BIT: 897 while (cnt-- > 0) { 898 flash_write32(flash_read32(src), dst); 899 src += 4, dst += 4; 900 } 901 break; 902 case FLASH_CFI_64BIT: 903 while (cnt-- > 0) { 904 flash_write64(flash_read64(src), dst); 905 src += 8, dst += 8; 906 } 907 break; 908 default: 909 retcode = ERR_INVAL; 910 goto out_unmap; 911 } 912 913 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); 914 retcode = flash_full_status_check (info, sector, 915 info->buffer_write_tout, 916 "buffer write"); 917 break; 918 919 default: 920 debug ("Unknown Command Set\n"); 921 retcode = ERR_INVAL; 922 break; 923 } 924 925 out_unmap: 926 return retcode; 927 } 928 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 929 930 931 /*----------------------------------------------------------------------- 932 */ 933 int flash_erase (flash_info_t * info, int s_first, int s_last) 934 { 935 int rcode = 0; 936 int prot; 937 flash_sect_t sect; 938 939 if (info->flash_id != FLASH_MAN_CFI) { 940 puts ("Can't erase unknown flash type - aborted\n"); 941 return 1; 942 } 943 if ((s_first < 0) || (s_first > s_last)) { 944 puts ("- no sectors to erase\n"); 945 return 1; 946 } 947 948 prot = 0; 949 for (sect = s_first; sect <= s_last; ++sect) { 950 if (info->protect[sect]) { 951 prot++; 952 } 953 } 954 if (prot) { 955 printf ("- Warning: %d protected sectors will not be erased!\n", 956 prot); 957 } else if (flash_verbose) { 958 putc ('\n'); 959 } 960 961 962 for (sect = s_first; sect <= s_last; sect++) { 963 if (info->protect[sect] == 0) { /* not protected */ 964 switch (info->vendor) { 965 case CFI_CMDSET_INTEL_PROG_REGIONS: 966 case CFI_CMDSET_INTEL_STANDARD: 967 case CFI_CMDSET_INTEL_EXTENDED: 968 flash_write_cmd (info, sect, 0, 969 FLASH_CMD_CLEAR_STATUS); 970 flash_write_cmd (info, sect, 0, 971 FLASH_CMD_BLOCK_ERASE); 972 flash_write_cmd (info, sect, 0, 973 FLASH_CMD_ERASE_CONFIRM); 974 break; 975 case CFI_CMDSET_AMD_STANDARD: 976 case CFI_CMDSET_AMD_EXTENDED: 977 flash_unlock_seq (info, sect); 978 flash_write_cmd (info, sect, 979 info->addr_unlock1, 980 AMD_CMD_ERASE_START); 981 flash_unlock_seq (info, sect); 982 flash_write_cmd (info, sect, 0, 983 AMD_CMD_ERASE_SECTOR); 984 break; 985 #ifdef CONFIG_FLASH_CFI_LEGACY 986 case CFI_CMDSET_AMD_LEGACY: 987 flash_unlock_seq (info, 0); 988 flash_write_cmd (info, 0, info->addr_unlock1, 989 AMD_CMD_ERASE_START); 990 flash_unlock_seq (info, 0); 991 flash_write_cmd (info, sect, 0, 992 AMD_CMD_ERASE_SECTOR); 993 break; 994 #endif 995 default: 996 debug ("Unkown flash vendor %d\n", 997 info->vendor); 998 break; 999 } 1000 1001 if (flash_full_status_check 1002 (info, sect, info->erase_blk_tout, "erase")) { 1003 rcode = 1; 1004 } else if (flash_verbose) 1005 putc ('.'); 1006 } 1007 } 1008 1009 if (flash_verbose) 1010 puts (" done\n"); 1011 1012 return rcode; 1013 } 1014 1015 /*----------------------------------------------------------------------- 1016 */ 1017 void flash_print_info (flash_info_t * info) 1018 { 1019 int i; 1020 1021 if (info->flash_id != FLASH_MAN_CFI) { 1022 puts ("missing or unknown FLASH type\n"); 1023 return; 1024 } 1025 1026 printf ("%s FLASH (%d x %d)", 1027 info->name, 1028 (info->portwidth << 3), (info->chipwidth << 3)); 1029 if (info->size < 1024*1024) 1030 printf (" Size: %ld kB in %d Sectors\n", 1031 info->size >> 10, info->sector_count); 1032 else 1033 printf (" Size: %ld MB in %d Sectors\n", 1034 info->size >> 20, info->sector_count); 1035 printf (" "); 1036 switch (info->vendor) { 1037 case CFI_CMDSET_INTEL_PROG_REGIONS: 1038 printf ("Intel Prog Regions"); 1039 break; 1040 case CFI_CMDSET_INTEL_STANDARD: 1041 printf ("Intel Standard"); 1042 break; 1043 case CFI_CMDSET_INTEL_EXTENDED: 1044 printf ("Intel Extended"); 1045 break; 1046 case CFI_CMDSET_AMD_STANDARD: 1047 printf ("AMD Standard"); 1048 break; 1049 case CFI_CMDSET_AMD_EXTENDED: 1050 printf ("AMD Extended"); 1051 break; 1052 #ifdef CONFIG_FLASH_CFI_LEGACY 1053 case CFI_CMDSET_AMD_LEGACY: 1054 printf ("AMD Legacy"); 1055 break; 1056 #endif 1057 default: 1058 printf ("Unknown (%d)", info->vendor); 1059 break; 1060 } 1061 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X", 1062 info->manufacturer_id, info->device_id); 1063 if (info->device_id == 0x7E) { 1064 printf("%04X", info->device_id2); 1065 } 1066 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", 1067 info->erase_blk_tout, 1068 info->write_tout); 1069 if (info->buffer_size > 1) { 1070 printf (" Buffer write timeout: %ld ms, " 1071 "buffer size: %d bytes\n", 1072 info->buffer_write_tout, 1073 info->buffer_size); 1074 } 1075 1076 puts ("\n Sector Start Addresses:"); 1077 for (i = 0; i < info->sector_count; ++i) { 1078 if ((i % 5) == 0) 1079 printf ("\n"); 1080 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 1081 int k; 1082 int size; 1083 int erased; 1084 volatile unsigned long *flash; 1085 1086 /* 1087 * Check if whole sector is erased 1088 */ 1089 size = flash_sector_size(info, i); 1090 erased = 1; 1091 flash = (volatile unsigned long *) info->start[i]; 1092 size = size >> 2; /* divide by 4 for longword access */ 1093 for (k = 0; k < size; k++) { 1094 if (*flash++ != 0xffffffff) { 1095 erased = 0; 1096 break; 1097 } 1098 } 1099 1100 /* print empty and read-only info */ 1101 printf (" %08lX %c %s ", 1102 info->start[i], 1103 erased ? 'E' : ' ', 1104 info->protect[i] ? "RO" : " "); 1105 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */ 1106 printf (" %08lX %s ", 1107 info->start[i], 1108 info->protect[i] ? "RO" : " "); 1109 #endif 1110 } 1111 putc ('\n'); 1112 return; 1113 } 1114 1115 /*----------------------------------------------------------------------- 1116 * This is used in a few places in write_buf() to show programming 1117 * progress. Making it a function is nasty because it needs to do side 1118 * effect updates to digit and dots. Repeated code is nasty too, so 1119 * we define it once here. 1120 */ 1121 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1122 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \ 1123 if (flash_verbose) { \ 1124 dots -= dots_sub; \ 1125 if ((scale > 0) && (dots <= 0)) { \ 1126 if ((digit % 5) == 0) \ 1127 printf ("%d", digit / 5); \ 1128 else \ 1129 putc ('.'); \ 1130 digit--; \ 1131 dots += scale; \ 1132 } \ 1133 } 1134 #else 1135 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) 1136 #endif 1137 1138 /*----------------------------------------------------------------------- 1139 * Copy memory to flash, returns: 1140 * 0 - OK 1141 * 1 - write timeout 1142 * 2 - Flash not erased 1143 */ 1144 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) 1145 { 1146 ulong wp; 1147 uchar *p; 1148 int aln; 1149 cfiword_t cword; 1150 int i, rc; 1151 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1152 int buffered_size; 1153 #endif 1154 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1155 int digit = CONFIG_FLASH_SHOW_PROGRESS; 1156 int scale = 0; 1157 int dots = 0; 1158 1159 /* 1160 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes. 1161 */ 1162 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) { 1163 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) / 1164 CONFIG_FLASH_SHOW_PROGRESS); 1165 } 1166 #endif 1167 1168 /* get lower aligned address */ 1169 wp = (addr & ~(info->portwidth - 1)); 1170 1171 /* handle unaligned start */ 1172 if ((aln = addr - wp) != 0) { 1173 cword.l = 0; 1174 p = (uchar *)wp; 1175 for (i = 0; i < aln; ++i) 1176 flash_add_byte (info, &cword, flash_read8(p + i)); 1177 1178 for (; (i < info->portwidth) && (cnt > 0); i++) { 1179 flash_add_byte (info, &cword, *src++); 1180 cnt--; 1181 } 1182 for (; (cnt == 0) && (i < info->portwidth); ++i) 1183 flash_add_byte (info, &cword, flash_read8(p + i)); 1184 1185 rc = flash_write_cfiword (info, wp, cword); 1186 if (rc != 0) 1187 return rc; 1188 1189 wp += i; 1190 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1191 } 1192 1193 /* handle the aligned part */ 1194 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1195 buffered_size = (info->portwidth / info->chipwidth); 1196 buffered_size *= info->buffer_size; 1197 while (cnt >= info->portwidth) { 1198 /* prohibit buffer write when buffer_size is 1 */ 1199 if (info->buffer_size == 1) { 1200 cword.l = 0; 1201 for (i = 0; i < info->portwidth; i++) 1202 flash_add_byte (info, &cword, *src++); 1203 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1204 return rc; 1205 wp += info->portwidth; 1206 cnt -= info->portwidth; 1207 continue; 1208 } 1209 1210 /* write buffer until next buffered_size aligned boundary */ 1211 i = buffered_size - (wp % buffered_size); 1212 if (i > cnt) 1213 i = cnt; 1214 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) 1215 return rc; 1216 i -= i & (info->portwidth - 1); 1217 wp += i; 1218 src += i; 1219 cnt -= i; 1220 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1221 } 1222 #else 1223 while (cnt >= info->portwidth) { 1224 cword.l = 0; 1225 for (i = 0; i < info->portwidth; i++) { 1226 flash_add_byte (info, &cword, *src++); 1227 } 1228 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1229 return rc; 1230 wp += info->portwidth; 1231 cnt -= info->portwidth; 1232 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth); 1233 } 1234 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1235 1236 if (cnt == 0) { 1237 return (0); 1238 } 1239 1240 /* 1241 * handle unaligned tail bytes 1242 */ 1243 cword.l = 0; 1244 p = (uchar *)wp; 1245 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) { 1246 flash_add_byte (info, &cword, *src++); 1247 --cnt; 1248 } 1249 for (; i < info->portwidth; ++i) 1250 flash_add_byte (info, &cword, flash_read8(p + i)); 1251 1252 return flash_write_cfiword (info, wp, cword); 1253 } 1254 1255 /*----------------------------------------------------------------------- 1256 */ 1257 #ifdef CONFIG_SYS_FLASH_PROTECTION 1258 1259 int flash_real_protect (flash_info_t * info, long sector, int prot) 1260 { 1261 int retcode = 0; 1262 1263 switch (info->vendor) { 1264 case CFI_CMDSET_INTEL_PROG_REGIONS: 1265 case CFI_CMDSET_INTEL_STANDARD: 1266 case CFI_CMDSET_INTEL_EXTENDED: 1267 flash_write_cmd (info, sector, 0, 1268 FLASH_CMD_CLEAR_STATUS); 1269 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1270 if (prot) 1271 flash_write_cmd (info, sector, 0, 1272 FLASH_CMD_PROTECT_SET); 1273 else 1274 flash_write_cmd (info, sector, 0, 1275 FLASH_CMD_PROTECT_CLEAR); 1276 break; 1277 case CFI_CMDSET_AMD_EXTENDED: 1278 case CFI_CMDSET_AMD_STANDARD: 1279 /* U-Boot only checks the first byte */ 1280 if (info->manufacturer_id == (uchar)ATM_MANUFACT) { 1281 if (prot) { 1282 flash_unlock_seq (info, 0); 1283 flash_write_cmd (info, 0, 1284 info->addr_unlock1, 1285 ATM_CMD_SOFTLOCK_START); 1286 flash_unlock_seq (info, 0); 1287 flash_write_cmd (info, sector, 0, 1288 ATM_CMD_LOCK_SECT); 1289 } else { 1290 flash_write_cmd (info, 0, 1291 info->addr_unlock1, 1292 AMD_CMD_UNLOCK_START); 1293 if (info->device_id == ATM_ID_BV6416) 1294 flash_write_cmd (info, sector, 1295 0, ATM_CMD_UNLOCK_SECT); 1296 } 1297 } 1298 break; 1299 #ifdef CONFIG_FLASH_CFI_LEGACY 1300 case CFI_CMDSET_AMD_LEGACY: 1301 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 1302 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1303 if (prot) 1304 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); 1305 else 1306 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); 1307 #endif 1308 }; 1309 1310 if ((retcode = 1311 flash_full_status_check (info, sector, info->erase_blk_tout, 1312 prot ? "protect" : "unprotect")) == 0) { 1313 1314 info->protect[sector] = prot; 1315 1316 /* 1317 * On some of Intel's flash chips (marked via legacy_unlock) 1318 * unprotect unprotects all locking. 1319 */ 1320 if ((prot == 0) && (info->legacy_unlock)) { 1321 flash_sect_t i; 1322 1323 for (i = 0; i < info->sector_count; i++) { 1324 if (info->protect[i]) 1325 flash_real_protect (info, i, 1); 1326 } 1327 } 1328 } 1329 return retcode; 1330 } 1331 1332 /*----------------------------------------------------------------------- 1333 * flash_read_user_serial - read the OneTimeProgramming cells 1334 */ 1335 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, 1336 int len) 1337 { 1338 uchar *src; 1339 uchar *dst; 1340 1341 dst = buffer; 1342 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION); 1343 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1344 memcpy (dst, src + offset, len); 1345 flash_write_cmd (info, 0, 0, info->cmd_reset); 1346 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src); 1347 } 1348 1349 /* 1350 * flash_read_factory_serial - read the device Id from the protection area 1351 */ 1352 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, 1353 int len) 1354 { 1355 uchar *src; 1356 1357 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION); 1358 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1359 memcpy (buffer, src + offset, len); 1360 flash_write_cmd (info, 0, 0, info->cmd_reset); 1361 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); 1362 } 1363 1364 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 1365 1366 /*----------------------------------------------------------------------- 1367 * Reverse the order of the erase regions in the CFI QRY structure. 1368 * This is needed for chips that are either a) correctly detected as 1369 * top-boot, or b) buggy. 1370 */ 1371 static void cfi_reverse_geometry(struct cfi_qry *qry) 1372 { 1373 unsigned int i, j; 1374 u32 tmp; 1375 1376 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) { 1377 tmp = qry->erase_region_info[i]; 1378 qry->erase_region_info[i] = qry->erase_region_info[j]; 1379 qry->erase_region_info[j] = tmp; 1380 } 1381 } 1382 1383 /*----------------------------------------------------------------------- 1384 * read jedec ids from device and set corresponding fields in info struct 1385 * 1386 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct 1387 * 1388 */ 1389 static void cmdset_intel_read_jedec_ids(flash_info_t *info) 1390 { 1391 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1392 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); 1393 udelay(1000); /* some flash are slow to respond */ 1394 info->manufacturer_id = flash_read_uchar (info, 1395 FLASH_OFFSET_MANUFACTURER_ID); 1396 info->device_id = flash_read_uchar (info, 1397 FLASH_OFFSET_DEVICE_ID); 1398 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1399 } 1400 1401 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) 1402 { 1403 info->cmd_reset = FLASH_CMD_RESET; 1404 1405 cmdset_intel_read_jedec_ids(info); 1406 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1407 1408 #ifdef CONFIG_SYS_FLASH_PROTECTION 1409 /* read legacy lock/unlock bit from intel flash */ 1410 if (info->ext_addr) { 1411 info->legacy_unlock = flash_read_uchar (info, 1412 info->ext_addr + 5) & 0x08; 1413 } 1414 #endif 1415 1416 return 0; 1417 } 1418 1419 static void cmdset_amd_read_jedec_ids(flash_info_t *info) 1420 { 1421 ushort bankId = 0; 1422 uchar manuId; 1423 1424 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1425 flash_unlock_seq(info, 0); 1426 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); 1427 udelay(1000); /* some flash are slow to respond */ 1428 1429 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID); 1430 /* JEDEC JEP106Z specifies ID codes up to bank 7 */ 1431 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) { 1432 bankId += 0x100; 1433 manuId = flash_read_uchar (info, 1434 bankId | FLASH_OFFSET_MANUFACTURER_ID); 1435 } 1436 info->manufacturer_id = manuId; 1437 1438 switch (info->chipwidth){ 1439 case FLASH_CFI_8BIT: 1440 info->device_id = flash_read_uchar (info, 1441 FLASH_OFFSET_DEVICE_ID); 1442 if (info->device_id == 0x7E) { 1443 /* AMD 3-byte (expanded) device ids */ 1444 info->device_id2 = flash_read_uchar (info, 1445 FLASH_OFFSET_DEVICE_ID2); 1446 info->device_id2 <<= 8; 1447 info->device_id2 |= flash_read_uchar (info, 1448 FLASH_OFFSET_DEVICE_ID3); 1449 } 1450 break; 1451 case FLASH_CFI_16BIT: 1452 info->device_id = flash_read_word (info, 1453 FLASH_OFFSET_DEVICE_ID); 1454 break; 1455 default: 1456 break; 1457 } 1458 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1459 } 1460 1461 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) 1462 { 1463 info->cmd_reset = AMD_CMD_RESET; 1464 1465 cmdset_amd_read_jedec_ids(info); 1466 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1467 1468 return 0; 1469 } 1470 1471 #ifdef CONFIG_FLASH_CFI_LEGACY 1472 static void flash_read_jedec_ids (flash_info_t * info) 1473 { 1474 info->manufacturer_id = 0; 1475 info->device_id = 0; 1476 info->device_id2 = 0; 1477 1478 switch (info->vendor) { 1479 case CFI_CMDSET_INTEL_PROG_REGIONS: 1480 case CFI_CMDSET_INTEL_STANDARD: 1481 case CFI_CMDSET_INTEL_EXTENDED: 1482 cmdset_intel_read_jedec_ids(info); 1483 break; 1484 case CFI_CMDSET_AMD_STANDARD: 1485 case CFI_CMDSET_AMD_EXTENDED: 1486 cmdset_amd_read_jedec_ids(info); 1487 break; 1488 default: 1489 break; 1490 } 1491 } 1492 1493 /*----------------------------------------------------------------------- 1494 * Call board code to request info about non-CFI flash. 1495 * board_flash_get_legacy needs to fill in at least: 1496 * info->portwidth, info->chipwidth and info->interface for Jedec probing. 1497 */ 1498 static int flash_detect_legacy(phys_addr_t base, int banknum) 1499 { 1500 flash_info_t *info = &flash_info[banknum]; 1501 1502 if (board_flash_get_legacy(base, banknum, info)) { 1503 /* board code may have filled info completely. If not, we 1504 use JEDEC ID probing. */ 1505 if (!info->vendor) { 1506 int modes[] = { 1507 CFI_CMDSET_AMD_STANDARD, 1508 CFI_CMDSET_INTEL_STANDARD 1509 }; 1510 int i; 1511 1512 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) { 1513 info->vendor = modes[i]; 1514 info->start[0] = 1515 (ulong)map_physmem(base, 1516 info->portwidth, 1517 MAP_NOCACHE); 1518 if (info->portwidth == FLASH_CFI_8BIT 1519 && info->interface == FLASH_CFI_X8X16) { 1520 info->addr_unlock1 = 0x2AAA; 1521 info->addr_unlock2 = 0x5555; 1522 } else { 1523 info->addr_unlock1 = 0x5555; 1524 info->addr_unlock2 = 0x2AAA; 1525 } 1526 flash_read_jedec_ids(info); 1527 debug("JEDEC PROBE: ID %x %x %x\n", 1528 info->manufacturer_id, 1529 info->device_id, 1530 info->device_id2); 1531 if (jedec_flash_match(info, info->start[0])) 1532 break; 1533 else 1534 unmap_physmem((void *)info->start[0], 1535 MAP_NOCACHE); 1536 } 1537 } 1538 1539 switch(info->vendor) { 1540 case CFI_CMDSET_INTEL_PROG_REGIONS: 1541 case CFI_CMDSET_INTEL_STANDARD: 1542 case CFI_CMDSET_INTEL_EXTENDED: 1543 info->cmd_reset = FLASH_CMD_RESET; 1544 break; 1545 case CFI_CMDSET_AMD_STANDARD: 1546 case CFI_CMDSET_AMD_EXTENDED: 1547 case CFI_CMDSET_AMD_LEGACY: 1548 info->cmd_reset = AMD_CMD_RESET; 1549 break; 1550 } 1551 info->flash_id = FLASH_MAN_CFI; 1552 return 1; 1553 } 1554 return 0; /* use CFI */ 1555 } 1556 #else 1557 static inline int flash_detect_legacy(phys_addr_t base, int banknum) 1558 { 1559 return 0; /* use CFI */ 1560 } 1561 #endif 1562 1563 /*----------------------------------------------------------------------- 1564 * detect if flash is compatible with the Common Flash Interface (CFI) 1565 * http://www.jedec.org/download/search/jesd68.pdf 1566 */ 1567 static void flash_read_cfi (flash_info_t *info, void *buf, 1568 unsigned int start, size_t len) 1569 { 1570 u8 *p = buf; 1571 unsigned int i; 1572 1573 for (i = 0; i < len; i++) 1574 p[i] = flash_read_uchar(info, start + i); 1575 } 1576 1577 void __flash_cmd_reset(flash_info_t *info) 1578 { 1579 /* 1580 * We do not yet know what kind of commandset to use, so we issue 1581 * the reset command in both Intel and AMD variants, in the hope 1582 * that AMD flash roms ignore the Intel command. 1583 */ 1584 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1585 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1586 } 1587 void flash_cmd_reset(flash_info_t *info) 1588 __attribute__((weak,alias("__flash_cmd_reset"))); 1589 1590 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1591 { 1592 int cfi_offset; 1593 1594 /* Issue FLASH reset command */ 1595 flash_cmd_reset(info); 1596 1597 for (cfi_offset=0; 1598 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); 1599 cfi_offset++) { 1600 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], 1601 FLASH_CMD_CFI); 1602 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') 1603 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') 1604 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { 1605 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, 1606 sizeof(struct cfi_qry)); 1607 info->interface = le16_to_cpu(qry->interface_desc); 1608 1609 info->cfi_offset = flash_offset_cfi[cfi_offset]; 1610 debug ("device interface is %d\n", 1611 info->interface); 1612 debug ("found port %d chip %d ", 1613 info->portwidth, info->chipwidth); 1614 debug ("port %d bits chip %d bits\n", 1615 info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1616 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1617 1618 /* calculate command offsets as in the Linux driver */ 1619 info->addr_unlock1 = 0x555; 1620 info->addr_unlock2 = 0x2aa; 1621 1622 /* 1623 * modify the unlock address if we are 1624 * in compatibility mode 1625 */ 1626 if ( /* x8/x16 in x8 mode */ 1627 ((info->chipwidth == FLASH_CFI_BY8) && 1628 (info->interface == FLASH_CFI_X8X16)) || 1629 /* x16/x32 in x16 mode */ 1630 ((info->chipwidth == FLASH_CFI_BY16) && 1631 (info->interface == FLASH_CFI_X16X32))) 1632 { 1633 info->addr_unlock1 = 0xaaa; 1634 info->addr_unlock2 = 0x555; 1635 } 1636 1637 info->name = "CFI conformant"; 1638 return 1; 1639 } 1640 } 1641 1642 return 0; 1643 } 1644 1645 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1646 { 1647 debug ("flash detect cfi\n"); 1648 1649 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH; 1650 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { 1651 for (info->chipwidth = FLASH_CFI_BY8; 1652 info->chipwidth <= info->portwidth; 1653 info->chipwidth <<= 1) 1654 if (__flash_detect_cfi(info, qry)) 1655 return 1; 1656 } 1657 debug ("not found\n"); 1658 return 0; 1659 } 1660 1661 /* 1662 * Manufacturer-specific quirks. Add workarounds for geometry 1663 * reversal, etc. here. 1664 */ 1665 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry) 1666 { 1667 /* check if flash geometry needs reversal */ 1668 if (qry->num_erase_regions > 1) { 1669 /* reverse geometry if top boot part */ 1670 if (info->cfi_version < 0x3131) { 1671 /* CFI < 1.1, try to guess from device id */ 1672 if ((info->device_id & 0x80) != 0) 1673 cfi_reverse_geometry(qry); 1674 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { 1675 /* CFI >= 1.1, deduct from top/bottom flag */ 1676 /* note: ext_addr is valid since cfi_version > 0 */ 1677 cfi_reverse_geometry(qry); 1678 } 1679 } 1680 } 1681 1682 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry) 1683 { 1684 int reverse_geometry = 0; 1685 1686 /* Check the "top boot" bit in the PRI */ 1687 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1)) 1688 reverse_geometry = 1; 1689 1690 /* AT49BV6416(T) list the erase regions in the wrong order. 1691 * However, the device ID is identical with the non-broken 1692 * AT49BV642D they differ in the high byte. 1693 */ 1694 if (info->device_id == 0xd6 || info->device_id == 0xd2) 1695 reverse_geometry = !reverse_geometry; 1696 1697 if (reverse_geometry) 1698 cfi_reverse_geometry(qry); 1699 } 1700 1701 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry) 1702 { 1703 /* check if flash geometry needs reversal */ 1704 if (qry->num_erase_regions > 1) { 1705 /* reverse geometry if top boot part */ 1706 if (info->cfi_version < 0x3131) { 1707 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */ 1708 if (info->device_id == 0x22CA || 1709 info->device_id == 0x2256) { 1710 cfi_reverse_geometry(qry); 1711 } 1712 } 1713 } 1714 } 1715 1716 /* 1717 * The following code cannot be run from FLASH! 1718 * 1719 */ 1720 ulong flash_get_size (phys_addr_t base, int banknum) 1721 { 1722 flash_info_t *info = &flash_info[banknum]; 1723 int i, j; 1724 flash_sect_t sect_cnt; 1725 phys_addr_t sector; 1726 unsigned long tmp; 1727 int size_ratio; 1728 uchar num_erase_regions; 1729 int erase_region_size; 1730 int erase_region_count; 1731 struct cfi_qry qry; 1732 1733 memset(&qry, 0, sizeof(qry)); 1734 1735 info->ext_addr = 0; 1736 info->cfi_version = 0; 1737 #ifdef CONFIG_SYS_FLASH_PROTECTION 1738 info->legacy_unlock = 0; 1739 #endif 1740 1741 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE); 1742 1743 if (flash_detect_cfi (info, &qry)) { 1744 info->vendor = le16_to_cpu(qry.p_id); 1745 info->ext_addr = le16_to_cpu(qry.p_adr); 1746 num_erase_regions = qry.num_erase_regions; 1747 1748 if (info->ext_addr) { 1749 info->cfi_version = (ushort) flash_read_uchar (info, 1750 info->ext_addr + 3) << 8; 1751 info->cfi_version |= (ushort) flash_read_uchar (info, 1752 info->ext_addr + 4); 1753 } 1754 1755 #ifdef DEBUG 1756 flash_printqry (&qry); 1757 #endif 1758 1759 switch (info->vendor) { 1760 case CFI_CMDSET_INTEL_PROG_REGIONS: 1761 case CFI_CMDSET_INTEL_STANDARD: 1762 case CFI_CMDSET_INTEL_EXTENDED: 1763 cmdset_intel_init(info, &qry); 1764 break; 1765 case CFI_CMDSET_AMD_STANDARD: 1766 case CFI_CMDSET_AMD_EXTENDED: 1767 cmdset_amd_init(info, &qry); 1768 break; 1769 default: 1770 printf("CFI: Unknown command set 0x%x\n", 1771 info->vendor); 1772 /* 1773 * Unfortunately, this means we don't know how 1774 * to get the chip back to Read mode. Might 1775 * as well try an Intel-style reset... 1776 */ 1777 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1778 return 0; 1779 } 1780 1781 /* Do manufacturer-specific fixups */ 1782 switch (info->manufacturer_id) { 1783 case 0x0001: 1784 flash_fixup_amd(info, &qry); 1785 break; 1786 case 0x001f: 1787 flash_fixup_atmel(info, &qry); 1788 break; 1789 case 0x0020: 1790 flash_fixup_stm(info, &qry); 1791 break; 1792 } 1793 1794 debug ("manufacturer is %d\n", info->vendor); 1795 debug ("manufacturer id is 0x%x\n", info->manufacturer_id); 1796 debug ("device id is 0x%x\n", info->device_id); 1797 debug ("device id2 is 0x%x\n", info->device_id2); 1798 debug ("cfi version is 0x%04x\n", info->cfi_version); 1799 1800 size_ratio = info->portwidth / info->chipwidth; 1801 /* if the chip is x8/x16 reduce the ratio by half */ 1802 if ((info->interface == FLASH_CFI_X8X16) 1803 && (info->chipwidth == FLASH_CFI_BY8)) { 1804 size_ratio >>= 1; 1805 } 1806 debug ("size_ratio %d port %d bits chip %d bits\n", 1807 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1808 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1809 debug ("found %d erase regions\n", num_erase_regions); 1810 sect_cnt = 0; 1811 sector = base; 1812 for (i = 0; i < num_erase_regions; i++) { 1813 if (i > NUM_ERASE_REGIONS) { 1814 printf ("%d erase regions found, only %d used\n", 1815 num_erase_regions, NUM_ERASE_REGIONS); 1816 break; 1817 } 1818 1819 tmp = le32_to_cpu(qry.erase_region_info[i]); 1820 debug("erase region %u: 0x%08lx\n", i, tmp); 1821 1822 erase_region_count = (tmp & 0xffff) + 1; 1823 tmp >>= 16; 1824 erase_region_size = 1825 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; 1826 debug ("erase_region_count = %d erase_region_size = %d\n", 1827 erase_region_count, erase_region_size); 1828 for (j = 0; j < erase_region_count; j++) { 1829 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { 1830 printf("ERROR: too many flash sectors\n"); 1831 break; 1832 } 1833 info->start[sect_cnt] = 1834 (ulong)map_physmem(sector, 1835 info->portwidth, 1836 MAP_NOCACHE); 1837 sector += (erase_region_size * size_ratio); 1838 1839 /* 1840 * Only read protection status from 1841 * supported devices (intel...) 1842 */ 1843 switch (info->vendor) { 1844 case CFI_CMDSET_INTEL_PROG_REGIONS: 1845 case CFI_CMDSET_INTEL_EXTENDED: 1846 case CFI_CMDSET_INTEL_STANDARD: 1847 info->protect[sect_cnt] = 1848 flash_isset (info, sect_cnt, 1849 FLASH_OFFSET_PROTECT, 1850 FLASH_STATUS_PROTECT); 1851 break; 1852 default: 1853 /* default: not protected */ 1854 info->protect[sect_cnt] = 0; 1855 } 1856 1857 sect_cnt++; 1858 } 1859 } 1860 1861 info->sector_count = sect_cnt; 1862 info->size = 1 << qry.dev_size; 1863 /* multiply the size by the number of chips */ 1864 info->size *= size_ratio; 1865 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size); 1866 tmp = 1 << qry.block_erase_timeout_typ; 1867 info->erase_blk_tout = tmp * 1868 (1 << qry.block_erase_timeout_max); 1869 tmp = (1 << qry.buf_write_timeout_typ) * 1870 (1 << qry.buf_write_timeout_max); 1871 1872 /* round up when converting to ms */ 1873 info->buffer_write_tout = (tmp + 999) / 1000; 1874 tmp = (1 << qry.word_write_timeout_typ) * 1875 (1 << qry.word_write_timeout_max); 1876 /* round up when converting to ms */ 1877 info->write_tout = (tmp + 999) / 1000; 1878 info->flash_id = FLASH_MAN_CFI; 1879 if ((info->interface == FLASH_CFI_X8X16) && 1880 (info->chipwidth == FLASH_CFI_BY8)) { 1881 /* XXX - Need to test on x8/x16 in parallel. */ 1882 info->portwidth >>= 1; 1883 } 1884 1885 flash_write_cmd (info, 0, 0, info->cmd_reset); 1886 } 1887 1888 return (info->size); 1889 } 1890 1891 void flash_set_verbose(uint v) 1892 { 1893 flash_verbose = v; 1894 } 1895 1896 /*----------------------------------------------------------------------- 1897 */ 1898 unsigned long flash_init (void) 1899 { 1900 unsigned long size = 0; 1901 int i; 1902 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 1903 struct apl_s { 1904 ulong start; 1905 ulong size; 1906 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST; 1907 #endif 1908 1909 #ifdef CONFIG_SYS_FLASH_PROTECTION 1910 /* read environment from EEPROM */ 1911 char s[64]; 1912 getenv_r ("unlock", s, sizeof(s)); 1913 #endif 1914 1915 #define BANK_BASE(i) (((phys_addr_t [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i]) 1916 1917 /* Init: no FLASHes known */ 1918 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { 1919 flash_info[i].flash_id = FLASH_UNKNOWN; 1920 1921 if (!flash_detect_legacy (BANK_BASE(i), i)) 1922 flash_get_size (BANK_BASE(i), i); 1923 size += flash_info[i].size; 1924 if (flash_info[i].flash_id == FLASH_UNKNOWN) { 1925 #ifndef CONFIG_SYS_FLASH_QUIET_TEST 1926 printf ("## Unknown FLASH on Bank %d " 1927 "- Size = 0x%08lx = %ld MB\n", 1928 i+1, flash_info[i].size, 1929 flash_info[i].size << 20); 1930 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */ 1931 } 1932 #ifdef CONFIG_SYS_FLASH_PROTECTION 1933 else if ((s != NULL) && (strcmp(s, "yes") == 0)) { 1934 /* 1935 * Only the U-Boot image and it's environment 1936 * is protected, all other sectors are 1937 * unprotected (unlocked) if flash hardware 1938 * protection is used (CONFIG_SYS_FLASH_PROTECTION) 1939 * and the environment variable "unlock" is 1940 * set to "yes". 1941 */ 1942 if (flash_info[i].legacy_unlock) { 1943 int k; 1944 1945 /* 1946 * Disable legacy_unlock temporarily, 1947 * since flash_real_protect would 1948 * relock all other sectors again 1949 * otherwise. 1950 */ 1951 flash_info[i].legacy_unlock = 0; 1952 1953 /* 1954 * Legacy unlocking (e.g. Intel J3) -> 1955 * unlock only one sector. This will 1956 * unlock all sectors. 1957 */ 1958 flash_real_protect (&flash_info[i], 0, 0); 1959 1960 flash_info[i].legacy_unlock = 1; 1961 1962 /* 1963 * Manually mark other sectors as 1964 * unlocked (unprotected) 1965 */ 1966 for (k = 1; k < flash_info[i].sector_count; k++) 1967 flash_info[i].protect[k] = 0; 1968 } else { 1969 /* 1970 * No legancy unlocking -> unlock all sectors 1971 */ 1972 flash_protect (FLAG_PROTECT_CLEAR, 1973 flash_info[i].start[0], 1974 flash_info[i].start[0] 1975 + flash_info[i].size - 1, 1976 &flash_info[i]); 1977 } 1978 } 1979 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 1980 } 1981 1982 /* Monitor protection ON by default */ 1983 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 1984 flash_protect (FLAG_PROTECT_SET, 1985 CONFIG_SYS_MONITOR_BASE, 1986 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, 1987 flash_get_info(CONFIG_SYS_MONITOR_BASE)); 1988 #endif 1989 1990 /* Environment protection ON by default */ 1991 #ifdef CONFIG_ENV_IS_IN_FLASH 1992 flash_protect (FLAG_PROTECT_SET, 1993 CONFIG_ENV_ADDR, 1994 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, 1995 flash_get_info(CONFIG_ENV_ADDR)); 1996 #endif 1997 1998 /* Redundant environment protection ON by default */ 1999 #ifdef CONFIG_ENV_ADDR_REDUND 2000 flash_protect (FLAG_PROTECT_SET, 2001 CONFIG_ENV_ADDR_REDUND, 2002 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, 2003 flash_get_info(CONFIG_ENV_ADDR_REDUND)); 2004 #endif 2005 2006 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2007 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) { 2008 debug("autoprotecting from %08x to %08x\n", 2009 apl[i].start, apl[i].start + apl[i].size - 1); 2010 flash_protect (FLAG_PROTECT_SET, 2011 apl[i].start, 2012 apl[i].start + apl[i].size - 1, 2013 flash_get_info(apl[i].start)); 2014 } 2015 #endif 2016 2017 #ifdef CONFIG_FLASH_CFI_MTD 2018 cfi_mtd_init(); 2019 #endif 2020 2021 return (size); 2022 } 2023