1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2016 Socionext Inc. 4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 5 */ 6 7 #include <common.h> 8 #include <clk.h> 9 #include <fdtdec.h> 10 #include <mmc.h> 11 #include <dm.h> 12 #include <linux/compat.h> 13 #include <linux/dma-direction.h> 14 #include <linux/io.h> 15 #include <linux/sizes.h> 16 #include <power/regulator.h> 17 #include <asm/unaligned.h> 18 19 #include "tmio-common.h" 20 21 static const struct dm_mmc_ops uniphier_sd_ops = { 22 .send_cmd = tmio_sd_send_cmd, 23 .set_ios = tmio_sd_set_ios, 24 .get_cd = tmio_sd_get_cd, 25 }; 26 27 static const struct udevice_id uniphier_sd_match[] = { 28 { .compatible = "socionext,uniphier-sd-v2.91" }, 29 { .compatible = "socionext,uniphier-sd-v3.1" }, 30 { .compatible = "socionext,uniphier-sd-v3.1.1" }, 31 { /* sentinel */ } 32 }; 33 34 static int uniphier_sd_probe(struct udevice *dev) 35 { 36 struct tmio_sd_priv *priv = dev_get_priv(dev); 37 #ifndef CONFIG_SPL_BUILD 38 struct clk clk; 39 int ret; 40 41 ret = clk_get_by_index(dev, 0, &clk); 42 if (ret < 0) { 43 dev_err(dev, "failed to get host clock\n"); 44 return ret; 45 } 46 47 /* set to max rate */ 48 priv->mclk = clk_set_rate(&clk, ULONG_MAX); 49 if (IS_ERR_VALUE(priv->mclk)) { 50 dev_err(dev, "failed to set rate for host clock\n"); 51 clk_free(&clk); 52 return priv->mclk; 53 } 54 55 ret = clk_enable(&clk); 56 clk_free(&clk); 57 if (ret) { 58 dev_err(dev, "failed to enable host clock\n"); 59 return ret; 60 } 61 #else 62 priv->mclk = 100000000; 63 #endif 64 65 return tmio_sd_probe(dev, 0); 66 } 67 68 U_BOOT_DRIVER(uniphier_mmc) = { 69 .name = "uniphier-mmc", 70 .id = UCLASS_MMC, 71 .of_match = uniphier_sd_match, 72 .bind = tmio_sd_bind, 73 .probe = uniphier_sd_probe, 74 .priv_auto_alloc_size = sizeof(struct tmio_sd_priv), 75 .platdata_auto_alloc_size = sizeof(struct tmio_sd_plat), 76 .ops = &uniphier_sd_ops, 77 }; 78