xref: /openbmc/u-boot/drivers/mmc/uniphier-sd.c (revision 7b384eccc785b596f68448b155cbda26df57fb23)
1  // SPDX-License-Identifier: GPL-2.0+
2  /*
3   * Copyright (C) 2016 Socionext Inc.
4   *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5   */
6  
7  #include <common.h>
8  #include <clk.h>
9  #include <fdtdec.h>
10  #include <mmc.h>
11  #include <dm.h>
12  #include <linux/compat.h>
13  #include <linux/dma-direction.h>
14  #include <linux/io.h>
15  #include <linux/sizes.h>
16  #include <power/regulator.h>
17  #include <asm/unaligned.h>
18  
19  #include "tmio-common.h"
20  
21  static const struct dm_mmc_ops uniphier_sd_ops = {
22  	.send_cmd = tmio_sd_send_cmd,
23  	.set_ios = tmio_sd_set_ios,
24  	.get_cd = tmio_sd_get_cd,
25  };
26  
27  static const struct udevice_id uniphier_sd_match[] = {
28  	{ .compatible = "socionext,uniphier-sdhc", .data = 0 },
29  	{ /* sentinel */ }
30  };
31  
32  static int uniphier_sd_probe(struct udevice *dev)
33  {
34  	struct tmio_sd_priv *priv = dev_get_priv(dev);
35  #ifndef CONFIG_SPL_BUILD
36  	struct clk clk;
37  	int ret;
38  
39  	ret = clk_get_by_index(dev, 0, &clk);
40  	if (ret < 0) {
41  		dev_err(dev, "failed to get host clock\n");
42  		return ret;
43  	}
44  
45  	/* set to max rate */
46  	priv->mclk = clk_set_rate(&clk, ULONG_MAX);
47  	if (IS_ERR_VALUE(priv->mclk)) {
48  		dev_err(dev, "failed to set rate for host clock\n");
49  		clk_free(&clk);
50  		return priv->mclk;
51  	}
52  
53  	ret = clk_enable(&clk);
54  	clk_free(&clk);
55  	if (ret) {
56  		dev_err(dev, "failed to enable host clock\n");
57  		return ret;
58  	}
59  #else
60  	priv->mclk = 100000000;
61  #endif
62  
63  	return tmio_sd_probe(dev, 0);
64  }
65  
66  U_BOOT_DRIVER(uniphier_mmc) = {
67  	.name = "uniphier-mmc",
68  	.id = UCLASS_MMC,
69  	.of_match = uniphier_sd_match,
70  	.bind = tmio_sd_bind,
71  	.probe = uniphier_sd_probe,
72  	.priv_auto_alloc_size = sizeof(struct tmio_sd_priv),
73  	.platdata_auto_alloc_size = sizeof(struct tmio_sd_plat),
74  	.ops = &uniphier_sd_ops,
75  };
76