xref: /openbmc/u-boot/drivers/mmc/uniphier-sd.c (revision 5512f5cc)
1 /*
2  * Copyright (C) 2016 Socionext Inc.
3  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #include <common.h>
9 #include <clk.h>
10 #include <fdtdec.h>
11 #include <mmc.h>
12 #include <dm.h>
13 #include <linux/compat.h>
14 #include <linux/dma-direction.h>
15 #include <linux/io.h>
16 #include <linux/sizes.h>
17 #include <power/regulator.h>
18 #include <asm/unaligned.h>
19 
20 #include "tmio-common.h"
21 
22 static const struct dm_mmc_ops uniphier_sd_ops = {
23 	.send_cmd = tmio_sd_send_cmd,
24 	.set_ios = tmio_sd_set_ios,
25 	.get_cd = tmio_sd_get_cd,
26 };
27 
28 static const struct udevice_id uniphier_sd_match[] = {
29 	{ .compatible = "socionext,uniphier-sdhc", .data = 0 },
30 	{ /* sentinel */ }
31 };
32 
33 static int uniphier_sd_probe(struct udevice *dev)
34 {
35 	struct tmio_sd_priv *priv = dev_get_priv(dev);
36 #ifndef CONFIG_SPL_BUILD
37 	struct clk clk;
38 	int ret;
39 
40 	ret = clk_get_by_index(dev, 0, &clk);
41 	if (ret < 0) {
42 		dev_err(dev, "failed to get host clock\n");
43 		return ret;
44 	}
45 
46 	/* set to max rate */
47 	priv->mclk = clk_set_rate(&clk, ULONG_MAX);
48 	if (IS_ERR_VALUE(priv->mclk)) {
49 		dev_err(dev, "failed to set rate for host clock\n");
50 		clk_free(&clk);
51 		return priv->mclk;
52 	}
53 
54 	ret = clk_enable(&clk);
55 	clk_free(&clk);
56 	if (ret) {
57 		dev_err(dev, "failed to enable host clock\n");
58 		return ret;
59 	}
60 #else
61 	priv->mclk = 100000000;
62 #endif
63 
64 	return tmio_sd_probe(dev, 0);
65 }
66 
67 U_BOOT_DRIVER(uniphier_mmc) = {
68 	.name = "uniphier-mmc",
69 	.id = UCLASS_MMC,
70 	.of_match = uniphier_sd_match,
71 	.bind = tmio_sd_bind,
72 	.probe = uniphier_sd_probe,
73 	.priv_auto_alloc_size = sizeof(struct tmio_sd_priv),
74 	.platdata_auto_alloc_size = sizeof(struct tmio_sd_plat),
75 	.ops = &uniphier_sd_ops,
76 };
77