1a8cb4fb5SSimon Glass /* 2a8cb4fb5SSimon Glass * Copyright (c) 2013 Google, Inc 3a8cb4fb5SSimon Glass * 4a8cb4fb5SSimon Glass * SPDX-License-Identifier: GPL-2.0+ 5a8cb4fb5SSimon Glass */ 6a8cb4fb5SSimon Glass 7a8cb4fb5SSimon Glass #include <common.h> 8a8cb4fb5SSimon Glass #include <clk.h> 9a8cb4fb5SSimon Glass #include <dm.h> 10bfeb443eSSimon Glass #include <dt-structs.h> 11a8cb4fb5SSimon Glass #include <dwmmc.h> 12a8cb4fb5SSimon Glass #include <errno.h> 13bfeb443eSSimon Glass #include <mapmem.h> 14e1efec4eSSimon Glass #include <pwrseq.h> 15a8cb4fb5SSimon Glass #include <syscon.h> 16e1efec4eSSimon Glass #include <asm/gpio.h> 17a8cb4fb5SSimon Glass #include <asm/arch/clock.h> 18a8cb4fb5SSimon Glass #include <asm/arch/periph.h> 19a8cb4fb5SSimon Glass #include <linux/err.h> 20a8cb4fb5SSimon Glass 21a8cb4fb5SSimon Glass DECLARE_GLOBAL_DATA_PTR; 22a8cb4fb5SSimon Glass 23f6e41d17SSimon Glass struct rockchip_mmc_plat { 24bfeb443eSSimon Glass #if CONFIG_IS_ENABLED(OF_PLATDATA) 25bfeb443eSSimon Glass struct dtd_rockchip_rk3288_dw_mshc dtplat; 26bfeb443eSSimon Glass #endif 27f6e41d17SSimon Glass struct mmc_config cfg; 28f6e41d17SSimon Glass struct mmc mmc; 29f6e41d17SSimon Glass }; 30f6e41d17SSimon Glass 31a8cb4fb5SSimon Glass struct rockchip_dwmmc_priv { 32135aa950SStephen Warren struct clk clk; 33a8cb4fb5SSimon Glass struct dwmci_host host; 346809b04fSSimon Glass int fifo_depth; 356809b04fSSimon Glass bool fifo_mode; 366809b04fSSimon Glass u32 minmax[2]; 37a8cb4fb5SSimon Glass }; 38a8cb4fb5SSimon Glass 39a8cb4fb5SSimon Glass static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq) 40a8cb4fb5SSimon Glass { 41a8cb4fb5SSimon Glass struct udevice *dev = host->priv; 42a8cb4fb5SSimon Glass struct rockchip_dwmmc_priv *priv = dev_get_priv(dev); 43a8cb4fb5SSimon Glass int ret; 44a8cb4fb5SSimon Glass 45135aa950SStephen Warren ret = clk_set_rate(&priv->clk, freq); 46a8cb4fb5SSimon Glass if (ret < 0) { 47480a9b83SXu Ziyuan printf("%s: err=%d\n", __func__, ret); 48a8cb4fb5SSimon Glass return ret; 49a8cb4fb5SSimon Glass } 50a8cb4fb5SSimon Glass 51a8cb4fb5SSimon Glass return freq; 52a8cb4fb5SSimon Glass } 53a8cb4fb5SSimon Glass 54a8cb4fb5SSimon Glass static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev) 55a8cb4fb5SSimon Glass { 56bfeb443eSSimon Glass #if !CONFIG_IS_ENABLED(OF_PLATDATA) 57a8cb4fb5SSimon Glass struct rockchip_dwmmc_priv *priv = dev_get_priv(dev); 58a8cb4fb5SSimon Glass struct dwmci_host *host = &priv->host; 59a8cb4fb5SSimon Glass 60a8cb4fb5SSimon Glass host->name = dev->name; 61a821c4afSSimon Glass host->ioaddr = (void *)devfdt_get_addr(dev); 62*fd1bf8dfSPhilipp Tomsich host->buswidth = dev_read_u32_default(dev, "bus-width", 4); 63a8cb4fb5SSimon Glass host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk; 64a8cb4fb5SSimon Glass host->priv = dev; 65a8cb4fb5SSimon Glass 66ace2198bShuang lin /* use non-removeable as sdcard and emmc as judgement */ 67*fd1bf8dfSPhilipp Tomsich if (dev_read_bool(dev, "non-removable")) 686579385bShuang lin host->dev_index = 0; 696579385bShuang lin else 70ace2198bShuang lin host->dev_index = 1; 71a8cb4fb5SSimon Glass 72*fd1bf8dfSPhilipp Tomsich priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); 73*fd1bf8dfSPhilipp Tomsich 746809b04fSSimon Glass if (priv->fifo_depth < 0) 756809b04fSSimon Glass return -EINVAL; 76*fd1bf8dfSPhilipp Tomsich priv->fifo_mode = dev_read_bool(dev, "fifo-mode"); 77ff71f9acSPhilipp Tomsich 78ff71f9acSPhilipp Tomsich /* 79ff71f9acSPhilipp Tomsich * 'clock-freq-min-max' is deprecated 80ff71f9acSPhilipp Tomsich * (see https://github.com/torvalds/linux/commit/b023030f10573de738bbe8df63d43acab64c9f7b) 81ff71f9acSPhilipp Tomsich */ 82*fd1bf8dfSPhilipp Tomsich if (dev_read_u32_array(dev, "clock-freq-min-max", priv->minmax, 2)) { 83*fd1bf8dfSPhilipp Tomsich int val = dev_read_u32_default(dev, "max-frequency", -EINVAL); 84ff71f9acSPhilipp Tomsich 85ff71f9acSPhilipp Tomsich if (val < 0) 86ff71f9acSPhilipp Tomsich return val; 87ff71f9acSPhilipp Tomsich 88ff71f9acSPhilipp Tomsich priv->minmax[0] = 400000; /* 400 kHz */ 89ff71f9acSPhilipp Tomsich priv->minmax[1] = val; 90ff71f9acSPhilipp Tomsich } else { 91ff71f9acSPhilipp Tomsich debug("%s: 'clock-freq-min-max' property was deprecated.\n", 92ff71f9acSPhilipp Tomsich __func__); 93ff71f9acSPhilipp Tomsich } 94bfeb443eSSimon Glass #endif 95a8cb4fb5SSimon Glass return 0; 96a8cb4fb5SSimon Glass } 97a8cb4fb5SSimon Glass 98a8cb4fb5SSimon Glass static int rockchip_dwmmc_probe(struct udevice *dev) 99a8cb4fb5SSimon Glass { 100f6e41d17SSimon Glass struct rockchip_mmc_plat *plat = dev_get_platdata(dev); 101a8cb4fb5SSimon Glass struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); 102a8cb4fb5SSimon Glass struct rockchip_dwmmc_priv *priv = dev_get_priv(dev); 103a8cb4fb5SSimon Glass struct dwmci_host *host = &priv->host; 104e1efec4eSSimon Glass struct udevice *pwr_dev __maybe_unused; 105a8cb4fb5SSimon Glass int ret; 106a8cb4fb5SSimon Glass 107bfeb443eSSimon Glass #if CONFIG_IS_ENABLED(OF_PLATDATA) 108bfeb443eSSimon Glass struct dtd_rockchip_rk3288_dw_mshc *dtplat = &plat->dtplat; 109bfeb443eSSimon Glass 110bfeb443eSSimon Glass host->name = dev->name; 111bfeb443eSSimon Glass host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]); 112bfeb443eSSimon Glass host->buswidth = dtplat->bus_width; 113bfeb443eSSimon Glass host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk; 114bfeb443eSSimon Glass host->priv = dev; 115bfeb443eSSimon Glass host->dev_index = 0; 116bfeb443eSSimon Glass priv->fifo_depth = dtplat->fifo_depth; 117bfeb443eSSimon Glass priv->fifo_mode = 0; 118bfeb443eSSimon Glass memcpy(priv->minmax, dtplat->clock_freq_min_max, sizeof(priv->minmax)); 119bfeb443eSSimon Glass 120bfeb443eSSimon Glass ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->clk); 121bfeb443eSSimon Glass if (ret < 0) 122bfeb443eSSimon Glass return ret; 123bfeb443eSSimon Glass #else 124480a9b83SXu Ziyuan ret = clk_get_by_name(dev, "ciu", &priv->clk); 125898d6439SSimon Glass if (ret < 0) 126a8cb4fb5SSimon Glass return ret; 127bfeb443eSSimon Glass #endif 12828637248Shuang lin host->fifoth_val = MSIZE(0x2) | 1296809b04fSSimon Glass RX_WMARK(priv->fifo_depth / 2 - 1) | 1306809b04fSSimon Glass TX_WMARK(priv->fifo_depth / 2); 13128637248Shuang lin 1326809b04fSSimon Glass host->fifo_mode = priv->fifo_mode; 13328637248Shuang lin 134e1efec4eSSimon Glass #ifdef CONFIG_PWRSEQ 135e1efec4eSSimon Glass /* Enable power if needed */ 136e1efec4eSSimon Glass ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq", 137e1efec4eSSimon Glass &pwr_dev); 138e1efec4eSSimon Glass if (!ret) { 139e1efec4eSSimon Glass ret = pwrseq_set_power(pwr_dev, true); 140e1efec4eSSimon Glass if (ret) 141e1efec4eSSimon Glass return ret; 142e1efec4eSSimon Glass } 143e1efec4eSSimon Glass #endif 144e5113c33SJaehoon Chung dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]); 145f6e41d17SSimon Glass host->mmc = &plat->mmc; 146f6e41d17SSimon Glass host->mmc->priv = &priv->host; 147cffe5d86SSimon Glass host->mmc->dev = dev; 148a8cb4fb5SSimon Glass upriv->mmc = host->mmc; 149a8cb4fb5SSimon Glass 15042b37d8dSSimon Glass return dwmci_probe(dev); 151a8cb4fb5SSimon Glass } 152a8cb4fb5SSimon Glass 153f6e41d17SSimon Glass static int rockchip_dwmmc_bind(struct udevice *dev) 154f6e41d17SSimon Glass { 155f6e41d17SSimon Glass struct rockchip_mmc_plat *plat = dev_get_platdata(dev); 156f6e41d17SSimon Glass 15724f5aec3SMasahiro Yamada return dwmci_bind(dev, &plat->mmc, &plat->cfg); 158f6e41d17SSimon Glass } 159f6e41d17SSimon Glass 160a8cb4fb5SSimon Glass static const struct udevice_id rockchip_dwmmc_ids[] = { 161a8cb4fb5SSimon Glass { .compatible = "rockchip,rk3288-dw-mshc" }, 162a8cb4fb5SSimon Glass { } 163a8cb4fb5SSimon Glass }; 164a8cb4fb5SSimon Glass 165a8cb4fb5SSimon Glass U_BOOT_DRIVER(rockchip_dwmmc_drv) = { 166bfeb443eSSimon Glass .name = "rockchip_rk3288_dw_mshc", 167a8cb4fb5SSimon Glass .id = UCLASS_MMC, 168a8cb4fb5SSimon Glass .of_match = rockchip_dwmmc_ids, 169a8cb4fb5SSimon Glass .ofdata_to_platdata = rockchip_dwmmc_ofdata_to_platdata, 17042b37d8dSSimon Glass .ops = &dm_dwmci_ops, 171f6e41d17SSimon Glass .bind = rockchip_dwmmc_bind, 172a8cb4fb5SSimon Glass .probe = rockchip_dwmmc_probe, 173a8cb4fb5SSimon Glass .priv_auto_alloc_size = sizeof(struct rockchip_dwmmc_priv), 174f6e41d17SSimon Glass .platdata_auto_alloc_size = sizeof(struct rockchip_mmc_plat), 175a8cb4fb5SSimon Glass }; 176e1efec4eSSimon Glass 177e1efec4eSSimon Glass #ifdef CONFIG_PWRSEQ 178e1efec4eSSimon Glass static int rockchip_dwmmc_pwrseq_set_power(struct udevice *dev, bool enable) 179e1efec4eSSimon Glass { 180e1efec4eSSimon Glass struct gpio_desc reset; 181e1efec4eSSimon Glass int ret; 182e1efec4eSSimon Glass 183e1efec4eSSimon Glass ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT); 184e1efec4eSSimon Glass if (ret) 185e1efec4eSSimon Glass return ret; 186e1efec4eSSimon Glass dm_gpio_set_value(&reset, 1); 187e1efec4eSSimon Glass udelay(1); 188e1efec4eSSimon Glass dm_gpio_set_value(&reset, 0); 189e1efec4eSSimon Glass udelay(200); 190e1efec4eSSimon Glass 191e1efec4eSSimon Glass return 0; 192e1efec4eSSimon Glass } 193e1efec4eSSimon Glass 194e1efec4eSSimon Glass static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops = { 195e1efec4eSSimon Glass .set_power = rockchip_dwmmc_pwrseq_set_power, 196e1efec4eSSimon Glass }; 197e1efec4eSSimon Glass 198e1efec4eSSimon Glass static const struct udevice_id rockchip_dwmmc_pwrseq_ids[] = { 199e1efec4eSSimon Glass { .compatible = "mmc-pwrseq-emmc" }, 200e1efec4eSSimon Glass { } 201e1efec4eSSimon Glass }; 202e1efec4eSSimon Glass 203e1efec4eSSimon Glass U_BOOT_DRIVER(rockchip_dwmmc_pwrseq_drv) = { 204e1efec4eSSimon Glass .name = "mmc_pwrseq_emmc", 205e1efec4eSSimon Glass .id = UCLASS_PWRSEQ, 206e1efec4eSSimon Glass .of_match = rockchip_dwmmc_pwrseq_ids, 207e1efec4eSSimon Glass .ops = &rockchip_dwmmc_pwrseq_ops, 208e1efec4eSSimon Glass }; 209e1efec4eSSimon Glass #endif 210