171a758e1SMarek Vasut /* 271a758e1SMarek Vasut * Freescale i.MX28 SSP MMC driver 371a758e1SMarek Vasut * 471a758e1SMarek Vasut * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> 571a758e1SMarek Vasut * on behalf of DENX Software Engineering GmbH 671a758e1SMarek Vasut * 771a758e1SMarek Vasut * Based on code from LTIB: 871a758e1SMarek Vasut * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 971a758e1SMarek Vasut * Terry Lv 1071a758e1SMarek Vasut * 1171a758e1SMarek Vasut * Copyright 2007, Freescale Semiconductor, Inc 1271a758e1SMarek Vasut * Andy Fleming 1371a758e1SMarek Vasut * 1471a758e1SMarek Vasut * Based vaguely on the pxa mmc code: 1571a758e1SMarek Vasut * (C) Copyright 2003 1671a758e1SMarek Vasut * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net 1771a758e1SMarek Vasut * 181a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 1971a758e1SMarek Vasut */ 2071a758e1SMarek Vasut #include <common.h> 2171a758e1SMarek Vasut #include <malloc.h> 2271a758e1SMarek Vasut #include <mmc.h> 2371a758e1SMarek Vasut #include <asm/errno.h> 2471a758e1SMarek Vasut #include <asm/io.h> 2571a758e1SMarek Vasut #include <asm/arch/clock.h> 2671a758e1SMarek Vasut #include <asm/arch/imx-regs.h> 2771a758e1SMarek Vasut #include <asm/arch/sys_proto.h> 280499218dSStefan Roese #include <asm/imx-common/dma.h> 294e6d81d1SMarek Vasut #include <bouncebuf.h> 3071a758e1SMarek Vasut 3171a758e1SMarek Vasut struct mxsmmc_priv { 3271a758e1SMarek Vasut int id; 339c471142SOtavio Salvador struct mxs_ssp_regs *regs; 3471a758e1SMarek Vasut uint32_t buswidth; 3571a758e1SMarek Vasut int (*mmc_is_wp)(int); 3690bc2bf2SMarek Vasut int (*mmc_cd)(int); 373687c415SMarek Vasut struct mxs_dma_desc *desc; 3871a758e1SMarek Vasut }; 3971a758e1SMarek Vasut 4071a758e1SMarek Vasut #define MXSMMC_MAX_TIMEOUT 10000 4120255900SMarek Vasut #define MXSMMC_SMALL_TRANSFER 512 4271a758e1SMarek Vasut 4390bc2bf2SMarek Vasut static int mxsmmc_cd(struct mxsmmc_priv *priv) 4490bc2bf2SMarek Vasut { 4590bc2bf2SMarek Vasut struct mxs_ssp_regs *ssp_regs = priv->regs; 4690bc2bf2SMarek Vasut 4790bc2bf2SMarek Vasut if (priv->mmc_cd) 4890bc2bf2SMarek Vasut return priv->mmc_cd(priv->id); 4990bc2bf2SMarek Vasut 5090bc2bf2SMarek Vasut return !(readl(&ssp_regs->hw_ssp_status) & SSP_STATUS_CARD_DETECT); 5190bc2bf2SMarek Vasut } 5290bc2bf2SMarek Vasut 5386983328SMarek Vasut static int mxsmmc_send_cmd_pio(struct mxsmmc_priv *priv, struct mmc_data *data) 5486983328SMarek Vasut { 5586983328SMarek Vasut struct mxs_ssp_regs *ssp_regs = priv->regs; 5686983328SMarek Vasut uint32_t *data_ptr; 5786983328SMarek Vasut int timeout = MXSMMC_MAX_TIMEOUT; 5886983328SMarek Vasut uint32_t reg; 5986983328SMarek Vasut uint32_t data_count = data->blocksize * data->blocks; 6086983328SMarek Vasut 6186983328SMarek Vasut if (data->flags & MMC_DATA_READ) { 6286983328SMarek Vasut data_ptr = (uint32_t *)data->dest; 6386983328SMarek Vasut while (data_count && --timeout) { 6486983328SMarek Vasut reg = readl(&ssp_regs->hw_ssp_status); 6586983328SMarek Vasut if (!(reg & SSP_STATUS_FIFO_EMPTY)) { 6686983328SMarek Vasut *data_ptr++ = readl(&ssp_regs->hw_ssp_data); 6786983328SMarek Vasut data_count -= 4; 6886983328SMarek Vasut timeout = MXSMMC_MAX_TIMEOUT; 6986983328SMarek Vasut } else 7086983328SMarek Vasut udelay(1000); 7186983328SMarek Vasut } 7286983328SMarek Vasut } else { 7386983328SMarek Vasut data_ptr = (uint32_t *)data->src; 7486983328SMarek Vasut timeout *= 100; 7586983328SMarek Vasut while (data_count && --timeout) { 7686983328SMarek Vasut reg = readl(&ssp_regs->hw_ssp_status); 7786983328SMarek Vasut if (!(reg & SSP_STATUS_FIFO_FULL)) { 7886983328SMarek Vasut writel(*data_ptr++, &ssp_regs->hw_ssp_data); 7986983328SMarek Vasut data_count -= 4; 8086983328SMarek Vasut timeout = MXSMMC_MAX_TIMEOUT; 8186983328SMarek Vasut } else 8286983328SMarek Vasut udelay(1000); 8386983328SMarek Vasut } 8486983328SMarek Vasut } 8586983328SMarek Vasut 8686983328SMarek Vasut return timeout ? 0 : COMM_ERR; 8786983328SMarek Vasut } 8820255900SMarek Vasut 8986983328SMarek Vasut static int mxsmmc_send_cmd_dma(struct mxsmmc_priv *priv, struct mmc_data *data) 9086983328SMarek Vasut { 9186983328SMarek Vasut uint32_t data_count = data->blocksize * data->blocks; 9286983328SMarek Vasut int dmach; 93abb85be7SMarek Vasut struct mxs_dma_desc *desc = priv->desc; 9484d35b28SStephen Warren void *addr; 9584d35b28SStephen Warren unsigned int flags; 9684d35b28SStephen Warren struct bounce_buffer bbstate; 97abb85be7SMarek Vasut 98abb85be7SMarek Vasut memset(desc, 0, sizeof(struct mxs_dma_desc)); 99abb85be7SMarek Vasut desc->address = (dma_addr_t)desc; 10086983328SMarek Vasut 10186983328SMarek Vasut if (data->flags & MMC_DATA_READ) { 10286983328SMarek Vasut priv->desc->cmd.data = MXS_DMA_DESC_COMMAND_DMA_WRITE; 1034e6d81d1SMarek Vasut addr = data->dest; 1044e6d81d1SMarek Vasut flags = GEN_BB_WRITE; 10586983328SMarek Vasut } else { 10686983328SMarek Vasut priv->desc->cmd.data = MXS_DMA_DESC_COMMAND_DMA_READ; 1074e6d81d1SMarek Vasut addr = (void *)data->src; 1084e6d81d1SMarek Vasut flags = GEN_BB_READ; 1094e6d81d1SMarek Vasut } 11086983328SMarek Vasut 11184d35b28SStephen Warren bounce_buffer_start(&bbstate, addr, data_count, flags); 1124e6d81d1SMarek Vasut 11384d35b28SStephen Warren priv->desc->cmd.address = (dma_addr_t)bbstate.bounce_buffer; 11497ed12ceSMarek Vasut 11586983328SMarek Vasut priv->desc->cmd.data |= MXS_DMA_DESC_IRQ | MXS_DMA_DESC_DEC_SEM | 11686983328SMarek Vasut (data_count << MXS_DMA_DESC_BYTES_OFFSET); 11786983328SMarek Vasut 1183430e0bdSMarek Vasut dmach = MXS_DMA_CHANNEL_AHB_APBH_SSP0 + priv->id; 11986983328SMarek Vasut mxs_dma_desc_append(dmach, priv->desc); 1204e6d81d1SMarek Vasut if (mxs_dma_go(dmach)) { 12184d35b28SStephen Warren bounce_buffer_stop(&bbstate); 12286983328SMarek Vasut return COMM_ERR; 1234e6d81d1SMarek Vasut } 12486983328SMarek Vasut 12584d35b28SStephen Warren bounce_buffer_stop(&bbstate); 1264e6d81d1SMarek Vasut 12786983328SMarek Vasut return 0; 12886983328SMarek Vasut } 12986983328SMarek Vasut 13071a758e1SMarek Vasut /* 13171a758e1SMarek Vasut * Sends a command out on the bus. Takes the mmc pointer, 13271a758e1SMarek Vasut * a command pointer, and an optional data pointer. 13371a758e1SMarek Vasut */ 13471a758e1SMarek Vasut static int 13571a758e1SMarek Vasut mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) 13671a758e1SMarek Vasut { 13771a758e1SMarek Vasut struct mxsmmc_priv *priv = (struct mxsmmc_priv *)mmc->priv; 1389c471142SOtavio Salvador struct mxs_ssp_regs *ssp_regs = priv->regs; 13971a758e1SMarek Vasut uint32_t reg; 14071a758e1SMarek Vasut int timeout; 14171a758e1SMarek Vasut uint32_t ctrl0; 14286983328SMarek Vasut int ret; 14371a758e1SMarek Vasut 14471a758e1SMarek Vasut debug("MMC%d: CMD%d\n", mmc->block_dev.dev, cmd->cmdidx); 14571a758e1SMarek Vasut 14671a758e1SMarek Vasut /* Check bus busy */ 14771a758e1SMarek Vasut timeout = MXSMMC_MAX_TIMEOUT; 14871a758e1SMarek Vasut while (--timeout) { 14971a758e1SMarek Vasut udelay(1000); 15071a758e1SMarek Vasut reg = readl(&ssp_regs->hw_ssp_status); 15171a758e1SMarek Vasut if (!(reg & 15271a758e1SMarek Vasut (SSP_STATUS_BUSY | SSP_STATUS_DATA_BUSY | 15371a758e1SMarek Vasut SSP_STATUS_CMD_BUSY))) { 15471a758e1SMarek Vasut break; 15571a758e1SMarek Vasut } 15671a758e1SMarek Vasut } 15771a758e1SMarek Vasut 15871a758e1SMarek Vasut if (!timeout) { 15971a758e1SMarek Vasut printf("MMC%d: Bus busy timeout!\n", mmc->block_dev.dev); 16071a758e1SMarek Vasut return TIMEOUT; 16171a758e1SMarek Vasut } 16271a758e1SMarek Vasut 16371a758e1SMarek Vasut /* See if card is present */ 16490bc2bf2SMarek Vasut if (!mxsmmc_cd(priv)) { 16571a758e1SMarek Vasut printf("MMC%d: No card detected!\n", mmc->block_dev.dev); 16671a758e1SMarek Vasut return NO_CARD_ERR; 16771a758e1SMarek Vasut } 16871a758e1SMarek Vasut 16971a758e1SMarek Vasut /* Start building CTRL0 contents */ 17071a758e1SMarek Vasut ctrl0 = priv->buswidth; 17171a758e1SMarek Vasut 17271a758e1SMarek Vasut /* Set up command */ 17371a758e1SMarek Vasut if (!(cmd->resp_type & MMC_RSP_CRC)) 17471a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_IGNORE_CRC; 17571a758e1SMarek Vasut if (cmd->resp_type & MMC_RSP_PRESENT) /* Need to get response */ 17671a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_GET_RESP; 17771a758e1SMarek Vasut if (cmd->resp_type & MMC_RSP_136) /* It's a 136 bits response */ 17871a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_LONG_RESP; 17971a758e1SMarek Vasut 180abb85be7SMarek Vasut if (data && (data->blocksize * data->blocks < MXSMMC_SMALL_TRANSFER)) 181abb85be7SMarek Vasut writel(SSP_CTRL1_DMA_ENABLE, &ssp_regs->hw_ssp_ctrl1_clr); 182abb85be7SMarek Vasut else 183abb85be7SMarek Vasut writel(SSP_CTRL1_DMA_ENABLE, &ssp_regs->hw_ssp_ctrl1_set); 184abb85be7SMarek Vasut 18571a758e1SMarek Vasut /* Command index */ 18671a758e1SMarek Vasut reg = readl(&ssp_regs->hw_ssp_cmd0); 18771a758e1SMarek Vasut reg &= ~(SSP_CMD0_CMD_MASK | SSP_CMD0_APPEND_8CYC); 18871a758e1SMarek Vasut reg |= cmd->cmdidx << SSP_CMD0_CMD_OFFSET; 18971a758e1SMarek Vasut if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) 19071a758e1SMarek Vasut reg |= SSP_CMD0_APPEND_8CYC; 19171a758e1SMarek Vasut writel(reg, &ssp_regs->hw_ssp_cmd0); 19271a758e1SMarek Vasut 19371a758e1SMarek Vasut /* Command argument */ 19471a758e1SMarek Vasut writel(cmd->cmdarg, &ssp_regs->hw_ssp_cmd1); 19571a758e1SMarek Vasut 19671a758e1SMarek Vasut /* Set up data */ 19771a758e1SMarek Vasut if (data) { 19871a758e1SMarek Vasut /* READ or WRITE */ 19971a758e1SMarek Vasut if (data->flags & MMC_DATA_READ) { 20071a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_READ; 201c7527b70SMarek Vasut } else if (priv->mmc_is_wp && 202c7527b70SMarek Vasut priv->mmc_is_wp(mmc->block_dev.dev)) { 20371a758e1SMarek Vasut printf("MMC%d: Can not write a locked card!\n", 20471a758e1SMarek Vasut mmc->block_dev.dev); 20571a758e1SMarek Vasut return UNUSABLE_ERR; 20671a758e1SMarek Vasut } 20771a758e1SMarek Vasut 20871a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_DATA_XFER; 209e5b380acSMarek Vasut 210e5b380acSMarek Vasut reg = data->blocksize * data->blocks; 211e5b380acSMarek Vasut #if defined(CONFIG_MX23) 212e5b380acSMarek Vasut ctrl0 |= reg & SSP_CTRL0_XFER_COUNT_MASK; 213e5b380acSMarek Vasut 214e5b380acSMarek Vasut clrsetbits_le32(&ssp_regs->hw_ssp_cmd0, 215e5b380acSMarek Vasut SSP_CMD0_BLOCK_SIZE_MASK | SSP_CMD0_BLOCK_COUNT_MASK, 216e5b380acSMarek Vasut ((data->blocks - 1) << SSP_CMD0_BLOCK_COUNT_OFFSET) | 217e5b380acSMarek Vasut ((ffs(data->blocksize) - 1) << 218e5b380acSMarek Vasut SSP_CMD0_BLOCK_SIZE_OFFSET)); 219e5b380acSMarek Vasut #elif defined(CONFIG_MX28) 220e5b380acSMarek Vasut writel(reg, &ssp_regs->hw_ssp_xfer_size); 221e5b380acSMarek Vasut 22271a758e1SMarek Vasut reg = ((data->blocks - 1) << 22371a758e1SMarek Vasut SSP_BLOCK_SIZE_BLOCK_COUNT_OFFSET) | 22471a758e1SMarek Vasut ((ffs(data->blocksize) - 1) << 22571a758e1SMarek Vasut SSP_BLOCK_SIZE_BLOCK_SIZE_OFFSET); 22671a758e1SMarek Vasut writel(reg, &ssp_regs->hw_ssp_block_size); 227e5b380acSMarek Vasut #endif 22871a758e1SMarek Vasut } 22971a758e1SMarek Vasut 23071a758e1SMarek Vasut /* Kick off the command */ 23171a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_WAIT_FOR_IRQ | SSP_CTRL0_ENABLE | SSP_CTRL0_RUN; 23271a758e1SMarek Vasut writel(ctrl0, &ssp_regs->hw_ssp_ctrl0); 23371a758e1SMarek Vasut 23471a758e1SMarek Vasut /* Wait for the command to complete */ 23571a758e1SMarek Vasut timeout = MXSMMC_MAX_TIMEOUT; 23671a758e1SMarek Vasut while (--timeout) { 23771a758e1SMarek Vasut udelay(1000); 23871a758e1SMarek Vasut reg = readl(&ssp_regs->hw_ssp_status); 23971a758e1SMarek Vasut if (!(reg & SSP_STATUS_CMD_BUSY)) 24071a758e1SMarek Vasut break; 24171a758e1SMarek Vasut } 24271a758e1SMarek Vasut 24371a758e1SMarek Vasut if (!timeout) { 24471a758e1SMarek Vasut printf("MMC%d: Command %d busy\n", 24571a758e1SMarek Vasut mmc->block_dev.dev, cmd->cmdidx); 24671a758e1SMarek Vasut return TIMEOUT; 24771a758e1SMarek Vasut } 24871a758e1SMarek Vasut 24971a758e1SMarek Vasut /* Check command timeout */ 25071a758e1SMarek Vasut if (reg & SSP_STATUS_RESP_TIMEOUT) { 25171a758e1SMarek Vasut printf("MMC%d: Command %d timeout (status 0x%08x)\n", 25271a758e1SMarek Vasut mmc->block_dev.dev, cmd->cmdidx, reg); 25371a758e1SMarek Vasut return TIMEOUT; 25471a758e1SMarek Vasut } 25571a758e1SMarek Vasut 25671a758e1SMarek Vasut /* Check command errors */ 25771a758e1SMarek Vasut if (reg & (SSP_STATUS_RESP_CRC_ERR | SSP_STATUS_RESP_ERR)) { 25871a758e1SMarek Vasut printf("MMC%d: Command %d error (status 0x%08x)!\n", 25971a758e1SMarek Vasut mmc->block_dev.dev, cmd->cmdidx, reg); 26071a758e1SMarek Vasut return COMM_ERR; 26171a758e1SMarek Vasut } 26271a758e1SMarek Vasut 26371a758e1SMarek Vasut /* Copy response to response buffer */ 26471a758e1SMarek Vasut if (cmd->resp_type & MMC_RSP_136) { 26571a758e1SMarek Vasut cmd->response[3] = readl(&ssp_regs->hw_ssp_sdresp0); 26671a758e1SMarek Vasut cmd->response[2] = readl(&ssp_regs->hw_ssp_sdresp1); 26771a758e1SMarek Vasut cmd->response[1] = readl(&ssp_regs->hw_ssp_sdresp2); 26871a758e1SMarek Vasut cmd->response[0] = readl(&ssp_regs->hw_ssp_sdresp3); 26971a758e1SMarek Vasut } else 27071a758e1SMarek Vasut cmd->response[0] = readl(&ssp_regs->hw_ssp_sdresp0); 27171a758e1SMarek Vasut 27271a758e1SMarek Vasut /* Return if no data to process */ 27371a758e1SMarek Vasut if (!data) 27471a758e1SMarek Vasut return 0; 27571a758e1SMarek Vasut 27620255900SMarek Vasut if (data->blocksize * data->blocks < MXSMMC_SMALL_TRANSFER) { 27786983328SMarek Vasut ret = mxsmmc_send_cmd_pio(priv, data); 27886983328SMarek Vasut if (ret) { 27920255900SMarek Vasut printf("MMC%d: Data timeout with command %d " 28020255900SMarek Vasut "(status 0x%08x)!\n", 2814cc76c60SMarek Vasut mmc->block_dev.dev, cmd->cmdidx, reg); 28286983328SMarek Vasut return ret; 2834cc76c60SMarek Vasut } 284abb85be7SMarek Vasut } else { 285abb85be7SMarek Vasut ret = mxsmmc_send_cmd_dma(priv, data); 286abb85be7SMarek Vasut if (ret) { 287abb85be7SMarek Vasut printf("MMC%d: DMA transfer failed\n", 288abb85be7SMarek Vasut mmc->block_dev.dev); 289abb85be7SMarek Vasut return ret; 290abb85be7SMarek Vasut } 29120255900SMarek Vasut } 2923687c415SMarek Vasut 29371a758e1SMarek Vasut /* Check data errors */ 29471a758e1SMarek Vasut reg = readl(&ssp_regs->hw_ssp_status); 29571a758e1SMarek Vasut if (reg & 29671a758e1SMarek Vasut (SSP_STATUS_TIMEOUT | SSP_STATUS_DATA_CRC_ERR | 29771a758e1SMarek Vasut SSP_STATUS_FIFO_OVRFLW | SSP_STATUS_FIFO_UNDRFLW)) { 29871a758e1SMarek Vasut printf("MMC%d: Data error with command %d (status 0x%08x)!\n", 29971a758e1SMarek Vasut mmc->block_dev.dev, cmd->cmdidx, reg); 30071a758e1SMarek Vasut return COMM_ERR; 30171a758e1SMarek Vasut } 30271a758e1SMarek Vasut 30371a758e1SMarek Vasut return 0; 30471a758e1SMarek Vasut } 30571a758e1SMarek Vasut 30671a758e1SMarek Vasut static void mxsmmc_set_ios(struct mmc *mmc) 30771a758e1SMarek Vasut { 30871a758e1SMarek Vasut struct mxsmmc_priv *priv = (struct mxsmmc_priv *)mmc->priv; 3099c471142SOtavio Salvador struct mxs_ssp_regs *ssp_regs = priv->regs; 31071a758e1SMarek Vasut 31171a758e1SMarek Vasut /* Set the clock speed */ 31271a758e1SMarek Vasut if (mmc->clock) 313bf48fcb6SOtavio Salvador mxs_set_ssp_busclock(priv->id, mmc->clock / 1000); 31471a758e1SMarek Vasut 31571a758e1SMarek Vasut switch (mmc->bus_width) { 31671a758e1SMarek Vasut case 1: 31771a758e1SMarek Vasut priv->buswidth = SSP_CTRL0_BUS_WIDTH_ONE_BIT; 31871a758e1SMarek Vasut break; 31971a758e1SMarek Vasut case 4: 32071a758e1SMarek Vasut priv->buswidth = SSP_CTRL0_BUS_WIDTH_FOUR_BIT; 32171a758e1SMarek Vasut break; 32271a758e1SMarek Vasut case 8: 32371a758e1SMarek Vasut priv->buswidth = SSP_CTRL0_BUS_WIDTH_EIGHT_BIT; 32471a758e1SMarek Vasut break; 32571a758e1SMarek Vasut } 32671a758e1SMarek Vasut 32771a758e1SMarek Vasut /* Set the bus width */ 32871a758e1SMarek Vasut clrsetbits_le32(&ssp_regs->hw_ssp_ctrl0, 32971a758e1SMarek Vasut SSP_CTRL0_BUS_WIDTH_MASK, priv->buswidth); 33071a758e1SMarek Vasut 33171a758e1SMarek Vasut debug("MMC%d: Set %d bits bus width\n", 33271a758e1SMarek Vasut mmc->block_dev.dev, mmc->bus_width); 33371a758e1SMarek Vasut } 33471a758e1SMarek Vasut 33571a758e1SMarek Vasut static int mxsmmc_init(struct mmc *mmc) 33671a758e1SMarek Vasut { 33771a758e1SMarek Vasut struct mxsmmc_priv *priv = (struct mxsmmc_priv *)mmc->priv; 3389c471142SOtavio Salvador struct mxs_ssp_regs *ssp_regs = priv->regs; 33971a758e1SMarek Vasut 34071a758e1SMarek Vasut /* Reset SSP */ 341fa7a51cbSOtavio Salvador mxs_reset_block(&ssp_regs->hw_ssp_ctrl0_reg); 34271a758e1SMarek Vasut 3438000d8a8SOtavio Salvador /* Reconfigure the SSP block for MMC operation */ 3448000d8a8SOtavio Salvador writel(SSP_CTRL1_SSP_MODE_SD_MMC | 3458000d8a8SOtavio Salvador SSP_CTRL1_WORD_LENGTH_EIGHT_BITS | 3468000d8a8SOtavio Salvador SSP_CTRL1_DMA_ENABLE | 3478000d8a8SOtavio Salvador SSP_CTRL1_POLARITY | 3488000d8a8SOtavio Salvador SSP_CTRL1_RECV_TIMEOUT_IRQ_EN | 3498000d8a8SOtavio Salvador SSP_CTRL1_DATA_CRC_IRQ_EN | 3508000d8a8SOtavio Salvador SSP_CTRL1_DATA_TIMEOUT_IRQ_EN | 3518000d8a8SOtavio Salvador SSP_CTRL1_RESP_TIMEOUT_IRQ_EN | 3528000d8a8SOtavio Salvador SSP_CTRL1_RESP_ERR_IRQ_EN, 3538000d8a8SOtavio Salvador &ssp_regs->hw_ssp_ctrl1_set); 35471a758e1SMarek Vasut 35571a758e1SMarek Vasut /* Set initial bit clock 400 KHz */ 356bf48fcb6SOtavio Salvador mxs_set_ssp_busclock(priv->id, 400); 35771a758e1SMarek Vasut 35871a758e1SMarek Vasut /* Send initial 74 clock cycles (185 us @ 400 KHz)*/ 35971a758e1SMarek Vasut writel(SSP_CMD0_CONT_CLKING_EN, &ssp_regs->hw_ssp_cmd0_set); 36071a758e1SMarek Vasut udelay(200); 36171a758e1SMarek Vasut writel(SSP_CMD0_CONT_CLKING_EN, &ssp_regs->hw_ssp_cmd0_clr); 36271a758e1SMarek Vasut 36371a758e1SMarek Vasut return 0; 36471a758e1SMarek Vasut } 36571a758e1SMarek Vasut 366*ab769f22SPantelis Antoniou static const struct mmc_ops mxsmmc_ops = { 367*ab769f22SPantelis Antoniou .send_cmd = mxsmmc_send_cmd, 368*ab769f22SPantelis Antoniou .set_ios = mxsmmc_set_ios, 369*ab769f22SPantelis Antoniou .init = mxsmmc_init, 370*ab769f22SPantelis Antoniou }; 371*ab769f22SPantelis Antoniou 37290bc2bf2SMarek Vasut int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int)) 37371a758e1SMarek Vasut { 37471a758e1SMarek Vasut struct mmc *mmc = NULL; 37571a758e1SMarek Vasut struct mxsmmc_priv *priv = NULL; 37696666a39SMarek Vasut int ret; 3773430e0bdSMarek Vasut const unsigned int mxsmmc_clk_id = mxs_ssp_clock_by_bus(id); 3781a3c5ffeSMarek Vasut 3793430e0bdSMarek Vasut if (!mxs_ssp_bus_id_valid(id)) 3801a3c5ffeSMarek Vasut return -ENODEV; 38171a758e1SMarek Vasut 38271a758e1SMarek Vasut mmc = malloc(sizeof(struct mmc)); 38371a758e1SMarek Vasut if (!mmc) 38471a758e1SMarek Vasut return -ENOMEM; 38571a758e1SMarek Vasut 38671a758e1SMarek Vasut priv = malloc(sizeof(struct mxsmmc_priv)); 38771a758e1SMarek Vasut if (!priv) { 38871a758e1SMarek Vasut free(mmc); 38971a758e1SMarek Vasut return -ENOMEM; 39071a758e1SMarek Vasut } 39171a758e1SMarek Vasut 3923687c415SMarek Vasut priv->desc = mxs_dma_desc_alloc(); 3933687c415SMarek Vasut if (!priv->desc) { 3943687c415SMarek Vasut free(priv); 3953687c415SMarek Vasut free(mmc); 3963687c415SMarek Vasut return -ENOMEM; 3973687c415SMarek Vasut } 3983687c415SMarek Vasut 3993430e0bdSMarek Vasut ret = mxs_dma_init_channel(MXS_DMA_CHANNEL_AHB_APBH_SSP0 + id); 40096666a39SMarek Vasut if (ret) 40196666a39SMarek Vasut return ret; 40296666a39SMarek Vasut 40371a758e1SMarek Vasut priv->mmc_is_wp = wp; 40490bc2bf2SMarek Vasut priv->mmc_cd = cd; 40571a758e1SMarek Vasut priv->id = id; 40614e26bcfSMarek Vasut priv->regs = mxs_ssp_regs_by_bus(id); 40771a758e1SMarek Vasut 40871a758e1SMarek Vasut sprintf(mmc->name, "MXS MMC"); 409*ab769f22SPantelis Antoniou mmc->ops = &mxsmmc_ops; 41071a758e1SMarek Vasut mmc->priv = priv; 41171a758e1SMarek Vasut 41271a758e1SMarek Vasut mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; 41371a758e1SMarek Vasut 41471a758e1SMarek Vasut mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | 41549b0415aSAmaury Pouly MMC_MODE_HS_52MHz | MMC_MODE_HS | 41649b0415aSAmaury Pouly MMC_MODE_HC; 41771a758e1SMarek Vasut 41871a758e1SMarek Vasut /* 41971a758e1SMarek Vasut * SSPCLK = 480 * 18 / 29 / 1 = 297.731 MHz 42071a758e1SMarek Vasut * SSP bit rate = SSPCLK / (CLOCK_DIVIDE * (1 + CLOCK_RATE)), 42171a758e1SMarek Vasut * CLOCK_DIVIDE has to be an even value from 2 to 254, and 42271a758e1SMarek Vasut * CLOCK_RATE could be any integer from 0 to 255. 42371a758e1SMarek Vasut */ 42471a758e1SMarek Vasut mmc->f_min = 400000; 4251a3c5ffeSMarek Vasut mmc->f_max = mxc_get_clock(MXC_SSP0_CLK + mxsmmc_clk_id) * 1000 / 2; 426e7205905SMarek Vasut mmc->b_max = 0x20; 42771a758e1SMarek Vasut 42871a758e1SMarek Vasut mmc_register(mmc); 42971a758e1SMarek Vasut return 0; 43071a758e1SMarek Vasut } 431