171a758e1SMarek Vasut /* 271a758e1SMarek Vasut * Freescale i.MX28 SSP MMC driver 371a758e1SMarek Vasut * 471a758e1SMarek Vasut * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> 571a758e1SMarek Vasut * on behalf of DENX Software Engineering GmbH 671a758e1SMarek Vasut * 771a758e1SMarek Vasut * Based on code from LTIB: 871a758e1SMarek Vasut * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 971a758e1SMarek Vasut * Terry Lv 1071a758e1SMarek Vasut * 1171a758e1SMarek Vasut * Copyright 2007, Freescale Semiconductor, Inc 1271a758e1SMarek Vasut * Andy Fleming 1371a758e1SMarek Vasut * 1471a758e1SMarek Vasut * Based vaguely on the pxa mmc code: 1571a758e1SMarek Vasut * (C) Copyright 2003 1671a758e1SMarek Vasut * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net 1771a758e1SMarek Vasut * 1871a758e1SMarek Vasut * See file CREDITS for list of people who contributed to this 1971a758e1SMarek Vasut * project. 2071a758e1SMarek Vasut * 2171a758e1SMarek Vasut * This program is free software; you can redistribute it and/or 2271a758e1SMarek Vasut * modify it under the terms of the GNU General Public License as 2371a758e1SMarek Vasut * published by the Free Software Foundation; either version 2 of 2471a758e1SMarek Vasut * the License, or (at your option) any later version. 2571a758e1SMarek Vasut * 2671a758e1SMarek Vasut * This program is distributed in the hope that it will be useful, 2771a758e1SMarek Vasut * but WITHOUT ANY WARRANTY; without even the implied warranty of 2871a758e1SMarek Vasut * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 2971a758e1SMarek Vasut * GNU General Public License for more details. 3071a758e1SMarek Vasut * 3171a758e1SMarek Vasut * You should have received a copy of the GNU General Public License 3271a758e1SMarek Vasut * along with this program; if not, write to the Free Software 3371a758e1SMarek Vasut * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 3471a758e1SMarek Vasut * MA 02111-1307 USA 3571a758e1SMarek Vasut */ 3671a758e1SMarek Vasut #include <common.h> 3771a758e1SMarek Vasut #include <malloc.h> 3871a758e1SMarek Vasut #include <mmc.h> 3971a758e1SMarek Vasut #include <asm/errno.h> 4071a758e1SMarek Vasut #include <asm/io.h> 4171a758e1SMarek Vasut #include <asm/arch/clock.h> 4271a758e1SMarek Vasut #include <asm/arch/imx-regs.h> 4371a758e1SMarek Vasut #include <asm/arch/sys_proto.h> 443687c415SMarek Vasut #include <asm/arch/dma.h> 4571a758e1SMarek Vasut 464cc76c60SMarek Vasut /* 474cc76c60SMarek Vasut * CONFIG_MXS_MMC_DMA: This feature is highly experimental and has no 484cc76c60SMarek Vasut * performance benefit unless you operate the platform with 494cc76c60SMarek Vasut * data cache enabled. This is disabled by default, enable 504cc76c60SMarek Vasut * only if you know what you're doing. 514cc76c60SMarek Vasut */ 524cc76c60SMarek Vasut 5371a758e1SMarek Vasut struct mxsmmc_priv { 5471a758e1SMarek Vasut int id; 55*9c471142SOtavio Salvador struct mxs_ssp_regs *regs; 5671a758e1SMarek Vasut uint32_t clkseq_bypass; 5771a758e1SMarek Vasut uint32_t *clkctrl_ssp; 5871a758e1SMarek Vasut uint32_t buswidth; 5971a758e1SMarek Vasut int (*mmc_is_wp)(int); 603687c415SMarek Vasut struct mxs_dma_desc *desc; 6171a758e1SMarek Vasut }; 6271a758e1SMarek Vasut 6371a758e1SMarek Vasut #define MXSMMC_MAX_TIMEOUT 10000 6471a758e1SMarek Vasut 6571a758e1SMarek Vasut /* 6671a758e1SMarek Vasut * Sends a command out on the bus. Takes the mmc pointer, 6771a758e1SMarek Vasut * a command pointer, and an optional data pointer. 6871a758e1SMarek Vasut */ 6971a758e1SMarek Vasut static int 7071a758e1SMarek Vasut mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) 7171a758e1SMarek Vasut { 7271a758e1SMarek Vasut struct mxsmmc_priv *priv = (struct mxsmmc_priv *)mmc->priv; 73*9c471142SOtavio Salvador struct mxs_ssp_regs *ssp_regs = priv->regs; 7471a758e1SMarek Vasut uint32_t reg; 7571a758e1SMarek Vasut int timeout; 764cc76c60SMarek Vasut uint32_t data_count; 7771a758e1SMarek Vasut uint32_t ctrl0; 784cc76c60SMarek Vasut #ifndef CONFIG_MXS_MMC_DMA 794cc76c60SMarek Vasut uint32_t *data_ptr; 804cc76c60SMarek Vasut #else 814cc76c60SMarek Vasut uint32_t cache_data_count; 824cc76c60SMarek Vasut #endif 8371a758e1SMarek Vasut 8471a758e1SMarek Vasut debug("MMC%d: CMD%d\n", mmc->block_dev.dev, cmd->cmdidx); 8571a758e1SMarek Vasut 8671a758e1SMarek Vasut /* Check bus busy */ 8771a758e1SMarek Vasut timeout = MXSMMC_MAX_TIMEOUT; 8871a758e1SMarek Vasut while (--timeout) { 8971a758e1SMarek Vasut udelay(1000); 9071a758e1SMarek Vasut reg = readl(&ssp_regs->hw_ssp_status); 9171a758e1SMarek Vasut if (!(reg & 9271a758e1SMarek Vasut (SSP_STATUS_BUSY | SSP_STATUS_DATA_BUSY | 9371a758e1SMarek Vasut SSP_STATUS_CMD_BUSY))) { 9471a758e1SMarek Vasut break; 9571a758e1SMarek Vasut } 9671a758e1SMarek Vasut } 9771a758e1SMarek Vasut 9871a758e1SMarek Vasut if (!timeout) { 9971a758e1SMarek Vasut printf("MMC%d: Bus busy timeout!\n", mmc->block_dev.dev); 10071a758e1SMarek Vasut return TIMEOUT; 10171a758e1SMarek Vasut } 10271a758e1SMarek Vasut 10371a758e1SMarek Vasut /* See if card is present */ 10471a758e1SMarek Vasut if (readl(&ssp_regs->hw_ssp_status) & SSP_STATUS_CARD_DETECT) { 10571a758e1SMarek Vasut printf("MMC%d: No card detected!\n", mmc->block_dev.dev); 10671a758e1SMarek Vasut return NO_CARD_ERR; 10771a758e1SMarek Vasut } 10871a758e1SMarek Vasut 10971a758e1SMarek Vasut /* Start building CTRL0 contents */ 11071a758e1SMarek Vasut ctrl0 = priv->buswidth; 11171a758e1SMarek Vasut 11271a758e1SMarek Vasut /* Set up command */ 11371a758e1SMarek Vasut if (!(cmd->resp_type & MMC_RSP_CRC)) 11471a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_IGNORE_CRC; 11571a758e1SMarek Vasut if (cmd->resp_type & MMC_RSP_PRESENT) /* Need to get response */ 11671a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_GET_RESP; 11771a758e1SMarek Vasut if (cmd->resp_type & MMC_RSP_136) /* It's a 136 bits response */ 11871a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_LONG_RESP; 11971a758e1SMarek Vasut 12071a758e1SMarek Vasut /* Command index */ 12171a758e1SMarek Vasut reg = readl(&ssp_regs->hw_ssp_cmd0); 12271a758e1SMarek Vasut reg &= ~(SSP_CMD0_CMD_MASK | SSP_CMD0_APPEND_8CYC); 12371a758e1SMarek Vasut reg |= cmd->cmdidx << SSP_CMD0_CMD_OFFSET; 12471a758e1SMarek Vasut if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) 12571a758e1SMarek Vasut reg |= SSP_CMD0_APPEND_8CYC; 12671a758e1SMarek Vasut writel(reg, &ssp_regs->hw_ssp_cmd0); 12771a758e1SMarek Vasut 12871a758e1SMarek Vasut /* Command argument */ 12971a758e1SMarek Vasut writel(cmd->cmdarg, &ssp_regs->hw_ssp_cmd1); 13071a758e1SMarek Vasut 13171a758e1SMarek Vasut /* Set up data */ 13271a758e1SMarek Vasut if (data) { 13371a758e1SMarek Vasut /* READ or WRITE */ 13471a758e1SMarek Vasut if (data->flags & MMC_DATA_READ) { 13571a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_READ; 136c7527b70SMarek Vasut } else if (priv->mmc_is_wp && 137c7527b70SMarek Vasut priv->mmc_is_wp(mmc->block_dev.dev)) { 13871a758e1SMarek Vasut printf("MMC%d: Can not write a locked card!\n", 13971a758e1SMarek Vasut mmc->block_dev.dev); 14071a758e1SMarek Vasut return UNUSABLE_ERR; 14171a758e1SMarek Vasut } 14271a758e1SMarek Vasut 14371a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_DATA_XFER; 14471a758e1SMarek Vasut reg = ((data->blocks - 1) << 14571a758e1SMarek Vasut SSP_BLOCK_SIZE_BLOCK_COUNT_OFFSET) | 14671a758e1SMarek Vasut ((ffs(data->blocksize) - 1) << 14771a758e1SMarek Vasut SSP_BLOCK_SIZE_BLOCK_SIZE_OFFSET); 14871a758e1SMarek Vasut writel(reg, &ssp_regs->hw_ssp_block_size); 14971a758e1SMarek Vasut 15071a758e1SMarek Vasut reg = data->blocksize * data->blocks; 15171a758e1SMarek Vasut writel(reg, &ssp_regs->hw_ssp_xfer_size); 15271a758e1SMarek Vasut } 15371a758e1SMarek Vasut 15471a758e1SMarek Vasut /* Kick off the command */ 15571a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_WAIT_FOR_IRQ | SSP_CTRL0_ENABLE | SSP_CTRL0_RUN; 15671a758e1SMarek Vasut writel(ctrl0, &ssp_regs->hw_ssp_ctrl0); 15771a758e1SMarek Vasut 15871a758e1SMarek Vasut /* Wait for the command to complete */ 15971a758e1SMarek Vasut timeout = MXSMMC_MAX_TIMEOUT; 16071a758e1SMarek Vasut while (--timeout) { 16171a758e1SMarek Vasut udelay(1000); 16271a758e1SMarek Vasut reg = readl(&ssp_regs->hw_ssp_status); 16371a758e1SMarek Vasut if (!(reg & SSP_STATUS_CMD_BUSY)) 16471a758e1SMarek Vasut break; 16571a758e1SMarek Vasut } 16671a758e1SMarek Vasut 16771a758e1SMarek Vasut if (!timeout) { 16871a758e1SMarek Vasut printf("MMC%d: Command %d busy\n", 16971a758e1SMarek Vasut mmc->block_dev.dev, cmd->cmdidx); 17071a758e1SMarek Vasut return TIMEOUT; 17171a758e1SMarek Vasut } 17271a758e1SMarek Vasut 17371a758e1SMarek Vasut /* Check command timeout */ 17471a758e1SMarek Vasut if (reg & SSP_STATUS_RESP_TIMEOUT) { 17571a758e1SMarek Vasut printf("MMC%d: Command %d timeout (status 0x%08x)\n", 17671a758e1SMarek Vasut mmc->block_dev.dev, cmd->cmdidx, reg); 17771a758e1SMarek Vasut return TIMEOUT; 17871a758e1SMarek Vasut } 17971a758e1SMarek Vasut 18071a758e1SMarek Vasut /* Check command errors */ 18171a758e1SMarek Vasut if (reg & (SSP_STATUS_RESP_CRC_ERR | SSP_STATUS_RESP_ERR)) { 18271a758e1SMarek Vasut printf("MMC%d: Command %d error (status 0x%08x)!\n", 18371a758e1SMarek Vasut mmc->block_dev.dev, cmd->cmdidx, reg); 18471a758e1SMarek Vasut return COMM_ERR; 18571a758e1SMarek Vasut } 18671a758e1SMarek Vasut 18771a758e1SMarek Vasut /* Copy response to response buffer */ 18871a758e1SMarek Vasut if (cmd->resp_type & MMC_RSP_136) { 18971a758e1SMarek Vasut cmd->response[3] = readl(&ssp_regs->hw_ssp_sdresp0); 19071a758e1SMarek Vasut cmd->response[2] = readl(&ssp_regs->hw_ssp_sdresp1); 19171a758e1SMarek Vasut cmd->response[1] = readl(&ssp_regs->hw_ssp_sdresp2); 19271a758e1SMarek Vasut cmd->response[0] = readl(&ssp_regs->hw_ssp_sdresp3); 19371a758e1SMarek Vasut } else 19471a758e1SMarek Vasut cmd->response[0] = readl(&ssp_regs->hw_ssp_sdresp0); 19571a758e1SMarek Vasut 19671a758e1SMarek Vasut /* Return if no data to process */ 19771a758e1SMarek Vasut if (!data) 19871a758e1SMarek Vasut return 0; 19971a758e1SMarek Vasut 20071a758e1SMarek Vasut data_count = data->blocksize * data->blocks; 2014cc76c60SMarek Vasut timeout = MXSMMC_MAX_TIMEOUT; 2023687c415SMarek Vasut 2034cc76c60SMarek Vasut #ifdef CONFIG_MXS_MMC_DMA 2043687c415SMarek Vasut if (data_count % ARCH_DMA_MINALIGN) 2053687c415SMarek Vasut cache_data_count = roundup(data_count, ARCH_DMA_MINALIGN); 2063687c415SMarek Vasut else 2073687c415SMarek Vasut cache_data_count = data_count; 2083687c415SMarek Vasut 20971a758e1SMarek Vasut if (data->flags & MMC_DATA_READ) { 2103687c415SMarek Vasut priv->desc->cmd.data = MXS_DMA_DESC_COMMAND_DMA_WRITE; 2113687c415SMarek Vasut priv->desc->cmd.address = (dma_addr_t)data->dest; 21271a758e1SMarek Vasut } else { 2133687c415SMarek Vasut priv->desc->cmd.data = MXS_DMA_DESC_COMMAND_DMA_READ; 2143687c415SMarek Vasut priv->desc->cmd.address = (dma_addr_t)data->src; 2153687c415SMarek Vasut 2163687c415SMarek Vasut /* Flush data to DRAM so DMA can pick them up */ 2173687c415SMarek Vasut flush_dcache_range((uint32_t)priv->desc->cmd.address, 2183687c415SMarek Vasut (uint32_t)(priv->desc->cmd.address + cache_data_count)); 21971a758e1SMarek Vasut } 22071a758e1SMarek Vasut 2213687c415SMarek Vasut priv->desc->cmd.data |= MXS_DMA_DESC_IRQ | MXS_DMA_DESC_DEC_SEM | 2223687c415SMarek Vasut (data_count << MXS_DMA_DESC_BYTES_OFFSET); 2233687c415SMarek Vasut 2243687c415SMarek Vasut 2253687c415SMarek Vasut mxs_dma_desc_append(MXS_DMA_CHANNEL_AHB_APBH_SSP0, priv->desc); 2263687c415SMarek Vasut if (mxs_dma_go(MXS_DMA_CHANNEL_AHB_APBH_SSP0)) { 2273687c415SMarek Vasut printf("MMC%d: DMA transfer failed\n", mmc->block_dev.dev); 22871a758e1SMarek Vasut return COMM_ERR; 22971a758e1SMarek Vasut } 23071a758e1SMarek Vasut 2313687c415SMarek Vasut /* The data arrived into DRAM, invalidate cache over them */ 2323687c415SMarek Vasut if (data->flags & MMC_DATA_READ) { 2333687c415SMarek Vasut invalidate_dcache_range((uint32_t)priv->desc->cmd.address, 2343687c415SMarek Vasut (uint32_t)(priv->desc->cmd.address + cache_data_count)); 2353687c415SMarek Vasut } 2364cc76c60SMarek Vasut #else 2374cc76c60SMarek Vasut if (data->flags & MMC_DATA_READ) { 2384cc76c60SMarek Vasut data_ptr = (uint32_t *)data->dest; 2394cc76c60SMarek Vasut while (data_count && --timeout) { 2404cc76c60SMarek Vasut reg = readl(&ssp_regs->hw_ssp_status); 2414cc76c60SMarek Vasut if (!(reg & SSP_STATUS_FIFO_EMPTY)) { 2424cc76c60SMarek Vasut *data_ptr++ = readl(&ssp_regs->hw_ssp_data); 2434cc76c60SMarek Vasut data_count -= 4; 2444cc76c60SMarek Vasut timeout = MXSMMC_MAX_TIMEOUT; 2454cc76c60SMarek Vasut } else 2464cc76c60SMarek Vasut udelay(1000); 2474cc76c60SMarek Vasut } 2484cc76c60SMarek Vasut } else { 2494cc76c60SMarek Vasut data_ptr = (uint32_t *)data->src; 2504cc76c60SMarek Vasut timeout *= 100; 2514cc76c60SMarek Vasut while (data_count && --timeout) { 2524cc76c60SMarek Vasut reg = readl(&ssp_regs->hw_ssp_status); 2534cc76c60SMarek Vasut if (!(reg & SSP_STATUS_FIFO_FULL)) { 2544cc76c60SMarek Vasut writel(*data_ptr++, &ssp_regs->hw_ssp_data); 2554cc76c60SMarek Vasut data_count -= 4; 2564cc76c60SMarek Vasut timeout = MXSMMC_MAX_TIMEOUT; 2574cc76c60SMarek Vasut } else 2584cc76c60SMarek Vasut udelay(1000); 2594cc76c60SMarek Vasut } 2604cc76c60SMarek Vasut } 2614cc76c60SMarek Vasut 2624cc76c60SMarek Vasut if (!timeout) { 2634cc76c60SMarek Vasut printf("MMC%d: Data timeout with command %d (status 0x%08x)!\n", 2644cc76c60SMarek Vasut mmc->block_dev.dev, cmd->cmdidx, reg); 2654cc76c60SMarek Vasut return COMM_ERR; 2664cc76c60SMarek Vasut } 2674cc76c60SMarek Vasut #endif 2683687c415SMarek Vasut 26971a758e1SMarek Vasut /* Check data errors */ 27071a758e1SMarek Vasut reg = readl(&ssp_regs->hw_ssp_status); 27171a758e1SMarek Vasut if (reg & 27271a758e1SMarek Vasut (SSP_STATUS_TIMEOUT | SSP_STATUS_DATA_CRC_ERR | 27371a758e1SMarek Vasut SSP_STATUS_FIFO_OVRFLW | SSP_STATUS_FIFO_UNDRFLW)) { 27471a758e1SMarek Vasut printf("MMC%d: Data error with command %d (status 0x%08x)!\n", 27571a758e1SMarek Vasut mmc->block_dev.dev, cmd->cmdidx, reg); 27671a758e1SMarek Vasut return COMM_ERR; 27771a758e1SMarek Vasut } 27871a758e1SMarek Vasut 27971a758e1SMarek Vasut return 0; 28071a758e1SMarek Vasut } 28171a758e1SMarek Vasut 28271a758e1SMarek Vasut static void mxsmmc_set_ios(struct mmc *mmc) 28371a758e1SMarek Vasut { 28471a758e1SMarek Vasut struct mxsmmc_priv *priv = (struct mxsmmc_priv *)mmc->priv; 285*9c471142SOtavio Salvador struct mxs_ssp_regs *ssp_regs = priv->regs; 28671a758e1SMarek Vasut 28771a758e1SMarek Vasut /* Set the clock speed */ 28871a758e1SMarek Vasut if (mmc->clock) 28971a758e1SMarek Vasut mx28_set_ssp_busclock(priv->id, mmc->clock / 1000); 29071a758e1SMarek Vasut 29171a758e1SMarek Vasut switch (mmc->bus_width) { 29271a758e1SMarek Vasut case 1: 29371a758e1SMarek Vasut priv->buswidth = SSP_CTRL0_BUS_WIDTH_ONE_BIT; 29471a758e1SMarek Vasut break; 29571a758e1SMarek Vasut case 4: 29671a758e1SMarek Vasut priv->buswidth = SSP_CTRL0_BUS_WIDTH_FOUR_BIT; 29771a758e1SMarek Vasut break; 29871a758e1SMarek Vasut case 8: 29971a758e1SMarek Vasut priv->buswidth = SSP_CTRL0_BUS_WIDTH_EIGHT_BIT; 30071a758e1SMarek Vasut break; 30171a758e1SMarek Vasut } 30271a758e1SMarek Vasut 30371a758e1SMarek Vasut /* Set the bus width */ 30471a758e1SMarek Vasut clrsetbits_le32(&ssp_regs->hw_ssp_ctrl0, 30571a758e1SMarek Vasut SSP_CTRL0_BUS_WIDTH_MASK, priv->buswidth); 30671a758e1SMarek Vasut 30771a758e1SMarek Vasut debug("MMC%d: Set %d bits bus width\n", 30871a758e1SMarek Vasut mmc->block_dev.dev, mmc->bus_width); 30971a758e1SMarek Vasut } 31071a758e1SMarek Vasut 31171a758e1SMarek Vasut static int mxsmmc_init(struct mmc *mmc) 31271a758e1SMarek Vasut { 31371a758e1SMarek Vasut struct mxsmmc_priv *priv = (struct mxsmmc_priv *)mmc->priv; 314*9c471142SOtavio Salvador struct mxs_ssp_regs *ssp_regs = priv->regs; 31571a758e1SMarek Vasut 31671a758e1SMarek Vasut /* Reset SSP */ 31771a758e1SMarek Vasut mx28_reset_block(&ssp_regs->hw_ssp_ctrl0_reg); 31871a758e1SMarek Vasut 31971a758e1SMarek Vasut /* 8 bits word length in MMC mode */ 32071a758e1SMarek Vasut clrsetbits_le32(&ssp_regs->hw_ssp_ctrl1, 32171a758e1SMarek Vasut SSP_CTRL1_SSP_MODE_MASK | SSP_CTRL1_WORD_LENGTH_MASK, 3223687c415SMarek Vasut SSP_CTRL1_SSP_MODE_SD_MMC | SSP_CTRL1_WORD_LENGTH_EIGHT_BITS | 3233687c415SMarek Vasut SSP_CTRL1_DMA_ENABLE); 32471a758e1SMarek Vasut 32571a758e1SMarek Vasut /* Set initial bit clock 400 KHz */ 32671a758e1SMarek Vasut mx28_set_ssp_busclock(priv->id, 400); 32771a758e1SMarek Vasut 32871a758e1SMarek Vasut /* Send initial 74 clock cycles (185 us @ 400 KHz)*/ 32971a758e1SMarek Vasut writel(SSP_CMD0_CONT_CLKING_EN, &ssp_regs->hw_ssp_cmd0_set); 33071a758e1SMarek Vasut udelay(200); 33171a758e1SMarek Vasut writel(SSP_CMD0_CONT_CLKING_EN, &ssp_regs->hw_ssp_cmd0_clr); 33271a758e1SMarek Vasut 33371a758e1SMarek Vasut return 0; 33471a758e1SMarek Vasut } 33571a758e1SMarek Vasut 33671a758e1SMarek Vasut int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int)) 33771a758e1SMarek Vasut { 338*9c471142SOtavio Salvador struct mxs_clkctrl_regs *clkctrl_regs = 339*9c471142SOtavio Salvador (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; 34071a758e1SMarek Vasut struct mmc *mmc = NULL; 34171a758e1SMarek Vasut struct mxsmmc_priv *priv = NULL; 34296666a39SMarek Vasut int ret; 34371a758e1SMarek Vasut 34471a758e1SMarek Vasut mmc = malloc(sizeof(struct mmc)); 34571a758e1SMarek Vasut if (!mmc) 34671a758e1SMarek Vasut return -ENOMEM; 34771a758e1SMarek Vasut 34871a758e1SMarek Vasut priv = malloc(sizeof(struct mxsmmc_priv)); 34971a758e1SMarek Vasut if (!priv) { 35071a758e1SMarek Vasut free(mmc); 35171a758e1SMarek Vasut return -ENOMEM; 35271a758e1SMarek Vasut } 35371a758e1SMarek Vasut 3543687c415SMarek Vasut priv->desc = mxs_dma_desc_alloc(); 3553687c415SMarek Vasut if (!priv->desc) { 3563687c415SMarek Vasut free(priv); 3573687c415SMarek Vasut free(mmc); 3583687c415SMarek Vasut return -ENOMEM; 3593687c415SMarek Vasut } 3603687c415SMarek Vasut 36196666a39SMarek Vasut ret = mxs_dma_init_channel(id); 36296666a39SMarek Vasut if (ret) 36396666a39SMarek Vasut return ret; 36496666a39SMarek Vasut 36571a758e1SMarek Vasut priv->mmc_is_wp = wp; 36671a758e1SMarek Vasut priv->id = id; 36771a758e1SMarek Vasut switch (id) { 36871a758e1SMarek Vasut case 0: 369*9c471142SOtavio Salvador priv->regs = (struct mxs_ssp_regs *)MXS_SSP0_BASE; 37071a758e1SMarek Vasut priv->clkseq_bypass = CLKCTRL_CLKSEQ_BYPASS_SSP0; 37171a758e1SMarek Vasut priv->clkctrl_ssp = &clkctrl_regs->hw_clkctrl_ssp0; 37271a758e1SMarek Vasut break; 37371a758e1SMarek Vasut case 1: 374*9c471142SOtavio Salvador priv->regs = (struct mxs_ssp_regs *)MXS_SSP1_BASE; 37571a758e1SMarek Vasut priv->clkseq_bypass = CLKCTRL_CLKSEQ_BYPASS_SSP1; 37671a758e1SMarek Vasut priv->clkctrl_ssp = &clkctrl_regs->hw_clkctrl_ssp1; 37771a758e1SMarek Vasut break; 37871a758e1SMarek Vasut case 2: 379*9c471142SOtavio Salvador priv->regs = (struct mxs_ssp_regs *)MXS_SSP2_BASE; 38071a758e1SMarek Vasut priv->clkseq_bypass = CLKCTRL_CLKSEQ_BYPASS_SSP2; 38171a758e1SMarek Vasut priv->clkctrl_ssp = &clkctrl_regs->hw_clkctrl_ssp2; 38271a758e1SMarek Vasut break; 38371a758e1SMarek Vasut case 3: 384*9c471142SOtavio Salvador priv->regs = (struct mxs_ssp_regs *)MXS_SSP3_BASE; 38571a758e1SMarek Vasut priv->clkseq_bypass = CLKCTRL_CLKSEQ_BYPASS_SSP3; 38671a758e1SMarek Vasut priv->clkctrl_ssp = &clkctrl_regs->hw_clkctrl_ssp3; 38771a758e1SMarek Vasut break; 38871a758e1SMarek Vasut } 38971a758e1SMarek Vasut 39071a758e1SMarek Vasut sprintf(mmc->name, "MXS MMC"); 39171a758e1SMarek Vasut mmc->send_cmd = mxsmmc_send_cmd; 39271a758e1SMarek Vasut mmc->set_ios = mxsmmc_set_ios; 39371a758e1SMarek Vasut mmc->init = mxsmmc_init; 39448972d90SThierry Reding mmc->getcd = NULL; 39571a758e1SMarek Vasut mmc->priv = priv; 39671a758e1SMarek Vasut 39771a758e1SMarek Vasut mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; 39871a758e1SMarek Vasut 39971a758e1SMarek Vasut mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | 40071a758e1SMarek Vasut MMC_MODE_HS_52MHz | MMC_MODE_HS; 40171a758e1SMarek Vasut 40271a758e1SMarek Vasut /* 40371a758e1SMarek Vasut * SSPCLK = 480 * 18 / 29 / 1 = 297.731 MHz 40471a758e1SMarek Vasut * SSP bit rate = SSPCLK / (CLOCK_DIVIDE * (1 + CLOCK_RATE)), 40571a758e1SMarek Vasut * CLOCK_DIVIDE has to be an even value from 2 to 254, and 40671a758e1SMarek Vasut * CLOCK_RATE could be any integer from 0 to 255. 40771a758e1SMarek Vasut */ 40871a758e1SMarek Vasut mmc->f_min = 400000; 40971a758e1SMarek Vasut mmc->f_max = mxc_get_clock(MXC_SSP0_CLK + id) * 1000 / 2; 410e7205905SMarek Vasut mmc->b_max = 0x20; 41171a758e1SMarek Vasut 41271a758e1SMarek Vasut mmc_register(mmc); 41371a758e1SMarek Vasut return 0; 41471a758e1SMarek Vasut } 415