171a758e1SMarek Vasut /* 271a758e1SMarek Vasut * Freescale i.MX28 SSP MMC driver 371a758e1SMarek Vasut * 471a758e1SMarek Vasut * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> 571a758e1SMarek Vasut * on behalf of DENX Software Engineering GmbH 671a758e1SMarek Vasut * 771a758e1SMarek Vasut * Based on code from LTIB: 871a758e1SMarek Vasut * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 971a758e1SMarek Vasut * Terry Lv 1071a758e1SMarek Vasut * 1171a758e1SMarek Vasut * Copyright 2007, Freescale Semiconductor, Inc 1271a758e1SMarek Vasut * Andy Fleming 1371a758e1SMarek Vasut * 1471a758e1SMarek Vasut * Based vaguely on the pxa mmc code: 1571a758e1SMarek Vasut * (C) Copyright 2003 1671a758e1SMarek Vasut * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net 1771a758e1SMarek Vasut * 181a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 1971a758e1SMarek Vasut */ 2071a758e1SMarek Vasut #include <common.h> 2171a758e1SMarek Vasut #include <malloc.h> 2271a758e1SMarek Vasut #include <mmc.h> 2371a758e1SMarek Vasut #include <asm/errno.h> 2471a758e1SMarek Vasut #include <asm/io.h> 2571a758e1SMarek Vasut #include <asm/arch/clock.h> 2671a758e1SMarek Vasut #include <asm/arch/imx-regs.h> 2771a758e1SMarek Vasut #include <asm/arch/sys_proto.h> 280499218dSStefan Roese #include <asm/imx-common/dma.h> 294e6d81d1SMarek Vasut #include <bouncebuf.h> 3071a758e1SMarek Vasut 3171a758e1SMarek Vasut struct mxsmmc_priv { 3271a758e1SMarek Vasut int id; 339c471142SOtavio Salvador struct mxs_ssp_regs *regs; 3471a758e1SMarek Vasut uint32_t buswidth; 3571a758e1SMarek Vasut int (*mmc_is_wp)(int); 3690bc2bf2SMarek Vasut int (*mmc_cd)(int); 373687c415SMarek Vasut struct mxs_dma_desc *desc; 3893bfd616SPantelis Antoniou struct mmc_config cfg; /* mmc configuration */ 3971a758e1SMarek Vasut }; 4071a758e1SMarek Vasut 4171a758e1SMarek Vasut #define MXSMMC_MAX_TIMEOUT 10000 4220255900SMarek Vasut #define MXSMMC_SMALL_TRANSFER 512 4371a758e1SMarek Vasut 4490bc2bf2SMarek Vasut static int mxsmmc_cd(struct mxsmmc_priv *priv) 4590bc2bf2SMarek Vasut { 4690bc2bf2SMarek Vasut struct mxs_ssp_regs *ssp_regs = priv->regs; 4790bc2bf2SMarek Vasut 4890bc2bf2SMarek Vasut if (priv->mmc_cd) 4990bc2bf2SMarek Vasut return priv->mmc_cd(priv->id); 5090bc2bf2SMarek Vasut 5190bc2bf2SMarek Vasut return !(readl(&ssp_regs->hw_ssp_status) & SSP_STATUS_CARD_DETECT); 5290bc2bf2SMarek Vasut } 5390bc2bf2SMarek Vasut 5486983328SMarek Vasut static int mxsmmc_send_cmd_pio(struct mxsmmc_priv *priv, struct mmc_data *data) 5586983328SMarek Vasut { 5686983328SMarek Vasut struct mxs_ssp_regs *ssp_regs = priv->regs; 5786983328SMarek Vasut uint32_t *data_ptr; 5886983328SMarek Vasut int timeout = MXSMMC_MAX_TIMEOUT; 5986983328SMarek Vasut uint32_t reg; 6086983328SMarek Vasut uint32_t data_count = data->blocksize * data->blocks; 6186983328SMarek Vasut 6286983328SMarek Vasut if (data->flags & MMC_DATA_READ) { 6386983328SMarek Vasut data_ptr = (uint32_t *)data->dest; 6486983328SMarek Vasut while (data_count && --timeout) { 6586983328SMarek Vasut reg = readl(&ssp_regs->hw_ssp_status); 6686983328SMarek Vasut if (!(reg & SSP_STATUS_FIFO_EMPTY)) { 6786983328SMarek Vasut *data_ptr++ = readl(&ssp_regs->hw_ssp_data); 6886983328SMarek Vasut data_count -= 4; 6986983328SMarek Vasut timeout = MXSMMC_MAX_TIMEOUT; 7086983328SMarek Vasut } else 7186983328SMarek Vasut udelay(1000); 7286983328SMarek Vasut } 7386983328SMarek Vasut } else { 7486983328SMarek Vasut data_ptr = (uint32_t *)data->src; 7586983328SMarek Vasut timeout *= 100; 7686983328SMarek Vasut while (data_count && --timeout) { 7786983328SMarek Vasut reg = readl(&ssp_regs->hw_ssp_status); 7886983328SMarek Vasut if (!(reg & SSP_STATUS_FIFO_FULL)) { 7986983328SMarek Vasut writel(*data_ptr++, &ssp_regs->hw_ssp_data); 8086983328SMarek Vasut data_count -= 4; 8186983328SMarek Vasut timeout = MXSMMC_MAX_TIMEOUT; 8286983328SMarek Vasut } else 8386983328SMarek Vasut udelay(1000); 8486983328SMarek Vasut } 8586983328SMarek Vasut } 8686983328SMarek Vasut 87*915ffa52SJaehoon Chung return timeout ? 0 : -ECOMM; 8886983328SMarek Vasut } 8920255900SMarek Vasut 9086983328SMarek Vasut static int mxsmmc_send_cmd_dma(struct mxsmmc_priv *priv, struct mmc_data *data) 9186983328SMarek Vasut { 9286983328SMarek Vasut uint32_t data_count = data->blocksize * data->blocks; 9386983328SMarek Vasut int dmach; 94abb85be7SMarek Vasut struct mxs_dma_desc *desc = priv->desc; 9584d35b28SStephen Warren void *addr; 9684d35b28SStephen Warren unsigned int flags; 9784d35b28SStephen Warren struct bounce_buffer bbstate; 98abb85be7SMarek Vasut 99abb85be7SMarek Vasut memset(desc, 0, sizeof(struct mxs_dma_desc)); 100abb85be7SMarek Vasut desc->address = (dma_addr_t)desc; 10186983328SMarek Vasut 10286983328SMarek Vasut if (data->flags & MMC_DATA_READ) { 10386983328SMarek Vasut priv->desc->cmd.data = MXS_DMA_DESC_COMMAND_DMA_WRITE; 1044e6d81d1SMarek Vasut addr = data->dest; 1054e6d81d1SMarek Vasut flags = GEN_BB_WRITE; 10686983328SMarek Vasut } else { 10786983328SMarek Vasut priv->desc->cmd.data = MXS_DMA_DESC_COMMAND_DMA_READ; 1084e6d81d1SMarek Vasut addr = (void *)data->src; 1094e6d81d1SMarek Vasut flags = GEN_BB_READ; 1104e6d81d1SMarek Vasut } 11186983328SMarek Vasut 11284d35b28SStephen Warren bounce_buffer_start(&bbstate, addr, data_count, flags); 1134e6d81d1SMarek Vasut 11484d35b28SStephen Warren priv->desc->cmd.address = (dma_addr_t)bbstate.bounce_buffer; 11597ed12ceSMarek Vasut 11686983328SMarek Vasut priv->desc->cmd.data |= MXS_DMA_DESC_IRQ | MXS_DMA_DESC_DEC_SEM | 11786983328SMarek Vasut (data_count << MXS_DMA_DESC_BYTES_OFFSET); 11886983328SMarek Vasut 1193430e0bdSMarek Vasut dmach = MXS_DMA_CHANNEL_AHB_APBH_SSP0 + priv->id; 12086983328SMarek Vasut mxs_dma_desc_append(dmach, priv->desc); 1214e6d81d1SMarek Vasut if (mxs_dma_go(dmach)) { 12284d35b28SStephen Warren bounce_buffer_stop(&bbstate); 123*915ffa52SJaehoon Chung return -ECOMM; 1244e6d81d1SMarek Vasut } 12586983328SMarek Vasut 12684d35b28SStephen Warren bounce_buffer_stop(&bbstate); 1274e6d81d1SMarek Vasut 12886983328SMarek Vasut return 0; 12986983328SMarek Vasut } 13086983328SMarek Vasut 13171a758e1SMarek Vasut /* 13271a758e1SMarek Vasut * Sends a command out on the bus. Takes the mmc pointer, 13371a758e1SMarek Vasut * a command pointer, and an optional data pointer. 13471a758e1SMarek Vasut */ 13571a758e1SMarek Vasut static int 13671a758e1SMarek Vasut mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) 13771a758e1SMarek Vasut { 13893bfd616SPantelis Antoniou struct mxsmmc_priv *priv = mmc->priv; 1399c471142SOtavio Salvador struct mxs_ssp_regs *ssp_regs = priv->regs; 14071a758e1SMarek Vasut uint32_t reg; 14171a758e1SMarek Vasut int timeout; 14271a758e1SMarek Vasut uint32_t ctrl0; 14386983328SMarek Vasut int ret; 14471a758e1SMarek Vasut 145bcce53d0SSimon Glass debug("MMC%d: CMD%d\n", mmc->block_dev.devnum, cmd->cmdidx); 14671a758e1SMarek Vasut 14771a758e1SMarek Vasut /* Check bus busy */ 14871a758e1SMarek Vasut timeout = MXSMMC_MAX_TIMEOUT; 14971a758e1SMarek Vasut while (--timeout) { 15071a758e1SMarek Vasut udelay(1000); 15171a758e1SMarek Vasut reg = readl(&ssp_regs->hw_ssp_status); 15271a758e1SMarek Vasut if (!(reg & 15371a758e1SMarek Vasut (SSP_STATUS_BUSY | SSP_STATUS_DATA_BUSY | 15471a758e1SMarek Vasut SSP_STATUS_CMD_BUSY))) { 15571a758e1SMarek Vasut break; 15671a758e1SMarek Vasut } 15771a758e1SMarek Vasut } 15871a758e1SMarek Vasut 15971a758e1SMarek Vasut if (!timeout) { 160bcce53d0SSimon Glass printf("MMC%d: Bus busy timeout!\n", mmc->block_dev.devnum); 161*915ffa52SJaehoon Chung return -ETIMEDOUT; 16271a758e1SMarek Vasut } 16371a758e1SMarek Vasut 16471a758e1SMarek Vasut /* See if card is present */ 16590bc2bf2SMarek Vasut if (!mxsmmc_cd(priv)) { 166bcce53d0SSimon Glass printf("MMC%d: No card detected!\n", mmc->block_dev.devnum); 167*915ffa52SJaehoon Chung return -ENOMEDIUM; 16871a758e1SMarek Vasut } 16971a758e1SMarek Vasut 17071a758e1SMarek Vasut /* Start building CTRL0 contents */ 17171a758e1SMarek Vasut ctrl0 = priv->buswidth; 17271a758e1SMarek Vasut 17371a758e1SMarek Vasut /* Set up command */ 17471a758e1SMarek Vasut if (!(cmd->resp_type & MMC_RSP_CRC)) 17571a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_IGNORE_CRC; 17671a758e1SMarek Vasut if (cmd->resp_type & MMC_RSP_PRESENT) /* Need to get response */ 17771a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_GET_RESP; 17871a758e1SMarek Vasut if (cmd->resp_type & MMC_RSP_136) /* It's a 136 bits response */ 17971a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_LONG_RESP; 18071a758e1SMarek Vasut 181abb85be7SMarek Vasut if (data && (data->blocksize * data->blocks < MXSMMC_SMALL_TRANSFER)) 182abb85be7SMarek Vasut writel(SSP_CTRL1_DMA_ENABLE, &ssp_regs->hw_ssp_ctrl1_clr); 183abb85be7SMarek Vasut else 184abb85be7SMarek Vasut writel(SSP_CTRL1_DMA_ENABLE, &ssp_regs->hw_ssp_ctrl1_set); 185abb85be7SMarek Vasut 18671a758e1SMarek Vasut /* Command index */ 18771a758e1SMarek Vasut reg = readl(&ssp_regs->hw_ssp_cmd0); 18871a758e1SMarek Vasut reg &= ~(SSP_CMD0_CMD_MASK | SSP_CMD0_APPEND_8CYC); 18971a758e1SMarek Vasut reg |= cmd->cmdidx << SSP_CMD0_CMD_OFFSET; 19071a758e1SMarek Vasut if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) 19171a758e1SMarek Vasut reg |= SSP_CMD0_APPEND_8CYC; 19271a758e1SMarek Vasut writel(reg, &ssp_regs->hw_ssp_cmd0); 19371a758e1SMarek Vasut 19471a758e1SMarek Vasut /* Command argument */ 19571a758e1SMarek Vasut writel(cmd->cmdarg, &ssp_regs->hw_ssp_cmd1); 19671a758e1SMarek Vasut 19771a758e1SMarek Vasut /* Set up data */ 19871a758e1SMarek Vasut if (data) { 19971a758e1SMarek Vasut /* READ or WRITE */ 20071a758e1SMarek Vasut if (data->flags & MMC_DATA_READ) { 20171a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_READ; 202c7527b70SMarek Vasut } else if (priv->mmc_is_wp && 203bcce53d0SSimon Glass priv->mmc_is_wp(mmc->block_dev.devnum)) { 20471a758e1SMarek Vasut printf("MMC%d: Can not write a locked card!\n", 205bcce53d0SSimon Glass mmc->block_dev.devnum); 206*915ffa52SJaehoon Chung return -EOPNOTSUPP; 20771a758e1SMarek Vasut } 20871a758e1SMarek Vasut 20971a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_DATA_XFER; 210e5b380acSMarek Vasut 211e5b380acSMarek Vasut reg = data->blocksize * data->blocks; 212e5b380acSMarek Vasut #if defined(CONFIG_MX23) 213e5b380acSMarek Vasut ctrl0 |= reg & SSP_CTRL0_XFER_COUNT_MASK; 214e5b380acSMarek Vasut 215e5b380acSMarek Vasut clrsetbits_le32(&ssp_regs->hw_ssp_cmd0, 216e5b380acSMarek Vasut SSP_CMD0_BLOCK_SIZE_MASK | SSP_CMD0_BLOCK_COUNT_MASK, 217e5b380acSMarek Vasut ((data->blocks - 1) << SSP_CMD0_BLOCK_COUNT_OFFSET) | 218e5b380acSMarek Vasut ((ffs(data->blocksize) - 1) << 219e5b380acSMarek Vasut SSP_CMD0_BLOCK_SIZE_OFFSET)); 220e5b380acSMarek Vasut #elif defined(CONFIG_MX28) 221e5b380acSMarek Vasut writel(reg, &ssp_regs->hw_ssp_xfer_size); 222e5b380acSMarek Vasut 22371a758e1SMarek Vasut reg = ((data->blocks - 1) << 22471a758e1SMarek Vasut SSP_BLOCK_SIZE_BLOCK_COUNT_OFFSET) | 22571a758e1SMarek Vasut ((ffs(data->blocksize) - 1) << 22671a758e1SMarek Vasut SSP_BLOCK_SIZE_BLOCK_SIZE_OFFSET); 22771a758e1SMarek Vasut writel(reg, &ssp_regs->hw_ssp_block_size); 228e5b380acSMarek Vasut #endif 22971a758e1SMarek Vasut } 23071a758e1SMarek Vasut 23171a758e1SMarek Vasut /* Kick off the command */ 23271a758e1SMarek Vasut ctrl0 |= SSP_CTRL0_WAIT_FOR_IRQ | SSP_CTRL0_ENABLE | SSP_CTRL0_RUN; 23371a758e1SMarek Vasut writel(ctrl0, &ssp_regs->hw_ssp_ctrl0); 23471a758e1SMarek Vasut 23571a758e1SMarek Vasut /* Wait for the command to complete */ 23671a758e1SMarek Vasut timeout = MXSMMC_MAX_TIMEOUT; 23771a758e1SMarek Vasut while (--timeout) { 23871a758e1SMarek Vasut udelay(1000); 23971a758e1SMarek Vasut reg = readl(&ssp_regs->hw_ssp_status); 24071a758e1SMarek Vasut if (!(reg & SSP_STATUS_CMD_BUSY)) 24171a758e1SMarek Vasut break; 24271a758e1SMarek Vasut } 24371a758e1SMarek Vasut 24471a758e1SMarek Vasut if (!timeout) { 24571a758e1SMarek Vasut printf("MMC%d: Command %d busy\n", 246bcce53d0SSimon Glass mmc->block_dev.devnum, cmd->cmdidx); 247*915ffa52SJaehoon Chung return -ETIMEDOUT; 24871a758e1SMarek Vasut } 24971a758e1SMarek Vasut 25071a758e1SMarek Vasut /* Check command timeout */ 25171a758e1SMarek Vasut if (reg & SSP_STATUS_RESP_TIMEOUT) { 25271a758e1SMarek Vasut printf("MMC%d: Command %d timeout (status 0x%08x)\n", 253bcce53d0SSimon Glass mmc->block_dev.devnum, cmd->cmdidx, reg); 254*915ffa52SJaehoon Chung return -ETIMEDOUT; 25571a758e1SMarek Vasut } 25671a758e1SMarek Vasut 25771a758e1SMarek Vasut /* Check command errors */ 25871a758e1SMarek Vasut if (reg & (SSP_STATUS_RESP_CRC_ERR | SSP_STATUS_RESP_ERR)) { 25971a758e1SMarek Vasut printf("MMC%d: Command %d error (status 0x%08x)!\n", 260bcce53d0SSimon Glass mmc->block_dev.devnum, cmd->cmdidx, reg); 261*915ffa52SJaehoon Chung return -ECOMM; 26271a758e1SMarek Vasut } 26371a758e1SMarek Vasut 26471a758e1SMarek Vasut /* Copy response to response buffer */ 26571a758e1SMarek Vasut if (cmd->resp_type & MMC_RSP_136) { 26671a758e1SMarek Vasut cmd->response[3] = readl(&ssp_regs->hw_ssp_sdresp0); 26771a758e1SMarek Vasut cmd->response[2] = readl(&ssp_regs->hw_ssp_sdresp1); 26871a758e1SMarek Vasut cmd->response[1] = readl(&ssp_regs->hw_ssp_sdresp2); 26971a758e1SMarek Vasut cmd->response[0] = readl(&ssp_regs->hw_ssp_sdresp3); 27071a758e1SMarek Vasut } else 27171a758e1SMarek Vasut cmd->response[0] = readl(&ssp_regs->hw_ssp_sdresp0); 27271a758e1SMarek Vasut 27371a758e1SMarek Vasut /* Return if no data to process */ 27471a758e1SMarek Vasut if (!data) 27571a758e1SMarek Vasut return 0; 27671a758e1SMarek Vasut 27720255900SMarek Vasut if (data->blocksize * data->blocks < MXSMMC_SMALL_TRANSFER) { 27886983328SMarek Vasut ret = mxsmmc_send_cmd_pio(priv, data); 27986983328SMarek Vasut if (ret) { 28020255900SMarek Vasut printf("MMC%d: Data timeout with command %d " 28120255900SMarek Vasut "(status 0x%08x)!\n", 282bcce53d0SSimon Glass mmc->block_dev.devnum, cmd->cmdidx, reg); 28386983328SMarek Vasut return ret; 2844cc76c60SMarek Vasut } 285abb85be7SMarek Vasut } else { 286abb85be7SMarek Vasut ret = mxsmmc_send_cmd_dma(priv, data); 287abb85be7SMarek Vasut if (ret) { 288abb85be7SMarek Vasut printf("MMC%d: DMA transfer failed\n", 289bcce53d0SSimon Glass mmc->block_dev.devnum); 290abb85be7SMarek Vasut return ret; 291abb85be7SMarek Vasut } 29220255900SMarek Vasut } 2933687c415SMarek Vasut 29471a758e1SMarek Vasut /* Check data errors */ 29571a758e1SMarek Vasut reg = readl(&ssp_regs->hw_ssp_status); 29671a758e1SMarek Vasut if (reg & 29771a758e1SMarek Vasut (SSP_STATUS_TIMEOUT | SSP_STATUS_DATA_CRC_ERR | 29871a758e1SMarek Vasut SSP_STATUS_FIFO_OVRFLW | SSP_STATUS_FIFO_UNDRFLW)) { 29971a758e1SMarek Vasut printf("MMC%d: Data error with command %d (status 0x%08x)!\n", 300bcce53d0SSimon Glass mmc->block_dev.devnum, cmd->cmdidx, reg); 301*915ffa52SJaehoon Chung return -ECOMM; 30271a758e1SMarek Vasut } 30371a758e1SMarek Vasut 30471a758e1SMarek Vasut return 0; 30571a758e1SMarek Vasut } 30671a758e1SMarek Vasut 30771a758e1SMarek Vasut static void mxsmmc_set_ios(struct mmc *mmc) 30871a758e1SMarek Vasut { 30993bfd616SPantelis Antoniou struct mxsmmc_priv *priv = mmc->priv; 3109c471142SOtavio Salvador struct mxs_ssp_regs *ssp_regs = priv->regs; 31171a758e1SMarek Vasut 31271a758e1SMarek Vasut /* Set the clock speed */ 31371a758e1SMarek Vasut if (mmc->clock) 314bf48fcb6SOtavio Salvador mxs_set_ssp_busclock(priv->id, mmc->clock / 1000); 31571a758e1SMarek Vasut 31671a758e1SMarek Vasut switch (mmc->bus_width) { 31771a758e1SMarek Vasut case 1: 31871a758e1SMarek Vasut priv->buswidth = SSP_CTRL0_BUS_WIDTH_ONE_BIT; 31971a758e1SMarek Vasut break; 32071a758e1SMarek Vasut case 4: 32171a758e1SMarek Vasut priv->buswidth = SSP_CTRL0_BUS_WIDTH_FOUR_BIT; 32271a758e1SMarek Vasut break; 32371a758e1SMarek Vasut case 8: 32471a758e1SMarek Vasut priv->buswidth = SSP_CTRL0_BUS_WIDTH_EIGHT_BIT; 32571a758e1SMarek Vasut break; 32671a758e1SMarek Vasut } 32771a758e1SMarek Vasut 32871a758e1SMarek Vasut /* Set the bus width */ 32971a758e1SMarek Vasut clrsetbits_le32(&ssp_regs->hw_ssp_ctrl0, 33071a758e1SMarek Vasut SSP_CTRL0_BUS_WIDTH_MASK, priv->buswidth); 33171a758e1SMarek Vasut 33271a758e1SMarek Vasut debug("MMC%d: Set %d bits bus width\n", 333bcce53d0SSimon Glass mmc->block_dev.devnum, mmc->bus_width); 33471a758e1SMarek Vasut } 33571a758e1SMarek Vasut 33671a758e1SMarek Vasut static int mxsmmc_init(struct mmc *mmc) 33771a758e1SMarek Vasut { 33893bfd616SPantelis Antoniou struct mxsmmc_priv *priv = mmc->priv; 3399c471142SOtavio Salvador struct mxs_ssp_regs *ssp_regs = priv->regs; 34071a758e1SMarek Vasut 34171a758e1SMarek Vasut /* Reset SSP */ 342fa7a51cbSOtavio Salvador mxs_reset_block(&ssp_regs->hw_ssp_ctrl0_reg); 34371a758e1SMarek Vasut 3448000d8a8SOtavio Salvador /* Reconfigure the SSP block for MMC operation */ 3458000d8a8SOtavio Salvador writel(SSP_CTRL1_SSP_MODE_SD_MMC | 3468000d8a8SOtavio Salvador SSP_CTRL1_WORD_LENGTH_EIGHT_BITS | 3478000d8a8SOtavio Salvador SSP_CTRL1_DMA_ENABLE | 3488000d8a8SOtavio Salvador SSP_CTRL1_POLARITY | 3498000d8a8SOtavio Salvador SSP_CTRL1_RECV_TIMEOUT_IRQ_EN | 3508000d8a8SOtavio Salvador SSP_CTRL1_DATA_CRC_IRQ_EN | 3518000d8a8SOtavio Salvador SSP_CTRL1_DATA_TIMEOUT_IRQ_EN | 3528000d8a8SOtavio Salvador SSP_CTRL1_RESP_TIMEOUT_IRQ_EN | 3538000d8a8SOtavio Salvador SSP_CTRL1_RESP_ERR_IRQ_EN, 3548000d8a8SOtavio Salvador &ssp_regs->hw_ssp_ctrl1_set); 35571a758e1SMarek Vasut 35671a758e1SMarek Vasut /* Set initial bit clock 400 KHz */ 357bf48fcb6SOtavio Salvador mxs_set_ssp_busclock(priv->id, 400); 35871a758e1SMarek Vasut 35971a758e1SMarek Vasut /* Send initial 74 clock cycles (185 us @ 400 KHz)*/ 36071a758e1SMarek Vasut writel(SSP_CMD0_CONT_CLKING_EN, &ssp_regs->hw_ssp_cmd0_set); 36171a758e1SMarek Vasut udelay(200); 36271a758e1SMarek Vasut writel(SSP_CMD0_CONT_CLKING_EN, &ssp_regs->hw_ssp_cmd0_clr); 36371a758e1SMarek Vasut 36471a758e1SMarek Vasut return 0; 36571a758e1SMarek Vasut } 36671a758e1SMarek Vasut 367ab769f22SPantelis Antoniou static const struct mmc_ops mxsmmc_ops = { 368ab769f22SPantelis Antoniou .send_cmd = mxsmmc_send_cmd, 369ab769f22SPantelis Antoniou .set_ios = mxsmmc_set_ios, 370ab769f22SPantelis Antoniou .init = mxsmmc_init, 371ab769f22SPantelis Antoniou }; 372ab769f22SPantelis Antoniou 37390bc2bf2SMarek Vasut int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int)) 37471a758e1SMarek Vasut { 37571a758e1SMarek Vasut struct mmc *mmc = NULL; 37671a758e1SMarek Vasut struct mxsmmc_priv *priv = NULL; 37796666a39SMarek Vasut int ret; 3783430e0bdSMarek Vasut const unsigned int mxsmmc_clk_id = mxs_ssp_clock_by_bus(id); 3791a3c5ffeSMarek Vasut 3803430e0bdSMarek Vasut if (!mxs_ssp_bus_id_valid(id)) 3811a3c5ffeSMarek Vasut return -ENODEV; 38271a758e1SMarek Vasut 38371a758e1SMarek Vasut priv = malloc(sizeof(struct mxsmmc_priv)); 38493bfd616SPantelis Antoniou if (!priv) 38571a758e1SMarek Vasut return -ENOMEM; 38671a758e1SMarek Vasut 3873687c415SMarek Vasut priv->desc = mxs_dma_desc_alloc(); 3883687c415SMarek Vasut if (!priv->desc) { 3893687c415SMarek Vasut free(priv); 3903687c415SMarek Vasut return -ENOMEM; 3913687c415SMarek Vasut } 3923687c415SMarek Vasut 3933430e0bdSMarek Vasut ret = mxs_dma_init_channel(MXS_DMA_CHANNEL_AHB_APBH_SSP0 + id); 39496666a39SMarek Vasut if (ret) 39596666a39SMarek Vasut return ret; 39696666a39SMarek Vasut 39771a758e1SMarek Vasut priv->mmc_is_wp = wp; 39890bc2bf2SMarek Vasut priv->mmc_cd = cd; 39971a758e1SMarek Vasut priv->id = id; 40014e26bcfSMarek Vasut priv->regs = mxs_ssp_regs_by_bus(id); 40171a758e1SMarek Vasut 40293bfd616SPantelis Antoniou priv->cfg.name = "MXS MMC"; 40393bfd616SPantelis Antoniou priv->cfg.ops = &mxsmmc_ops; 40471a758e1SMarek Vasut 40593bfd616SPantelis Antoniou priv->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34; 40671a758e1SMarek Vasut 40793bfd616SPantelis Antoniou priv->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | 4085a20397bSRob Herring MMC_MODE_HS_52MHz | MMC_MODE_HS; 40971a758e1SMarek Vasut 41071a758e1SMarek Vasut /* 41171a758e1SMarek Vasut * SSPCLK = 480 * 18 / 29 / 1 = 297.731 MHz 41271a758e1SMarek Vasut * SSP bit rate = SSPCLK / (CLOCK_DIVIDE * (1 + CLOCK_RATE)), 41371a758e1SMarek Vasut * CLOCK_DIVIDE has to be an even value from 2 to 254, and 41471a758e1SMarek Vasut * CLOCK_RATE could be any integer from 0 to 255. 41571a758e1SMarek Vasut */ 41693bfd616SPantelis Antoniou priv->cfg.f_min = 400000; 41793bfd616SPantelis Antoniou priv->cfg.f_max = mxc_get_clock(MXC_SSP0_CLK + mxsmmc_clk_id) * 1000 / 2; 41893bfd616SPantelis Antoniou priv->cfg.b_max = 0x20; 41971a758e1SMarek Vasut 42093bfd616SPantelis Antoniou mmc = mmc_create(&priv->cfg, priv); 42193bfd616SPantelis Antoniou if (mmc == NULL) { 42293bfd616SPantelis Antoniou mxs_dma_desc_free(priv->desc); 42393bfd616SPantelis Antoniou free(priv); 42493bfd616SPantelis Antoniou return -ENOMEM; 42593bfd616SPantelis Antoniou } 42671a758e1SMarek Vasut return 0; 42771a758e1SMarek Vasut } 428