1 /* 2 * Copyright 2008, Freescale Semiconductor, Inc 3 * Andy Fleming 4 * 5 * Based vaguely on the Linux code 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #include <config.h> 11 #include <common.h> 12 #include <command.h> 13 #include <errno.h> 14 #include <mmc.h> 15 #include <part.h> 16 #include <malloc.h> 17 #include <linux/list.h> 18 #include <div64.h> 19 #include "mmc_private.h" 20 21 static struct list_head mmc_devices; 22 static int cur_dev_num = -1; 23 24 __weak int board_mmc_getwp(struct mmc *mmc) 25 { 26 return -1; 27 } 28 29 int mmc_getwp(struct mmc *mmc) 30 { 31 int wp; 32 33 wp = board_mmc_getwp(mmc); 34 35 if (wp < 0) { 36 if (mmc->cfg->ops->getwp) 37 wp = mmc->cfg->ops->getwp(mmc); 38 else 39 wp = 0; 40 } 41 42 return wp; 43 } 44 45 __weak int board_mmc_getcd(struct mmc *mmc) 46 { 47 return -1; 48 } 49 50 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) 51 { 52 int ret; 53 54 #ifdef CONFIG_MMC_TRACE 55 int i; 56 u8 *ptr; 57 58 printf("CMD_SEND:%d\n", cmd->cmdidx); 59 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg); 60 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data); 61 switch (cmd->resp_type) { 62 case MMC_RSP_NONE: 63 printf("\t\tMMC_RSP_NONE\n"); 64 break; 65 case MMC_RSP_R1: 66 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n", 67 cmd->response[0]); 68 break; 69 case MMC_RSP_R1b: 70 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n", 71 cmd->response[0]); 72 break; 73 case MMC_RSP_R2: 74 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n", 75 cmd->response[0]); 76 printf("\t\t \t\t 0x%08X \n", 77 cmd->response[1]); 78 printf("\t\t \t\t 0x%08X \n", 79 cmd->response[2]); 80 printf("\t\t \t\t 0x%08X \n", 81 cmd->response[3]); 82 printf("\n"); 83 printf("\t\t\t\t\tDUMPING DATA\n"); 84 for (i = 0; i < 4; i++) { 85 int j; 86 printf("\t\t\t\t\t%03d - ", i*4); 87 ptr = (u8 *)&cmd->response[i]; 88 ptr += 3; 89 for (j = 0; j < 4; j++) 90 printf("%02X ", *ptr--); 91 printf("\n"); 92 } 93 break; 94 case MMC_RSP_R3: 95 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n", 96 cmd->response[0]); 97 break; 98 default: 99 printf("\t\tERROR MMC rsp not supported\n"); 100 break; 101 } 102 #else 103 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data); 104 #endif 105 return ret; 106 } 107 108 int mmc_send_status(struct mmc *mmc, int timeout) 109 { 110 struct mmc_cmd cmd; 111 int err, retries = 5; 112 #ifdef CONFIG_MMC_TRACE 113 int status; 114 #endif 115 116 cmd.cmdidx = MMC_CMD_SEND_STATUS; 117 cmd.resp_type = MMC_RSP_R1; 118 if (!mmc_host_is_spi(mmc)) 119 cmd.cmdarg = mmc->rca << 16; 120 121 while (1) { 122 err = mmc_send_cmd(mmc, &cmd, NULL); 123 if (!err) { 124 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) && 125 (cmd.response[0] & MMC_STATUS_CURR_STATE) != 126 MMC_STATE_PRG) 127 break; 128 else if (cmd.response[0] & MMC_STATUS_MASK) { 129 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 130 printf("Status Error: 0x%08X\n", 131 cmd.response[0]); 132 #endif 133 return COMM_ERR; 134 } 135 } else if (--retries < 0) 136 return err; 137 138 if (timeout-- <= 0) 139 break; 140 141 udelay(1000); 142 } 143 144 #ifdef CONFIG_MMC_TRACE 145 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9; 146 printf("CURR STATE:%d\n", status); 147 #endif 148 if (timeout <= 0) { 149 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 150 printf("Timeout waiting card ready\n"); 151 #endif 152 return TIMEOUT; 153 } 154 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR) 155 return SWITCH_ERR; 156 157 return 0; 158 } 159 160 int mmc_set_blocklen(struct mmc *mmc, int len) 161 { 162 struct mmc_cmd cmd; 163 164 if (mmc->ddr_mode) 165 return 0; 166 167 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; 168 cmd.resp_type = MMC_RSP_R1; 169 cmd.cmdarg = len; 170 171 return mmc_send_cmd(mmc, &cmd, NULL); 172 } 173 174 struct mmc *find_mmc_device(int dev_num) 175 { 176 struct mmc *m; 177 struct list_head *entry; 178 179 list_for_each(entry, &mmc_devices) { 180 m = list_entry(entry, struct mmc, link); 181 182 if (m->block_dev.dev == dev_num) 183 return m; 184 } 185 186 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 187 printf("MMC Device %d not found\n", dev_num); 188 #endif 189 190 return NULL; 191 } 192 193 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start, 194 lbaint_t blkcnt) 195 { 196 struct mmc_cmd cmd; 197 struct mmc_data data; 198 199 if (blkcnt > 1) 200 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; 201 else 202 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; 203 204 if (mmc->high_capacity) 205 cmd.cmdarg = start; 206 else 207 cmd.cmdarg = start * mmc->read_bl_len; 208 209 cmd.resp_type = MMC_RSP_R1; 210 211 data.dest = dst; 212 data.blocks = blkcnt; 213 data.blocksize = mmc->read_bl_len; 214 data.flags = MMC_DATA_READ; 215 216 if (mmc_send_cmd(mmc, &cmd, &data)) 217 return 0; 218 219 if (blkcnt > 1) { 220 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; 221 cmd.cmdarg = 0; 222 cmd.resp_type = MMC_RSP_R1b; 223 if (mmc_send_cmd(mmc, &cmd, NULL)) { 224 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 225 printf("mmc fail to send stop cmd\n"); 226 #endif 227 return 0; 228 } 229 } 230 231 return blkcnt; 232 } 233 234 static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst) 235 { 236 lbaint_t cur, blocks_todo = blkcnt; 237 238 if (blkcnt == 0) 239 return 0; 240 241 struct mmc *mmc = find_mmc_device(dev_num); 242 if (!mmc) 243 return 0; 244 245 if ((start + blkcnt) > mmc->block_dev.lba) { 246 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 247 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n", 248 start + blkcnt, mmc->block_dev.lba); 249 #endif 250 return 0; 251 } 252 253 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) 254 return 0; 255 256 do { 257 cur = (blocks_todo > mmc->cfg->b_max) ? 258 mmc->cfg->b_max : blocks_todo; 259 if(mmc_read_blocks(mmc, dst, start, cur) != cur) 260 return 0; 261 blocks_todo -= cur; 262 start += cur; 263 dst += cur * mmc->read_bl_len; 264 } while (blocks_todo > 0); 265 266 return blkcnt; 267 } 268 269 static int mmc_go_idle(struct mmc *mmc) 270 { 271 struct mmc_cmd cmd; 272 int err; 273 274 udelay(1000); 275 276 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; 277 cmd.cmdarg = 0; 278 cmd.resp_type = MMC_RSP_NONE; 279 280 err = mmc_send_cmd(mmc, &cmd, NULL); 281 282 if (err) 283 return err; 284 285 udelay(2000); 286 287 return 0; 288 } 289 290 static int sd_send_op_cond(struct mmc *mmc) 291 { 292 int timeout = 1000; 293 int err; 294 struct mmc_cmd cmd; 295 296 while (1) { 297 cmd.cmdidx = MMC_CMD_APP_CMD; 298 cmd.resp_type = MMC_RSP_R1; 299 cmd.cmdarg = 0; 300 301 err = mmc_send_cmd(mmc, &cmd, NULL); 302 303 if (err) 304 return err; 305 306 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; 307 cmd.resp_type = MMC_RSP_R3; 308 309 /* 310 * Most cards do not answer if some reserved bits 311 * in the ocr are set. However, Some controller 312 * can set bit 7 (reserved for low voltages), but 313 * how to manage low voltages SD card is not yet 314 * specified. 315 */ 316 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 : 317 (mmc->cfg->voltages & 0xff8000); 318 319 if (mmc->version == SD_VERSION_2) 320 cmd.cmdarg |= OCR_HCS; 321 322 err = mmc_send_cmd(mmc, &cmd, NULL); 323 324 if (err) 325 return err; 326 327 if (cmd.response[0] & OCR_BUSY) 328 break; 329 330 if (timeout-- <= 0) 331 return UNUSABLE_ERR; 332 333 udelay(1000); 334 } 335 336 if (mmc->version != SD_VERSION_2) 337 mmc->version = SD_VERSION_1_0; 338 339 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ 340 cmd.cmdidx = MMC_CMD_SPI_READ_OCR; 341 cmd.resp_type = MMC_RSP_R3; 342 cmd.cmdarg = 0; 343 344 err = mmc_send_cmd(mmc, &cmd, NULL); 345 346 if (err) 347 return err; 348 } 349 350 mmc->ocr = cmd.response[0]; 351 352 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); 353 mmc->rca = 0; 354 355 return 0; 356 } 357 358 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg) 359 { 360 struct mmc_cmd cmd; 361 int err; 362 363 cmd.cmdidx = MMC_CMD_SEND_OP_COND; 364 cmd.resp_type = MMC_RSP_R3; 365 cmd.cmdarg = 0; 366 if (use_arg && !mmc_host_is_spi(mmc)) 367 cmd.cmdarg = OCR_HCS | 368 (mmc->cfg->voltages & 369 (mmc->ocr & OCR_VOLTAGE_MASK)) | 370 (mmc->ocr & OCR_ACCESS_MODE); 371 372 err = mmc_send_cmd(mmc, &cmd, NULL); 373 if (err) 374 return err; 375 mmc->ocr = cmd.response[0]; 376 return 0; 377 } 378 379 static int mmc_send_op_cond(struct mmc *mmc) 380 { 381 int err, i; 382 383 /* Some cards seem to need this */ 384 mmc_go_idle(mmc); 385 386 /* Asking to the card its capabilities */ 387 for (i = 0; i < 2; i++) { 388 err = mmc_send_op_cond_iter(mmc, i != 0); 389 if (err) 390 return err; 391 392 /* exit if not busy (flag seems to be inverted) */ 393 if (mmc->ocr & OCR_BUSY) 394 break; 395 } 396 mmc->op_cond_pending = 1; 397 return 0; 398 } 399 400 static int mmc_complete_op_cond(struct mmc *mmc) 401 { 402 struct mmc_cmd cmd; 403 int timeout = 1000; 404 uint start; 405 int err; 406 407 mmc->op_cond_pending = 0; 408 if (!(mmc->ocr & OCR_BUSY)) { 409 start = get_timer(0); 410 while (1) { 411 err = mmc_send_op_cond_iter(mmc, 1); 412 if (err) 413 return err; 414 if (mmc->ocr & OCR_BUSY) 415 break; 416 if (get_timer(start) > timeout) 417 return UNUSABLE_ERR; 418 udelay(100); 419 } 420 } 421 422 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ 423 cmd.cmdidx = MMC_CMD_SPI_READ_OCR; 424 cmd.resp_type = MMC_RSP_R3; 425 cmd.cmdarg = 0; 426 427 err = mmc_send_cmd(mmc, &cmd, NULL); 428 429 if (err) 430 return err; 431 432 mmc->ocr = cmd.response[0]; 433 } 434 435 mmc->version = MMC_VERSION_UNKNOWN; 436 437 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); 438 mmc->rca = 1; 439 440 return 0; 441 } 442 443 444 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd) 445 { 446 struct mmc_cmd cmd; 447 struct mmc_data data; 448 int err; 449 450 /* Get the Card Status Register */ 451 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; 452 cmd.resp_type = MMC_RSP_R1; 453 cmd.cmdarg = 0; 454 455 data.dest = (char *)ext_csd; 456 data.blocks = 1; 457 data.blocksize = MMC_MAX_BLOCK_LEN; 458 data.flags = MMC_DATA_READ; 459 460 err = mmc_send_cmd(mmc, &cmd, &data); 461 462 return err; 463 } 464 465 466 static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) 467 { 468 struct mmc_cmd cmd; 469 int timeout = 1000; 470 int ret; 471 472 cmd.cmdidx = MMC_CMD_SWITCH; 473 cmd.resp_type = MMC_RSP_R1b; 474 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | 475 (index << 16) | 476 (value << 8); 477 478 ret = mmc_send_cmd(mmc, &cmd, NULL); 479 480 /* Waiting for the ready status */ 481 if (!ret) 482 ret = mmc_send_status(mmc, timeout); 483 484 return ret; 485 486 } 487 488 static int mmc_change_freq(struct mmc *mmc) 489 { 490 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 491 char cardtype; 492 int err; 493 494 mmc->card_caps = 0; 495 496 if (mmc_host_is_spi(mmc)) 497 return 0; 498 499 /* Only version 4 supports high-speed */ 500 if (mmc->version < MMC_VERSION_4) 501 return 0; 502 503 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT; 504 505 err = mmc_send_ext_csd(mmc, ext_csd); 506 507 if (err) 508 return err; 509 510 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf; 511 512 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); 513 514 if (err) 515 return err == SWITCH_ERR ? 0 : err; 516 517 /* Now check to see that it worked */ 518 err = mmc_send_ext_csd(mmc, ext_csd); 519 520 if (err) 521 return err; 522 523 /* No high-speed support */ 524 if (!ext_csd[EXT_CSD_HS_TIMING]) 525 return 0; 526 527 /* High Speed is set, there are two types: 52MHz and 26MHz */ 528 if (cardtype & EXT_CSD_CARD_TYPE_52) { 529 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V) 530 mmc->card_caps |= MMC_MODE_DDR_52MHz; 531 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; 532 } else { 533 mmc->card_caps |= MMC_MODE_HS; 534 } 535 536 return 0; 537 } 538 539 static int mmc_set_capacity(struct mmc *mmc, int part_num) 540 { 541 switch (part_num) { 542 case 0: 543 mmc->capacity = mmc->capacity_user; 544 break; 545 case 1: 546 case 2: 547 mmc->capacity = mmc->capacity_boot; 548 break; 549 case 3: 550 mmc->capacity = mmc->capacity_rpmb; 551 break; 552 case 4: 553 case 5: 554 case 6: 555 case 7: 556 mmc->capacity = mmc->capacity_gp[part_num - 4]; 557 break; 558 default: 559 return -1; 560 } 561 562 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len); 563 564 return 0; 565 } 566 567 int mmc_select_hwpart(int dev_num, int hwpart) 568 { 569 struct mmc *mmc = find_mmc_device(dev_num); 570 int ret; 571 572 if (!mmc) 573 return -ENODEV; 574 575 if (mmc->part_num == hwpart) 576 return 0; 577 578 if (mmc->part_config == MMCPART_NOAVAILABLE) { 579 printf("Card doesn't support part_switch\n"); 580 return -EMEDIUMTYPE; 581 } 582 583 ret = mmc_switch_part(dev_num, hwpart); 584 if (ret) 585 return ret; 586 587 mmc->part_num = hwpart; 588 589 return 0; 590 } 591 592 593 int mmc_switch_part(int dev_num, unsigned int part_num) 594 { 595 struct mmc *mmc = find_mmc_device(dev_num); 596 int ret; 597 598 if (!mmc) 599 return -1; 600 601 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, 602 (mmc->part_config & ~PART_ACCESS_MASK) 603 | (part_num & PART_ACCESS_MASK)); 604 605 /* 606 * Set the capacity if the switch succeeded or was intended 607 * to return to representing the raw device. 608 */ 609 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) 610 ret = mmc_set_capacity(mmc, part_num); 611 612 return ret; 613 } 614 615 int mmc_hwpart_config(struct mmc *mmc, 616 const struct mmc_hwpart_conf *conf, 617 enum mmc_hwpart_conf_mode mode) 618 { 619 u8 part_attrs = 0; 620 u32 enh_size_mult; 621 u32 enh_start_addr; 622 u32 gp_size_mult[4]; 623 u32 max_enh_size_mult; 624 u32 tot_enh_size_mult = 0; 625 u8 wr_rel_set; 626 int i, pidx, err; 627 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 628 629 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE) 630 return -EINVAL; 631 632 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) { 633 printf("eMMC >= 4.4 required for enhanced user data area\n"); 634 return -EMEDIUMTYPE; 635 } 636 637 if (!(mmc->part_support & PART_SUPPORT)) { 638 printf("Card does not support partitioning\n"); 639 return -EMEDIUMTYPE; 640 } 641 642 if (!mmc->hc_wp_grp_size) { 643 printf("Card does not define HC WP group size\n"); 644 return -EMEDIUMTYPE; 645 } 646 647 /* check partition alignment and total enhanced size */ 648 if (conf->user.enh_size) { 649 if (conf->user.enh_size % mmc->hc_wp_grp_size || 650 conf->user.enh_start % mmc->hc_wp_grp_size) { 651 printf("User data enhanced area not HC WP group " 652 "size aligned\n"); 653 return -EINVAL; 654 } 655 part_attrs |= EXT_CSD_ENH_USR; 656 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size; 657 if (mmc->high_capacity) { 658 enh_start_addr = conf->user.enh_start; 659 } else { 660 enh_start_addr = (conf->user.enh_start << 9); 661 } 662 } else { 663 enh_size_mult = 0; 664 enh_start_addr = 0; 665 } 666 tot_enh_size_mult += enh_size_mult; 667 668 for (pidx = 0; pidx < 4; pidx++) { 669 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) { 670 printf("GP%i partition not HC WP group size " 671 "aligned\n", pidx+1); 672 return -EINVAL; 673 } 674 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size; 675 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) { 676 part_attrs |= EXT_CSD_ENH_GP(pidx); 677 tot_enh_size_mult += gp_size_mult[pidx]; 678 } 679 } 680 681 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) { 682 printf("Card does not support enhanced attribute\n"); 683 return -EMEDIUMTYPE; 684 } 685 686 err = mmc_send_ext_csd(mmc, ext_csd); 687 if (err) 688 return err; 689 690 max_enh_size_mult = 691 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) + 692 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) + 693 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT]; 694 if (tot_enh_size_mult > max_enh_size_mult) { 695 printf("Total enhanced size exceeds maximum (%u > %u)\n", 696 tot_enh_size_mult, max_enh_size_mult); 697 return -EMEDIUMTYPE; 698 } 699 700 /* The default value of EXT_CSD_WR_REL_SET is device 701 * dependent, the values can only be changed if the 702 * EXT_CSD_HS_CTRL_REL bit is set. The values can be 703 * changed only once and before partitioning is completed. */ 704 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET]; 705 if (conf->user.wr_rel_change) { 706 if (conf->user.wr_rel_set) 707 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR; 708 else 709 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR; 710 } 711 for (pidx = 0; pidx < 4; pidx++) { 712 if (conf->gp_part[pidx].wr_rel_change) { 713 if (conf->gp_part[pidx].wr_rel_set) 714 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx); 715 else 716 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx); 717 } 718 } 719 720 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] && 721 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) { 722 puts("Card does not support host controlled partition write " 723 "reliability settings\n"); 724 return -EMEDIUMTYPE; 725 } 726 727 if (ext_csd[EXT_CSD_PARTITION_SETTING] & 728 EXT_CSD_PARTITION_SETTING_COMPLETED) { 729 printf("Card already partitioned\n"); 730 return -EPERM; 731 } 732 733 if (mode == MMC_HWPART_CONF_CHECK) 734 return 0; 735 736 /* Partitioning requires high-capacity size definitions */ 737 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) { 738 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 739 EXT_CSD_ERASE_GROUP_DEF, 1); 740 741 if (err) 742 return err; 743 744 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1; 745 746 /* update erase group size to be high-capacity */ 747 mmc->erase_grp_size = 748 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024; 749 750 } 751 752 /* all OK, write the configuration */ 753 for (i = 0; i < 4; i++) { 754 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 755 EXT_CSD_ENH_START_ADDR+i, 756 (enh_start_addr >> (i*8)) & 0xFF); 757 if (err) 758 return err; 759 } 760 for (i = 0; i < 3; i++) { 761 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 762 EXT_CSD_ENH_SIZE_MULT+i, 763 (enh_size_mult >> (i*8)) & 0xFF); 764 if (err) 765 return err; 766 } 767 for (pidx = 0; pidx < 4; pidx++) { 768 for (i = 0; i < 3; i++) { 769 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 770 EXT_CSD_GP_SIZE_MULT+pidx*3+i, 771 (gp_size_mult[pidx] >> (i*8)) & 0xFF); 772 if (err) 773 return err; 774 } 775 } 776 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 777 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs); 778 if (err) 779 return err; 780 781 if (mode == MMC_HWPART_CONF_SET) 782 return 0; 783 784 /* The WR_REL_SET is a write-once register but shall be 785 * written before setting PART_SETTING_COMPLETED. As it is 786 * write-once we can only write it when completing the 787 * partitioning. */ 788 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) { 789 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 790 EXT_CSD_WR_REL_SET, wr_rel_set); 791 if (err) 792 return err; 793 } 794 795 /* Setting PART_SETTING_COMPLETED confirms the partition 796 * configuration but it only becomes effective after power 797 * cycle, so we do not adjust the partition related settings 798 * in the mmc struct. */ 799 800 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 801 EXT_CSD_PARTITION_SETTING, 802 EXT_CSD_PARTITION_SETTING_COMPLETED); 803 if (err) 804 return err; 805 806 return 0; 807 } 808 809 int mmc_getcd(struct mmc *mmc) 810 { 811 int cd; 812 813 cd = board_mmc_getcd(mmc); 814 815 if (cd < 0) { 816 if (mmc->cfg->ops->getcd) 817 cd = mmc->cfg->ops->getcd(mmc); 818 else 819 cd = 1; 820 } 821 822 return cd; 823 } 824 825 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) 826 { 827 struct mmc_cmd cmd; 828 struct mmc_data data; 829 830 /* Switch the frequency */ 831 cmd.cmdidx = SD_CMD_SWITCH_FUNC; 832 cmd.resp_type = MMC_RSP_R1; 833 cmd.cmdarg = (mode << 31) | 0xffffff; 834 cmd.cmdarg &= ~(0xf << (group * 4)); 835 cmd.cmdarg |= value << (group * 4); 836 837 data.dest = (char *)resp; 838 data.blocksize = 64; 839 data.blocks = 1; 840 data.flags = MMC_DATA_READ; 841 842 return mmc_send_cmd(mmc, &cmd, &data); 843 } 844 845 846 static int sd_change_freq(struct mmc *mmc) 847 { 848 int err; 849 struct mmc_cmd cmd; 850 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2); 851 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16); 852 struct mmc_data data; 853 int timeout; 854 855 mmc->card_caps = 0; 856 857 if (mmc_host_is_spi(mmc)) 858 return 0; 859 860 /* Read the SCR to find out if this card supports higher speeds */ 861 cmd.cmdidx = MMC_CMD_APP_CMD; 862 cmd.resp_type = MMC_RSP_R1; 863 cmd.cmdarg = mmc->rca << 16; 864 865 err = mmc_send_cmd(mmc, &cmd, NULL); 866 867 if (err) 868 return err; 869 870 cmd.cmdidx = SD_CMD_APP_SEND_SCR; 871 cmd.resp_type = MMC_RSP_R1; 872 cmd.cmdarg = 0; 873 874 timeout = 3; 875 876 retry_scr: 877 data.dest = (char *)scr; 878 data.blocksize = 8; 879 data.blocks = 1; 880 data.flags = MMC_DATA_READ; 881 882 err = mmc_send_cmd(mmc, &cmd, &data); 883 884 if (err) { 885 if (timeout--) 886 goto retry_scr; 887 888 return err; 889 } 890 891 mmc->scr[0] = __be32_to_cpu(scr[0]); 892 mmc->scr[1] = __be32_to_cpu(scr[1]); 893 894 switch ((mmc->scr[0] >> 24) & 0xf) { 895 case 0: 896 mmc->version = SD_VERSION_1_0; 897 break; 898 case 1: 899 mmc->version = SD_VERSION_1_10; 900 break; 901 case 2: 902 mmc->version = SD_VERSION_2; 903 if ((mmc->scr[0] >> 15) & 0x1) 904 mmc->version = SD_VERSION_3; 905 break; 906 default: 907 mmc->version = SD_VERSION_1_0; 908 break; 909 } 910 911 if (mmc->scr[0] & SD_DATA_4BIT) 912 mmc->card_caps |= MMC_MODE_4BIT; 913 914 /* Version 1.0 doesn't support switching */ 915 if (mmc->version == SD_VERSION_1_0) 916 return 0; 917 918 timeout = 4; 919 while (timeout--) { 920 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, 921 (u8 *)switch_status); 922 923 if (err) 924 return err; 925 926 /* The high-speed function is busy. Try again */ 927 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY)) 928 break; 929 } 930 931 /* If high-speed isn't supported, we return */ 932 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)) 933 return 0; 934 935 /* 936 * If the host doesn't support SD_HIGHSPEED, do not switch card to 937 * HIGHSPEED mode even if the card support SD_HIGHSPPED. 938 * This can avoid furthur problem when the card runs in different 939 * mode between the host. 940 */ 941 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) && 942 (mmc->cfg->host_caps & MMC_MODE_HS))) 943 return 0; 944 945 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status); 946 947 if (err) 948 return err; 949 950 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000) 951 mmc->card_caps |= MMC_MODE_HS; 952 953 return 0; 954 } 955 956 /* frequency bases */ 957 /* divided by 10 to be nice to platforms without floating point */ 958 static const int fbase[] = { 959 10000, 960 100000, 961 1000000, 962 10000000, 963 }; 964 965 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice 966 * to platforms without floating point. 967 */ 968 static const int multipliers[] = { 969 0, /* reserved */ 970 10, 971 12, 972 13, 973 15, 974 20, 975 25, 976 30, 977 35, 978 40, 979 45, 980 50, 981 55, 982 60, 983 70, 984 80, 985 }; 986 987 static void mmc_set_ios(struct mmc *mmc) 988 { 989 if (mmc->cfg->ops->set_ios) 990 mmc->cfg->ops->set_ios(mmc); 991 } 992 993 void mmc_set_clock(struct mmc *mmc, uint clock) 994 { 995 if (clock > mmc->cfg->f_max) 996 clock = mmc->cfg->f_max; 997 998 if (clock < mmc->cfg->f_min) 999 clock = mmc->cfg->f_min; 1000 1001 mmc->clock = clock; 1002 1003 mmc_set_ios(mmc); 1004 } 1005 1006 static void mmc_set_bus_width(struct mmc *mmc, uint width) 1007 { 1008 mmc->bus_width = width; 1009 1010 mmc_set_ios(mmc); 1011 } 1012 1013 static int mmc_startup(struct mmc *mmc) 1014 { 1015 int err, i; 1016 uint mult, freq; 1017 u64 cmult, csize, capacity; 1018 struct mmc_cmd cmd; 1019 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 1020 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN); 1021 int timeout = 1000; 1022 bool has_parts = false; 1023 bool part_completed; 1024 1025 #ifdef CONFIG_MMC_SPI_CRC_ON 1026 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */ 1027 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF; 1028 cmd.resp_type = MMC_RSP_R1; 1029 cmd.cmdarg = 1; 1030 err = mmc_send_cmd(mmc, &cmd, NULL); 1031 1032 if (err) 1033 return err; 1034 } 1035 #endif 1036 1037 /* Put the Card in Identify Mode */ 1038 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID : 1039 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */ 1040 cmd.resp_type = MMC_RSP_R2; 1041 cmd.cmdarg = 0; 1042 1043 err = mmc_send_cmd(mmc, &cmd, NULL); 1044 1045 if (err) 1046 return err; 1047 1048 memcpy(mmc->cid, cmd.response, 16); 1049 1050 /* 1051 * For MMC cards, set the Relative Address. 1052 * For SD cards, get the Relatvie Address. 1053 * This also puts the cards into Standby State 1054 */ 1055 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ 1056 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; 1057 cmd.cmdarg = mmc->rca << 16; 1058 cmd.resp_type = MMC_RSP_R6; 1059 1060 err = mmc_send_cmd(mmc, &cmd, NULL); 1061 1062 if (err) 1063 return err; 1064 1065 if (IS_SD(mmc)) 1066 mmc->rca = (cmd.response[0] >> 16) & 0xffff; 1067 } 1068 1069 /* Get the Card-Specific Data */ 1070 cmd.cmdidx = MMC_CMD_SEND_CSD; 1071 cmd.resp_type = MMC_RSP_R2; 1072 cmd.cmdarg = mmc->rca << 16; 1073 1074 err = mmc_send_cmd(mmc, &cmd, NULL); 1075 1076 /* Waiting for the ready status */ 1077 mmc_send_status(mmc, timeout); 1078 1079 if (err) 1080 return err; 1081 1082 mmc->csd[0] = cmd.response[0]; 1083 mmc->csd[1] = cmd.response[1]; 1084 mmc->csd[2] = cmd.response[2]; 1085 mmc->csd[3] = cmd.response[3]; 1086 1087 if (mmc->version == MMC_VERSION_UNKNOWN) { 1088 int version = (cmd.response[0] >> 26) & 0xf; 1089 1090 switch (version) { 1091 case 0: 1092 mmc->version = MMC_VERSION_1_2; 1093 break; 1094 case 1: 1095 mmc->version = MMC_VERSION_1_4; 1096 break; 1097 case 2: 1098 mmc->version = MMC_VERSION_2_2; 1099 break; 1100 case 3: 1101 mmc->version = MMC_VERSION_3; 1102 break; 1103 case 4: 1104 mmc->version = MMC_VERSION_4; 1105 break; 1106 default: 1107 mmc->version = MMC_VERSION_1_2; 1108 break; 1109 } 1110 } 1111 1112 /* divide frequency by 10, since the mults are 10x bigger */ 1113 freq = fbase[(cmd.response[0] & 0x7)]; 1114 mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; 1115 1116 mmc->tran_speed = freq * mult; 1117 1118 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1); 1119 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); 1120 1121 if (IS_SD(mmc)) 1122 mmc->write_bl_len = mmc->read_bl_len; 1123 else 1124 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); 1125 1126 if (mmc->high_capacity) { 1127 csize = (mmc->csd[1] & 0x3f) << 16 1128 | (mmc->csd[2] & 0xffff0000) >> 16; 1129 cmult = 8; 1130 } else { 1131 csize = (mmc->csd[1] & 0x3ff) << 2 1132 | (mmc->csd[2] & 0xc0000000) >> 30; 1133 cmult = (mmc->csd[2] & 0x00038000) >> 15; 1134 } 1135 1136 mmc->capacity_user = (csize + 1) << (cmult + 2); 1137 mmc->capacity_user *= mmc->read_bl_len; 1138 mmc->capacity_boot = 0; 1139 mmc->capacity_rpmb = 0; 1140 for (i = 0; i < 4; i++) 1141 mmc->capacity_gp[i] = 0; 1142 1143 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN) 1144 mmc->read_bl_len = MMC_MAX_BLOCK_LEN; 1145 1146 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN) 1147 mmc->write_bl_len = MMC_MAX_BLOCK_LEN; 1148 1149 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) { 1150 cmd.cmdidx = MMC_CMD_SET_DSR; 1151 cmd.cmdarg = (mmc->dsr & 0xffff) << 16; 1152 cmd.resp_type = MMC_RSP_NONE; 1153 if (mmc_send_cmd(mmc, &cmd, NULL)) 1154 printf("MMC: SET_DSR failed\n"); 1155 } 1156 1157 /* Select the card, and put it into Transfer Mode */ 1158 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ 1159 cmd.cmdidx = MMC_CMD_SELECT_CARD; 1160 cmd.resp_type = MMC_RSP_R1; 1161 cmd.cmdarg = mmc->rca << 16; 1162 err = mmc_send_cmd(mmc, &cmd, NULL); 1163 1164 if (err) 1165 return err; 1166 } 1167 1168 /* 1169 * For SD, its erase group is always one sector 1170 */ 1171 mmc->erase_grp_size = 1; 1172 mmc->part_config = MMCPART_NOAVAILABLE; 1173 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) { 1174 /* check ext_csd version and capacity */ 1175 err = mmc_send_ext_csd(mmc, ext_csd); 1176 if (err) 1177 return err; 1178 if (ext_csd[EXT_CSD_REV] >= 2) { 1179 /* 1180 * According to the JEDEC Standard, the value of 1181 * ext_csd's capacity is valid if the value is more 1182 * than 2GB 1183 */ 1184 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0 1185 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8 1186 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16 1187 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24; 1188 capacity *= MMC_MAX_BLOCK_LEN; 1189 if ((capacity >> 20) > 2 * 1024) 1190 mmc->capacity_user = capacity; 1191 } 1192 1193 switch (ext_csd[EXT_CSD_REV]) { 1194 case 1: 1195 mmc->version = MMC_VERSION_4_1; 1196 break; 1197 case 2: 1198 mmc->version = MMC_VERSION_4_2; 1199 break; 1200 case 3: 1201 mmc->version = MMC_VERSION_4_3; 1202 break; 1203 case 5: 1204 mmc->version = MMC_VERSION_4_41; 1205 break; 1206 case 6: 1207 mmc->version = MMC_VERSION_4_5; 1208 break; 1209 case 7: 1210 mmc->version = MMC_VERSION_5_0; 1211 break; 1212 } 1213 1214 /* The partition data may be non-zero but it is only 1215 * effective if PARTITION_SETTING_COMPLETED is set in 1216 * EXT_CSD, so ignore any data if this bit is not set, 1217 * except for enabling the high-capacity group size 1218 * definition (see below). */ 1219 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] & 1220 EXT_CSD_PARTITION_SETTING_COMPLETED); 1221 1222 /* store the partition info of emmc */ 1223 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT]; 1224 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) || 1225 ext_csd[EXT_CSD_BOOT_MULT]) 1226 mmc->part_config = ext_csd[EXT_CSD_PART_CONF]; 1227 if (part_completed && 1228 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT)) 1229 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE]; 1230 1231 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17; 1232 1233 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17; 1234 1235 for (i = 0; i < 4; i++) { 1236 int idx = EXT_CSD_GP_SIZE_MULT + i * 3; 1237 uint mult = (ext_csd[idx + 2] << 16) + 1238 (ext_csd[idx + 1] << 8) + ext_csd[idx]; 1239 if (mult) 1240 has_parts = true; 1241 if (!part_completed) 1242 continue; 1243 mmc->capacity_gp[i] = mult; 1244 mmc->capacity_gp[i] *= 1245 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; 1246 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1247 mmc->capacity_gp[i] <<= 19; 1248 } 1249 1250 if (part_completed) { 1251 mmc->enh_user_size = 1252 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) + 1253 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) + 1254 ext_csd[EXT_CSD_ENH_SIZE_MULT]; 1255 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; 1256 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1257 mmc->enh_user_size <<= 19; 1258 mmc->enh_user_start = 1259 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) + 1260 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) + 1261 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) + 1262 ext_csd[EXT_CSD_ENH_START_ADDR]; 1263 if (mmc->high_capacity) 1264 mmc->enh_user_start <<= 9; 1265 } 1266 1267 /* 1268 * Host needs to enable ERASE_GRP_DEF bit if device is 1269 * partitioned. This bit will be lost every time after a reset 1270 * or power off. This will affect erase size. 1271 */ 1272 if (part_completed) 1273 has_parts = true; 1274 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) && 1275 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) 1276 has_parts = true; 1277 if (has_parts) { 1278 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 1279 EXT_CSD_ERASE_GROUP_DEF, 1); 1280 1281 if (err) 1282 return err; 1283 else 1284 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1; 1285 } 1286 1287 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) { 1288 /* Read out group size from ext_csd */ 1289 mmc->erase_grp_size = 1290 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024; 1291 /* 1292 * if high capacity and partition setting completed 1293 * SEC_COUNT is valid even if it is smaller than 2 GiB 1294 * JEDEC Standard JESD84-B45, 6.2.4 1295 */ 1296 if (mmc->high_capacity && part_completed) { 1297 capacity = (ext_csd[EXT_CSD_SEC_CNT]) | 1298 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) | 1299 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) | 1300 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 1301 capacity *= MMC_MAX_BLOCK_LEN; 1302 mmc->capacity_user = capacity; 1303 } 1304 } else { 1305 /* Calculate the group size from the csd value. */ 1306 int erase_gsz, erase_gmul; 1307 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10; 1308 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5; 1309 mmc->erase_grp_size = (erase_gsz + 1) 1310 * (erase_gmul + 1); 1311 } 1312 1313 mmc->hc_wp_grp_size = 1024 1314 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] 1315 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1316 1317 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET]; 1318 } 1319 1320 err = mmc_set_capacity(mmc, mmc->part_num); 1321 if (err) 1322 return err; 1323 1324 if (IS_SD(mmc)) 1325 err = sd_change_freq(mmc); 1326 else 1327 err = mmc_change_freq(mmc); 1328 1329 if (err) 1330 return err; 1331 1332 /* Restrict card's capabilities by what the host can do */ 1333 mmc->card_caps &= mmc->cfg->host_caps; 1334 1335 if (IS_SD(mmc)) { 1336 if (mmc->card_caps & MMC_MODE_4BIT) { 1337 cmd.cmdidx = MMC_CMD_APP_CMD; 1338 cmd.resp_type = MMC_RSP_R1; 1339 cmd.cmdarg = mmc->rca << 16; 1340 1341 err = mmc_send_cmd(mmc, &cmd, NULL); 1342 if (err) 1343 return err; 1344 1345 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; 1346 cmd.resp_type = MMC_RSP_R1; 1347 cmd.cmdarg = 2; 1348 err = mmc_send_cmd(mmc, &cmd, NULL); 1349 if (err) 1350 return err; 1351 1352 mmc_set_bus_width(mmc, 4); 1353 } 1354 1355 if (mmc->card_caps & MMC_MODE_HS) 1356 mmc->tran_speed = 50000000; 1357 else 1358 mmc->tran_speed = 25000000; 1359 } else if (mmc->version >= MMC_VERSION_4) { 1360 /* Only version 4 of MMC supports wider bus widths */ 1361 int idx; 1362 1363 /* An array of possible bus widths in order of preference */ 1364 static unsigned ext_csd_bits[] = { 1365 EXT_CSD_DDR_BUS_WIDTH_8, 1366 EXT_CSD_DDR_BUS_WIDTH_4, 1367 EXT_CSD_BUS_WIDTH_8, 1368 EXT_CSD_BUS_WIDTH_4, 1369 EXT_CSD_BUS_WIDTH_1, 1370 }; 1371 1372 /* An array to map CSD bus widths to host cap bits */ 1373 static unsigned ext_to_hostcaps[] = { 1374 [EXT_CSD_DDR_BUS_WIDTH_4] = 1375 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT, 1376 [EXT_CSD_DDR_BUS_WIDTH_8] = 1377 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT, 1378 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT, 1379 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT, 1380 }; 1381 1382 /* An array to map chosen bus width to an integer */ 1383 static unsigned widths[] = { 1384 8, 4, 8, 4, 1, 1385 }; 1386 1387 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) { 1388 unsigned int extw = ext_csd_bits[idx]; 1389 unsigned int caps = ext_to_hostcaps[extw]; 1390 1391 /* 1392 * If the bus width is still not changed, 1393 * don't try to set the default again. 1394 * Otherwise, recover from switch attempts 1395 * by switching to 1-bit bus width. 1396 */ 1397 if (extw == EXT_CSD_BUS_WIDTH_1 && 1398 mmc->bus_width == 1) { 1399 err = 0; 1400 break; 1401 } 1402 1403 /* 1404 * Check to make sure the card and controller support 1405 * these capabilities 1406 */ 1407 if ((mmc->card_caps & caps) != caps) 1408 continue; 1409 1410 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 1411 EXT_CSD_BUS_WIDTH, extw); 1412 1413 if (err) 1414 continue; 1415 1416 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0; 1417 mmc_set_bus_width(mmc, widths[idx]); 1418 1419 err = mmc_send_ext_csd(mmc, test_csd); 1420 1421 if (err) 1422 continue; 1423 1424 /* Only compare read only fields */ 1425 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] 1426 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] && 1427 ext_csd[EXT_CSD_HC_WP_GRP_SIZE] 1428 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] && 1429 ext_csd[EXT_CSD_REV] 1430 == test_csd[EXT_CSD_REV] && 1431 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] 1432 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] && 1433 memcmp(&ext_csd[EXT_CSD_SEC_CNT], 1434 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) 1435 break; 1436 else 1437 err = SWITCH_ERR; 1438 } 1439 1440 if (err) 1441 return err; 1442 1443 if (mmc->card_caps & MMC_MODE_HS) { 1444 if (mmc->card_caps & MMC_MODE_HS_52MHz) 1445 mmc->tran_speed = 52000000; 1446 else 1447 mmc->tran_speed = 26000000; 1448 } 1449 } 1450 1451 mmc_set_clock(mmc, mmc->tran_speed); 1452 1453 /* Fix the block length for DDR mode */ 1454 if (mmc->ddr_mode) { 1455 mmc->read_bl_len = MMC_MAX_BLOCK_LEN; 1456 mmc->write_bl_len = MMC_MAX_BLOCK_LEN; 1457 } 1458 1459 /* fill in device description */ 1460 mmc->block_dev.lun = 0; 1461 mmc->block_dev.type = 0; 1462 mmc->block_dev.blksz = mmc->read_bl_len; 1463 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz); 1464 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len); 1465 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1466 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x", 1467 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff), 1468 (mmc->cid[3] >> 16) & 0xffff); 1469 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff, 1470 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, 1471 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff, 1472 (mmc->cid[2] >> 24) & 0xff); 1473 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf, 1474 (mmc->cid[2] >> 16) & 0xf); 1475 #else 1476 mmc->block_dev.vendor[0] = 0; 1477 mmc->block_dev.product[0] = 0; 1478 mmc->block_dev.revision[0] = 0; 1479 #endif 1480 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT) 1481 init_part(&mmc->block_dev); 1482 #endif 1483 1484 return 0; 1485 } 1486 1487 static int mmc_send_if_cond(struct mmc *mmc) 1488 { 1489 struct mmc_cmd cmd; 1490 int err; 1491 1492 cmd.cmdidx = SD_CMD_SEND_IF_COND; 1493 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ 1494 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa; 1495 cmd.resp_type = MMC_RSP_R7; 1496 1497 err = mmc_send_cmd(mmc, &cmd, NULL); 1498 1499 if (err) 1500 return err; 1501 1502 if ((cmd.response[0] & 0xff) != 0xaa) 1503 return UNUSABLE_ERR; 1504 else 1505 mmc->version = SD_VERSION_2; 1506 1507 return 0; 1508 } 1509 1510 /* not used any more */ 1511 int __deprecated mmc_register(struct mmc *mmc) 1512 { 1513 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1514 printf("%s is deprecated! use mmc_create() instead.\n", __func__); 1515 #endif 1516 return -1; 1517 } 1518 1519 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv) 1520 { 1521 struct mmc *mmc; 1522 1523 /* quick validation */ 1524 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL || 1525 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0) 1526 return NULL; 1527 1528 mmc = calloc(1, sizeof(*mmc)); 1529 if (mmc == NULL) 1530 return NULL; 1531 1532 mmc->cfg = cfg; 1533 mmc->priv = priv; 1534 1535 /* the following chunk was mmc_register() */ 1536 1537 /* Setup dsr related values */ 1538 mmc->dsr_imp = 0; 1539 mmc->dsr = 0xffffffff; 1540 /* Setup the universal parts of the block interface just once */ 1541 mmc->block_dev.if_type = IF_TYPE_MMC; 1542 mmc->block_dev.dev = cur_dev_num++; 1543 mmc->block_dev.removable = 1; 1544 mmc->block_dev.block_read = mmc_bread; 1545 mmc->block_dev.block_write = mmc_bwrite; 1546 mmc->block_dev.block_erase = mmc_berase; 1547 1548 /* setup initial part type */ 1549 mmc->block_dev.part_type = mmc->cfg->part_type; 1550 1551 INIT_LIST_HEAD(&mmc->link); 1552 1553 list_add_tail(&mmc->link, &mmc_devices); 1554 1555 return mmc; 1556 } 1557 1558 void mmc_destroy(struct mmc *mmc) 1559 { 1560 /* only freeing memory for now */ 1561 free(mmc); 1562 } 1563 1564 #ifdef CONFIG_PARTITIONS 1565 block_dev_desc_t *mmc_get_dev(int dev) 1566 { 1567 struct mmc *mmc = find_mmc_device(dev); 1568 if (!mmc || mmc_init(mmc)) 1569 return NULL; 1570 1571 return &mmc->block_dev; 1572 } 1573 #endif 1574 1575 /* board-specific MMC power initializations. */ 1576 __weak void board_mmc_power_init(void) 1577 { 1578 } 1579 1580 int mmc_start_init(struct mmc *mmc) 1581 { 1582 int err; 1583 1584 /* we pretend there's no card when init is NULL */ 1585 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) { 1586 mmc->has_init = 0; 1587 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1588 printf("MMC: no card present\n"); 1589 #endif 1590 return NO_CARD_ERR; 1591 } 1592 1593 if (mmc->has_init) 1594 return 0; 1595 1596 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT 1597 mmc_adapter_card_type_ident(); 1598 #endif 1599 board_mmc_power_init(); 1600 1601 /* made sure it's not NULL earlier */ 1602 err = mmc->cfg->ops->init(mmc); 1603 1604 if (err) 1605 return err; 1606 1607 mmc->ddr_mode = 0; 1608 mmc_set_bus_width(mmc, 1); 1609 mmc_set_clock(mmc, 1); 1610 1611 /* Reset the Card */ 1612 err = mmc_go_idle(mmc); 1613 1614 if (err) 1615 return err; 1616 1617 /* The internal partition reset to user partition(0) at every CMD0*/ 1618 mmc->part_num = 0; 1619 1620 /* Test for SD version 2 */ 1621 err = mmc_send_if_cond(mmc); 1622 1623 /* Now try to get the SD card's operating condition */ 1624 err = sd_send_op_cond(mmc); 1625 1626 /* If the command timed out, we check for an MMC card */ 1627 if (err == TIMEOUT) { 1628 err = mmc_send_op_cond(mmc); 1629 1630 if (err) { 1631 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1632 printf("Card did not respond to voltage select!\n"); 1633 #endif 1634 return UNUSABLE_ERR; 1635 } 1636 } 1637 1638 if (!err) 1639 mmc->init_in_progress = 1; 1640 1641 return err; 1642 } 1643 1644 static int mmc_complete_init(struct mmc *mmc) 1645 { 1646 int err = 0; 1647 1648 mmc->init_in_progress = 0; 1649 if (mmc->op_cond_pending) 1650 err = mmc_complete_op_cond(mmc); 1651 1652 if (!err) 1653 err = mmc_startup(mmc); 1654 if (err) 1655 mmc->has_init = 0; 1656 else 1657 mmc->has_init = 1; 1658 return err; 1659 } 1660 1661 int mmc_init(struct mmc *mmc) 1662 { 1663 int err = 0; 1664 unsigned start; 1665 1666 if (mmc->has_init) 1667 return 0; 1668 1669 start = get_timer(0); 1670 1671 if (!mmc->init_in_progress) 1672 err = mmc_start_init(mmc); 1673 1674 if (!err) 1675 err = mmc_complete_init(mmc); 1676 debug("%s: %d, time %lu\n", __func__, err, get_timer(start)); 1677 return err; 1678 } 1679 1680 int mmc_set_dsr(struct mmc *mmc, u16 val) 1681 { 1682 mmc->dsr = val; 1683 return 0; 1684 } 1685 1686 /* CPU-specific MMC initializations */ 1687 __weak int cpu_mmc_init(bd_t *bis) 1688 { 1689 return -1; 1690 } 1691 1692 /* board-specific MMC initializations. */ 1693 __weak int board_mmc_init(bd_t *bis) 1694 { 1695 return -1; 1696 } 1697 1698 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1699 1700 void print_mmc_devices(char separator) 1701 { 1702 struct mmc *m; 1703 struct list_head *entry; 1704 char *mmc_type; 1705 1706 list_for_each(entry, &mmc_devices) { 1707 m = list_entry(entry, struct mmc, link); 1708 1709 if (m->has_init) 1710 mmc_type = IS_SD(m) ? "SD" : "eMMC"; 1711 else 1712 mmc_type = NULL; 1713 1714 printf("%s: %d", m->cfg->name, m->block_dev.dev); 1715 if (mmc_type) 1716 printf(" (%s)", mmc_type); 1717 1718 if (entry->next != &mmc_devices) { 1719 printf("%c", separator); 1720 if (separator != '\n') 1721 puts (" "); 1722 } 1723 } 1724 1725 printf("\n"); 1726 } 1727 1728 #else 1729 void print_mmc_devices(char separator) { } 1730 #endif 1731 1732 int get_mmc_num(void) 1733 { 1734 return cur_dev_num; 1735 } 1736 1737 void mmc_set_preinit(struct mmc *mmc, int preinit) 1738 { 1739 mmc->preinit = preinit; 1740 } 1741 1742 static void do_preinit(void) 1743 { 1744 struct mmc *m; 1745 struct list_head *entry; 1746 1747 list_for_each(entry, &mmc_devices) { 1748 m = list_entry(entry, struct mmc, link); 1749 1750 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT 1751 mmc_set_preinit(m, 1); 1752 #endif 1753 if (m->preinit) 1754 mmc_start_init(m); 1755 } 1756 } 1757 1758 1759 int mmc_initialize(bd_t *bis) 1760 { 1761 INIT_LIST_HEAD (&mmc_devices); 1762 cur_dev_num = 0; 1763 1764 if (board_mmc_init(bis) < 0) 1765 cpu_mmc_init(bis); 1766 1767 #ifndef CONFIG_SPL_BUILD 1768 print_mmc_devices(','); 1769 #endif 1770 1771 do_preinit(); 1772 return 0; 1773 } 1774 1775 #ifdef CONFIG_SUPPORT_EMMC_BOOT 1776 /* 1777 * This function changes the size of boot partition and the size of rpmb 1778 * partition present on EMMC devices. 1779 * 1780 * Input Parameters: 1781 * struct *mmc: pointer for the mmc device strcuture 1782 * bootsize: size of boot partition 1783 * rpmbsize: size of rpmb partition 1784 * 1785 * Returns 0 on success. 1786 */ 1787 1788 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, 1789 unsigned long rpmbsize) 1790 { 1791 int err; 1792 struct mmc_cmd cmd; 1793 1794 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */ 1795 cmd.cmdidx = MMC_CMD_RES_MAN; 1796 cmd.resp_type = MMC_RSP_R1b; 1797 cmd.cmdarg = MMC_CMD62_ARG1; 1798 1799 err = mmc_send_cmd(mmc, &cmd, NULL); 1800 if (err) { 1801 debug("mmc_boot_partition_size_change: Error1 = %d\n", err); 1802 return err; 1803 } 1804 1805 /* Boot partition changing mode */ 1806 cmd.cmdidx = MMC_CMD_RES_MAN; 1807 cmd.resp_type = MMC_RSP_R1b; 1808 cmd.cmdarg = MMC_CMD62_ARG2; 1809 1810 err = mmc_send_cmd(mmc, &cmd, NULL); 1811 if (err) { 1812 debug("mmc_boot_partition_size_change: Error2 = %d\n", err); 1813 return err; 1814 } 1815 /* boot partition size is multiple of 128KB */ 1816 bootsize = (bootsize * 1024) / 128; 1817 1818 /* Arg: boot partition size */ 1819 cmd.cmdidx = MMC_CMD_RES_MAN; 1820 cmd.resp_type = MMC_RSP_R1b; 1821 cmd.cmdarg = bootsize; 1822 1823 err = mmc_send_cmd(mmc, &cmd, NULL); 1824 if (err) { 1825 debug("mmc_boot_partition_size_change: Error3 = %d\n", err); 1826 return err; 1827 } 1828 /* RPMB partition size is multiple of 128KB */ 1829 rpmbsize = (rpmbsize * 1024) / 128; 1830 /* Arg: RPMB partition size */ 1831 cmd.cmdidx = MMC_CMD_RES_MAN; 1832 cmd.resp_type = MMC_RSP_R1b; 1833 cmd.cmdarg = rpmbsize; 1834 1835 err = mmc_send_cmd(mmc, &cmd, NULL); 1836 if (err) { 1837 debug("mmc_boot_partition_size_change: Error4 = %d\n", err); 1838 return err; 1839 } 1840 return 0; 1841 } 1842 1843 /* 1844 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH 1845 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH 1846 * and BOOT_MODE. 1847 * 1848 * Returns 0 on success. 1849 */ 1850 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode) 1851 { 1852 int err; 1853 1854 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH, 1855 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) | 1856 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) | 1857 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width)); 1858 1859 if (err) 1860 return err; 1861 return 0; 1862 } 1863 1864 /* 1865 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG) 1866 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and 1867 * PARTITION_ACCESS. 1868 * 1869 * Returns 0 on success. 1870 */ 1871 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access) 1872 { 1873 int err; 1874 1875 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, 1876 EXT_CSD_BOOT_ACK(ack) | 1877 EXT_CSD_BOOT_PART_NUM(part_num) | 1878 EXT_CSD_PARTITION_ACCESS(access)); 1879 1880 if (err) 1881 return err; 1882 return 0; 1883 } 1884 1885 /* 1886 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value 1887 * for enable. Note that this is a write-once field for non-zero values. 1888 * 1889 * Returns 0 on success. 1890 */ 1891 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable) 1892 { 1893 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION, 1894 enable); 1895 } 1896 #endif 1897