1272cc70bSAndy Fleming /* 2272cc70bSAndy Fleming * Copyright 2008, Freescale Semiconductor, Inc 3272cc70bSAndy Fleming * Andy Fleming 4272cc70bSAndy Fleming * 5272cc70bSAndy Fleming * Based vaguely on the Linux code 6272cc70bSAndy Fleming * 71a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 8272cc70bSAndy Fleming */ 9272cc70bSAndy Fleming 10272cc70bSAndy Fleming #include <config.h> 11272cc70bSAndy Fleming #include <common.h> 12272cc70bSAndy Fleming #include <command.h> 138e3332e2SSjoerd Simons #include <dm.h> 148e3332e2SSjoerd Simons #include <dm/device-internal.h> 15d4622df3SStephen Warren #include <errno.h> 16272cc70bSAndy Fleming #include <mmc.h> 17272cc70bSAndy Fleming #include <part.h> 18272cc70bSAndy Fleming #include <malloc.h> 19cf92e05cSSimon Glass #include <memalign.h> 20272cc70bSAndy Fleming #include <linux/list.h> 219b1f942cSRabin Vincent #include <div64.h> 22da61fa5fSPaul Burton #include "mmc_private.h" 23272cc70bSAndy Fleming 24*8ca51e51SSimon Glass #ifndef CONFIG_DM_MMC_OPS 25750121c3SJeroen Hofstee __weak int board_mmc_getwp(struct mmc *mmc) 26d23d8d7eSNikita Kiryanov { 27d23d8d7eSNikita Kiryanov return -1; 28d23d8d7eSNikita Kiryanov } 29d23d8d7eSNikita Kiryanov 30d23d8d7eSNikita Kiryanov int mmc_getwp(struct mmc *mmc) 31d23d8d7eSNikita Kiryanov { 32d23d8d7eSNikita Kiryanov int wp; 33d23d8d7eSNikita Kiryanov 34d23d8d7eSNikita Kiryanov wp = board_mmc_getwp(mmc); 35d23d8d7eSNikita Kiryanov 36d4e1da4eSPeter Korsgaard if (wp < 0) { 3793bfd616SPantelis Antoniou if (mmc->cfg->ops->getwp) 3893bfd616SPantelis Antoniou wp = mmc->cfg->ops->getwp(mmc); 39d4e1da4eSPeter Korsgaard else 40d4e1da4eSPeter Korsgaard wp = 0; 41d4e1da4eSPeter Korsgaard } 42d23d8d7eSNikita Kiryanov 43d23d8d7eSNikita Kiryanov return wp; 44d23d8d7eSNikita Kiryanov } 45d23d8d7eSNikita Kiryanov 46cee9ab7cSJeroen Hofstee __weak int board_mmc_getcd(struct mmc *mmc) 47cee9ab7cSJeroen Hofstee { 4811fdade2SStefano Babic return -1; 4911fdade2SStefano Babic } 50*8ca51e51SSimon Glass #endif 5111fdade2SStefano Babic 528635ff9eSMarek Vasut #ifdef CONFIG_MMC_TRACE 53c0c76ebaSSimon Glass void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd) 54c0c76ebaSSimon Glass { 55c0c76ebaSSimon Glass printf("CMD_SEND:%d\n", cmd->cmdidx); 56c0c76ebaSSimon Glass printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg); 57c0c76ebaSSimon Glass } 58c0c76ebaSSimon Glass 59c0c76ebaSSimon Glass void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret) 60c0c76ebaSSimon Glass { 615db2fe3aSRaffaele Recalcati int i; 625db2fe3aSRaffaele Recalcati u8 *ptr; 635db2fe3aSRaffaele Recalcati 647863ce58SBin Meng if (ret) { 657863ce58SBin Meng printf("\t\tRET\t\t\t %d\n", ret); 667863ce58SBin Meng } else { 675db2fe3aSRaffaele Recalcati switch (cmd->resp_type) { 685db2fe3aSRaffaele Recalcati case MMC_RSP_NONE: 695db2fe3aSRaffaele Recalcati printf("\t\tMMC_RSP_NONE\n"); 705db2fe3aSRaffaele Recalcati break; 715db2fe3aSRaffaele Recalcati case MMC_RSP_R1: 725db2fe3aSRaffaele Recalcati printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n", 735db2fe3aSRaffaele Recalcati cmd->response[0]); 745db2fe3aSRaffaele Recalcati break; 755db2fe3aSRaffaele Recalcati case MMC_RSP_R1b: 765db2fe3aSRaffaele Recalcati printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n", 775db2fe3aSRaffaele Recalcati cmd->response[0]); 785db2fe3aSRaffaele Recalcati break; 795db2fe3aSRaffaele Recalcati case MMC_RSP_R2: 805db2fe3aSRaffaele Recalcati printf("\t\tMMC_RSP_R2\t\t 0x%08X \n", 815db2fe3aSRaffaele Recalcati cmd->response[0]); 825db2fe3aSRaffaele Recalcati printf("\t\t \t\t 0x%08X \n", 835db2fe3aSRaffaele Recalcati cmd->response[1]); 845db2fe3aSRaffaele Recalcati printf("\t\t \t\t 0x%08X \n", 855db2fe3aSRaffaele Recalcati cmd->response[2]); 865db2fe3aSRaffaele Recalcati printf("\t\t \t\t 0x%08X \n", 875db2fe3aSRaffaele Recalcati cmd->response[3]); 885db2fe3aSRaffaele Recalcati printf("\n"); 895db2fe3aSRaffaele Recalcati printf("\t\t\t\t\tDUMPING DATA\n"); 905db2fe3aSRaffaele Recalcati for (i = 0; i < 4; i++) { 915db2fe3aSRaffaele Recalcati int j; 925db2fe3aSRaffaele Recalcati printf("\t\t\t\t\t%03d - ", i*4); 93146bec79SDirk Behme ptr = (u8 *)&cmd->response[i]; 945db2fe3aSRaffaele Recalcati ptr += 3; 955db2fe3aSRaffaele Recalcati for (j = 0; j < 4; j++) 965db2fe3aSRaffaele Recalcati printf("%02X ", *ptr--); 975db2fe3aSRaffaele Recalcati printf("\n"); 985db2fe3aSRaffaele Recalcati } 995db2fe3aSRaffaele Recalcati break; 1005db2fe3aSRaffaele Recalcati case MMC_RSP_R3: 1015db2fe3aSRaffaele Recalcati printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n", 1025db2fe3aSRaffaele Recalcati cmd->response[0]); 1035db2fe3aSRaffaele Recalcati break; 1045db2fe3aSRaffaele Recalcati default: 1055db2fe3aSRaffaele Recalcati printf("\t\tERROR MMC rsp not supported\n"); 1065db2fe3aSRaffaele Recalcati break; 1075db2fe3aSRaffaele Recalcati } 1087863ce58SBin Meng } 109c0c76ebaSSimon Glass } 110c0c76ebaSSimon Glass 111c0c76ebaSSimon Glass void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd) 112c0c76ebaSSimon Glass { 113c0c76ebaSSimon Glass int status; 114c0c76ebaSSimon Glass 115c0c76ebaSSimon Glass status = (cmd->response[0] & MMC_STATUS_CURR_STATE) >> 9; 116c0c76ebaSSimon Glass printf("CURR STATE:%d\n", status); 117c0c76ebaSSimon Glass } 1185db2fe3aSRaffaele Recalcati #endif 119c0c76ebaSSimon Glass 120*8ca51e51SSimon Glass #ifndef CONFIG_DM_MMC_OPS 121c0c76ebaSSimon Glass int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) 122c0c76ebaSSimon Glass { 123c0c76ebaSSimon Glass int ret; 124c0c76ebaSSimon Glass 125c0c76ebaSSimon Glass mmmc_trace_before_send(mmc, cmd); 126c0c76ebaSSimon Glass ret = mmc->cfg->ops->send_cmd(mmc, cmd, data); 127c0c76ebaSSimon Glass mmmc_trace_after_send(mmc, cmd, ret); 128c0c76ebaSSimon Glass 1298635ff9eSMarek Vasut return ret; 130272cc70bSAndy Fleming } 131*8ca51e51SSimon Glass #endif 132272cc70bSAndy Fleming 133da61fa5fSPaul Burton int mmc_send_status(struct mmc *mmc, int timeout) 1345d4fc8d9SRaffaele Recalcati { 1355d4fc8d9SRaffaele Recalcati struct mmc_cmd cmd; 136d617c426SJan Kloetzke int err, retries = 5; 1375d4fc8d9SRaffaele Recalcati 1385d4fc8d9SRaffaele Recalcati cmd.cmdidx = MMC_CMD_SEND_STATUS; 1395d4fc8d9SRaffaele Recalcati cmd.resp_type = MMC_RSP_R1; 140aaf3d41aSMarek Vasut if (!mmc_host_is_spi(mmc)) 141aaf3d41aSMarek Vasut cmd.cmdarg = mmc->rca << 16; 1425d4fc8d9SRaffaele Recalcati 1431677eef4SAndrew Gabbasov while (1) { 1445d4fc8d9SRaffaele Recalcati err = mmc_send_cmd(mmc, &cmd, NULL); 145d617c426SJan Kloetzke if (!err) { 146d617c426SJan Kloetzke if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) && 147d617c426SJan Kloetzke (cmd.response[0] & MMC_STATUS_CURR_STATE) != 148d617c426SJan Kloetzke MMC_STATE_PRG) 1495d4fc8d9SRaffaele Recalcati break; 150d617c426SJan Kloetzke else if (cmd.response[0] & MMC_STATUS_MASK) { 15156196826SPaul Burton #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 152d617c426SJan Kloetzke printf("Status Error: 0x%08X\n", 153d617c426SJan Kloetzke cmd.response[0]); 15456196826SPaul Burton #endif 155d617c426SJan Kloetzke return COMM_ERR; 156d617c426SJan Kloetzke } 157d617c426SJan Kloetzke } else if (--retries < 0) 158d617c426SJan Kloetzke return err; 1595d4fc8d9SRaffaele Recalcati 1601677eef4SAndrew Gabbasov if (timeout-- <= 0) 1611677eef4SAndrew Gabbasov break; 1625d4fc8d9SRaffaele Recalcati 1631677eef4SAndrew Gabbasov udelay(1000); 1641677eef4SAndrew Gabbasov } 1655d4fc8d9SRaffaele Recalcati 166c0c76ebaSSimon Glass mmc_trace_state(mmc, &cmd); 1675b0c942fSJongman Heo if (timeout <= 0) { 16856196826SPaul Burton #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1695d4fc8d9SRaffaele Recalcati printf("Timeout waiting card ready\n"); 17056196826SPaul Burton #endif 1715d4fc8d9SRaffaele Recalcati return TIMEOUT; 1725d4fc8d9SRaffaele Recalcati } 1735d4fc8d9SRaffaele Recalcati 1745d4fc8d9SRaffaele Recalcati return 0; 1755d4fc8d9SRaffaele Recalcati } 1765d4fc8d9SRaffaele Recalcati 177da61fa5fSPaul Burton int mmc_set_blocklen(struct mmc *mmc, int len) 178272cc70bSAndy Fleming { 179272cc70bSAndy Fleming struct mmc_cmd cmd; 180272cc70bSAndy Fleming 181786e8f81SAndrew Gabbasov if (mmc->ddr_mode) 182d22e3d46SJaehoon Chung return 0; 183d22e3d46SJaehoon Chung 184272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; 185272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 186272cc70bSAndy Fleming cmd.cmdarg = len; 187272cc70bSAndy Fleming 188272cc70bSAndy Fleming return mmc_send_cmd(mmc, &cmd, NULL); 189272cc70bSAndy Fleming } 190272cc70bSAndy Fleming 191ff8fef56SSascha Silbe static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start, 192fdbb873eSKim Phillips lbaint_t blkcnt) 193272cc70bSAndy Fleming { 194272cc70bSAndy Fleming struct mmc_cmd cmd; 195272cc70bSAndy Fleming struct mmc_data data; 196272cc70bSAndy Fleming 1974a1a06bcSAlagu Sankar if (blkcnt > 1) 1984a1a06bcSAlagu Sankar cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; 1994a1a06bcSAlagu Sankar else 200272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; 201272cc70bSAndy Fleming 202272cc70bSAndy Fleming if (mmc->high_capacity) 2034a1a06bcSAlagu Sankar cmd.cmdarg = start; 204272cc70bSAndy Fleming else 2054a1a06bcSAlagu Sankar cmd.cmdarg = start * mmc->read_bl_len; 206272cc70bSAndy Fleming 207272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 208272cc70bSAndy Fleming 209272cc70bSAndy Fleming data.dest = dst; 2104a1a06bcSAlagu Sankar data.blocks = blkcnt; 211272cc70bSAndy Fleming data.blocksize = mmc->read_bl_len; 212272cc70bSAndy Fleming data.flags = MMC_DATA_READ; 213272cc70bSAndy Fleming 2144a1a06bcSAlagu Sankar if (mmc_send_cmd(mmc, &cmd, &data)) 2154a1a06bcSAlagu Sankar return 0; 2164a1a06bcSAlagu Sankar 2174a1a06bcSAlagu Sankar if (blkcnt > 1) { 2184a1a06bcSAlagu Sankar cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; 2194a1a06bcSAlagu Sankar cmd.cmdarg = 0; 2204a1a06bcSAlagu Sankar cmd.resp_type = MMC_RSP_R1b; 2214a1a06bcSAlagu Sankar if (mmc_send_cmd(mmc, &cmd, NULL)) { 22256196826SPaul Burton #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 2234a1a06bcSAlagu Sankar printf("mmc fail to send stop cmd\n"); 22456196826SPaul Burton #endif 2254a1a06bcSAlagu Sankar return 0; 2264a1a06bcSAlagu Sankar } 227272cc70bSAndy Fleming } 228272cc70bSAndy Fleming 2294a1a06bcSAlagu Sankar return blkcnt; 230272cc70bSAndy Fleming } 231272cc70bSAndy Fleming 23233fb211dSSimon Glass #ifdef CONFIG_BLK 2337dba0b93SSimon Glass ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst) 23433fb211dSSimon Glass #else 2357dba0b93SSimon Glass ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt, 2367dba0b93SSimon Glass void *dst) 23733fb211dSSimon Glass #endif 238272cc70bSAndy Fleming { 23933fb211dSSimon Glass #ifdef CONFIG_BLK 24033fb211dSSimon Glass struct blk_desc *block_dev = dev_get_uclass_platdata(dev); 24133fb211dSSimon Glass #endif 242bcce53d0SSimon Glass int dev_num = block_dev->devnum; 243873cc1d7SStephen Warren int err; 2444a1a06bcSAlagu Sankar lbaint_t cur, blocks_todo = blkcnt; 245272cc70bSAndy Fleming 2464a1a06bcSAlagu Sankar if (blkcnt == 0) 2474a1a06bcSAlagu Sankar return 0; 2484a1a06bcSAlagu Sankar 2494a1a06bcSAlagu Sankar struct mmc *mmc = find_mmc_device(dev_num); 250272cc70bSAndy Fleming if (!mmc) 251272cc70bSAndy Fleming return 0; 252272cc70bSAndy Fleming 25369f45cd5SSimon Glass err = blk_dselect_hwpart(block_dev, block_dev->hwpart); 254873cc1d7SStephen Warren if (err < 0) 255873cc1d7SStephen Warren return 0; 256873cc1d7SStephen Warren 257c40fdca6SSimon Glass if ((start + blkcnt) > block_dev->lba) { 25856196826SPaul Burton #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 259ff8fef56SSascha Silbe printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n", 260c40fdca6SSimon Glass start + blkcnt, block_dev->lba); 26156196826SPaul Burton #endif 262d2bf29e3SLei Wen return 0; 263d2bf29e3SLei Wen } 264272cc70bSAndy Fleming 26511692991SSimon Glass if (mmc_set_blocklen(mmc, mmc->read_bl_len)) { 26611692991SSimon Glass debug("%s: Failed to set blocklen\n", __func__); 267272cc70bSAndy Fleming return 0; 26811692991SSimon Glass } 269272cc70bSAndy Fleming 2704a1a06bcSAlagu Sankar do { 27193bfd616SPantelis Antoniou cur = (blocks_todo > mmc->cfg->b_max) ? 27293bfd616SPantelis Antoniou mmc->cfg->b_max : blocks_todo; 27311692991SSimon Glass if (mmc_read_blocks(mmc, dst, start, cur) != cur) { 27411692991SSimon Glass debug("%s: Failed to read blocks\n", __func__); 2754a1a06bcSAlagu Sankar return 0; 27611692991SSimon Glass } 2774a1a06bcSAlagu Sankar blocks_todo -= cur; 2784a1a06bcSAlagu Sankar start += cur; 2794a1a06bcSAlagu Sankar dst += cur * mmc->read_bl_len; 2804a1a06bcSAlagu Sankar } while (blocks_todo > 0); 281272cc70bSAndy Fleming 282272cc70bSAndy Fleming return blkcnt; 283272cc70bSAndy Fleming } 284272cc70bSAndy Fleming 285fdbb873eSKim Phillips static int mmc_go_idle(struct mmc *mmc) 286272cc70bSAndy Fleming { 287272cc70bSAndy Fleming struct mmc_cmd cmd; 288272cc70bSAndy Fleming int err; 289272cc70bSAndy Fleming 290272cc70bSAndy Fleming udelay(1000); 291272cc70bSAndy Fleming 292272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; 293272cc70bSAndy Fleming cmd.cmdarg = 0; 294272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_NONE; 295272cc70bSAndy Fleming 296272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 297272cc70bSAndy Fleming 298272cc70bSAndy Fleming if (err) 299272cc70bSAndy Fleming return err; 300272cc70bSAndy Fleming 301272cc70bSAndy Fleming udelay(2000); 302272cc70bSAndy Fleming 303272cc70bSAndy Fleming return 0; 304272cc70bSAndy Fleming } 305272cc70bSAndy Fleming 306fdbb873eSKim Phillips static int sd_send_op_cond(struct mmc *mmc) 307272cc70bSAndy Fleming { 308272cc70bSAndy Fleming int timeout = 1000; 309272cc70bSAndy Fleming int err; 310272cc70bSAndy Fleming struct mmc_cmd cmd; 311272cc70bSAndy Fleming 3121677eef4SAndrew Gabbasov while (1) { 313272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_APP_CMD; 314272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 315272cc70bSAndy Fleming cmd.cmdarg = 0; 316272cc70bSAndy Fleming 317272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 318272cc70bSAndy Fleming 319272cc70bSAndy Fleming if (err) 320272cc70bSAndy Fleming return err; 321272cc70bSAndy Fleming 322272cc70bSAndy Fleming cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; 323272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R3; 324250de12bSStefano Babic 325250de12bSStefano Babic /* 326250de12bSStefano Babic * Most cards do not answer if some reserved bits 327250de12bSStefano Babic * in the ocr are set. However, Some controller 328250de12bSStefano Babic * can set bit 7 (reserved for low voltages), but 329250de12bSStefano Babic * how to manage low voltages SD card is not yet 330250de12bSStefano Babic * specified. 331250de12bSStefano Babic */ 332d52ebf10SThomas Chou cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 : 33393bfd616SPantelis Antoniou (mmc->cfg->voltages & 0xff8000); 334272cc70bSAndy Fleming 335272cc70bSAndy Fleming if (mmc->version == SD_VERSION_2) 336272cc70bSAndy Fleming cmd.cmdarg |= OCR_HCS; 337272cc70bSAndy Fleming 338272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 339272cc70bSAndy Fleming 340272cc70bSAndy Fleming if (err) 341272cc70bSAndy Fleming return err; 342272cc70bSAndy Fleming 3431677eef4SAndrew Gabbasov if (cmd.response[0] & OCR_BUSY) 3441677eef4SAndrew Gabbasov break; 345272cc70bSAndy Fleming 3461677eef4SAndrew Gabbasov if (timeout-- <= 0) 347272cc70bSAndy Fleming return UNUSABLE_ERR; 348272cc70bSAndy Fleming 3491677eef4SAndrew Gabbasov udelay(1000); 3501677eef4SAndrew Gabbasov } 3511677eef4SAndrew Gabbasov 352272cc70bSAndy Fleming if (mmc->version != SD_VERSION_2) 353272cc70bSAndy Fleming mmc->version = SD_VERSION_1_0; 354272cc70bSAndy Fleming 355d52ebf10SThomas Chou if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ 356d52ebf10SThomas Chou cmd.cmdidx = MMC_CMD_SPI_READ_OCR; 357d52ebf10SThomas Chou cmd.resp_type = MMC_RSP_R3; 358d52ebf10SThomas Chou cmd.cmdarg = 0; 359d52ebf10SThomas Chou 360d52ebf10SThomas Chou err = mmc_send_cmd(mmc, &cmd, NULL); 361d52ebf10SThomas Chou 362d52ebf10SThomas Chou if (err) 363d52ebf10SThomas Chou return err; 364d52ebf10SThomas Chou } 365d52ebf10SThomas Chou 366998be3ddSRabin Vincent mmc->ocr = cmd.response[0]; 367272cc70bSAndy Fleming 368272cc70bSAndy Fleming mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); 369272cc70bSAndy Fleming mmc->rca = 0; 370272cc70bSAndy Fleming 371272cc70bSAndy Fleming return 0; 372272cc70bSAndy Fleming } 373272cc70bSAndy Fleming 3745289b535SAndrew Gabbasov static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg) 375272cc70bSAndy Fleming { 3765289b535SAndrew Gabbasov struct mmc_cmd cmd; 377272cc70bSAndy Fleming int err; 378272cc70bSAndy Fleming 3795289b535SAndrew Gabbasov cmd.cmdidx = MMC_CMD_SEND_OP_COND; 3805289b535SAndrew Gabbasov cmd.resp_type = MMC_RSP_R3; 3815289b535SAndrew Gabbasov cmd.cmdarg = 0; 3825a20397bSRob Herring if (use_arg && !mmc_host_is_spi(mmc)) 3835a20397bSRob Herring cmd.cmdarg = OCR_HCS | 38493bfd616SPantelis Antoniou (mmc->cfg->voltages & 385a626c8d4SAndrew Gabbasov (mmc->ocr & OCR_VOLTAGE_MASK)) | 386a626c8d4SAndrew Gabbasov (mmc->ocr & OCR_ACCESS_MODE); 387e9550449SChe-Liang Chiou 3885289b535SAndrew Gabbasov err = mmc_send_cmd(mmc, &cmd, NULL); 389e9550449SChe-Liang Chiou if (err) 390e9550449SChe-Liang Chiou return err; 3915289b535SAndrew Gabbasov mmc->ocr = cmd.response[0]; 392e9550449SChe-Liang Chiou return 0; 393e9550449SChe-Liang Chiou } 394e9550449SChe-Liang Chiou 395750121c3SJeroen Hofstee static int mmc_send_op_cond(struct mmc *mmc) 396e9550449SChe-Liang Chiou { 397e9550449SChe-Liang Chiou int err, i; 398e9550449SChe-Liang Chiou 399272cc70bSAndy Fleming /* Some cards seem to need this */ 400272cc70bSAndy Fleming mmc_go_idle(mmc); 401272cc70bSAndy Fleming 40231cacbabSRaffaele Recalcati /* Asking to the card its capabilities */ 403e9550449SChe-Liang Chiou for (i = 0; i < 2; i++) { 4045289b535SAndrew Gabbasov err = mmc_send_op_cond_iter(mmc, i != 0); 40531cacbabSRaffaele Recalcati if (err) 40631cacbabSRaffaele Recalcati return err; 40731cacbabSRaffaele Recalcati 408e9550449SChe-Liang Chiou /* exit if not busy (flag seems to be inverted) */ 409a626c8d4SAndrew Gabbasov if (mmc->ocr & OCR_BUSY) 410bd47c135SAndrew Gabbasov break; 411e9550449SChe-Liang Chiou } 412bd47c135SAndrew Gabbasov mmc->op_cond_pending = 1; 413bd47c135SAndrew Gabbasov return 0; 414e9550449SChe-Liang Chiou } 41531cacbabSRaffaele Recalcati 416750121c3SJeroen Hofstee static int mmc_complete_op_cond(struct mmc *mmc) 417e9550449SChe-Liang Chiou { 418e9550449SChe-Liang Chiou struct mmc_cmd cmd; 419e9550449SChe-Liang Chiou int timeout = 1000; 420e9550449SChe-Liang Chiou uint start; 421e9550449SChe-Liang Chiou int err; 422e9550449SChe-Liang Chiou 423e9550449SChe-Liang Chiou mmc->op_cond_pending = 0; 424cc17c01fSAndrew Gabbasov if (!(mmc->ocr & OCR_BUSY)) { 425e9550449SChe-Liang Chiou start = get_timer(0); 4261677eef4SAndrew Gabbasov while (1) { 4275289b535SAndrew Gabbasov err = mmc_send_op_cond_iter(mmc, 1); 428272cc70bSAndy Fleming if (err) 429272cc70bSAndy Fleming return err; 4301677eef4SAndrew Gabbasov if (mmc->ocr & OCR_BUSY) 4311677eef4SAndrew Gabbasov break; 432e9550449SChe-Liang Chiou if (get_timer(start) > timeout) 433272cc70bSAndy Fleming return UNUSABLE_ERR; 434e9550449SChe-Liang Chiou udelay(100); 4351677eef4SAndrew Gabbasov } 436cc17c01fSAndrew Gabbasov } 437272cc70bSAndy Fleming 438d52ebf10SThomas Chou if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ 439d52ebf10SThomas Chou cmd.cmdidx = MMC_CMD_SPI_READ_OCR; 440d52ebf10SThomas Chou cmd.resp_type = MMC_RSP_R3; 441d52ebf10SThomas Chou cmd.cmdarg = 0; 442d52ebf10SThomas Chou 443d52ebf10SThomas Chou err = mmc_send_cmd(mmc, &cmd, NULL); 444d52ebf10SThomas Chou 445d52ebf10SThomas Chou if (err) 446d52ebf10SThomas Chou return err; 447a626c8d4SAndrew Gabbasov 448a626c8d4SAndrew Gabbasov mmc->ocr = cmd.response[0]; 449d52ebf10SThomas Chou } 450d52ebf10SThomas Chou 451272cc70bSAndy Fleming mmc->version = MMC_VERSION_UNKNOWN; 452272cc70bSAndy Fleming 453272cc70bSAndy Fleming mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); 454def816a2SStephen Warren mmc->rca = 1; 455272cc70bSAndy Fleming 456272cc70bSAndy Fleming return 0; 457272cc70bSAndy Fleming } 458272cc70bSAndy Fleming 459272cc70bSAndy Fleming 460fdbb873eSKim Phillips static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd) 461272cc70bSAndy Fleming { 462272cc70bSAndy Fleming struct mmc_cmd cmd; 463272cc70bSAndy Fleming struct mmc_data data; 464272cc70bSAndy Fleming int err; 465272cc70bSAndy Fleming 466272cc70bSAndy Fleming /* Get the Card Status Register */ 467272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; 468272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 469272cc70bSAndy Fleming cmd.cmdarg = 0; 470272cc70bSAndy Fleming 471cdfd1ac6SYoshihiro Shimoda data.dest = (char *)ext_csd; 472272cc70bSAndy Fleming data.blocks = 1; 4738bfa195eSSimon Glass data.blocksize = MMC_MAX_BLOCK_LEN; 474272cc70bSAndy Fleming data.flags = MMC_DATA_READ; 475272cc70bSAndy Fleming 476272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, &data); 477272cc70bSAndy Fleming 478272cc70bSAndy Fleming return err; 479272cc70bSAndy Fleming } 480272cc70bSAndy Fleming 481c40704f4SSimon Glass int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) 482272cc70bSAndy Fleming { 483272cc70bSAndy Fleming struct mmc_cmd cmd; 4845d4fc8d9SRaffaele Recalcati int timeout = 1000; 4855d4fc8d9SRaffaele Recalcati int ret; 486272cc70bSAndy Fleming 487272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_SWITCH; 488272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1b; 489272cc70bSAndy Fleming cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | 490272cc70bSAndy Fleming (index << 16) | 491272cc70bSAndy Fleming (value << 8); 492272cc70bSAndy Fleming 4935d4fc8d9SRaffaele Recalcati ret = mmc_send_cmd(mmc, &cmd, NULL); 4945d4fc8d9SRaffaele Recalcati 4955d4fc8d9SRaffaele Recalcati /* Waiting for the ready status */ 49693ad0d18SJan Kloetzke if (!ret) 49793ad0d18SJan Kloetzke ret = mmc_send_status(mmc, timeout); 4985d4fc8d9SRaffaele Recalcati 4995d4fc8d9SRaffaele Recalcati return ret; 5005d4fc8d9SRaffaele Recalcati 501272cc70bSAndy Fleming } 502272cc70bSAndy Fleming 503fdbb873eSKim Phillips static int mmc_change_freq(struct mmc *mmc) 504272cc70bSAndy Fleming { 5058bfa195eSSimon Glass ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 506272cc70bSAndy Fleming char cardtype; 507272cc70bSAndy Fleming int err; 508272cc70bSAndy Fleming 509fc5b32fbSAndrew Gabbasov mmc->card_caps = 0; 510272cc70bSAndy Fleming 511d52ebf10SThomas Chou if (mmc_host_is_spi(mmc)) 512d52ebf10SThomas Chou return 0; 513d52ebf10SThomas Chou 514272cc70bSAndy Fleming /* Only version 4 supports high-speed */ 515272cc70bSAndy Fleming if (mmc->version < MMC_VERSION_4) 516272cc70bSAndy Fleming return 0; 517272cc70bSAndy Fleming 518fc5b32fbSAndrew Gabbasov mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT; 519fc5b32fbSAndrew Gabbasov 520272cc70bSAndy Fleming err = mmc_send_ext_csd(mmc, ext_csd); 521272cc70bSAndy Fleming 522272cc70bSAndy Fleming if (err) 523272cc70bSAndy Fleming return err; 524272cc70bSAndy Fleming 5250560db18SLei Wen cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf; 526272cc70bSAndy Fleming 527272cc70bSAndy Fleming err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); 528272cc70bSAndy Fleming 529272cc70bSAndy Fleming if (err) 530a5e27b41SHeiko Schocher return err; 531272cc70bSAndy Fleming 532272cc70bSAndy Fleming /* Now check to see that it worked */ 533272cc70bSAndy Fleming err = mmc_send_ext_csd(mmc, ext_csd); 534272cc70bSAndy Fleming 535272cc70bSAndy Fleming if (err) 536272cc70bSAndy Fleming return err; 537272cc70bSAndy Fleming 538272cc70bSAndy Fleming /* No high-speed support */ 5390560db18SLei Wen if (!ext_csd[EXT_CSD_HS_TIMING]) 540272cc70bSAndy Fleming return 0; 541272cc70bSAndy Fleming 542272cc70bSAndy Fleming /* High Speed is set, there are two types: 52MHz and 26MHz */ 543d22e3d46SJaehoon Chung if (cardtype & EXT_CSD_CARD_TYPE_52) { 544201d5ac4SAndrew Gabbasov if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V) 545d22e3d46SJaehoon Chung mmc->card_caps |= MMC_MODE_DDR_52MHz; 546272cc70bSAndy Fleming mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; 547d22e3d46SJaehoon Chung } else { 548272cc70bSAndy Fleming mmc->card_caps |= MMC_MODE_HS; 549d22e3d46SJaehoon Chung } 550272cc70bSAndy Fleming 551272cc70bSAndy Fleming return 0; 552272cc70bSAndy Fleming } 553272cc70bSAndy Fleming 554f866a46dSStephen Warren static int mmc_set_capacity(struct mmc *mmc, int part_num) 555f866a46dSStephen Warren { 556f866a46dSStephen Warren switch (part_num) { 557f866a46dSStephen Warren case 0: 558f866a46dSStephen Warren mmc->capacity = mmc->capacity_user; 559f866a46dSStephen Warren break; 560f866a46dSStephen Warren case 1: 561f866a46dSStephen Warren case 2: 562f866a46dSStephen Warren mmc->capacity = mmc->capacity_boot; 563f866a46dSStephen Warren break; 564f866a46dSStephen Warren case 3: 565f866a46dSStephen Warren mmc->capacity = mmc->capacity_rpmb; 566f866a46dSStephen Warren break; 567f866a46dSStephen Warren case 4: 568f866a46dSStephen Warren case 5: 569f866a46dSStephen Warren case 6: 570f866a46dSStephen Warren case 7: 571f866a46dSStephen Warren mmc->capacity = mmc->capacity_gp[part_num - 4]; 572f866a46dSStephen Warren break; 573f866a46dSStephen Warren default: 574f866a46dSStephen Warren return -1; 575f866a46dSStephen Warren } 576f866a46dSStephen Warren 577c40fdca6SSimon Glass mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len); 578f866a46dSStephen Warren 579f866a46dSStephen Warren return 0; 580f866a46dSStephen Warren } 581f866a46dSStephen Warren 5827dba0b93SSimon Glass int mmc_switch_part(struct mmc *mmc, unsigned int part_num) 583bc897b1dSLei Wen { 584f866a46dSStephen Warren int ret; 585bc897b1dSLei Wen 586f866a46dSStephen Warren ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, 587bc897b1dSLei Wen (mmc->part_config & ~PART_ACCESS_MASK) 588bc897b1dSLei Wen | (part_num & PART_ACCESS_MASK)); 589f866a46dSStephen Warren 5906dc93e70SPeter Bigot /* 5916dc93e70SPeter Bigot * Set the capacity if the switch succeeded or was intended 5926dc93e70SPeter Bigot * to return to representing the raw device. 5936dc93e70SPeter Bigot */ 594873cc1d7SStephen Warren if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) { 5956dc93e70SPeter Bigot ret = mmc_set_capacity(mmc, part_num); 596fdbb139fSSimon Glass mmc_get_blk_desc(mmc)->hwpart = part_num; 597873cc1d7SStephen Warren } 5986dc93e70SPeter Bigot 5996dc93e70SPeter Bigot return ret; 600bc897b1dSLei Wen } 601bc897b1dSLei Wen 602ac9da0e0SDiego Santa Cruz int mmc_hwpart_config(struct mmc *mmc, 603ac9da0e0SDiego Santa Cruz const struct mmc_hwpart_conf *conf, 604ac9da0e0SDiego Santa Cruz enum mmc_hwpart_conf_mode mode) 605ac9da0e0SDiego Santa Cruz { 606ac9da0e0SDiego Santa Cruz u8 part_attrs = 0; 607ac9da0e0SDiego Santa Cruz u32 enh_size_mult; 608ac9da0e0SDiego Santa Cruz u32 enh_start_addr; 609ac9da0e0SDiego Santa Cruz u32 gp_size_mult[4]; 610ac9da0e0SDiego Santa Cruz u32 max_enh_size_mult; 611ac9da0e0SDiego Santa Cruz u32 tot_enh_size_mult = 0; 6128dda5b0eSDiego Santa Cruz u8 wr_rel_set; 613ac9da0e0SDiego Santa Cruz int i, pidx, err; 614ac9da0e0SDiego Santa Cruz ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 615ac9da0e0SDiego Santa Cruz 616ac9da0e0SDiego Santa Cruz if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE) 617ac9da0e0SDiego Santa Cruz return -EINVAL; 618ac9da0e0SDiego Santa Cruz 619ac9da0e0SDiego Santa Cruz if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) { 620ac9da0e0SDiego Santa Cruz printf("eMMC >= 4.4 required for enhanced user data area\n"); 621ac9da0e0SDiego Santa Cruz return -EMEDIUMTYPE; 622ac9da0e0SDiego Santa Cruz } 623ac9da0e0SDiego Santa Cruz 624ac9da0e0SDiego Santa Cruz if (!(mmc->part_support & PART_SUPPORT)) { 625ac9da0e0SDiego Santa Cruz printf("Card does not support partitioning\n"); 626ac9da0e0SDiego Santa Cruz return -EMEDIUMTYPE; 627ac9da0e0SDiego Santa Cruz } 628ac9da0e0SDiego Santa Cruz 629ac9da0e0SDiego Santa Cruz if (!mmc->hc_wp_grp_size) { 630ac9da0e0SDiego Santa Cruz printf("Card does not define HC WP group size\n"); 631ac9da0e0SDiego Santa Cruz return -EMEDIUMTYPE; 632ac9da0e0SDiego Santa Cruz } 633ac9da0e0SDiego Santa Cruz 634ac9da0e0SDiego Santa Cruz /* check partition alignment and total enhanced size */ 635ac9da0e0SDiego Santa Cruz if (conf->user.enh_size) { 636ac9da0e0SDiego Santa Cruz if (conf->user.enh_size % mmc->hc_wp_grp_size || 637ac9da0e0SDiego Santa Cruz conf->user.enh_start % mmc->hc_wp_grp_size) { 638ac9da0e0SDiego Santa Cruz printf("User data enhanced area not HC WP group " 639ac9da0e0SDiego Santa Cruz "size aligned\n"); 640ac9da0e0SDiego Santa Cruz return -EINVAL; 641ac9da0e0SDiego Santa Cruz } 642ac9da0e0SDiego Santa Cruz part_attrs |= EXT_CSD_ENH_USR; 643ac9da0e0SDiego Santa Cruz enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size; 644ac9da0e0SDiego Santa Cruz if (mmc->high_capacity) { 645ac9da0e0SDiego Santa Cruz enh_start_addr = conf->user.enh_start; 646ac9da0e0SDiego Santa Cruz } else { 647ac9da0e0SDiego Santa Cruz enh_start_addr = (conf->user.enh_start << 9); 648ac9da0e0SDiego Santa Cruz } 649ac9da0e0SDiego Santa Cruz } else { 650ac9da0e0SDiego Santa Cruz enh_size_mult = 0; 651ac9da0e0SDiego Santa Cruz enh_start_addr = 0; 652ac9da0e0SDiego Santa Cruz } 653ac9da0e0SDiego Santa Cruz tot_enh_size_mult += enh_size_mult; 654ac9da0e0SDiego Santa Cruz 655ac9da0e0SDiego Santa Cruz for (pidx = 0; pidx < 4; pidx++) { 656ac9da0e0SDiego Santa Cruz if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) { 657ac9da0e0SDiego Santa Cruz printf("GP%i partition not HC WP group size " 658ac9da0e0SDiego Santa Cruz "aligned\n", pidx+1); 659ac9da0e0SDiego Santa Cruz return -EINVAL; 660ac9da0e0SDiego Santa Cruz } 661ac9da0e0SDiego Santa Cruz gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size; 662ac9da0e0SDiego Santa Cruz if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) { 663ac9da0e0SDiego Santa Cruz part_attrs |= EXT_CSD_ENH_GP(pidx); 664ac9da0e0SDiego Santa Cruz tot_enh_size_mult += gp_size_mult[pidx]; 665ac9da0e0SDiego Santa Cruz } 666ac9da0e0SDiego Santa Cruz } 667ac9da0e0SDiego Santa Cruz 668ac9da0e0SDiego Santa Cruz if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) { 669ac9da0e0SDiego Santa Cruz printf("Card does not support enhanced attribute\n"); 670ac9da0e0SDiego Santa Cruz return -EMEDIUMTYPE; 671ac9da0e0SDiego Santa Cruz } 672ac9da0e0SDiego Santa Cruz 673ac9da0e0SDiego Santa Cruz err = mmc_send_ext_csd(mmc, ext_csd); 674ac9da0e0SDiego Santa Cruz if (err) 675ac9da0e0SDiego Santa Cruz return err; 676ac9da0e0SDiego Santa Cruz 677ac9da0e0SDiego Santa Cruz max_enh_size_mult = 678ac9da0e0SDiego Santa Cruz (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) + 679ac9da0e0SDiego Santa Cruz (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) + 680ac9da0e0SDiego Santa Cruz ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT]; 681ac9da0e0SDiego Santa Cruz if (tot_enh_size_mult > max_enh_size_mult) { 682ac9da0e0SDiego Santa Cruz printf("Total enhanced size exceeds maximum (%u > %u)\n", 683ac9da0e0SDiego Santa Cruz tot_enh_size_mult, max_enh_size_mult); 684ac9da0e0SDiego Santa Cruz return -EMEDIUMTYPE; 685ac9da0e0SDiego Santa Cruz } 686ac9da0e0SDiego Santa Cruz 6878dda5b0eSDiego Santa Cruz /* The default value of EXT_CSD_WR_REL_SET is device 6888dda5b0eSDiego Santa Cruz * dependent, the values can only be changed if the 6898dda5b0eSDiego Santa Cruz * EXT_CSD_HS_CTRL_REL bit is set. The values can be 6908dda5b0eSDiego Santa Cruz * changed only once and before partitioning is completed. */ 6918dda5b0eSDiego Santa Cruz wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET]; 6928dda5b0eSDiego Santa Cruz if (conf->user.wr_rel_change) { 6938dda5b0eSDiego Santa Cruz if (conf->user.wr_rel_set) 6948dda5b0eSDiego Santa Cruz wr_rel_set |= EXT_CSD_WR_DATA_REL_USR; 6958dda5b0eSDiego Santa Cruz else 6968dda5b0eSDiego Santa Cruz wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR; 6978dda5b0eSDiego Santa Cruz } 6988dda5b0eSDiego Santa Cruz for (pidx = 0; pidx < 4; pidx++) { 6998dda5b0eSDiego Santa Cruz if (conf->gp_part[pidx].wr_rel_change) { 7008dda5b0eSDiego Santa Cruz if (conf->gp_part[pidx].wr_rel_set) 7018dda5b0eSDiego Santa Cruz wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx); 7028dda5b0eSDiego Santa Cruz else 7038dda5b0eSDiego Santa Cruz wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx); 7048dda5b0eSDiego Santa Cruz } 7058dda5b0eSDiego Santa Cruz } 7068dda5b0eSDiego Santa Cruz 7078dda5b0eSDiego Santa Cruz if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] && 7088dda5b0eSDiego Santa Cruz !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) { 7098dda5b0eSDiego Santa Cruz puts("Card does not support host controlled partition write " 7108dda5b0eSDiego Santa Cruz "reliability settings\n"); 7118dda5b0eSDiego Santa Cruz return -EMEDIUMTYPE; 7128dda5b0eSDiego Santa Cruz } 7138dda5b0eSDiego Santa Cruz 714ac9da0e0SDiego Santa Cruz if (ext_csd[EXT_CSD_PARTITION_SETTING] & 715ac9da0e0SDiego Santa Cruz EXT_CSD_PARTITION_SETTING_COMPLETED) { 716ac9da0e0SDiego Santa Cruz printf("Card already partitioned\n"); 717ac9da0e0SDiego Santa Cruz return -EPERM; 718ac9da0e0SDiego Santa Cruz } 719ac9da0e0SDiego Santa Cruz 720ac9da0e0SDiego Santa Cruz if (mode == MMC_HWPART_CONF_CHECK) 721ac9da0e0SDiego Santa Cruz return 0; 722ac9da0e0SDiego Santa Cruz 723ac9da0e0SDiego Santa Cruz /* Partitioning requires high-capacity size definitions */ 724ac9da0e0SDiego Santa Cruz if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) { 725ac9da0e0SDiego Santa Cruz err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 726ac9da0e0SDiego Santa Cruz EXT_CSD_ERASE_GROUP_DEF, 1); 727ac9da0e0SDiego Santa Cruz 728ac9da0e0SDiego Santa Cruz if (err) 729ac9da0e0SDiego Santa Cruz return err; 730ac9da0e0SDiego Santa Cruz 731ac9da0e0SDiego Santa Cruz ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1; 732ac9da0e0SDiego Santa Cruz 733ac9da0e0SDiego Santa Cruz /* update erase group size to be high-capacity */ 734ac9da0e0SDiego Santa Cruz mmc->erase_grp_size = 735ac9da0e0SDiego Santa Cruz ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024; 736ac9da0e0SDiego Santa Cruz 737ac9da0e0SDiego Santa Cruz } 738ac9da0e0SDiego Santa Cruz 739ac9da0e0SDiego Santa Cruz /* all OK, write the configuration */ 740ac9da0e0SDiego Santa Cruz for (i = 0; i < 4; i++) { 741ac9da0e0SDiego Santa Cruz err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 742ac9da0e0SDiego Santa Cruz EXT_CSD_ENH_START_ADDR+i, 743ac9da0e0SDiego Santa Cruz (enh_start_addr >> (i*8)) & 0xFF); 744ac9da0e0SDiego Santa Cruz if (err) 745ac9da0e0SDiego Santa Cruz return err; 746ac9da0e0SDiego Santa Cruz } 747ac9da0e0SDiego Santa Cruz for (i = 0; i < 3; i++) { 748ac9da0e0SDiego Santa Cruz err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 749ac9da0e0SDiego Santa Cruz EXT_CSD_ENH_SIZE_MULT+i, 750ac9da0e0SDiego Santa Cruz (enh_size_mult >> (i*8)) & 0xFF); 751ac9da0e0SDiego Santa Cruz if (err) 752ac9da0e0SDiego Santa Cruz return err; 753ac9da0e0SDiego Santa Cruz } 754ac9da0e0SDiego Santa Cruz for (pidx = 0; pidx < 4; pidx++) { 755ac9da0e0SDiego Santa Cruz for (i = 0; i < 3; i++) { 756ac9da0e0SDiego Santa Cruz err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 757ac9da0e0SDiego Santa Cruz EXT_CSD_GP_SIZE_MULT+pidx*3+i, 758ac9da0e0SDiego Santa Cruz (gp_size_mult[pidx] >> (i*8)) & 0xFF); 759ac9da0e0SDiego Santa Cruz if (err) 760ac9da0e0SDiego Santa Cruz return err; 761ac9da0e0SDiego Santa Cruz } 762ac9da0e0SDiego Santa Cruz } 763ac9da0e0SDiego Santa Cruz err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 764ac9da0e0SDiego Santa Cruz EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs); 765ac9da0e0SDiego Santa Cruz if (err) 766ac9da0e0SDiego Santa Cruz return err; 767ac9da0e0SDiego Santa Cruz 768ac9da0e0SDiego Santa Cruz if (mode == MMC_HWPART_CONF_SET) 769ac9da0e0SDiego Santa Cruz return 0; 770ac9da0e0SDiego Santa Cruz 7718dda5b0eSDiego Santa Cruz /* The WR_REL_SET is a write-once register but shall be 7728dda5b0eSDiego Santa Cruz * written before setting PART_SETTING_COMPLETED. As it is 7738dda5b0eSDiego Santa Cruz * write-once we can only write it when completing the 7748dda5b0eSDiego Santa Cruz * partitioning. */ 7758dda5b0eSDiego Santa Cruz if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) { 7768dda5b0eSDiego Santa Cruz err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 7778dda5b0eSDiego Santa Cruz EXT_CSD_WR_REL_SET, wr_rel_set); 7788dda5b0eSDiego Santa Cruz if (err) 7798dda5b0eSDiego Santa Cruz return err; 7808dda5b0eSDiego Santa Cruz } 7818dda5b0eSDiego Santa Cruz 782ac9da0e0SDiego Santa Cruz /* Setting PART_SETTING_COMPLETED confirms the partition 783ac9da0e0SDiego Santa Cruz * configuration but it only becomes effective after power 784ac9da0e0SDiego Santa Cruz * cycle, so we do not adjust the partition related settings 785ac9da0e0SDiego Santa Cruz * in the mmc struct. */ 786ac9da0e0SDiego Santa Cruz 787ac9da0e0SDiego Santa Cruz err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 788ac9da0e0SDiego Santa Cruz EXT_CSD_PARTITION_SETTING, 789ac9da0e0SDiego Santa Cruz EXT_CSD_PARTITION_SETTING_COMPLETED); 790ac9da0e0SDiego Santa Cruz if (err) 791ac9da0e0SDiego Santa Cruz return err; 792ac9da0e0SDiego Santa Cruz 793ac9da0e0SDiego Santa Cruz return 0; 794ac9da0e0SDiego Santa Cruz } 795ac9da0e0SDiego Santa Cruz 796*8ca51e51SSimon Glass #ifndef CONFIG_DM_MMC_OPS 79748972d90SThierry Reding int mmc_getcd(struct mmc *mmc) 79848972d90SThierry Reding { 79948972d90SThierry Reding int cd; 80048972d90SThierry Reding 80148972d90SThierry Reding cd = board_mmc_getcd(mmc); 80248972d90SThierry Reding 803d4e1da4eSPeter Korsgaard if (cd < 0) { 80493bfd616SPantelis Antoniou if (mmc->cfg->ops->getcd) 80593bfd616SPantelis Antoniou cd = mmc->cfg->ops->getcd(mmc); 806d4e1da4eSPeter Korsgaard else 807d4e1da4eSPeter Korsgaard cd = 1; 808d4e1da4eSPeter Korsgaard } 80948972d90SThierry Reding 81048972d90SThierry Reding return cd; 81148972d90SThierry Reding } 812*8ca51e51SSimon Glass #endif 81348972d90SThierry Reding 814fdbb873eSKim Phillips static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) 815272cc70bSAndy Fleming { 816272cc70bSAndy Fleming struct mmc_cmd cmd; 817272cc70bSAndy Fleming struct mmc_data data; 818272cc70bSAndy Fleming 819272cc70bSAndy Fleming /* Switch the frequency */ 820272cc70bSAndy Fleming cmd.cmdidx = SD_CMD_SWITCH_FUNC; 821272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 822272cc70bSAndy Fleming cmd.cmdarg = (mode << 31) | 0xffffff; 823272cc70bSAndy Fleming cmd.cmdarg &= ~(0xf << (group * 4)); 824272cc70bSAndy Fleming cmd.cmdarg |= value << (group * 4); 825272cc70bSAndy Fleming 826272cc70bSAndy Fleming data.dest = (char *)resp; 827272cc70bSAndy Fleming data.blocksize = 64; 828272cc70bSAndy Fleming data.blocks = 1; 829272cc70bSAndy Fleming data.flags = MMC_DATA_READ; 830272cc70bSAndy Fleming 831272cc70bSAndy Fleming return mmc_send_cmd(mmc, &cmd, &data); 832272cc70bSAndy Fleming } 833272cc70bSAndy Fleming 834272cc70bSAndy Fleming 835fdbb873eSKim Phillips static int sd_change_freq(struct mmc *mmc) 836272cc70bSAndy Fleming { 837272cc70bSAndy Fleming int err; 838272cc70bSAndy Fleming struct mmc_cmd cmd; 839f781dd38SAnton staaf ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2); 840f781dd38SAnton staaf ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16); 841272cc70bSAndy Fleming struct mmc_data data; 842272cc70bSAndy Fleming int timeout; 843272cc70bSAndy Fleming 844272cc70bSAndy Fleming mmc->card_caps = 0; 845272cc70bSAndy Fleming 846d52ebf10SThomas Chou if (mmc_host_is_spi(mmc)) 847d52ebf10SThomas Chou return 0; 848d52ebf10SThomas Chou 849272cc70bSAndy Fleming /* Read the SCR to find out if this card supports higher speeds */ 850272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_APP_CMD; 851272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 852272cc70bSAndy Fleming cmd.cmdarg = mmc->rca << 16; 853272cc70bSAndy Fleming 854272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 855272cc70bSAndy Fleming 856272cc70bSAndy Fleming if (err) 857272cc70bSAndy Fleming return err; 858272cc70bSAndy Fleming 859272cc70bSAndy Fleming cmd.cmdidx = SD_CMD_APP_SEND_SCR; 860272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 861272cc70bSAndy Fleming cmd.cmdarg = 0; 862272cc70bSAndy Fleming 863272cc70bSAndy Fleming timeout = 3; 864272cc70bSAndy Fleming 865272cc70bSAndy Fleming retry_scr: 866f781dd38SAnton staaf data.dest = (char *)scr; 867272cc70bSAndy Fleming data.blocksize = 8; 868272cc70bSAndy Fleming data.blocks = 1; 869272cc70bSAndy Fleming data.flags = MMC_DATA_READ; 870272cc70bSAndy Fleming 871272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, &data); 872272cc70bSAndy Fleming 873272cc70bSAndy Fleming if (err) { 874272cc70bSAndy Fleming if (timeout--) 875272cc70bSAndy Fleming goto retry_scr; 876272cc70bSAndy Fleming 877272cc70bSAndy Fleming return err; 878272cc70bSAndy Fleming } 879272cc70bSAndy Fleming 8804e3d89baSYauhen Kharuzhy mmc->scr[0] = __be32_to_cpu(scr[0]); 8814e3d89baSYauhen Kharuzhy mmc->scr[1] = __be32_to_cpu(scr[1]); 882272cc70bSAndy Fleming 883272cc70bSAndy Fleming switch ((mmc->scr[0] >> 24) & 0xf) { 884272cc70bSAndy Fleming case 0: 885272cc70bSAndy Fleming mmc->version = SD_VERSION_1_0; 886272cc70bSAndy Fleming break; 887272cc70bSAndy Fleming case 1: 888272cc70bSAndy Fleming mmc->version = SD_VERSION_1_10; 889272cc70bSAndy Fleming break; 890272cc70bSAndy Fleming case 2: 891272cc70bSAndy Fleming mmc->version = SD_VERSION_2; 8921741c64dSJaehoon Chung if ((mmc->scr[0] >> 15) & 0x1) 8931741c64dSJaehoon Chung mmc->version = SD_VERSION_3; 894272cc70bSAndy Fleming break; 895272cc70bSAndy Fleming default: 896272cc70bSAndy Fleming mmc->version = SD_VERSION_1_0; 897272cc70bSAndy Fleming break; 898272cc70bSAndy Fleming } 899272cc70bSAndy Fleming 900b44c7083SAlagu Sankar if (mmc->scr[0] & SD_DATA_4BIT) 901b44c7083SAlagu Sankar mmc->card_caps |= MMC_MODE_4BIT; 902b44c7083SAlagu Sankar 903272cc70bSAndy Fleming /* Version 1.0 doesn't support switching */ 904272cc70bSAndy Fleming if (mmc->version == SD_VERSION_1_0) 905272cc70bSAndy Fleming return 0; 906272cc70bSAndy Fleming 907272cc70bSAndy Fleming timeout = 4; 908272cc70bSAndy Fleming while (timeout--) { 909272cc70bSAndy Fleming err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, 910f781dd38SAnton staaf (u8 *)switch_status); 911272cc70bSAndy Fleming 912272cc70bSAndy Fleming if (err) 913272cc70bSAndy Fleming return err; 914272cc70bSAndy Fleming 915272cc70bSAndy Fleming /* The high-speed function is busy. Try again */ 9164e3d89baSYauhen Kharuzhy if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY)) 917272cc70bSAndy Fleming break; 918272cc70bSAndy Fleming } 919272cc70bSAndy Fleming 920272cc70bSAndy Fleming /* If high-speed isn't supported, we return */ 9214e3d89baSYauhen Kharuzhy if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)) 922272cc70bSAndy Fleming return 0; 923272cc70bSAndy Fleming 9242c3fbf4cSMacpaul Lin /* 9252c3fbf4cSMacpaul Lin * If the host doesn't support SD_HIGHSPEED, do not switch card to 9262c3fbf4cSMacpaul Lin * HIGHSPEED mode even if the card support SD_HIGHSPPED. 9272c3fbf4cSMacpaul Lin * This can avoid furthur problem when the card runs in different 9282c3fbf4cSMacpaul Lin * mode between the host. 9292c3fbf4cSMacpaul Lin */ 93093bfd616SPantelis Antoniou if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) && 93193bfd616SPantelis Antoniou (mmc->cfg->host_caps & MMC_MODE_HS))) 9322c3fbf4cSMacpaul Lin return 0; 9332c3fbf4cSMacpaul Lin 934f781dd38SAnton staaf err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status); 935272cc70bSAndy Fleming 936272cc70bSAndy Fleming if (err) 937272cc70bSAndy Fleming return err; 938272cc70bSAndy Fleming 9394e3d89baSYauhen Kharuzhy if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000) 940272cc70bSAndy Fleming mmc->card_caps |= MMC_MODE_HS; 941272cc70bSAndy Fleming 942272cc70bSAndy Fleming return 0; 943272cc70bSAndy Fleming } 944272cc70bSAndy Fleming 945272cc70bSAndy Fleming /* frequency bases */ 946272cc70bSAndy Fleming /* divided by 10 to be nice to platforms without floating point */ 9475f837c2cSMike Frysinger static const int fbase[] = { 948272cc70bSAndy Fleming 10000, 949272cc70bSAndy Fleming 100000, 950272cc70bSAndy Fleming 1000000, 951272cc70bSAndy Fleming 10000000, 952272cc70bSAndy Fleming }; 953272cc70bSAndy Fleming 954272cc70bSAndy Fleming /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice 955272cc70bSAndy Fleming * to platforms without floating point. 956272cc70bSAndy Fleming */ 95761fe076fSSimon Glass static const u8 multipliers[] = { 958272cc70bSAndy Fleming 0, /* reserved */ 959272cc70bSAndy Fleming 10, 960272cc70bSAndy Fleming 12, 961272cc70bSAndy Fleming 13, 962272cc70bSAndy Fleming 15, 963272cc70bSAndy Fleming 20, 964272cc70bSAndy Fleming 25, 965272cc70bSAndy Fleming 30, 966272cc70bSAndy Fleming 35, 967272cc70bSAndy Fleming 40, 968272cc70bSAndy Fleming 45, 969272cc70bSAndy Fleming 50, 970272cc70bSAndy Fleming 55, 971272cc70bSAndy Fleming 60, 972272cc70bSAndy Fleming 70, 973272cc70bSAndy Fleming 80, 974272cc70bSAndy Fleming }; 975272cc70bSAndy Fleming 976*8ca51e51SSimon Glass #ifndef CONFIG_DM_MMC_OPS 977fdbb873eSKim Phillips static void mmc_set_ios(struct mmc *mmc) 978272cc70bSAndy Fleming { 97993bfd616SPantelis Antoniou if (mmc->cfg->ops->set_ios) 98093bfd616SPantelis Antoniou mmc->cfg->ops->set_ios(mmc); 981272cc70bSAndy Fleming } 982*8ca51e51SSimon Glass #endif 983272cc70bSAndy Fleming 984272cc70bSAndy Fleming void mmc_set_clock(struct mmc *mmc, uint clock) 985272cc70bSAndy Fleming { 98693bfd616SPantelis Antoniou if (clock > mmc->cfg->f_max) 98793bfd616SPantelis Antoniou clock = mmc->cfg->f_max; 988272cc70bSAndy Fleming 98993bfd616SPantelis Antoniou if (clock < mmc->cfg->f_min) 99093bfd616SPantelis Antoniou clock = mmc->cfg->f_min; 991272cc70bSAndy Fleming 992272cc70bSAndy Fleming mmc->clock = clock; 993272cc70bSAndy Fleming 994272cc70bSAndy Fleming mmc_set_ios(mmc); 995272cc70bSAndy Fleming } 996272cc70bSAndy Fleming 997fdbb873eSKim Phillips static void mmc_set_bus_width(struct mmc *mmc, uint width) 998272cc70bSAndy Fleming { 999272cc70bSAndy Fleming mmc->bus_width = width; 1000272cc70bSAndy Fleming 1001272cc70bSAndy Fleming mmc_set_ios(mmc); 1002272cc70bSAndy Fleming } 1003272cc70bSAndy Fleming 1004fdbb873eSKim Phillips static int mmc_startup(struct mmc *mmc) 1005272cc70bSAndy Fleming { 1006f866a46dSStephen Warren int err, i; 1007272cc70bSAndy Fleming uint mult, freq; 1008639b7827SYoshihiro Shimoda u64 cmult, csize, capacity; 1009272cc70bSAndy Fleming struct mmc_cmd cmd; 10108bfa195eSSimon Glass ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 10118bfa195eSSimon Glass ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN); 10125d4fc8d9SRaffaele Recalcati int timeout = 1000; 10130c453bb7SDiego Santa Cruz bool has_parts = false; 10148a0cf490SDiego Santa Cruz bool part_completed; 1015c40fdca6SSimon Glass struct blk_desc *bdesc; 1016272cc70bSAndy Fleming 1017d52ebf10SThomas Chou #ifdef CONFIG_MMC_SPI_CRC_ON 1018d52ebf10SThomas Chou if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */ 1019d52ebf10SThomas Chou cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF; 1020d52ebf10SThomas Chou cmd.resp_type = MMC_RSP_R1; 1021d52ebf10SThomas Chou cmd.cmdarg = 1; 1022d52ebf10SThomas Chou err = mmc_send_cmd(mmc, &cmd, NULL); 1023d52ebf10SThomas Chou 1024d52ebf10SThomas Chou if (err) 1025d52ebf10SThomas Chou return err; 1026d52ebf10SThomas Chou } 1027d52ebf10SThomas Chou #endif 1028d52ebf10SThomas Chou 1029272cc70bSAndy Fleming /* Put the Card in Identify Mode */ 1030d52ebf10SThomas Chou cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID : 1031d52ebf10SThomas Chou MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */ 1032272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R2; 1033272cc70bSAndy Fleming cmd.cmdarg = 0; 1034272cc70bSAndy Fleming 1035272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 1036272cc70bSAndy Fleming 1037272cc70bSAndy Fleming if (err) 1038272cc70bSAndy Fleming return err; 1039272cc70bSAndy Fleming 1040272cc70bSAndy Fleming memcpy(mmc->cid, cmd.response, 16); 1041272cc70bSAndy Fleming 1042272cc70bSAndy Fleming /* 1043272cc70bSAndy Fleming * For MMC cards, set the Relative Address. 1044272cc70bSAndy Fleming * For SD cards, get the Relatvie Address. 1045272cc70bSAndy Fleming * This also puts the cards into Standby State 1046272cc70bSAndy Fleming */ 1047d52ebf10SThomas Chou if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ 1048272cc70bSAndy Fleming cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; 1049272cc70bSAndy Fleming cmd.cmdarg = mmc->rca << 16; 1050272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R6; 1051272cc70bSAndy Fleming 1052272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 1053272cc70bSAndy Fleming 1054272cc70bSAndy Fleming if (err) 1055272cc70bSAndy Fleming return err; 1056272cc70bSAndy Fleming 1057272cc70bSAndy Fleming if (IS_SD(mmc)) 1058998be3ddSRabin Vincent mmc->rca = (cmd.response[0] >> 16) & 0xffff; 1059d52ebf10SThomas Chou } 1060272cc70bSAndy Fleming 1061272cc70bSAndy Fleming /* Get the Card-Specific Data */ 1062272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_SEND_CSD; 1063272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R2; 1064272cc70bSAndy Fleming cmd.cmdarg = mmc->rca << 16; 1065272cc70bSAndy Fleming 1066272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 1067272cc70bSAndy Fleming 10685d4fc8d9SRaffaele Recalcati /* Waiting for the ready status */ 10695d4fc8d9SRaffaele Recalcati mmc_send_status(mmc, timeout); 10705d4fc8d9SRaffaele Recalcati 1071272cc70bSAndy Fleming if (err) 1072272cc70bSAndy Fleming return err; 1073272cc70bSAndy Fleming 1074998be3ddSRabin Vincent mmc->csd[0] = cmd.response[0]; 1075998be3ddSRabin Vincent mmc->csd[1] = cmd.response[1]; 1076998be3ddSRabin Vincent mmc->csd[2] = cmd.response[2]; 1077998be3ddSRabin Vincent mmc->csd[3] = cmd.response[3]; 1078272cc70bSAndy Fleming 1079272cc70bSAndy Fleming if (mmc->version == MMC_VERSION_UNKNOWN) { 10800b453ffeSRabin Vincent int version = (cmd.response[0] >> 26) & 0xf; 1081272cc70bSAndy Fleming 1082272cc70bSAndy Fleming switch (version) { 1083272cc70bSAndy Fleming case 0: 1084272cc70bSAndy Fleming mmc->version = MMC_VERSION_1_2; 1085272cc70bSAndy Fleming break; 1086272cc70bSAndy Fleming case 1: 1087272cc70bSAndy Fleming mmc->version = MMC_VERSION_1_4; 1088272cc70bSAndy Fleming break; 1089272cc70bSAndy Fleming case 2: 1090272cc70bSAndy Fleming mmc->version = MMC_VERSION_2_2; 1091272cc70bSAndy Fleming break; 1092272cc70bSAndy Fleming case 3: 1093272cc70bSAndy Fleming mmc->version = MMC_VERSION_3; 1094272cc70bSAndy Fleming break; 1095272cc70bSAndy Fleming case 4: 1096272cc70bSAndy Fleming mmc->version = MMC_VERSION_4; 1097272cc70bSAndy Fleming break; 1098272cc70bSAndy Fleming default: 1099272cc70bSAndy Fleming mmc->version = MMC_VERSION_1_2; 1100272cc70bSAndy Fleming break; 1101272cc70bSAndy Fleming } 1102272cc70bSAndy Fleming } 1103272cc70bSAndy Fleming 1104272cc70bSAndy Fleming /* divide frequency by 10, since the mults are 10x bigger */ 11050b453ffeSRabin Vincent freq = fbase[(cmd.response[0] & 0x7)]; 11060b453ffeSRabin Vincent mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; 1107272cc70bSAndy Fleming 1108272cc70bSAndy Fleming mmc->tran_speed = freq * mult; 1109272cc70bSAndy Fleming 1110ab71188cSMarkus Niebel mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1); 1111998be3ddSRabin Vincent mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); 1112272cc70bSAndy Fleming 1113272cc70bSAndy Fleming if (IS_SD(mmc)) 1114272cc70bSAndy Fleming mmc->write_bl_len = mmc->read_bl_len; 1115272cc70bSAndy Fleming else 1116998be3ddSRabin Vincent mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); 1117272cc70bSAndy Fleming 1118272cc70bSAndy Fleming if (mmc->high_capacity) { 1119272cc70bSAndy Fleming csize = (mmc->csd[1] & 0x3f) << 16 1120272cc70bSAndy Fleming | (mmc->csd[2] & 0xffff0000) >> 16; 1121272cc70bSAndy Fleming cmult = 8; 1122272cc70bSAndy Fleming } else { 1123272cc70bSAndy Fleming csize = (mmc->csd[1] & 0x3ff) << 2 1124272cc70bSAndy Fleming | (mmc->csd[2] & 0xc0000000) >> 30; 1125272cc70bSAndy Fleming cmult = (mmc->csd[2] & 0x00038000) >> 15; 1126272cc70bSAndy Fleming } 1127272cc70bSAndy Fleming 1128f866a46dSStephen Warren mmc->capacity_user = (csize + 1) << (cmult + 2); 1129f866a46dSStephen Warren mmc->capacity_user *= mmc->read_bl_len; 1130f866a46dSStephen Warren mmc->capacity_boot = 0; 1131f866a46dSStephen Warren mmc->capacity_rpmb = 0; 1132f866a46dSStephen Warren for (i = 0; i < 4; i++) 1133f866a46dSStephen Warren mmc->capacity_gp[i] = 0; 1134272cc70bSAndy Fleming 11358bfa195eSSimon Glass if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN) 11368bfa195eSSimon Glass mmc->read_bl_len = MMC_MAX_BLOCK_LEN; 1137272cc70bSAndy Fleming 11388bfa195eSSimon Glass if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN) 11398bfa195eSSimon Glass mmc->write_bl_len = MMC_MAX_BLOCK_LEN; 1140272cc70bSAndy Fleming 1141ab71188cSMarkus Niebel if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) { 1142ab71188cSMarkus Niebel cmd.cmdidx = MMC_CMD_SET_DSR; 1143ab71188cSMarkus Niebel cmd.cmdarg = (mmc->dsr & 0xffff) << 16; 1144ab71188cSMarkus Niebel cmd.resp_type = MMC_RSP_NONE; 1145ab71188cSMarkus Niebel if (mmc_send_cmd(mmc, &cmd, NULL)) 1146ab71188cSMarkus Niebel printf("MMC: SET_DSR failed\n"); 1147ab71188cSMarkus Niebel } 1148ab71188cSMarkus Niebel 1149272cc70bSAndy Fleming /* Select the card, and put it into Transfer Mode */ 1150d52ebf10SThomas Chou if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ 1151272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_SELECT_CARD; 1152fe8f7066SAjay Bhargav cmd.resp_type = MMC_RSP_R1; 1153272cc70bSAndy Fleming cmd.cmdarg = mmc->rca << 16; 1154272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 1155272cc70bSAndy Fleming 1156272cc70bSAndy Fleming if (err) 1157272cc70bSAndy Fleming return err; 1158d52ebf10SThomas Chou } 1159272cc70bSAndy Fleming 1160e6f99a56SLei Wen /* 1161e6f99a56SLei Wen * For SD, its erase group is always one sector 1162e6f99a56SLei Wen */ 1163e6f99a56SLei Wen mmc->erase_grp_size = 1; 1164bc897b1dSLei Wen mmc->part_config = MMCPART_NOAVAILABLE; 1165d23e2c09SSukumar Ghorai if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) { 1166d23e2c09SSukumar Ghorai /* check ext_csd version and capacity */ 1167d23e2c09SSukumar Ghorai err = mmc_send_ext_csd(mmc, ext_csd); 11689cf199ebSDiego Santa Cruz if (err) 11699cf199ebSDiego Santa Cruz return err; 11709cf199ebSDiego Santa Cruz if (ext_csd[EXT_CSD_REV] >= 2) { 1171639b7827SYoshihiro Shimoda /* 1172639b7827SYoshihiro Shimoda * According to the JEDEC Standard, the value of 1173639b7827SYoshihiro Shimoda * ext_csd's capacity is valid if the value is more 1174639b7827SYoshihiro Shimoda * than 2GB 1175639b7827SYoshihiro Shimoda */ 11760560db18SLei Wen capacity = ext_csd[EXT_CSD_SEC_CNT] << 0 11770560db18SLei Wen | ext_csd[EXT_CSD_SEC_CNT + 1] << 8 11780560db18SLei Wen | ext_csd[EXT_CSD_SEC_CNT + 2] << 16 11790560db18SLei Wen | ext_csd[EXT_CSD_SEC_CNT + 3] << 24; 11808bfa195eSSimon Glass capacity *= MMC_MAX_BLOCK_LEN; 1181b1f1e821SŁukasz Majewski if ((capacity >> 20) > 2 * 1024) 1182f866a46dSStephen Warren mmc->capacity_user = capacity; 1183d23e2c09SSukumar Ghorai } 1184bc897b1dSLei Wen 118564f4a619SJaehoon Chung switch (ext_csd[EXT_CSD_REV]) { 118664f4a619SJaehoon Chung case 1: 118764f4a619SJaehoon Chung mmc->version = MMC_VERSION_4_1; 118864f4a619SJaehoon Chung break; 118964f4a619SJaehoon Chung case 2: 119064f4a619SJaehoon Chung mmc->version = MMC_VERSION_4_2; 119164f4a619SJaehoon Chung break; 119264f4a619SJaehoon Chung case 3: 119364f4a619SJaehoon Chung mmc->version = MMC_VERSION_4_3; 119464f4a619SJaehoon Chung break; 119564f4a619SJaehoon Chung case 5: 119664f4a619SJaehoon Chung mmc->version = MMC_VERSION_4_41; 119764f4a619SJaehoon Chung break; 119864f4a619SJaehoon Chung case 6: 119964f4a619SJaehoon Chung mmc->version = MMC_VERSION_4_5; 120064f4a619SJaehoon Chung break; 1201edab723bSMarkus Niebel case 7: 1202edab723bSMarkus Niebel mmc->version = MMC_VERSION_5_0; 1203edab723bSMarkus Niebel break; 12041a3619cfSStefan Wahren case 8: 12051a3619cfSStefan Wahren mmc->version = MMC_VERSION_5_1; 12061a3619cfSStefan Wahren break; 120764f4a619SJaehoon Chung } 120864f4a619SJaehoon Chung 12098a0cf490SDiego Santa Cruz /* The partition data may be non-zero but it is only 12108a0cf490SDiego Santa Cruz * effective if PARTITION_SETTING_COMPLETED is set in 12118a0cf490SDiego Santa Cruz * EXT_CSD, so ignore any data if this bit is not set, 12128a0cf490SDiego Santa Cruz * except for enabling the high-capacity group size 12138a0cf490SDiego Santa Cruz * definition (see below). */ 12148a0cf490SDiego Santa Cruz part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] & 12158a0cf490SDiego Santa Cruz EXT_CSD_PARTITION_SETTING_COMPLETED); 12168a0cf490SDiego Santa Cruz 12170c453bb7SDiego Santa Cruz /* store the partition info of emmc */ 12180c453bb7SDiego Santa Cruz mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT]; 12190c453bb7SDiego Santa Cruz if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) || 12200c453bb7SDiego Santa Cruz ext_csd[EXT_CSD_BOOT_MULT]) 12210c453bb7SDiego Santa Cruz mmc->part_config = ext_csd[EXT_CSD_PART_CONF]; 12228a0cf490SDiego Santa Cruz if (part_completed && 12238a0cf490SDiego Santa Cruz (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT)) 12240c453bb7SDiego Santa Cruz mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE]; 12250c453bb7SDiego Santa Cruz 12260c453bb7SDiego Santa Cruz mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17; 12270c453bb7SDiego Santa Cruz 12280c453bb7SDiego Santa Cruz mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17; 12290c453bb7SDiego Santa Cruz 12300c453bb7SDiego Santa Cruz for (i = 0; i < 4; i++) { 12310c453bb7SDiego Santa Cruz int idx = EXT_CSD_GP_SIZE_MULT + i * 3; 12328a0cf490SDiego Santa Cruz uint mult = (ext_csd[idx + 2] << 16) + 12330c453bb7SDiego Santa Cruz (ext_csd[idx + 1] << 8) + ext_csd[idx]; 12348a0cf490SDiego Santa Cruz if (mult) 12358a0cf490SDiego Santa Cruz has_parts = true; 12368a0cf490SDiego Santa Cruz if (!part_completed) 12378a0cf490SDiego Santa Cruz continue; 12388a0cf490SDiego Santa Cruz mmc->capacity_gp[i] = mult; 12390c453bb7SDiego Santa Cruz mmc->capacity_gp[i] *= 12400c453bb7SDiego Santa Cruz ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; 12410c453bb7SDiego Santa Cruz mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1242f8e89d67SDiego Santa Cruz mmc->capacity_gp[i] <<= 19; 12430c453bb7SDiego Santa Cruz } 12440c453bb7SDiego Santa Cruz 12458a0cf490SDiego Santa Cruz if (part_completed) { 1246a7f852b6SDiego Santa Cruz mmc->enh_user_size = 1247a7f852b6SDiego Santa Cruz (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) + 1248a7f852b6SDiego Santa Cruz (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) + 1249a7f852b6SDiego Santa Cruz ext_csd[EXT_CSD_ENH_SIZE_MULT]; 1250a7f852b6SDiego Santa Cruz mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; 1251a7f852b6SDiego Santa Cruz mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1252a7f852b6SDiego Santa Cruz mmc->enh_user_size <<= 19; 1253a7f852b6SDiego Santa Cruz mmc->enh_user_start = 1254a7f852b6SDiego Santa Cruz (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) + 1255a7f852b6SDiego Santa Cruz (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) + 1256a7f852b6SDiego Santa Cruz (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) + 1257a7f852b6SDiego Santa Cruz ext_csd[EXT_CSD_ENH_START_ADDR]; 1258a7f852b6SDiego Santa Cruz if (mmc->high_capacity) 1259a7f852b6SDiego Santa Cruz mmc->enh_user_start <<= 9; 12608a0cf490SDiego Santa Cruz } 1261a7f852b6SDiego Santa Cruz 1262e6f99a56SLei Wen /* 12631937e5aaSOliver Metz * Host needs to enable ERASE_GRP_DEF bit if device is 12641937e5aaSOliver Metz * partitioned. This bit will be lost every time after a reset 12651937e5aaSOliver Metz * or power off. This will affect erase size. 1266e6f99a56SLei Wen */ 12678a0cf490SDiego Santa Cruz if (part_completed) 12680c453bb7SDiego Santa Cruz has_parts = true; 12691937e5aaSOliver Metz if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) && 12700c453bb7SDiego Santa Cruz (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) 12710c453bb7SDiego Santa Cruz has_parts = true; 12720c453bb7SDiego Santa Cruz if (has_parts) { 12731937e5aaSOliver Metz err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 12741937e5aaSOliver Metz EXT_CSD_ERASE_GROUP_DEF, 1); 12751937e5aaSOliver Metz 12761937e5aaSOliver Metz if (err) 12771937e5aaSOliver Metz return err; 1278021a8055SHannes Petermaier else 1279021a8055SHannes Petermaier ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1; 1280037dc0abSDiego Santa Cruz } 12811937e5aaSOliver Metz 1282037dc0abSDiego Santa Cruz if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) { 12831937e5aaSOliver Metz /* Read out group size from ext_csd */ 12840560db18SLei Wen mmc->erase_grp_size = 1285a4ff9f83SDiego Santa Cruz ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024; 1286d7b29129SMarkus Niebel /* 1287d7b29129SMarkus Niebel * if high capacity and partition setting completed 1288d7b29129SMarkus Niebel * SEC_COUNT is valid even if it is smaller than 2 GiB 1289d7b29129SMarkus Niebel * JEDEC Standard JESD84-B45, 6.2.4 1290d7b29129SMarkus Niebel */ 12918a0cf490SDiego Santa Cruz if (mmc->high_capacity && part_completed) { 1292d7b29129SMarkus Niebel capacity = (ext_csd[EXT_CSD_SEC_CNT]) | 1293d7b29129SMarkus Niebel (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) | 1294d7b29129SMarkus Niebel (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) | 1295d7b29129SMarkus Niebel (ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 1296d7b29129SMarkus Niebel capacity *= MMC_MAX_BLOCK_LEN; 1297d7b29129SMarkus Niebel mmc->capacity_user = capacity; 1298d7b29129SMarkus Niebel } 12998bfa195eSSimon Glass } else { 13001937e5aaSOliver Metz /* Calculate the group size from the csd value. */ 1301e6f99a56SLei Wen int erase_gsz, erase_gmul; 1302e6f99a56SLei Wen erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10; 1303e6f99a56SLei Wen erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5; 1304e6f99a56SLei Wen mmc->erase_grp_size = (erase_gsz + 1) 1305e6f99a56SLei Wen * (erase_gmul + 1); 1306e6f99a56SLei Wen } 1307037dc0abSDiego Santa Cruz 1308037dc0abSDiego Santa Cruz mmc->hc_wp_grp_size = 1024 1309037dc0abSDiego Santa Cruz * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] 1310037dc0abSDiego Santa Cruz * ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 13119e41a00bSDiego Santa Cruz 13129e41a00bSDiego Santa Cruz mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET]; 1313f866a46dSStephen Warren } 1314f866a46dSStephen Warren 1315c40fdca6SSimon Glass err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart); 1316f866a46dSStephen Warren if (err) 1317f866a46dSStephen Warren return err; 1318d23e2c09SSukumar Ghorai 1319272cc70bSAndy Fleming if (IS_SD(mmc)) 1320272cc70bSAndy Fleming err = sd_change_freq(mmc); 1321272cc70bSAndy Fleming else 1322272cc70bSAndy Fleming err = mmc_change_freq(mmc); 1323272cc70bSAndy Fleming 1324272cc70bSAndy Fleming if (err) 1325272cc70bSAndy Fleming return err; 1326272cc70bSAndy Fleming 1327272cc70bSAndy Fleming /* Restrict card's capabilities by what the host can do */ 132893bfd616SPantelis Antoniou mmc->card_caps &= mmc->cfg->host_caps; 1329272cc70bSAndy Fleming 1330272cc70bSAndy Fleming if (IS_SD(mmc)) { 1331272cc70bSAndy Fleming if (mmc->card_caps & MMC_MODE_4BIT) { 1332272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_APP_CMD; 1333272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 1334272cc70bSAndy Fleming cmd.cmdarg = mmc->rca << 16; 1335272cc70bSAndy Fleming 1336272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 1337272cc70bSAndy Fleming if (err) 1338272cc70bSAndy Fleming return err; 1339272cc70bSAndy Fleming 1340272cc70bSAndy Fleming cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; 1341272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 1342272cc70bSAndy Fleming cmd.cmdarg = 2; 1343272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 1344272cc70bSAndy Fleming if (err) 1345272cc70bSAndy Fleming return err; 1346272cc70bSAndy Fleming 1347272cc70bSAndy Fleming mmc_set_bus_width(mmc, 4); 1348272cc70bSAndy Fleming } 1349272cc70bSAndy Fleming 1350272cc70bSAndy Fleming if (mmc->card_caps & MMC_MODE_HS) 1351ad5fd922SJaehoon Chung mmc->tran_speed = 50000000; 1352272cc70bSAndy Fleming else 1353ad5fd922SJaehoon Chung mmc->tran_speed = 25000000; 1354fc5b32fbSAndrew Gabbasov } else if (mmc->version >= MMC_VERSION_4) { 1355fc5b32fbSAndrew Gabbasov /* Only version 4 of MMC supports wider bus widths */ 13567798f6dbSAndy Fleming int idx; 13577798f6dbSAndy Fleming 13587798f6dbSAndy Fleming /* An array of possible bus widths in order of preference */ 13597798f6dbSAndy Fleming static unsigned ext_csd_bits[] = { 1360d22e3d46SJaehoon Chung EXT_CSD_DDR_BUS_WIDTH_8, 1361d22e3d46SJaehoon Chung EXT_CSD_DDR_BUS_WIDTH_4, 13627798f6dbSAndy Fleming EXT_CSD_BUS_WIDTH_8, 13637798f6dbSAndy Fleming EXT_CSD_BUS_WIDTH_4, 13647798f6dbSAndy Fleming EXT_CSD_BUS_WIDTH_1, 13657798f6dbSAndy Fleming }; 13667798f6dbSAndy Fleming 13677798f6dbSAndy Fleming /* An array to map CSD bus widths to host cap bits */ 13687798f6dbSAndy Fleming static unsigned ext_to_hostcaps[] = { 1369786e8f81SAndrew Gabbasov [EXT_CSD_DDR_BUS_WIDTH_4] = 1370786e8f81SAndrew Gabbasov MMC_MODE_DDR_52MHz | MMC_MODE_4BIT, 1371786e8f81SAndrew Gabbasov [EXT_CSD_DDR_BUS_WIDTH_8] = 1372786e8f81SAndrew Gabbasov MMC_MODE_DDR_52MHz | MMC_MODE_8BIT, 13737798f6dbSAndy Fleming [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT, 13747798f6dbSAndy Fleming [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT, 13757798f6dbSAndy Fleming }; 13767798f6dbSAndy Fleming 13777798f6dbSAndy Fleming /* An array to map chosen bus width to an integer */ 13787798f6dbSAndy Fleming static unsigned widths[] = { 1379d22e3d46SJaehoon Chung 8, 4, 8, 4, 1, 13807798f6dbSAndy Fleming }; 13817798f6dbSAndy Fleming 13827798f6dbSAndy Fleming for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) { 13837798f6dbSAndy Fleming unsigned int extw = ext_csd_bits[idx]; 1384786e8f81SAndrew Gabbasov unsigned int caps = ext_to_hostcaps[extw]; 13857798f6dbSAndy Fleming 13867798f6dbSAndy Fleming /* 1387bf477073SAndrew Gabbasov * If the bus width is still not changed, 1388bf477073SAndrew Gabbasov * don't try to set the default again. 1389bf477073SAndrew Gabbasov * Otherwise, recover from switch attempts 1390bf477073SAndrew Gabbasov * by switching to 1-bit bus width. 1391bf477073SAndrew Gabbasov */ 1392bf477073SAndrew Gabbasov if (extw == EXT_CSD_BUS_WIDTH_1 && 1393bf477073SAndrew Gabbasov mmc->bus_width == 1) { 1394bf477073SAndrew Gabbasov err = 0; 1395bf477073SAndrew Gabbasov break; 1396bf477073SAndrew Gabbasov } 1397bf477073SAndrew Gabbasov 1398bf477073SAndrew Gabbasov /* 1399786e8f81SAndrew Gabbasov * Check to make sure the card and controller support 1400786e8f81SAndrew Gabbasov * these capabilities 14017798f6dbSAndy Fleming */ 1402786e8f81SAndrew Gabbasov if ((mmc->card_caps & caps) != caps) 14037798f6dbSAndy Fleming continue; 14047798f6dbSAndy Fleming 1405272cc70bSAndy Fleming err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 14067798f6dbSAndy Fleming EXT_CSD_BUS_WIDTH, extw); 1407272cc70bSAndy Fleming 1408272cc70bSAndy Fleming if (err) 14094137894eSLei Wen continue; 1410272cc70bSAndy Fleming 1411786e8f81SAndrew Gabbasov mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0; 14127798f6dbSAndy Fleming mmc_set_bus_width(mmc, widths[idx]); 1413272cc70bSAndy Fleming 14144137894eSLei Wen err = mmc_send_ext_csd(mmc, test_csd); 1415272cc70bSAndy Fleming 1416786e8f81SAndrew Gabbasov if (err) 1417786e8f81SAndrew Gabbasov continue; 1418786e8f81SAndrew Gabbasov 1419786e8f81SAndrew Gabbasov /* Only compare read only fields */ 1420786e8f81SAndrew Gabbasov if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] 1421786e8f81SAndrew Gabbasov == test_csd[EXT_CSD_PARTITIONING_SUPPORT] && 1422786e8f81SAndrew Gabbasov ext_csd[EXT_CSD_HC_WP_GRP_SIZE] 1423786e8f81SAndrew Gabbasov == test_csd[EXT_CSD_HC_WP_GRP_SIZE] && 1424786e8f81SAndrew Gabbasov ext_csd[EXT_CSD_REV] 1425786e8f81SAndrew Gabbasov == test_csd[EXT_CSD_REV] && 1426786e8f81SAndrew Gabbasov ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] 1427786e8f81SAndrew Gabbasov == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] && 1428786e8f81SAndrew Gabbasov memcmp(&ext_csd[EXT_CSD_SEC_CNT], 1429786e8f81SAndrew Gabbasov &test_csd[EXT_CSD_SEC_CNT], 4) == 0) 14304137894eSLei Wen break; 1431786e8f81SAndrew Gabbasov else 1432786e8f81SAndrew Gabbasov err = SWITCH_ERR; 14334137894eSLei Wen } 1434786e8f81SAndrew Gabbasov 1435786e8f81SAndrew Gabbasov if (err) 1436786e8f81SAndrew Gabbasov return err; 1437272cc70bSAndy Fleming 1438272cc70bSAndy Fleming if (mmc->card_caps & MMC_MODE_HS) { 1439272cc70bSAndy Fleming if (mmc->card_caps & MMC_MODE_HS_52MHz) 1440ad5fd922SJaehoon Chung mmc->tran_speed = 52000000; 1441272cc70bSAndy Fleming else 1442ad5fd922SJaehoon Chung mmc->tran_speed = 26000000; 1443272cc70bSAndy Fleming } 1444ad5fd922SJaehoon Chung } 1445ad5fd922SJaehoon Chung 1446ad5fd922SJaehoon Chung mmc_set_clock(mmc, mmc->tran_speed); 1447272cc70bSAndy Fleming 14485af8f45cSAndrew Gabbasov /* Fix the block length for DDR mode */ 14495af8f45cSAndrew Gabbasov if (mmc->ddr_mode) { 14505af8f45cSAndrew Gabbasov mmc->read_bl_len = MMC_MAX_BLOCK_LEN; 14515af8f45cSAndrew Gabbasov mmc->write_bl_len = MMC_MAX_BLOCK_LEN; 14525af8f45cSAndrew Gabbasov } 14535af8f45cSAndrew Gabbasov 1454272cc70bSAndy Fleming /* fill in device description */ 1455c40fdca6SSimon Glass bdesc = mmc_get_blk_desc(mmc); 1456c40fdca6SSimon Glass bdesc->lun = 0; 1457c40fdca6SSimon Glass bdesc->hwpart = 0; 1458c40fdca6SSimon Glass bdesc->type = 0; 1459c40fdca6SSimon Glass bdesc->blksz = mmc->read_bl_len; 1460c40fdca6SSimon Glass bdesc->log2blksz = LOG2(bdesc->blksz); 1461c40fdca6SSimon Glass bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len); 1462fc011f64SSjoerd Simons #if !defined(CONFIG_SPL_BUILD) || \ 1463fc011f64SSjoerd Simons (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \ 1464fc011f64SSjoerd Simons !defined(CONFIG_USE_TINY_PRINTF)) 1465c40fdca6SSimon Glass sprintf(bdesc->vendor, "Man %06x Snr %04x%04x", 1466babce5f6STaylor Hutt mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff), 1467babce5f6STaylor Hutt (mmc->cid[3] >> 16) & 0xffff); 1468c40fdca6SSimon Glass sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff, 14690b453ffeSRabin Vincent (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, 1470babce5f6STaylor Hutt (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff, 1471babce5f6STaylor Hutt (mmc->cid[2] >> 24) & 0xff); 1472c40fdca6SSimon Glass sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf, 1473babce5f6STaylor Hutt (mmc->cid[2] >> 16) & 0xf); 147456196826SPaul Burton #else 1475c40fdca6SSimon Glass bdesc->vendor[0] = 0; 1476c40fdca6SSimon Glass bdesc->product[0] = 0; 1477c40fdca6SSimon Glass bdesc->revision[0] = 0; 147856196826SPaul Burton #endif 1479122efd43SMikhail Kshevetskiy #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT) 1480c40fdca6SSimon Glass part_init(bdesc); 1481122efd43SMikhail Kshevetskiy #endif 1482272cc70bSAndy Fleming 1483272cc70bSAndy Fleming return 0; 1484272cc70bSAndy Fleming } 1485272cc70bSAndy Fleming 1486fdbb873eSKim Phillips static int mmc_send_if_cond(struct mmc *mmc) 1487272cc70bSAndy Fleming { 1488272cc70bSAndy Fleming struct mmc_cmd cmd; 1489272cc70bSAndy Fleming int err; 1490272cc70bSAndy Fleming 1491272cc70bSAndy Fleming cmd.cmdidx = SD_CMD_SEND_IF_COND; 1492272cc70bSAndy Fleming /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ 149393bfd616SPantelis Antoniou cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa; 1494272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R7; 1495272cc70bSAndy Fleming 1496272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 1497272cc70bSAndy Fleming 1498272cc70bSAndy Fleming if (err) 1499272cc70bSAndy Fleming return err; 1500272cc70bSAndy Fleming 1501998be3ddSRabin Vincent if ((cmd.response[0] & 0xff) != 0xaa) 1502272cc70bSAndy Fleming return UNUSABLE_ERR; 1503272cc70bSAndy Fleming else 1504272cc70bSAndy Fleming mmc->version = SD_VERSION_2; 1505272cc70bSAndy Fleming 1506272cc70bSAndy Fleming return 0; 1507272cc70bSAndy Fleming } 1508272cc70bSAndy Fleming 150995de9ab2SPaul Kocialkowski /* board-specific MMC power initializations. */ 151095de9ab2SPaul Kocialkowski __weak void board_mmc_power_init(void) 151195de9ab2SPaul Kocialkowski { 151295de9ab2SPaul Kocialkowski } 151395de9ab2SPaul Kocialkowski 1514e9550449SChe-Liang Chiou int mmc_start_init(struct mmc *mmc) 1515272cc70bSAndy Fleming { 1516*8ca51e51SSimon Glass bool no_card; 1517afd5932bSMacpaul Lin int err; 1518272cc70bSAndy Fleming 1519ab769f22SPantelis Antoniou /* we pretend there's no card when init is NULL */ 1520*8ca51e51SSimon Glass no_card = mmc_getcd(mmc) == 0; 1521*8ca51e51SSimon Glass #ifndef CONFIG_DM_MMC_OPS 1522*8ca51e51SSimon Glass no_card = no_card || (mmc->cfg->ops->init == NULL); 1523*8ca51e51SSimon Glass #endif 1524*8ca51e51SSimon Glass if (no_card) { 152548972d90SThierry Reding mmc->has_init = 0; 152656196826SPaul Burton #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 152748972d90SThierry Reding printf("MMC: no card present\n"); 152856196826SPaul Burton #endif 152948972d90SThierry Reding return NO_CARD_ERR; 153048972d90SThierry Reding } 153148972d90SThierry Reding 1532bc897b1dSLei Wen if (mmc->has_init) 1533bc897b1dSLei Wen return 0; 1534bc897b1dSLei Wen 15355a8dbdc6SYangbo Lu #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT 15365a8dbdc6SYangbo Lu mmc_adapter_card_type_ident(); 15375a8dbdc6SYangbo Lu #endif 153895de9ab2SPaul Kocialkowski board_mmc_power_init(); 153995de9ab2SPaul Kocialkowski 1540*8ca51e51SSimon Glass #ifdef CONFIG_DM_MMC_OPS 1541*8ca51e51SSimon Glass /* The device has already been probed ready for use */ 1542*8ca51e51SSimon Glass #else 1543ab769f22SPantelis Antoniou /* made sure it's not NULL earlier */ 154493bfd616SPantelis Antoniou err = mmc->cfg->ops->init(mmc); 1545272cc70bSAndy Fleming if (err) 1546272cc70bSAndy Fleming return err; 1547*8ca51e51SSimon Glass #endif 1548786e8f81SAndrew Gabbasov mmc->ddr_mode = 0; 1549b86b85e2SIlya Yanok mmc_set_bus_width(mmc, 1); 1550b86b85e2SIlya Yanok mmc_set_clock(mmc, 1); 1551b86b85e2SIlya Yanok 1552272cc70bSAndy Fleming /* Reset the Card */ 1553272cc70bSAndy Fleming err = mmc_go_idle(mmc); 1554272cc70bSAndy Fleming 1555272cc70bSAndy Fleming if (err) 1556272cc70bSAndy Fleming return err; 1557272cc70bSAndy Fleming 1558bc897b1dSLei Wen /* The internal partition reset to user partition(0) at every CMD0*/ 1559c40fdca6SSimon Glass mmc_get_blk_desc(mmc)->hwpart = 0; 1560bc897b1dSLei Wen 1561272cc70bSAndy Fleming /* Test for SD version 2 */ 1562272cc70bSAndy Fleming err = mmc_send_if_cond(mmc); 1563272cc70bSAndy Fleming 1564272cc70bSAndy Fleming /* Now try to get the SD card's operating condition */ 1565272cc70bSAndy Fleming err = sd_send_op_cond(mmc); 1566272cc70bSAndy Fleming 1567272cc70bSAndy Fleming /* If the command timed out, we check for an MMC card */ 1568272cc70bSAndy Fleming if (err == TIMEOUT) { 1569272cc70bSAndy Fleming err = mmc_send_op_cond(mmc); 1570272cc70bSAndy Fleming 1571bd47c135SAndrew Gabbasov if (err) { 157256196826SPaul Burton #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1573272cc70bSAndy Fleming printf("Card did not respond to voltage select!\n"); 157456196826SPaul Burton #endif 1575272cc70bSAndy Fleming return UNUSABLE_ERR; 1576272cc70bSAndy Fleming } 1577272cc70bSAndy Fleming } 1578272cc70bSAndy Fleming 1579bd47c135SAndrew Gabbasov if (!err) 1580e9550449SChe-Liang Chiou mmc->init_in_progress = 1; 1581e9550449SChe-Liang Chiou 1582e9550449SChe-Liang Chiou return err; 1583e9550449SChe-Liang Chiou } 1584e9550449SChe-Liang Chiou 1585e9550449SChe-Liang Chiou static int mmc_complete_init(struct mmc *mmc) 1586e9550449SChe-Liang Chiou { 1587e9550449SChe-Liang Chiou int err = 0; 1588e9550449SChe-Liang Chiou 1589bd47c135SAndrew Gabbasov mmc->init_in_progress = 0; 1590e9550449SChe-Liang Chiou if (mmc->op_cond_pending) 1591e9550449SChe-Liang Chiou err = mmc_complete_op_cond(mmc); 1592e9550449SChe-Liang Chiou 1593e9550449SChe-Liang Chiou if (!err) 1594bc897b1dSLei Wen err = mmc_startup(mmc); 1595bc897b1dSLei Wen if (err) 1596bc897b1dSLei Wen mmc->has_init = 0; 1597bc897b1dSLei Wen else 1598bc897b1dSLei Wen mmc->has_init = 1; 1599e9550449SChe-Liang Chiou return err; 1600e9550449SChe-Liang Chiou } 1601e9550449SChe-Liang Chiou 1602e9550449SChe-Liang Chiou int mmc_init(struct mmc *mmc) 1603e9550449SChe-Liang Chiou { 1604bd47c135SAndrew Gabbasov int err = 0; 1605d803fea5SMateusz Zalega unsigned start; 160633fb211dSSimon Glass #ifdef CONFIG_DM_MMC 160733fb211dSSimon Glass struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev); 1608e9550449SChe-Liang Chiou 160933fb211dSSimon Glass upriv->mmc = mmc; 161033fb211dSSimon Glass #endif 1611e9550449SChe-Liang Chiou if (mmc->has_init) 1612e9550449SChe-Liang Chiou return 0; 1613d803fea5SMateusz Zalega 1614d803fea5SMateusz Zalega start = get_timer(0); 1615d803fea5SMateusz Zalega 1616e9550449SChe-Liang Chiou if (!mmc->init_in_progress) 1617e9550449SChe-Liang Chiou err = mmc_start_init(mmc); 1618e9550449SChe-Liang Chiou 1619bd47c135SAndrew Gabbasov if (!err) 1620e9550449SChe-Liang Chiou err = mmc_complete_init(mmc); 1621e9550449SChe-Liang Chiou debug("%s: %d, time %lu\n", __func__, err, get_timer(start)); 1622bc897b1dSLei Wen return err; 1623272cc70bSAndy Fleming } 1624272cc70bSAndy Fleming 1625ab71188cSMarkus Niebel int mmc_set_dsr(struct mmc *mmc, u16 val) 1626ab71188cSMarkus Niebel { 1627ab71188cSMarkus Niebel mmc->dsr = val; 1628ab71188cSMarkus Niebel return 0; 1629ab71188cSMarkus Niebel } 1630ab71188cSMarkus Niebel 1631cee9ab7cSJeroen Hofstee /* CPU-specific MMC initializations */ 1632cee9ab7cSJeroen Hofstee __weak int cpu_mmc_init(bd_t *bis) 1633272cc70bSAndy Fleming { 1634272cc70bSAndy Fleming return -1; 1635272cc70bSAndy Fleming } 1636272cc70bSAndy Fleming 1637cee9ab7cSJeroen Hofstee /* board-specific MMC initializations. */ 1638cee9ab7cSJeroen Hofstee __weak int board_mmc_init(bd_t *bis) 1639cee9ab7cSJeroen Hofstee { 1640cee9ab7cSJeroen Hofstee return -1; 1641cee9ab7cSJeroen Hofstee } 1642272cc70bSAndy Fleming 1643e9550449SChe-Liang Chiou void mmc_set_preinit(struct mmc *mmc, int preinit) 1644e9550449SChe-Liang Chiou { 1645e9550449SChe-Liang Chiou mmc->preinit = preinit; 1646e9550449SChe-Liang Chiou } 1647e9550449SChe-Liang Chiou 16488e3332e2SSjoerd Simons #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD) 16498e3332e2SSjoerd Simons static int mmc_probe(bd_t *bis) 16508e3332e2SSjoerd Simons { 16518e3332e2SSjoerd Simons return 0; 16528e3332e2SSjoerd Simons } 16538e3332e2SSjoerd Simons #elif defined(CONFIG_DM_MMC) 16548e3332e2SSjoerd Simons static int mmc_probe(bd_t *bis) 16558e3332e2SSjoerd Simons { 16564a1db6d8SSimon Glass int ret, i; 16578e3332e2SSjoerd Simons struct uclass *uc; 16584a1db6d8SSimon Glass struct udevice *dev; 16598e3332e2SSjoerd Simons 16608e3332e2SSjoerd Simons ret = uclass_get(UCLASS_MMC, &uc); 16618e3332e2SSjoerd Simons if (ret) 16628e3332e2SSjoerd Simons return ret; 16638e3332e2SSjoerd Simons 16644a1db6d8SSimon Glass /* 16654a1db6d8SSimon Glass * Try to add them in sequence order. Really with driver model we 16664a1db6d8SSimon Glass * should allow holes, but the current MMC list does not allow that. 16674a1db6d8SSimon Glass * So if we request 0, 1, 3 we will get 0, 1, 2. 16684a1db6d8SSimon Glass */ 16694a1db6d8SSimon Glass for (i = 0; ; i++) { 16704a1db6d8SSimon Glass ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev); 16714a1db6d8SSimon Glass if (ret == -ENODEV) 16724a1db6d8SSimon Glass break; 16734a1db6d8SSimon Glass } 16744a1db6d8SSimon Glass uclass_foreach_dev(dev, uc) { 16754a1db6d8SSimon Glass ret = device_probe(dev); 16768e3332e2SSjoerd Simons if (ret) 16774a1db6d8SSimon Glass printf("%s - probe failed: %d\n", dev->name, ret); 16788e3332e2SSjoerd Simons } 16798e3332e2SSjoerd Simons 16808e3332e2SSjoerd Simons return 0; 16818e3332e2SSjoerd Simons } 16828e3332e2SSjoerd Simons #else 16838e3332e2SSjoerd Simons static int mmc_probe(bd_t *bis) 16848e3332e2SSjoerd Simons { 16858e3332e2SSjoerd Simons if (board_mmc_init(bis) < 0) 16868e3332e2SSjoerd Simons cpu_mmc_init(bis); 16878e3332e2SSjoerd Simons 16888e3332e2SSjoerd Simons return 0; 16898e3332e2SSjoerd Simons } 16908e3332e2SSjoerd Simons #endif 1691e9550449SChe-Liang Chiou 1692272cc70bSAndy Fleming int mmc_initialize(bd_t *bis) 1693272cc70bSAndy Fleming { 16941b26bab1SDaniel Kochmański static int initialized = 0; 16958e3332e2SSjoerd Simons int ret; 16961b26bab1SDaniel Kochmański if (initialized) /* Avoid initializing mmc multiple times */ 16971b26bab1SDaniel Kochmański return 0; 16981b26bab1SDaniel Kochmański initialized = 1; 16991b26bab1SDaniel Kochmański 1700c40fdca6SSimon Glass #ifndef CONFIG_BLK 1701c40fdca6SSimon Glass mmc_list_init(); 1702c40fdca6SSimon Glass #endif 17038e3332e2SSjoerd Simons ret = mmc_probe(bis); 17048e3332e2SSjoerd Simons if (ret) 17058e3332e2SSjoerd Simons return ret; 1706272cc70bSAndy Fleming 1707bb0dc108SYing Zhang #ifndef CONFIG_SPL_BUILD 1708272cc70bSAndy Fleming print_mmc_devices(','); 1709bb0dc108SYing Zhang #endif 1710272cc70bSAndy Fleming 1711c40fdca6SSimon Glass mmc_do_preinit(); 1712272cc70bSAndy Fleming return 0; 1713272cc70bSAndy Fleming } 1714