1272cc70bSAndy Fleming /* 2272cc70bSAndy Fleming * Copyright 2008, Freescale Semiconductor, Inc 3272cc70bSAndy Fleming * Andy Fleming 4272cc70bSAndy Fleming * 5272cc70bSAndy Fleming * Based vaguely on the Linux code 6272cc70bSAndy Fleming * 71a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 8272cc70bSAndy Fleming */ 9272cc70bSAndy Fleming 10272cc70bSAndy Fleming #include <config.h> 11272cc70bSAndy Fleming #include <common.h> 12272cc70bSAndy Fleming #include <command.h> 138e3332e2SSjoerd Simons #include <dm.h> 148e3332e2SSjoerd Simons #include <dm/device-internal.h> 15d4622df3SStephen Warren #include <errno.h> 16272cc70bSAndy Fleming #include <mmc.h> 17272cc70bSAndy Fleming #include <part.h> 18272cc70bSAndy Fleming #include <malloc.h> 19cf92e05cSSimon Glass #include <memalign.h> 20272cc70bSAndy Fleming #include <linux/list.h> 219b1f942cSRabin Vincent #include <div64.h> 22da61fa5fSPaul Burton #include "mmc_private.h" 23272cc70bSAndy Fleming 24*3697e599SPeng Fan static const unsigned int sd_au_size[] = { 25*3697e599SPeng Fan 0, SZ_16K / 512, SZ_32K / 512, 26*3697e599SPeng Fan SZ_64K / 512, SZ_128K / 512, SZ_256K / 512, 27*3697e599SPeng Fan SZ_512K / 512, SZ_1M / 512, SZ_2M / 512, 28*3697e599SPeng Fan SZ_4M / 512, SZ_8M / 512, (SZ_8M + SZ_4M) / 512, 29*3697e599SPeng Fan SZ_16M / 512, (SZ_16M + SZ_8M) / 512, SZ_32M / 512, SZ_64M / 512, 30*3697e599SPeng Fan }; 31*3697e599SPeng Fan 328ca51e51SSimon Glass #ifndef CONFIG_DM_MMC_OPS 33750121c3SJeroen Hofstee __weak int board_mmc_getwp(struct mmc *mmc) 34d23d8d7eSNikita Kiryanov { 35d23d8d7eSNikita Kiryanov return -1; 36d23d8d7eSNikita Kiryanov } 37d23d8d7eSNikita Kiryanov 38d23d8d7eSNikita Kiryanov int mmc_getwp(struct mmc *mmc) 39d23d8d7eSNikita Kiryanov { 40d23d8d7eSNikita Kiryanov int wp; 41d23d8d7eSNikita Kiryanov 42d23d8d7eSNikita Kiryanov wp = board_mmc_getwp(mmc); 43d23d8d7eSNikita Kiryanov 44d4e1da4eSPeter Korsgaard if (wp < 0) { 4593bfd616SPantelis Antoniou if (mmc->cfg->ops->getwp) 4693bfd616SPantelis Antoniou wp = mmc->cfg->ops->getwp(mmc); 47d4e1da4eSPeter Korsgaard else 48d4e1da4eSPeter Korsgaard wp = 0; 49d4e1da4eSPeter Korsgaard } 50d23d8d7eSNikita Kiryanov 51d23d8d7eSNikita Kiryanov return wp; 52d23d8d7eSNikita Kiryanov } 53d23d8d7eSNikita Kiryanov 54cee9ab7cSJeroen Hofstee __weak int board_mmc_getcd(struct mmc *mmc) 55cee9ab7cSJeroen Hofstee { 5611fdade2SStefano Babic return -1; 5711fdade2SStefano Babic } 588ca51e51SSimon Glass #endif 5911fdade2SStefano Babic 608635ff9eSMarek Vasut #ifdef CONFIG_MMC_TRACE 61c0c76ebaSSimon Glass void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd) 62c0c76ebaSSimon Glass { 63c0c76ebaSSimon Glass printf("CMD_SEND:%d\n", cmd->cmdidx); 64c0c76ebaSSimon Glass printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg); 65c0c76ebaSSimon Glass } 66c0c76ebaSSimon Glass 67c0c76ebaSSimon Glass void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret) 68c0c76ebaSSimon Glass { 695db2fe3aSRaffaele Recalcati int i; 705db2fe3aSRaffaele Recalcati u8 *ptr; 715db2fe3aSRaffaele Recalcati 727863ce58SBin Meng if (ret) { 737863ce58SBin Meng printf("\t\tRET\t\t\t %d\n", ret); 747863ce58SBin Meng } else { 755db2fe3aSRaffaele Recalcati switch (cmd->resp_type) { 765db2fe3aSRaffaele Recalcati case MMC_RSP_NONE: 775db2fe3aSRaffaele Recalcati printf("\t\tMMC_RSP_NONE\n"); 785db2fe3aSRaffaele Recalcati break; 795db2fe3aSRaffaele Recalcati case MMC_RSP_R1: 805db2fe3aSRaffaele Recalcati printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n", 815db2fe3aSRaffaele Recalcati cmd->response[0]); 825db2fe3aSRaffaele Recalcati break; 835db2fe3aSRaffaele Recalcati case MMC_RSP_R1b: 845db2fe3aSRaffaele Recalcati printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n", 855db2fe3aSRaffaele Recalcati cmd->response[0]); 865db2fe3aSRaffaele Recalcati break; 875db2fe3aSRaffaele Recalcati case MMC_RSP_R2: 885db2fe3aSRaffaele Recalcati printf("\t\tMMC_RSP_R2\t\t 0x%08X \n", 895db2fe3aSRaffaele Recalcati cmd->response[0]); 905db2fe3aSRaffaele Recalcati printf("\t\t \t\t 0x%08X \n", 915db2fe3aSRaffaele Recalcati cmd->response[1]); 925db2fe3aSRaffaele Recalcati printf("\t\t \t\t 0x%08X \n", 935db2fe3aSRaffaele Recalcati cmd->response[2]); 945db2fe3aSRaffaele Recalcati printf("\t\t \t\t 0x%08X \n", 955db2fe3aSRaffaele Recalcati cmd->response[3]); 965db2fe3aSRaffaele Recalcati printf("\n"); 975db2fe3aSRaffaele Recalcati printf("\t\t\t\t\tDUMPING DATA\n"); 985db2fe3aSRaffaele Recalcati for (i = 0; i < 4; i++) { 995db2fe3aSRaffaele Recalcati int j; 1005db2fe3aSRaffaele Recalcati printf("\t\t\t\t\t%03d - ", i*4); 101146bec79SDirk Behme ptr = (u8 *)&cmd->response[i]; 1025db2fe3aSRaffaele Recalcati ptr += 3; 1035db2fe3aSRaffaele Recalcati for (j = 0; j < 4; j++) 1045db2fe3aSRaffaele Recalcati printf("%02X ", *ptr--); 1055db2fe3aSRaffaele Recalcati printf("\n"); 1065db2fe3aSRaffaele Recalcati } 1075db2fe3aSRaffaele Recalcati break; 1085db2fe3aSRaffaele Recalcati case MMC_RSP_R3: 1095db2fe3aSRaffaele Recalcati printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n", 1105db2fe3aSRaffaele Recalcati cmd->response[0]); 1115db2fe3aSRaffaele Recalcati break; 1125db2fe3aSRaffaele Recalcati default: 1135db2fe3aSRaffaele Recalcati printf("\t\tERROR MMC rsp not supported\n"); 1145db2fe3aSRaffaele Recalcati break; 1155db2fe3aSRaffaele Recalcati } 1167863ce58SBin Meng } 117c0c76ebaSSimon Glass } 118c0c76ebaSSimon Glass 119c0c76ebaSSimon Glass void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd) 120c0c76ebaSSimon Glass { 121c0c76ebaSSimon Glass int status; 122c0c76ebaSSimon Glass 123c0c76ebaSSimon Glass status = (cmd->response[0] & MMC_STATUS_CURR_STATE) >> 9; 124c0c76ebaSSimon Glass printf("CURR STATE:%d\n", status); 125c0c76ebaSSimon Glass } 1265db2fe3aSRaffaele Recalcati #endif 127c0c76ebaSSimon Glass 1288ca51e51SSimon Glass #ifndef CONFIG_DM_MMC_OPS 129c0c76ebaSSimon Glass int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) 130c0c76ebaSSimon Glass { 131c0c76ebaSSimon Glass int ret; 132c0c76ebaSSimon Glass 133c0c76ebaSSimon Glass mmmc_trace_before_send(mmc, cmd); 134c0c76ebaSSimon Glass ret = mmc->cfg->ops->send_cmd(mmc, cmd, data); 135c0c76ebaSSimon Glass mmmc_trace_after_send(mmc, cmd, ret); 136c0c76ebaSSimon Glass 1378635ff9eSMarek Vasut return ret; 138272cc70bSAndy Fleming } 1398ca51e51SSimon Glass #endif 140272cc70bSAndy Fleming 141da61fa5fSPaul Burton int mmc_send_status(struct mmc *mmc, int timeout) 1425d4fc8d9SRaffaele Recalcati { 1435d4fc8d9SRaffaele Recalcati struct mmc_cmd cmd; 144d617c426SJan Kloetzke int err, retries = 5; 1455d4fc8d9SRaffaele Recalcati 1465d4fc8d9SRaffaele Recalcati cmd.cmdidx = MMC_CMD_SEND_STATUS; 1475d4fc8d9SRaffaele Recalcati cmd.resp_type = MMC_RSP_R1; 148aaf3d41aSMarek Vasut if (!mmc_host_is_spi(mmc)) 149aaf3d41aSMarek Vasut cmd.cmdarg = mmc->rca << 16; 1505d4fc8d9SRaffaele Recalcati 1511677eef4SAndrew Gabbasov while (1) { 1525d4fc8d9SRaffaele Recalcati err = mmc_send_cmd(mmc, &cmd, NULL); 153d617c426SJan Kloetzke if (!err) { 154d617c426SJan Kloetzke if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) && 155d617c426SJan Kloetzke (cmd.response[0] & MMC_STATUS_CURR_STATE) != 156d617c426SJan Kloetzke MMC_STATE_PRG) 1575d4fc8d9SRaffaele Recalcati break; 158d617c426SJan Kloetzke else if (cmd.response[0] & MMC_STATUS_MASK) { 15956196826SPaul Burton #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 160d617c426SJan Kloetzke printf("Status Error: 0x%08X\n", 161d617c426SJan Kloetzke cmd.response[0]); 16256196826SPaul Burton #endif 163915ffa52SJaehoon Chung return -ECOMM; 164d617c426SJan Kloetzke } 165d617c426SJan Kloetzke } else if (--retries < 0) 166d617c426SJan Kloetzke return err; 1675d4fc8d9SRaffaele Recalcati 1681677eef4SAndrew Gabbasov if (timeout-- <= 0) 1691677eef4SAndrew Gabbasov break; 1705d4fc8d9SRaffaele Recalcati 1711677eef4SAndrew Gabbasov udelay(1000); 1721677eef4SAndrew Gabbasov } 1735d4fc8d9SRaffaele Recalcati 174c0c76ebaSSimon Glass mmc_trace_state(mmc, &cmd); 1755b0c942fSJongman Heo if (timeout <= 0) { 17656196826SPaul Burton #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1775d4fc8d9SRaffaele Recalcati printf("Timeout waiting card ready\n"); 17856196826SPaul Burton #endif 179915ffa52SJaehoon Chung return -ETIMEDOUT; 1805d4fc8d9SRaffaele Recalcati } 1815d4fc8d9SRaffaele Recalcati 1825d4fc8d9SRaffaele Recalcati return 0; 1835d4fc8d9SRaffaele Recalcati } 1845d4fc8d9SRaffaele Recalcati 185da61fa5fSPaul Burton int mmc_set_blocklen(struct mmc *mmc, int len) 186272cc70bSAndy Fleming { 187272cc70bSAndy Fleming struct mmc_cmd cmd; 188272cc70bSAndy Fleming 189786e8f81SAndrew Gabbasov if (mmc->ddr_mode) 190d22e3d46SJaehoon Chung return 0; 191d22e3d46SJaehoon Chung 192272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; 193272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 194272cc70bSAndy Fleming cmd.cmdarg = len; 195272cc70bSAndy Fleming 196272cc70bSAndy Fleming return mmc_send_cmd(mmc, &cmd, NULL); 197272cc70bSAndy Fleming } 198272cc70bSAndy Fleming 199ff8fef56SSascha Silbe static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start, 200fdbb873eSKim Phillips lbaint_t blkcnt) 201272cc70bSAndy Fleming { 202272cc70bSAndy Fleming struct mmc_cmd cmd; 203272cc70bSAndy Fleming struct mmc_data data; 204272cc70bSAndy Fleming 2054a1a06bcSAlagu Sankar if (blkcnt > 1) 2064a1a06bcSAlagu Sankar cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; 2074a1a06bcSAlagu Sankar else 208272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; 209272cc70bSAndy Fleming 210272cc70bSAndy Fleming if (mmc->high_capacity) 2114a1a06bcSAlagu Sankar cmd.cmdarg = start; 212272cc70bSAndy Fleming else 2134a1a06bcSAlagu Sankar cmd.cmdarg = start * mmc->read_bl_len; 214272cc70bSAndy Fleming 215272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 216272cc70bSAndy Fleming 217272cc70bSAndy Fleming data.dest = dst; 2184a1a06bcSAlagu Sankar data.blocks = blkcnt; 219272cc70bSAndy Fleming data.blocksize = mmc->read_bl_len; 220272cc70bSAndy Fleming data.flags = MMC_DATA_READ; 221272cc70bSAndy Fleming 2224a1a06bcSAlagu Sankar if (mmc_send_cmd(mmc, &cmd, &data)) 2234a1a06bcSAlagu Sankar return 0; 2244a1a06bcSAlagu Sankar 2254a1a06bcSAlagu Sankar if (blkcnt > 1) { 2264a1a06bcSAlagu Sankar cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; 2274a1a06bcSAlagu Sankar cmd.cmdarg = 0; 2284a1a06bcSAlagu Sankar cmd.resp_type = MMC_RSP_R1b; 2294a1a06bcSAlagu Sankar if (mmc_send_cmd(mmc, &cmd, NULL)) { 23056196826SPaul Burton #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 2314a1a06bcSAlagu Sankar printf("mmc fail to send stop cmd\n"); 23256196826SPaul Burton #endif 2334a1a06bcSAlagu Sankar return 0; 2344a1a06bcSAlagu Sankar } 235272cc70bSAndy Fleming } 236272cc70bSAndy Fleming 2374a1a06bcSAlagu Sankar return blkcnt; 238272cc70bSAndy Fleming } 239272cc70bSAndy Fleming 24033fb211dSSimon Glass #ifdef CONFIG_BLK 2417dba0b93SSimon Glass ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst) 24233fb211dSSimon Glass #else 2437dba0b93SSimon Glass ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt, 2447dba0b93SSimon Glass void *dst) 24533fb211dSSimon Glass #endif 246272cc70bSAndy Fleming { 24733fb211dSSimon Glass #ifdef CONFIG_BLK 24833fb211dSSimon Glass struct blk_desc *block_dev = dev_get_uclass_platdata(dev); 24933fb211dSSimon Glass #endif 250bcce53d0SSimon Glass int dev_num = block_dev->devnum; 251873cc1d7SStephen Warren int err; 2524a1a06bcSAlagu Sankar lbaint_t cur, blocks_todo = blkcnt; 253272cc70bSAndy Fleming 2544a1a06bcSAlagu Sankar if (blkcnt == 0) 2554a1a06bcSAlagu Sankar return 0; 2564a1a06bcSAlagu Sankar 2574a1a06bcSAlagu Sankar struct mmc *mmc = find_mmc_device(dev_num); 258272cc70bSAndy Fleming if (!mmc) 259272cc70bSAndy Fleming return 0; 260272cc70bSAndy Fleming 26169f45cd5SSimon Glass err = blk_dselect_hwpart(block_dev, block_dev->hwpart); 262873cc1d7SStephen Warren if (err < 0) 263873cc1d7SStephen Warren return 0; 264873cc1d7SStephen Warren 265c40fdca6SSimon Glass if ((start + blkcnt) > block_dev->lba) { 26656196826SPaul Burton #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 267ff8fef56SSascha Silbe printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n", 268c40fdca6SSimon Glass start + blkcnt, block_dev->lba); 26956196826SPaul Burton #endif 270d2bf29e3SLei Wen return 0; 271d2bf29e3SLei Wen } 272272cc70bSAndy Fleming 27311692991SSimon Glass if (mmc_set_blocklen(mmc, mmc->read_bl_len)) { 27411692991SSimon Glass debug("%s: Failed to set blocklen\n", __func__); 275272cc70bSAndy Fleming return 0; 27611692991SSimon Glass } 277272cc70bSAndy Fleming 2784a1a06bcSAlagu Sankar do { 27993bfd616SPantelis Antoniou cur = (blocks_todo > mmc->cfg->b_max) ? 28093bfd616SPantelis Antoniou mmc->cfg->b_max : blocks_todo; 28111692991SSimon Glass if (mmc_read_blocks(mmc, dst, start, cur) != cur) { 28211692991SSimon Glass debug("%s: Failed to read blocks\n", __func__); 2834a1a06bcSAlagu Sankar return 0; 28411692991SSimon Glass } 2854a1a06bcSAlagu Sankar blocks_todo -= cur; 2864a1a06bcSAlagu Sankar start += cur; 2874a1a06bcSAlagu Sankar dst += cur * mmc->read_bl_len; 2884a1a06bcSAlagu Sankar } while (blocks_todo > 0); 289272cc70bSAndy Fleming 290272cc70bSAndy Fleming return blkcnt; 291272cc70bSAndy Fleming } 292272cc70bSAndy Fleming 293fdbb873eSKim Phillips static int mmc_go_idle(struct mmc *mmc) 294272cc70bSAndy Fleming { 295272cc70bSAndy Fleming struct mmc_cmd cmd; 296272cc70bSAndy Fleming int err; 297272cc70bSAndy Fleming 298272cc70bSAndy Fleming udelay(1000); 299272cc70bSAndy Fleming 300272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; 301272cc70bSAndy Fleming cmd.cmdarg = 0; 302272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_NONE; 303272cc70bSAndy Fleming 304272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 305272cc70bSAndy Fleming 306272cc70bSAndy Fleming if (err) 307272cc70bSAndy Fleming return err; 308272cc70bSAndy Fleming 309272cc70bSAndy Fleming udelay(2000); 310272cc70bSAndy Fleming 311272cc70bSAndy Fleming return 0; 312272cc70bSAndy Fleming } 313272cc70bSAndy Fleming 314fdbb873eSKim Phillips static int sd_send_op_cond(struct mmc *mmc) 315272cc70bSAndy Fleming { 316272cc70bSAndy Fleming int timeout = 1000; 317272cc70bSAndy Fleming int err; 318272cc70bSAndy Fleming struct mmc_cmd cmd; 319272cc70bSAndy Fleming 3201677eef4SAndrew Gabbasov while (1) { 321272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_APP_CMD; 322272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 323272cc70bSAndy Fleming cmd.cmdarg = 0; 324272cc70bSAndy Fleming 325272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 326272cc70bSAndy Fleming 327272cc70bSAndy Fleming if (err) 328272cc70bSAndy Fleming return err; 329272cc70bSAndy Fleming 330272cc70bSAndy Fleming cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; 331272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R3; 332250de12bSStefano Babic 333250de12bSStefano Babic /* 334250de12bSStefano Babic * Most cards do not answer if some reserved bits 335250de12bSStefano Babic * in the ocr are set. However, Some controller 336250de12bSStefano Babic * can set bit 7 (reserved for low voltages), but 337250de12bSStefano Babic * how to manage low voltages SD card is not yet 338250de12bSStefano Babic * specified. 339250de12bSStefano Babic */ 340d52ebf10SThomas Chou cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 : 34193bfd616SPantelis Antoniou (mmc->cfg->voltages & 0xff8000); 342272cc70bSAndy Fleming 343272cc70bSAndy Fleming if (mmc->version == SD_VERSION_2) 344272cc70bSAndy Fleming cmd.cmdarg |= OCR_HCS; 345272cc70bSAndy Fleming 346272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 347272cc70bSAndy Fleming 348272cc70bSAndy Fleming if (err) 349272cc70bSAndy Fleming return err; 350272cc70bSAndy Fleming 3511677eef4SAndrew Gabbasov if (cmd.response[0] & OCR_BUSY) 3521677eef4SAndrew Gabbasov break; 353272cc70bSAndy Fleming 3541677eef4SAndrew Gabbasov if (timeout-- <= 0) 355915ffa52SJaehoon Chung return -EOPNOTSUPP; 356272cc70bSAndy Fleming 3571677eef4SAndrew Gabbasov udelay(1000); 3581677eef4SAndrew Gabbasov } 3591677eef4SAndrew Gabbasov 360272cc70bSAndy Fleming if (mmc->version != SD_VERSION_2) 361272cc70bSAndy Fleming mmc->version = SD_VERSION_1_0; 362272cc70bSAndy Fleming 363d52ebf10SThomas Chou if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ 364d52ebf10SThomas Chou cmd.cmdidx = MMC_CMD_SPI_READ_OCR; 365d52ebf10SThomas Chou cmd.resp_type = MMC_RSP_R3; 366d52ebf10SThomas Chou cmd.cmdarg = 0; 367d52ebf10SThomas Chou 368d52ebf10SThomas Chou err = mmc_send_cmd(mmc, &cmd, NULL); 369d52ebf10SThomas Chou 370d52ebf10SThomas Chou if (err) 371d52ebf10SThomas Chou return err; 372d52ebf10SThomas Chou } 373d52ebf10SThomas Chou 374998be3ddSRabin Vincent mmc->ocr = cmd.response[0]; 375272cc70bSAndy Fleming 376272cc70bSAndy Fleming mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); 377272cc70bSAndy Fleming mmc->rca = 0; 378272cc70bSAndy Fleming 379272cc70bSAndy Fleming return 0; 380272cc70bSAndy Fleming } 381272cc70bSAndy Fleming 3825289b535SAndrew Gabbasov static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg) 383272cc70bSAndy Fleming { 3845289b535SAndrew Gabbasov struct mmc_cmd cmd; 385272cc70bSAndy Fleming int err; 386272cc70bSAndy Fleming 3875289b535SAndrew Gabbasov cmd.cmdidx = MMC_CMD_SEND_OP_COND; 3885289b535SAndrew Gabbasov cmd.resp_type = MMC_RSP_R3; 3895289b535SAndrew Gabbasov cmd.cmdarg = 0; 3905a20397bSRob Herring if (use_arg && !mmc_host_is_spi(mmc)) 3915a20397bSRob Herring cmd.cmdarg = OCR_HCS | 39293bfd616SPantelis Antoniou (mmc->cfg->voltages & 393a626c8d4SAndrew Gabbasov (mmc->ocr & OCR_VOLTAGE_MASK)) | 394a626c8d4SAndrew Gabbasov (mmc->ocr & OCR_ACCESS_MODE); 395e9550449SChe-Liang Chiou 3965289b535SAndrew Gabbasov err = mmc_send_cmd(mmc, &cmd, NULL); 397e9550449SChe-Liang Chiou if (err) 398e9550449SChe-Liang Chiou return err; 3995289b535SAndrew Gabbasov mmc->ocr = cmd.response[0]; 400e9550449SChe-Liang Chiou return 0; 401e9550449SChe-Liang Chiou } 402e9550449SChe-Liang Chiou 403750121c3SJeroen Hofstee static int mmc_send_op_cond(struct mmc *mmc) 404e9550449SChe-Liang Chiou { 405e9550449SChe-Liang Chiou int err, i; 406e9550449SChe-Liang Chiou 407272cc70bSAndy Fleming /* Some cards seem to need this */ 408272cc70bSAndy Fleming mmc_go_idle(mmc); 409272cc70bSAndy Fleming 41031cacbabSRaffaele Recalcati /* Asking to the card its capabilities */ 411e9550449SChe-Liang Chiou for (i = 0; i < 2; i++) { 4125289b535SAndrew Gabbasov err = mmc_send_op_cond_iter(mmc, i != 0); 41331cacbabSRaffaele Recalcati if (err) 41431cacbabSRaffaele Recalcati return err; 41531cacbabSRaffaele Recalcati 416e9550449SChe-Liang Chiou /* exit if not busy (flag seems to be inverted) */ 417a626c8d4SAndrew Gabbasov if (mmc->ocr & OCR_BUSY) 418bd47c135SAndrew Gabbasov break; 419e9550449SChe-Liang Chiou } 420bd47c135SAndrew Gabbasov mmc->op_cond_pending = 1; 421bd47c135SAndrew Gabbasov return 0; 422e9550449SChe-Liang Chiou } 42331cacbabSRaffaele Recalcati 424750121c3SJeroen Hofstee static int mmc_complete_op_cond(struct mmc *mmc) 425e9550449SChe-Liang Chiou { 426e9550449SChe-Liang Chiou struct mmc_cmd cmd; 427e9550449SChe-Liang Chiou int timeout = 1000; 428e9550449SChe-Liang Chiou uint start; 429e9550449SChe-Liang Chiou int err; 430e9550449SChe-Liang Chiou 431e9550449SChe-Liang Chiou mmc->op_cond_pending = 0; 432cc17c01fSAndrew Gabbasov if (!(mmc->ocr & OCR_BUSY)) { 433d188b113SYangbo Lu /* Some cards seem to need this */ 434d188b113SYangbo Lu mmc_go_idle(mmc); 435d188b113SYangbo Lu 436e9550449SChe-Liang Chiou start = get_timer(0); 4371677eef4SAndrew Gabbasov while (1) { 4385289b535SAndrew Gabbasov err = mmc_send_op_cond_iter(mmc, 1); 439272cc70bSAndy Fleming if (err) 440272cc70bSAndy Fleming return err; 4411677eef4SAndrew Gabbasov if (mmc->ocr & OCR_BUSY) 4421677eef4SAndrew Gabbasov break; 443e9550449SChe-Liang Chiou if (get_timer(start) > timeout) 444915ffa52SJaehoon Chung return -EOPNOTSUPP; 445e9550449SChe-Liang Chiou udelay(100); 4461677eef4SAndrew Gabbasov } 447cc17c01fSAndrew Gabbasov } 448272cc70bSAndy Fleming 449d52ebf10SThomas Chou if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ 450d52ebf10SThomas Chou cmd.cmdidx = MMC_CMD_SPI_READ_OCR; 451d52ebf10SThomas Chou cmd.resp_type = MMC_RSP_R3; 452d52ebf10SThomas Chou cmd.cmdarg = 0; 453d52ebf10SThomas Chou 454d52ebf10SThomas Chou err = mmc_send_cmd(mmc, &cmd, NULL); 455d52ebf10SThomas Chou 456d52ebf10SThomas Chou if (err) 457d52ebf10SThomas Chou return err; 458a626c8d4SAndrew Gabbasov 459a626c8d4SAndrew Gabbasov mmc->ocr = cmd.response[0]; 460d52ebf10SThomas Chou } 461d52ebf10SThomas Chou 462272cc70bSAndy Fleming mmc->version = MMC_VERSION_UNKNOWN; 463272cc70bSAndy Fleming 464272cc70bSAndy Fleming mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); 465def816a2SStephen Warren mmc->rca = 1; 466272cc70bSAndy Fleming 467272cc70bSAndy Fleming return 0; 468272cc70bSAndy Fleming } 469272cc70bSAndy Fleming 470272cc70bSAndy Fleming 471fdbb873eSKim Phillips static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd) 472272cc70bSAndy Fleming { 473272cc70bSAndy Fleming struct mmc_cmd cmd; 474272cc70bSAndy Fleming struct mmc_data data; 475272cc70bSAndy Fleming int err; 476272cc70bSAndy Fleming 477272cc70bSAndy Fleming /* Get the Card Status Register */ 478272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; 479272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 480272cc70bSAndy Fleming cmd.cmdarg = 0; 481272cc70bSAndy Fleming 482cdfd1ac6SYoshihiro Shimoda data.dest = (char *)ext_csd; 483272cc70bSAndy Fleming data.blocks = 1; 4848bfa195eSSimon Glass data.blocksize = MMC_MAX_BLOCK_LEN; 485272cc70bSAndy Fleming data.flags = MMC_DATA_READ; 486272cc70bSAndy Fleming 487272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, &data); 488272cc70bSAndy Fleming 489272cc70bSAndy Fleming return err; 490272cc70bSAndy Fleming } 491272cc70bSAndy Fleming 492c40704f4SSimon Glass int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) 493272cc70bSAndy Fleming { 494272cc70bSAndy Fleming struct mmc_cmd cmd; 4955d4fc8d9SRaffaele Recalcati int timeout = 1000; 4965d4fc8d9SRaffaele Recalcati int ret; 497272cc70bSAndy Fleming 498272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_SWITCH; 499272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1b; 500272cc70bSAndy Fleming cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | 501272cc70bSAndy Fleming (index << 16) | 502272cc70bSAndy Fleming (value << 8); 503272cc70bSAndy Fleming 5045d4fc8d9SRaffaele Recalcati ret = mmc_send_cmd(mmc, &cmd, NULL); 5055d4fc8d9SRaffaele Recalcati 5065d4fc8d9SRaffaele Recalcati /* Waiting for the ready status */ 50793ad0d18SJan Kloetzke if (!ret) 50893ad0d18SJan Kloetzke ret = mmc_send_status(mmc, timeout); 5095d4fc8d9SRaffaele Recalcati 5105d4fc8d9SRaffaele Recalcati return ret; 5115d4fc8d9SRaffaele Recalcati 512272cc70bSAndy Fleming } 513272cc70bSAndy Fleming 514fdbb873eSKim Phillips static int mmc_change_freq(struct mmc *mmc) 515272cc70bSAndy Fleming { 5168bfa195eSSimon Glass ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 517272cc70bSAndy Fleming char cardtype; 518272cc70bSAndy Fleming int err; 519272cc70bSAndy Fleming 520fc5b32fbSAndrew Gabbasov mmc->card_caps = 0; 521272cc70bSAndy Fleming 522d52ebf10SThomas Chou if (mmc_host_is_spi(mmc)) 523d52ebf10SThomas Chou return 0; 524d52ebf10SThomas Chou 525272cc70bSAndy Fleming /* Only version 4 supports high-speed */ 526272cc70bSAndy Fleming if (mmc->version < MMC_VERSION_4) 527272cc70bSAndy Fleming return 0; 528272cc70bSAndy Fleming 529fc5b32fbSAndrew Gabbasov mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT; 530fc5b32fbSAndrew Gabbasov 531272cc70bSAndy Fleming err = mmc_send_ext_csd(mmc, ext_csd); 532272cc70bSAndy Fleming 533272cc70bSAndy Fleming if (err) 534272cc70bSAndy Fleming return err; 535272cc70bSAndy Fleming 5360560db18SLei Wen cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf; 537272cc70bSAndy Fleming 538272cc70bSAndy Fleming err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); 539272cc70bSAndy Fleming 540272cc70bSAndy Fleming if (err) 541a5e27b41SHeiko Schocher return err; 542272cc70bSAndy Fleming 543272cc70bSAndy Fleming /* Now check to see that it worked */ 544272cc70bSAndy Fleming err = mmc_send_ext_csd(mmc, ext_csd); 545272cc70bSAndy Fleming 546272cc70bSAndy Fleming if (err) 547272cc70bSAndy Fleming return err; 548272cc70bSAndy Fleming 549272cc70bSAndy Fleming /* No high-speed support */ 5500560db18SLei Wen if (!ext_csd[EXT_CSD_HS_TIMING]) 551272cc70bSAndy Fleming return 0; 552272cc70bSAndy Fleming 553272cc70bSAndy Fleming /* High Speed is set, there are two types: 52MHz and 26MHz */ 554d22e3d46SJaehoon Chung if (cardtype & EXT_CSD_CARD_TYPE_52) { 555201d5ac4SAndrew Gabbasov if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V) 556d22e3d46SJaehoon Chung mmc->card_caps |= MMC_MODE_DDR_52MHz; 557272cc70bSAndy Fleming mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; 558d22e3d46SJaehoon Chung } else { 559272cc70bSAndy Fleming mmc->card_caps |= MMC_MODE_HS; 560d22e3d46SJaehoon Chung } 561272cc70bSAndy Fleming 562272cc70bSAndy Fleming return 0; 563272cc70bSAndy Fleming } 564272cc70bSAndy Fleming 565f866a46dSStephen Warren static int mmc_set_capacity(struct mmc *mmc, int part_num) 566f866a46dSStephen Warren { 567f866a46dSStephen Warren switch (part_num) { 568f866a46dSStephen Warren case 0: 569f866a46dSStephen Warren mmc->capacity = mmc->capacity_user; 570f866a46dSStephen Warren break; 571f866a46dSStephen Warren case 1: 572f866a46dSStephen Warren case 2: 573f866a46dSStephen Warren mmc->capacity = mmc->capacity_boot; 574f866a46dSStephen Warren break; 575f866a46dSStephen Warren case 3: 576f866a46dSStephen Warren mmc->capacity = mmc->capacity_rpmb; 577f866a46dSStephen Warren break; 578f866a46dSStephen Warren case 4: 579f866a46dSStephen Warren case 5: 580f866a46dSStephen Warren case 6: 581f866a46dSStephen Warren case 7: 582f866a46dSStephen Warren mmc->capacity = mmc->capacity_gp[part_num - 4]; 583f866a46dSStephen Warren break; 584f866a46dSStephen Warren default: 585f866a46dSStephen Warren return -1; 586f866a46dSStephen Warren } 587f866a46dSStephen Warren 588c40fdca6SSimon Glass mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len); 589f866a46dSStephen Warren 590f866a46dSStephen Warren return 0; 591f866a46dSStephen Warren } 592f866a46dSStephen Warren 5937dba0b93SSimon Glass int mmc_switch_part(struct mmc *mmc, unsigned int part_num) 594bc897b1dSLei Wen { 595f866a46dSStephen Warren int ret; 596bc897b1dSLei Wen 597f866a46dSStephen Warren ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, 598bc897b1dSLei Wen (mmc->part_config & ~PART_ACCESS_MASK) 599bc897b1dSLei Wen | (part_num & PART_ACCESS_MASK)); 600f866a46dSStephen Warren 6016dc93e70SPeter Bigot /* 6026dc93e70SPeter Bigot * Set the capacity if the switch succeeded or was intended 6036dc93e70SPeter Bigot * to return to representing the raw device. 6046dc93e70SPeter Bigot */ 605873cc1d7SStephen Warren if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) { 6066dc93e70SPeter Bigot ret = mmc_set_capacity(mmc, part_num); 607fdbb139fSSimon Glass mmc_get_blk_desc(mmc)->hwpart = part_num; 608873cc1d7SStephen Warren } 6096dc93e70SPeter Bigot 6106dc93e70SPeter Bigot return ret; 611bc897b1dSLei Wen } 612bc897b1dSLei Wen 613ac9da0e0SDiego Santa Cruz int mmc_hwpart_config(struct mmc *mmc, 614ac9da0e0SDiego Santa Cruz const struct mmc_hwpart_conf *conf, 615ac9da0e0SDiego Santa Cruz enum mmc_hwpart_conf_mode mode) 616ac9da0e0SDiego Santa Cruz { 617ac9da0e0SDiego Santa Cruz u8 part_attrs = 0; 618ac9da0e0SDiego Santa Cruz u32 enh_size_mult; 619ac9da0e0SDiego Santa Cruz u32 enh_start_addr; 620ac9da0e0SDiego Santa Cruz u32 gp_size_mult[4]; 621ac9da0e0SDiego Santa Cruz u32 max_enh_size_mult; 622ac9da0e0SDiego Santa Cruz u32 tot_enh_size_mult = 0; 6238dda5b0eSDiego Santa Cruz u8 wr_rel_set; 624ac9da0e0SDiego Santa Cruz int i, pidx, err; 625ac9da0e0SDiego Santa Cruz ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 626ac9da0e0SDiego Santa Cruz 627ac9da0e0SDiego Santa Cruz if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE) 628ac9da0e0SDiego Santa Cruz return -EINVAL; 629ac9da0e0SDiego Santa Cruz 630ac9da0e0SDiego Santa Cruz if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) { 631ac9da0e0SDiego Santa Cruz printf("eMMC >= 4.4 required for enhanced user data area\n"); 632ac9da0e0SDiego Santa Cruz return -EMEDIUMTYPE; 633ac9da0e0SDiego Santa Cruz } 634ac9da0e0SDiego Santa Cruz 635ac9da0e0SDiego Santa Cruz if (!(mmc->part_support & PART_SUPPORT)) { 636ac9da0e0SDiego Santa Cruz printf("Card does not support partitioning\n"); 637ac9da0e0SDiego Santa Cruz return -EMEDIUMTYPE; 638ac9da0e0SDiego Santa Cruz } 639ac9da0e0SDiego Santa Cruz 640ac9da0e0SDiego Santa Cruz if (!mmc->hc_wp_grp_size) { 641ac9da0e0SDiego Santa Cruz printf("Card does not define HC WP group size\n"); 642ac9da0e0SDiego Santa Cruz return -EMEDIUMTYPE; 643ac9da0e0SDiego Santa Cruz } 644ac9da0e0SDiego Santa Cruz 645ac9da0e0SDiego Santa Cruz /* check partition alignment and total enhanced size */ 646ac9da0e0SDiego Santa Cruz if (conf->user.enh_size) { 647ac9da0e0SDiego Santa Cruz if (conf->user.enh_size % mmc->hc_wp_grp_size || 648ac9da0e0SDiego Santa Cruz conf->user.enh_start % mmc->hc_wp_grp_size) { 649ac9da0e0SDiego Santa Cruz printf("User data enhanced area not HC WP group " 650ac9da0e0SDiego Santa Cruz "size aligned\n"); 651ac9da0e0SDiego Santa Cruz return -EINVAL; 652ac9da0e0SDiego Santa Cruz } 653ac9da0e0SDiego Santa Cruz part_attrs |= EXT_CSD_ENH_USR; 654ac9da0e0SDiego Santa Cruz enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size; 655ac9da0e0SDiego Santa Cruz if (mmc->high_capacity) { 656ac9da0e0SDiego Santa Cruz enh_start_addr = conf->user.enh_start; 657ac9da0e0SDiego Santa Cruz } else { 658ac9da0e0SDiego Santa Cruz enh_start_addr = (conf->user.enh_start << 9); 659ac9da0e0SDiego Santa Cruz } 660ac9da0e0SDiego Santa Cruz } else { 661ac9da0e0SDiego Santa Cruz enh_size_mult = 0; 662ac9da0e0SDiego Santa Cruz enh_start_addr = 0; 663ac9da0e0SDiego Santa Cruz } 664ac9da0e0SDiego Santa Cruz tot_enh_size_mult += enh_size_mult; 665ac9da0e0SDiego Santa Cruz 666ac9da0e0SDiego Santa Cruz for (pidx = 0; pidx < 4; pidx++) { 667ac9da0e0SDiego Santa Cruz if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) { 668ac9da0e0SDiego Santa Cruz printf("GP%i partition not HC WP group size " 669ac9da0e0SDiego Santa Cruz "aligned\n", pidx+1); 670ac9da0e0SDiego Santa Cruz return -EINVAL; 671ac9da0e0SDiego Santa Cruz } 672ac9da0e0SDiego Santa Cruz gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size; 673ac9da0e0SDiego Santa Cruz if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) { 674ac9da0e0SDiego Santa Cruz part_attrs |= EXT_CSD_ENH_GP(pidx); 675ac9da0e0SDiego Santa Cruz tot_enh_size_mult += gp_size_mult[pidx]; 676ac9da0e0SDiego Santa Cruz } 677ac9da0e0SDiego Santa Cruz } 678ac9da0e0SDiego Santa Cruz 679ac9da0e0SDiego Santa Cruz if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) { 680ac9da0e0SDiego Santa Cruz printf("Card does not support enhanced attribute\n"); 681ac9da0e0SDiego Santa Cruz return -EMEDIUMTYPE; 682ac9da0e0SDiego Santa Cruz } 683ac9da0e0SDiego Santa Cruz 684ac9da0e0SDiego Santa Cruz err = mmc_send_ext_csd(mmc, ext_csd); 685ac9da0e0SDiego Santa Cruz if (err) 686ac9da0e0SDiego Santa Cruz return err; 687ac9da0e0SDiego Santa Cruz 688ac9da0e0SDiego Santa Cruz max_enh_size_mult = 689ac9da0e0SDiego Santa Cruz (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) + 690ac9da0e0SDiego Santa Cruz (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) + 691ac9da0e0SDiego Santa Cruz ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT]; 692ac9da0e0SDiego Santa Cruz if (tot_enh_size_mult > max_enh_size_mult) { 693ac9da0e0SDiego Santa Cruz printf("Total enhanced size exceeds maximum (%u > %u)\n", 694ac9da0e0SDiego Santa Cruz tot_enh_size_mult, max_enh_size_mult); 695ac9da0e0SDiego Santa Cruz return -EMEDIUMTYPE; 696ac9da0e0SDiego Santa Cruz } 697ac9da0e0SDiego Santa Cruz 6988dda5b0eSDiego Santa Cruz /* The default value of EXT_CSD_WR_REL_SET is device 6998dda5b0eSDiego Santa Cruz * dependent, the values can only be changed if the 7008dda5b0eSDiego Santa Cruz * EXT_CSD_HS_CTRL_REL bit is set. The values can be 7018dda5b0eSDiego Santa Cruz * changed only once and before partitioning is completed. */ 7028dda5b0eSDiego Santa Cruz wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET]; 7038dda5b0eSDiego Santa Cruz if (conf->user.wr_rel_change) { 7048dda5b0eSDiego Santa Cruz if (conf->user.wr_rel_set) 7058dda5b0eSDiego Santa Cruz wr_rel_set |= EXT_CSD_WR_DATA_REL_USR; 7068dda5b0eSDiego Santa Cruz else 7078dda5b0eSDiego Santa Cruz wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR; 7088dda5b0eSDiego Santa Cruz } 7098dda5b0eSDiego Santa Cruz for (pidx = 0; pidx < 4; pidx++) { 7108dda5b0eSDiego Santa Cruz if (conf->gp_part[pidx].wr_rel_change) { 7118dda5b0eSDiego Santa Cruz if (conf->gp_part[pidx].wr_rel_set) 7128dda5b0eSDiego Santa Cruz wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx); 7138dda5b0eSDiego Santa Cruz else 7148dda5b0eSDiego Santa Cruz wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx); 7158dda5b0eSDiego Santa Cruz } 7168dda5b0eSDiego Santa Cruz } 7178dda5b0eSDiego Santa Cruz 7188dda5b0eSDiego Santa Cruz if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] && 7198dda5b0eSDiego Santa Cruz !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) { 7208dda5b0eSDiego Santa Cruz puts("Card does not support host controlled partition write " 7218dda5b0eSDiego Santa Cruz "reliability settings\n"); 7228dda5b0eSDiego Santa Cruz return -EMEDIUMTYPE; 7238dda5b0eSDiego Santa Cruz } 7248dda5b0eSDiego Santa Cruz 725ac9da0e0SDiego Santa Cruz if (ext_csd[EXT_CSD_PARTITION_SETTING] & 726ac9da0e0SDiego Santa Cruz EXT_CSD_PARTITION_SETTING_COMPLETED) { 727ac9da0e0SDiego Santa Cruz printf("Card already partitioned\n"); 728ac9da0e0SDiego Santa Cruz return -EPERM; 729ac9da0e0SDiego Santa Cruz } 730ac9da0e0SDiego Santa Cruz 731ac9da0e0SDiego Santa Cruz if (mode == MMC_HWPART_CONF_CHECK) 732ac9da0e0SDiego Santa Cruz return 0; 733ac9da0e0SDiego Santa Cruz 734ac9da0e0SDiego Santa Cruz /* Partitioning requires high-capacity size definitions */ 735ac9da0e0SDiego Santa Cruz if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) { 736ac9da0e0SDiego Santa Cruz err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 737ac9da0e0SDiego Santa Cruz EXT_CSD_ERASE_GROUP_DEF, 1); 738ac9da0e0SDiego Santa Cruz 739ac9da0e0SDiego Santa Cruz if (err) 740ac9da0e0SDiego Santa Cruz return err; 741ac9da0e0SDiego Santa Cruz 742ac9da0e0SDiego Santa Cruz ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1; 743ac9da0e0SDiego Santa Cruz 744ac9da0e0SDiego Santa Cruz /* update erase group size to be high-capacity */ 745ac9da0e0SDiego Santa Cruz mmc->erase_grp_size = 746ac9da0e0SDiego Santa Cruz ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024; 747ac9da0e0SDiego Santa Cruz 748ac9da0e0SDiego Santa Cruz } 749ac9da0e0SDiego Santa Cruz 750ac9da0e0SDiego Santa Cruz /* all OK, write the configuration */ 751ac9da0e0SDiego Santa Cruz for (i = 0; i < 4; i++) { 752ac9da0e0SDiego Santa Cruz err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 753ac9da0e0SDiego Santa Cruz EXT_CSD_ENH_START_ADDR+i, 754ac9da0e0SDiego Santa Cruz (enh_start_addr >> (i*8)) & 0xFF); 755ac9da0e0SDiego Santa Cruz if (err) 756ac9da0e0SDiego Santa Cruz return err; 757ac9da0e0SDiego Santa Cruz } 758ac9da0e0SDiego Santa Cruz for (i = 0; i < 3; i++) { 759ac9da0e0SDiego Santa Cruz err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 760ac9da0e0SDiego Santa Cruz EXT_CSD_ENH_SIZE_MULT+i, 761ac9da0e0SDiego Santa Cruz (enh_size_mult >> (i*8)) & 0xFF); 762ac9da0e0SDiego Santa Cruz if (err) 763ac9da0e0SDiego Santa Cruz return err; 764ac9da0e0SDiego Santa Cruz } 765ac9da0e0SDiego Santa Cruz for (pidx = 0; pidx < 4; pidx++) { 766ac9da0e0SDiego Santa Cruz for (i = 0; i < 3; i++) { 767ac9da0e0SDiego Santa Cruz err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 768ac9da0e0SDiego Santa Cruz EXT_CSD_GP_SIZE_MULT+pidx*3+i, 769ac9da0e0SDiego Santa Cruz (gp_size_mult[pidx] >> (i*8)) & 0xFF); 770ac9da0e0SDiego Santa Cruz if (err) 771ac9da0e0SDiego Santa Cruz return err; 772ac9da0e0SDiego Santa Cruz } 773ac9da0e0SDiego Santa Cruz } 774ac9da0e0SDiego Santa Cruz err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 775ac9da0e0SDiego Santa Cruz EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs); 776ac9da0e0SDiego Santa Cruz if (err) 777ac9da0e0SDiego Santa Cruz return err; 778ac9da0e0SDiego Santa Cruz 779ac9da0e0SDiego Santa Cruz if (mode == MMC_HWPART_CONF_SET) 780ac9da0e0SDiego Santa Cruz return 0; 781ac9da0e0SDiego Santa Cruz 7828dda5b0eSDiego Santa Cruz /* The WR_REL_SET is a write-once register but shall be 7838dda5b0eSDiego Santa Cruz * written before setting PART_SETTING_COMPLETED. As it is 7848dda5b0eSDiego Santa Cruz * write-once we can only write it when completing the 7858dda5b0eSDiego Santa Cruz * partitioning. */ 7868dda5b0eSDiego Santa Cruz if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) { 7878dda5b0eSDiego Santa Cruz err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 7888dda5b0eSDiego Santa Cruz EXT_CSD_WR_REL_SET, wr_rel_set); 7898dda5b0eSDiego Santa Cruz if (err) 7908dda5b0eSDiego Santa Cruz return err; 7918dda5b0eSDiego Santa Cruz } 7928dda5b0eSDiego Santa Cruz 793ac9da0e0SDiego Santa Cruz /* Setting PART_SETTING_COMPLETED confirms the partition 794ac9da0e0SDiego Santa Cruz * configuration but it only becomes effective after power 795ac9da0e0SDiego Santa Cruz * cycle, so we do not adjust the partition related settings 796ac9da0e0SDiego Santa Cruz * in the mmc struct. */ 797ac9da0e0SDiego Santa Cruz 798ac9da0e0SDiego Santa Cruz err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 799ac9da0e0SDiego Santa Cruz EXT_CSD_PARTITION_SETTING, 800ac9da0e0SDiego Santa Cruz EXT_CSD_PARTITION_SETTING_COMPLETED); 801ac9da0e0SDiego Santa Cruz if (err) 802ac9da0e0SDiego Santa Cruz return err; 803ac9da0e0SDiego Santa Cruz 804ac9da0e0SDiego Santa Cruz return 0; 805ac9da0e0SDiego Santa Cruz } 806ac9da0e0SDiego Santa Cruz 8078ca51e51SSimon Glass #ifndef CONFIG_DM_MMC_OPS 80848972d90SThierry Reding int mmc_getcd(struct mmc *mmc) 80948972d90SThierry Reding { 81048972d90SThierry Reding int cd; 81148972d90SThierry Reding 81248972d90SThierry Reding cd = board_mmc_getcd(mmc); 81348972d90SThierry Reding 814d4e1da4eSPeter Korsgaard if (cd < 0) { 81593bfd616SPantelis Antoniou if (mmc->cfg->ops->getcd) 81693bfd616SPantelis Antoniou cd = mmc->cfg->ops->getcd(mmc); 817d4e1da4eSPeter Korsgaard else 818d4e1da4eSPeter Korsgaard cd = 1; 819d4e1da4eSPeter Korsgaard } 82048972d90SThierry Reding 82148972d90SThierry Reding return cd; 82248972d90SThierry Reding } 8238ca51e51SSimon Glass #endif 82448972d90SThierry Reding 825fdbb873eSKim Phillips static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) 826272cc70bSAndy Fleming { 827272cc70bSAndy Fleming struct mmc_cmd cmd; 828272cc70bSAndy Fleming struct mmc_data data; 829272cc70bSAndy Fleming 830272cc70bSAndy Fleming /* Switch the frequency */ 831272cc70bSAndy Fleming cmd.cmdidx = SD_CMD_SWITCH_FUNC; 832272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 833272cc70bSAndy Fleming cmd.cmdarg = (mode << 31) | 0xffffff; 834272cc70bSAndy Fleming cmd.cmdarg &= ~(0xf << (group * 4)); 835272cc70bSAndy Fleming cmd.cmdarg |= value << (group * 4); 836272cc70bSAndy Fleming 837272cc70bSAndy Fleming data.dest = (char *)resp; 838272cc70bSAndy Fleming data.blocksize = 64; 839272cc70bSAndy Fleming data.blocks = 1; 840272cc70bSAndy Fleming data.flags = MMC_DATA_READ; 841272cc70bSAndy Fleming 842272cc70bSAndy Fleming return mmc_send_cmd(mmc, &cmd, &data); 843272cc70bSAndy Fleming } 844272cc70bSAndy Fleming 845272cc70bSAndy Fleming 846fdbb873eSKim Phillips static int sd_change_freq(struct mmc *mmc) 847272cc70bSAndy Fleming { 848272cc70bSAndy Fleming int err; 849272cc70bSAndy Fleming struct mmc_cmd cmd; 850f781dd38SAnton staaf ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2); 851f781dd38SAnton staaf ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16); 852272cc70bSAndy Fleming struct mmc_data data; 853272cc70bSAndy Fleming int timeout; 854272cc70bSAndy Fleming 855272cc70bSAndy Fleming mmc->card_caps = 0; 856272cc70bSAndy Fleming 857d52ebf10SThomas Chou if (mmc_host_is_spi(mmc)) 858d52ebf10SThomas Chou return 0; 859d52ebf10SThomas Chou 860272cc70bSAndy Fleming /* Read the SCR to find out if this card supports higher speeds */ 861272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_APP_CMD; 862272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 863272cc70bSAndy Fleming cmd.cmdarg = mmc->rca << 16; 864272cc70bSAndy Fleming 865272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 866272cc70bSAndy Fleming 867272cc70bSAndy Fleming if (err) 868272cc70bSAndy Fleming return err; 869272cc70bSAndy Fleming 870272cc70bSAndy Fleming cmd.cmdidx = SD_CMD_APP_SEND_SCR; 871272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 872272cc70bSAndy Fleming cmd.cmdarg = 0; 873272cc70bSAndy Fleming 874272cc70bSAndy Fleming timeout = 3; 875272cc70bSAndy Fleming 876272cc70bSAndy Fleming retry_scr: 877f781dd38SAnton staaf data.dest = (char *)scr; 878272cc70bSAndy Fleming data.blocksize = 8; 879272cc70bSAndy Fleming data.blocks = 1; 880272cc70bSAndy Fleming data.flags = MMC_DATA_READ; 881272cc70bSAndy Fleming 882272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, &data); 883272cc70bSAndy Fleming 884272cc70bSAndy Fleming if (err) { 885272cc70bSAndy Fleming if (timeout--) 886272cc70bSAndy Fleming goto retry_scr; 887272cc70bSAndy Fleming 888272cc70bSAndy Fleming return err; 889272cc70bSAndy Fleming } 890272cc70bSAndy Fleming 8914e3d89baSYauhen Kharuzhy mmc->scr[0] = __be32_to_cpu(scr[0]); 8924e3d89baSYauhen Kharuzhy mmc->scr[1] = __be32_to_cpu(scr[1]); 893272cc70bSAndy Fleming 894272cc70bSAndy Fleming switch ((mmc->scr[0] >> 24) & 0xf) { 895272cc70bSAndy Fleming case 0: 896272cc70bSAndy Fleming mmc->version = SD_VERSION_1_0; 897272cc70bSAndy Fleming break; 898272cc70bSAndy Fleming case 1: 899272cc70bSAndy Fleming mmc->version = SD_VERSION_1_10; 900272cc70bSAndy Fleming break; 901272cc70bSAndy Fleming case 2: 902272cc70bSAndy Fleming mmc->version = SD_VERSION_2; 9031741c64dSJaehoon Chung if ((mmc->scr[0] >> 15) & 0x1) 9041741c64dSJaehoon Chung mmc->version = SD_VERSION_3; 905272cc70bSAndy Fleming break; 906272cc70bSAndy Fleming default: 907272cc70bSAndy Fleming mmc->version = SD_VERSION_1_0; 908272cc70bSAndy Fleming break; 909272cc70bSAndy Fleming } 910272cc70bSAndy Fleming 911b44c7083SAlagu Sankar if (mmc->scr[0] & SD_DATA_4BIT) 912b44c7083SAlagu Sankar mmc->card_caps |= MMC_MODE_4BIT; 913b44c7083SAlagu Sankar 914272cc70bSAndy Fleming /* Version 1.0 doesn't support switching */ 915272cc70bSAndy Fleming if (mmc->version == SD_VERSION_1_0) 916272cc70bSAndy Fleming return 0; 917272cc70bSAndy Fleming 918272cc70bSAndy Fleming timeout = 4; 919272cc70bSAndy Fleming while (timeout--) { 920272cc70bSAndy Fleming err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, 921f781dd38SAnton staaf (u8 *)switch_status); 922272cc70bSAndy Fleming 923272cc70bSAndy Fleming if (err) 924272cc70bSAndy Fleming return err; 925272cc70bSAndy Fleming 926272cc70bSAndy Fleming /* The high-speed function is busy. Try again */ 9274e3d89baSYauhen Kharuzhy if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY)) 928272cc70bSAndy Fleming break; 929272cc70bSAndy Fleming } 930272cc70bSAndy Fleming 931272cc70bSAndy Fleming /* If high-speed isn't supported, we return */ 9324e3d89baSYauhen Kharuzhy if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)) 933272cc70bSAndy Fleming return 0; 934272cc70bSAndy Fleming 9352c3fbf4cSMacpaul Lin /* 9362c3fbf4cSMacpaul Lin * If the host doesn't support SD_HIGHSPEED, do not switch card to 9372c3fbf4cSMacpaul Lin * HIGHSPEED mode even if the card support SD_HIGHSPPED. 9382c3fbf4cSMacpaul Lin * This can avoid furthur problem when the card runs in different 9392c3fbf4cSMacpaul Lin * mode between the host. 9402c3fbf4cSMacpaul Lin */ 94193bfd616SPantelis Antoniou if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) && 94293bfd616SPantelis Antoniou (mmc->cfg->host_caps & MMC_MODE_HS))) 9432c3fbf4cSMacpaul Lin return 0; 9442c3fbf4cSMacpaul Lin 945f781dd38SAnton staaf err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status); 946272cc70bSAndy Fleming 947272cc70bSAndy Fleming if (err) 948272cc70bSAndy Fleming return err; 949272cc70bSAndy Fleming 9504e3d89baSYauhen Kharuzhy if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000) 951272cc70bSAndy Fleming mmc->card_caps |= MMC_MODE_HS; 952272cc70bSAndy Fleming 953272cc70bSAndy Fleming return 0; 954272cc70bSAndy Fleming } 955272cc70bSAndy Fleming 956*3697e599SPeng Fan static int sd_read_ssr(struct mmc *mmc) 957*3697e599SPeng Fan { 958*3697e599SPeng Fan int err, i; 959*3697e599SPeng Fan struct mmc_cmd cmd; 960*3697e599SPeng Fan ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16); 961*3697e599SPeng Fan struct mmc_data data; 962*3697e599SPeng Fan int timeout = 3; 963*3697e599SPeng Fan unsigned int au, eo, et, es; 964*3697e599SPeng Fan 965*3697e599SPeng Fan cmd.cmdidx = MMC_CMD_APP_CMD; 966*3697e599SPeng Fan cmd.resp_type = MMC_RSP_R1; 967*3697e599SPeng Fan cmd.cmdarg = mmc->rca << 16; 968*3697e599SPeng Fan 969*3697e599SPeng Fan err = mmc_send_cmd(mmc, &cmd, NULL); 970*3697e599SPeng Fan if (err) 971*3697e599SPeng Fan return err; 972*3697e599SPeng Fan 973*3697e599SPeng Fan cmd.cmdidx = SD_CMD_APP_SD_STATUS; 974*3697e599SPeng Fan cmd.resp_type = MMC_RSP_R1; 975*3697e599SPeng Fan cmd.cmdarg = 0; 976*3697e599SPeng Fan 977*3697e599SPeng Fan retry_ssr: 978*3697e599SPeng Fan data.dest = (char *)ssr; 979*3697e599SPeng Fan data.blocksize = 64; 980*3697e599SPeng Fan data.blocks = 1; 981*3697e599SPeng Fan data.flags = MMC_DATA_READ; 982*3697e599SPeng Fan 983*3697e599SPeng Fan err = mmc_send_cmd(mmc, &cmd, &data); 984*3697e599SPeng Fan if (err) { 985*3697e599SPeng Fan if (timeout--) 986*3697e599SPeng Fan goto retry_ssr; 987*3697e599SPeng Fan 988*3697e599SPeng Fan return err; 989*3697e599SPeng Fan } 990*3697e599SPeng Fan 991*3697e599SPeng Fan for (i = 0; i < 16; i++) 992*3697e599SPeng Fan ssr[i] = be32_to_cpu(ssr[i]); 993*3697e599SPeng Fan 994*3697e599SPeng Fan au = (ssr[2] >> 12) & 0xF; 995*3697e599SPeng Fan if ((au <= 9) || (mmc->version == SD_VERSION_3)) { 996*3697e599SPeng Fan mmc->ssr.au = sd_au_size[au]; 997*3697e599SPeng Fan es = (ssr[3] >> 24) & 0xFF; 998*3697e599SPeng Fan es |= (ssr[2] & 0xFF) << 8; 999*3697e599SPeng Fan et = (ssr[3] >> 18) & 0x3F; 1000*3697e599SPeng Fan if (es && et) { 1001*3697e599SPeng Fan eo = (ssr[3] >> 16) & 0x3; 1002*3697e599SPeng Fan mmc->ssr.erase_timeout = (et * 1000) / es; 1003*3697e599SPeng Fan mmc->ssr.erase_offset = eo * 1000; 1004*3697e599SPeng Fan } 1005*3697e599SPeng Fan } else { 1006*3697e599SPeng Fan debug("Invalid Allocation Unit Size.\n"); 1007*3697e599SPeng Fan } 1008*3697e599SPeng Fan 1009*3697e599SPeng Fan return 0; 1010*3697e599SPeng Fan } 1011*3697e599SPeng Fan 1012272cc70bSAndy Fleming /* frequency bases */ 1013272cc70bSAndy Fleming /* divided by 10 to be nice to platforms without floating point */ 10145f837c2cSMike Frysinger static const int fbase[] = { 1015272cc70bSAndy Fleming 10000, 1016272cc70bSAndy Fleming 100000, 1017272cc70bSAndy Fleming 1000000, 1018272cc70bSAndy Fleming 10000000, 1019272cc70bSAndy Fleming }; 1020272cc70bSAndy Fleming 1021272cc70bSAndy Fleming /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice 1022272cc70bSAndy Fleming * to platforms without floating point. 1023272cc70bSAndy Fleming */ 102461fe076fSSimon Glass static const u8 multipliers[] = { 1025272cc70bSAndy Fleming 0, /* reserved */ 1026272cc70bSAndy Fleming 10, 1027272cc70bSAndy Fleming 12, 1028272cc70bSAndy Fleming 13, 1029272cc70bSAndy Fleming 15, 1030272cc70bSAndy Fleming 20, 1031272cc70bSAndy Fleming 25, 1032272cc70bSAndy Fleming 30, 1033272cc70bSAndy Fleming 35, 1034272cc70bSAndy Fleming 40, 1035272cc70bSAndy Fleming 45, 1036272cc70bSAndy Fleming 50, 1037272cc70bSAndy Fleming 55, 1038272cc70bSAndy Fleming 60, 1039272cc70bSAndy Fleming 70, 1040272cc70bSAndy Fleming 80, 1041272cc70bSAndy Fleming }; 1042272cc70bSAndy Fleming 10438ca51e51SSimon Glass #ifndef CONFIG_DM_MMC_OPS 1044fdbb873eSKim Phillips static void mmc_set_ios(struct mmc *mmc) 1045272cc70bSAndy Fleming { 104693bfd616SPantelis Antoniou if (mmc->cfg->ops->set_ios) 104793bfd616SPantelis Antoniou mmc->cfg->ops->set_ios(mmc); 1048272cc70bSAndy Fleming } 10498ca51e51SSimon Glass #endif 1050272cc70bSAndy Fleming 1051272cc70bSAndy Fleming void mmc_set_clock(struct mmc *mmc, uint clock) 1052272cc70bSAndy Fleming { 105393bfd616SPantelis Antoniou if (clock > mmc->cfg->f_max) 105493bfd616SPantelis Antoniou clock = mmc->cfg->f_max; 1055272cc70bSAndy Fleming 105693bfd616SPantelis Antoniou if (clock < mmc->cfg->f_min) 105793bfd616SPantelis Antoniou clock = mmc->cfg->f_min; 1058272cc70bSAndy Fleming 1059272cc70bSAndy Fleming mmc->clock = clock; 1060272cc70bSAndy Fleming 1061272cc70bSAndy Fleming mmc_set_ios(mmc); 1062272cc70bSAndy Fleming } 1063272cc70bSAndy Fleming 1064fdbb873eSKim Phillips static void mmc_set_bus_width(struct mmc *mmc, uint width) 1065272cc70bSAndy Fleming { 1066272cc70bSAndy Fleming mmc->bus_width = width; 1067272cc70bSAndy Fleming 1068272cc70bSAndy Fleming mmc_set_ios(mmc); 1069272cc70bSAndy Fleming } 1070272cc70bSAndy Fleming 1071fdbb873eSKim Phillips static int mmc_startup(struct mmc *mmc) 1072272cc70bSAndy Fleming { 1073f866a46dSStephen Warren int err, i; 1074272cc70bSAndy Fleming uint mult, freq; 1075639b7827SYoshihiro Shimoda u64 cmult, csize, capacity; 1076272cc70bSAndy Fleming struct mmc_cmd cmd; 10778bfa195eSSimon Glass ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 10788bfa195eSSimon Glass ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN); 10795d4fc8d9SRaffaele Recalcati int timeout = 1000; 10800c453bb7SDiego Santa Cruz bool has_parts = false; 10818a0cf490SDiego Santa Cruz bool part_completed; 1082c40fdca6SSimon Glass struct blk_desc *bdesc; 1083272cc70bSAndy Fleming 1084d52ebf10SThomas Chou #ifdef CONFIG_MMC_SPI_CRC_ON 1085d52ebf10SThomas Chou if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */ 1086d52ebf10SThomas Chou cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF; 1087d52ebf10SThomas Chou cmd.resp_type = MMC_RSP_R1; 1088d52ebf10SThomas Chou cmd.cmdarg = 1; 1089d52ebf10SThomas Chou err = mmc_send_cmd(mmc, &cmd, NULL); 1090d52ebf10SThomas Chou 1091d52ebf10SThomas Chou if (err) 1092d52ebf10SThomas Chou return err; 1093d52ebf10SThomas Chou } 1094d52ebf10SThomas Chou #endif 1095d52ebf10SThomas Chou 1096272cc70bSAndy Fleming /* Put the Card in Identify Mode */ 1097d52ebf10SThomas Chou cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID : 1098d52ebf10SThomas Chou MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */ 1099272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R2; 1100272cc70bSAndy Fleming cmd.cmdarg = 0; 1101272cc70bSAndy Fleming 1102272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 1103272cc70bSAndy Fleming 1104272cc70bSAndy Fleming if (err) 1105272cc70bSAndy Fleming return err; 1106272cc70bSAndy Fleming 1107272cc70bSAndy Fleming memcpy(mmc->cid, cmd.response, 16); 1108272cc70bSAndy Fleming 1109272cc70bSAndy Fleming /* 1110272cc70bSAndy Fleming * For MMC cards, set the Relative Address. 1111272cc70bSAndy Fleming * For SD cards, get the Relatvie Address. 1112272cc70bSAndy Fleming * This also puts the cards into Standby State 1113272cc70bSAndy Fleming */ 1114d52ebf10SThomas Chou if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ 1115272cc70bSAndy Fleming cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; 1116272cc70bSAndy Fleming cmd.cmdarg = mmc->rca << 16; 1117272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R6; 1118272cc70bSAndy Fleming 1119272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 1120272cc70bSAndy Fleming 1121272cc70bSAndy Fleming if (err) 1122272cc70bSAndy Fleming return err; 1123272cc70bSAndy Fleming 1124272cc70bSAndy Fleming if (IS_SD(mmc)) 1125998be3ddSRabin Vincent mmc->rca = (cmd.response[0] >> 16) & 0xffff; 1126d52ebf10SThomas Chou } 1127272cc70bSAndy Fleming 1128272cc70bSAndy Fleming /* Get the Card-Specific Data */ 1129272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_SEND_CSD; 1130272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R2; 1131272cc70bSAndy Fleming cmd.cmdarg = mmc->rca << 16; 1132272cc70bSAndy Fleming 1133272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 1134272cc70bSAndy Fleming 11355d4fc8d9SRaffaele Recalcati /* Waiting for the ready status */ 11365d4fc8d9SRaffaele Recalcati mmc_send_status(mmc, timeout); 11375d4fc8d9SRaffaele Recalcati 1138272cc70bSAndy Fleming if (err) 1139272cc70bSAndy Fleming return err; 1140272cc70bSAndy Fleming 1141998be3ddSRabin Vincent mmc->csd[0] = cmd.response[0]; 1142998be3ddSRabin Vincent mmc->csd[1] = cmd.response[1]; 1143998be3ddSRabin Vincent mmc->csd[2] = cmd.response[2]; 1144998be3ddSRabin Vincent mmc->csd[3] = cmd.response[3]; 1145272cc70bSAndy Fleming 1146272cc70bSAndy Fleming if (mmc->version == MMC_VERSION_UNKNOWN) { 11470b453ffeSRabin Vincent int version = (cmd.response[0] >> 26) & 0xf; 1148272cc70bSAndy Fleming 1149272cc70bSAndy Fleming switch (version) { 1150272cc70bSAndy Fleming case 0: 1151272cc70bSAndy Fleming mmc->version = MMC_VERSION_1_2; 1152272cc70bSAndy Fleming break; 1153272cc70bSAndy Fleming case 1: 1154272cc70bSAndy Fleming mmc->version = MMC_VERSION_1_4; 1155272cc70bSAndy Fleming break; 1156272cc70bSAndy Fleming case 2: 1157272cc70bSAndy Fleming mmc->version = MMC_VERSION_2_2; 1158272cc70bSAndy Fleming break; 1159272cc70bSAndy Fleming case 3: 1160272cc70bSAndy Fleming mmc->version = MMC_VERSION_3; 1161272cc70bSAndy Fleming break; 1162272cc70bSAndy Fleming case 4: 1163272cc70bSAndy Fleming mmc->version = MMC_VERSION_4; 1164272cc70bSAndy Fleming break; 1165272cc70bSAndy Fleming default: 1166272cc70bSAndy Fleming mmc->version = MMC_VERSION_1_2; 1167272cc70bSAndy Fleming break; 1168272cc70bSAndy Fleming } 1169272cc70bSAndy Fleming } 1170272cc70bSAndy Fleming 1171272cc70bSAndy Fleming /* divide frequency by 10, since the mults are 10x bigger */ 11720b453ffeSRabin Vincent freq = fbase[(cmd.response[0] & 0x7)]; 11730b453ffeSRabin Vincent mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; 1174272cc70bSAndy Fleming 1175272cc70bSAndy Fleming mmc->tran_speed = freq * mult; 1176272cc70bSAndy Fleming 1177ab71188cSMarkus Niebel mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1); 1178998be3ddSRabin Vincent mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); 1179272cc70bSAndy Fleming 1180272cc70bSAndy Fleming if (IS_SD(mmc)) 1181272cc70bSAndy Fleming mmc->write_bl_len = mmc->read_bl_len; 1182272cc70bSAndy Fleming else 1183998be3ddSRabin Vincent mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); 1184272cc70bSAndy Fleming 1185272cc70bSAndy Fleming if (mmc->high_capacity) { 1186272cc70bSAndy Fleming csize = (mmc->csd[1] & 0x3f) << 16 1187272cc70bSAndy Fleming | (mmc->csd[2] & 0xffff0000) >> 16; 1188272cc70bSAndy Fleming cmult = 8; 1189272cc70bSAndy Fleming } else { 1190272cc70bSAndy Fleming csize = (mmc->csd[1] & 0x3ff) << 2 1191272cc70bSAndy Fleming | (mmc->csd[2] & 0xc0000000) >> 30; 1192272cc70bSAndy Fleming cmult = (mmc->csd[2] & 0x00038000) >> 15; 1193272cc70bSAndy Fleming } 1194272cc70bSAndy Fleming 1195f866a46dSStephen Warren mmc->capacity_user = (csize + 1) << (cmult + 2); 1196f866a46dSStephen Warren mmc->capacity_user *= mmc->read_bl_len; 1197f866a46dSStephen Warren mmc->capacity_boot = 0; 1198f866a46dSStephen Warren mmc->capacity_rpmb = 0; 1199f866a46dSStephen Warren for (i = 0; i < 4; i++) 1200f866a46dSStephen Warren mmc->capacity_gp[i] = 0; 1201272cc70bSAndy Fleming 12028bfa195eSSimon Glass if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN) 12038bfa195eSSimon Glass mmc->read_bl_len = MMC_MAX_BLOCK_LEN; 1204272cc70bSAndy Fleming 12058bfa195eSSimon Glass if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN) 12068bfa195eSSimon Glass mmc->write_bl_len = MMC_MAX_BLOCK_LEN; 1207272cc70bSAndy Fleming 1208ab71188cSMarkus Niebel if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) { 1209ab71188cSMarkus Niebel cmd.cmdidx = MMC_CMD_SET_DSR; 1210ab71188cSMarkus Niebel cmd.cmdarg = (mmc->dsr & 0xffff) << 16; 1211ab71188cSMarkus Niebel cmd.resp_type = MMC_RSP_NONE; 1212ab71188cSMarkus Niebel if (mmc_send_cmd(mmc, &cmd, NULL)) 1213ab71188cSMarkus Niebel printf("MMC: SET_DSR failed\n"); 1214ab71188cSMarkus Niebel } 1215ab71188cSMarkus Niebel 1216272cc70bSAndy Fleming /* Select the card, and put it into Transfer Mode */ 1217d52ebf10SThomas Chou if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ 1218272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_SELECT_CARD; 1219fe8f7066SAjay Bhargav cmd.resp_type = MMC_RSP_R1; 1220272cc70bSAndy Fleming cmd.cmdarg = mmc->rca << 16; 1221272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 1222272cc70bSAndy Fleming 1223272cc70bSAndy Fleming if (err) 1224272cc70bSAndy Fleming return err; 1225d52ebf10SThomas Chou } 1226272cc70bSAndy Fleming 1227e6f99a56SLei Wen /* 1228e6f99a56SLei Wen * For SD, its erase group is always one sector 1229e6f99a56SLei Wen */ 1230e6f99a56SLei Wen mmc->erase_grp_size = 1; 1231bc897b1dSLei Wen mmc->part_config = MMCPART_NOAVAILABLE; 1232d23e2c09SSukumar Ghorai if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) { 1233d23e2c09SSukumar Ghorai /* check ext_csd version and capacity */ 1234d23e2c09SSukumar Ghorai err = mmc_send_ext_csd(mmc, ext_csd); 12359cf199ebSDiego Santa Cruz if (err) 12369cf199ebSDiego Santa Cruz return err; 12379cf199ebSDiego Santa Cruz if (ext_csd[EXT_CSD_REV] >= 2) { 1238639b7827SYoshihiro Shimoda /* 1239639b7827SYoshihiro Shimoda * According to the JEDEC Standard, the value of 1240639b7827SYoshihiro Shimoda * ext_csd's capacity is valid if the value is more 1241639b7827SYoshihiro Shimoda * than 2GB 1242639b7827SYoshihiro Shimoda */ 12430560db18SLei Wen capacity = ext_csd[EXT_CSD_SEC_CNT] << 0 12440560db18SLei Wen | ext_csd[EXT_CSD_SEC_CNT + 1] << 8 12450560db18SLei Wen | ext_csd[EXT_CSD_SEC_CNT + 2] << 16 12460560db18SLei Wen | ext_csd[EXT_CSD_SEC_CNT + 3] << 24; 12478bfa195eSSimon Glass capacity *= MMC_MAX_BLOCK_LEN; 1248b1f1e821SŁukasz Majewski if ((capacity >> 20) > 2 * 1024) 1249f866a46dSStephen Warren mmc->capacity_user = capacity; 1250d23e2c09SSukumar Ghorai } 1251bc897b1dSLei Wen 125264f4a619SJaehoon Chung switch (ext_csd[EXT_CSD_REV]) { 125364f4a619SJaehoon Chung case 1: 125464f4a619SJaehoon Chung mmc->version = MMC_VERSION_4_1; 125564f4a619SJaehoon Chung break; 125664f4a619SJaehoon Chung case 2: 125764f4a619SJaehoon Chung mmc->version = MMC_VERSION_4_2; 125864f4a619SJaehoon Chung break; 125964f4a619SJaehoon Chung case 3: 126064f4a619SJaehoon Chung mmc->version = MMC_VERSION_4_3; 126164f4a619SJaehoon Chung break; 126264f4a619SJaehoon Chung case 5: 126364f4a619SJaehoon Chung mmc->version = MMC_VERSION_4_41; 126464f4a619SJaehoon Chung break; 126564f4a619SJaehoon Chung case 6: 126664f4a619SJaehoon Chung mmc->version = MMC_VERSION_4_5; 126764f4a619SJaehoon Chung break; 1268edab723bSMarkus Niebel case 7: 1269edab723bSMarkus Niebel mmc->version = MMC_VERSION_5_0; 1270edab723bSMarkus Niebel break; 12711a3619cfSStefan Wahren case 8: 12721a3619cfSStefan Wahren mmc->version = MMC_VERSION_5_1; 12731a3619cfSStefan Wahren break; 127464f4a619SJaehoon Chung } 127564f4a619SJaehoon Chung 12768a0cf490SDiego Santa Cruz /* The partition data may be non-zero but it is only 12778a0cf490SDiego Santa Cruz * effective if PARTITION_SETTING_COMPLETED is set in 12788a0cf490SDiego Santa Cruz * EXT_CSD, so ignore any data if this bit is not set, 12798a0cf490SDiego Santa Cruz * except for enabling the high-capacity group size 12808a0cf490SDiego Santa Cruz * definition (see below). */ 12818a0cf490SDiego Santa Cruz part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] & 12828a0cf490SDiego Santa Cruz EXT_CSD_PARTITION_SETTING_COMPLETED); 12838a0cf490SDiego Santa Cruz 12840c453bb7SDiego Santa Cruz /* store the partition info of emmc */ 12850c453bb7SDiego Santa Cruz mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT]; 12860c453bb7SDiego Santa Cruz if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) || 12870c453bb7SDiego Santa Cruz ext_csd[EXT_CSD_BOOT_MULT]) 12880c453bb7SDiego Santa Cruz mmc->part_config = ext_csd[EXT_CSD_PART_CONF]; 12898a0cf490SDiego Santa Cruz if (part_completed && 12908a0cf490SDiego Santa Cruz (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT)) 12910c453bb7SDiego Santa Cruz mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE]; 12920c453bb7SDiego Santa Cruz 12930c453bb7SDiego Santa Cruz mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17; 12940c453bb7SDiego Santa Cruz 12950c453bb7SDiego Santa Cruz mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17; 12960c453bb7SDiego Santa Cruz 12970c453bb7SDiego Santa Cruz for (i = 0; i < 4; i++) { 12980c453bb7SDiego Santa Cruz int idx = EXT_CSD_GP_SIZE_MULT + i * 3; 12998a0cf490SDiego Santa Cruz uint mult = (ext_csd[idx + 2] << 16) + 13000c453bb7SDiego Santa Cruz (ext_csd[idx + 1] << 8) + ext_csd[idx]; 13018a0cf490SDiego Santa Cruz if (mult) 13028a0cf490SDiego Santa Cruz has_parts = true; 13038a0cf490SDiego Santa Cruz if (!part_completed) 13048a0cf490SDiego Santa Cruz continue; 13058a0cf490SDiego Santa Cruz mmc->capacity_gp[i] = mult; 13060c453bb7SDiego Santa Cruz mmc->capacity_gp[i] *= 13070c453bb7SDiego Santa Cruz ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; 13080c453bb7SDiego Santa Cruz mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1309f8e89d67SDiego Santa Cruz mmc->capacity_gp[i] <<= 19; 13100c453bb7SDiego Santa Cruz } 13110c453bb7SDiego Santa Cruz 13128a0cf490SDiego Santa Cruz if (part_completed) { 1313a7f852b6SDiego Santa Cruz mmc->enh_user_size = 1314a7f852b6SDiego Santa Cruz (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) + 1315a7f852b6SDiego Santa Cruz (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) + 1316a7f852b6SDiego Santa Cruz ext_csd[EXT_CSD_ENH_SIZE_MULT]; 1317a7f852b6SDiego Santa Cruz mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; 1318a7f852b6SDiego Santa Cruz mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1319a7f852b6SDiego Santa Cruz mmc->enh_user_size <<= 19; 1320a7f852b6SDiego Santa Cruz mmc->enh_user_start = 1321a7f852b6SDiego Santa Cruz (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) + 1322a7f852b6SDiego Santa Cruz (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) + 1323a7f852b6SDiego Santa Cruz (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) + 1324a7f852b6SDiego Santa Cruz ext_csd[EXT_CSD_ENH_START_ADDR]; 1325a7f852b6SDiego Santa Cruz if (mmc->high_capacity) 1326a7f852b6SDiego Santa Cruz mmc->enh_user_start <<= 9; 13278a0cf490SDiego Santa Cruz } 1328a7f852b6SDiego Santa Cruz 1329e6f99a56SLei Wen /* 13301937e5aaSOliver Metz * Host needs to enable ERASE_GRP_DEF bit if device is 13311937e5aaSOliver Metz * partitioned. This bit will be lost every time after a reset 13321937e5aaSOliver Metz * or power off. This will affect erase size. 1333e6f99a56SLei Wen */ 13348a0cf490SDiego Santa Cruz if (part_completed) 13350c453bb7SDiego Santa Cruz has_parts = true; 13361937e5aaSOliver Metz if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) && 13370c453bb7SDiego Santa Cruz (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) 13380c453bb7SDiego Santa Cruz has_parts = true; 13390c453bb7SDiego Santa Cruz if (has_parts) { 13401937e5aaSOliver Metz err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 13411937e5aaSOliver Metz EXT_CSD_ERASE_GROUP_DEF, 1); 13421937e5aaSOliver Metz 13431937e5aaSOliver Metz if (err) 13441937e5aaSOliver Metz return err; 1345021a8055SHannes Petermaier else 1346021a8055SHannes Petermaier ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1; 1347037dc0abSDiego Santa Cruz } 13481937e5aaSOliver Metz 1349037dc0abSDiego Santa Cruz if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) { 13501937e5aaSOliver Metz /* Read out group size from ext_csd */ 13510560db18SLei Wen mmc->erase_grp_size = 1352a4ff9f83SDiego Santa Cruz ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024; 1353d7b29129SMarkus Niebel /* 1354d7b29129SMarkus Niebel * if high capacity and partition setting completed 1355d7b29129SMarkus Niebel * SEC_COUNT is valid even if it is smaller than 2 GiB 1356d7b29129SMarkus Niebel * JEDEC Standard JESD84-B45, 6.2.4 1357d7b29129SMarkus Niebel */ 13588a0cf490SDiego Santa Cruz if (mmc->high_capacity && part_completed) { 1359d7b29129SMarkus Niebel capacity = (ext_csd[EXT_CSD_SEC_CNT]) | 1360d7b29129SMarkus Niebel (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) | 1361d7b29129SMarkus Niebel (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) | 1362d7b29129SMarkus Niebel (ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 1363d7b29129SMarkus Niebel capacity *= MMC_MAX_BLOCK_LEN; 1364d7b29129SMarkus Niebel mmc->capacity_user = capacity; 1365d7b29129SMarkus Niebel } 13668bfa195eSSimon Glass } else { 13671937e5aaSOliver Metz /* Calculate the group size from the csd value. */ 1368e6f99a56SLei Wen int erase_gsz, erase_gmul; 1369e6f99a56SLei Wen erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10; 1370e6f99a56SLei Wen erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5; 1371e6f99a56SLei Wen mmc->erase_grp_size = (erase_gsz + 1) 1372e6f99a56SLei Wen * (erase_gmul + 1); 1373e6f99a56SLei Wen } 1374037dc0abSDiego Santa Cruz 1375037dc0abSDiego Santa Cruz mmc->hc_wp_grp_size = 1024 1376037dc0abSDiego Santa Cruz * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] 1377037dc0abSDiego Santa Cruz * ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 13789e41a00bSDiego Santa Cruz 13799e41a00bSDiego Santa Cruz mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET]; 1380f866a46dSStephen Warren } 1381f866a46dSStephen Warren 1382c40fdca6SSimon Glass err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart); 1383f866a46dSStephen Warren if (err) 1384f866a46dSStephen Warren return err; 1385d23e2c09SSukumar Ghorai 1386272cc70bSAndy Fleming if (IS_SD(mmc)) 1387272cc70bSAndy Fleming err = sd_change_freq(mmc); 1388272cc70bSAndy Fleming else 1389272cc70bSAndy Fleming err = mmc_change_freq(mmc); 1390272cc70bSAndy Fleming 1391272cc70bSAndy Fleming if (err) 1392272cc70bSAndy Fleming return err; 1393272cc70bSAndy Fleming 1394272cc70bSAndy Fleming /* Restrict card's capabilities by what the host can do */ 139593bfd616SPantelis Antoniou mmc->card_caps &= mmc->cfg->host_caps; 1396272cc70bSAndy Fleming 1397272cc70bSAndy Fleming if (IS_SD(mmc)) { 1398272cc70bSAndy Fleming if (mmc->card_caps & MMC_MODE_4BIT) { 1399272cc70bSAndy Fleming cmd.cmdidx = MMC_CMD_APP_CMD; 1400272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 1401272cc70bSAndy Fleming cmd.cmdarg = mmc->rca << 16; 1402272cc70bSAndy Fleming 1403272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 1404272cc70bSAndy Fleming if (err) 1405272cc70bSAndy Fleming return err; 1406272cc70bSAndy Fleming 1407272cc70bSAndy Fleming cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; 1408272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R1; 1409272cc70bSAndy Fleming cmd.cmdarg = 2; 1410272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 1411272cc70bSAndy Fleming if (err) 1412272cc70bSAndy Fleming return err; 1413272cc70bSAndy Fleming 1414272cc70bSAndy Fleming mmc_set_bus_width(mmc, 4); 1415272cc70bSAndy Fleming } 1416272cc70bSAndy Fleming 1417*3697e599SPeng Fan err = sd_read_ssr(mmc); 1418*3697e599SPeng Fan if (err) 1419*3697e599SPeng Fan return err; 1420*3697e599SPeng Fan 1421272cc70bSAndy Fleming if (mmc->card_caps & MMC_MODE_HS) 1422ad5fd922SJaehoon Chung mmc->tran_speed = 50000000; 1423272cc70bSAndy Fleming else 1424ad5fd922SJaehoon Chung mmc->tran_speed = 25000000; 1425fc5b32fbSAndrew Gabbasov } else if (mmc->version >= MMC_VERSION_4) { 1426fc5b32fbSAndrew Gabbasov /* Only version 4 of MMC supports wider bus widths */ 14277798f6dbSAndy Fleming int idx; 14287798f6dbSAndy Fleming 14297798f6dbSAndy Fleming /* An array of possible bus widths in order of preference */ 14307798f6dbSAndy Fleming static unsigned ext_csd_bits[] = { 1431d22e3d46SJaehoon Chung EXT_CSD_DDR_BUS_WIDTH_8, 1432d22e3d46SJaehoon Chung EXT_CSD_DDR_BUS_WIDTH_4, 14337798f6dbSAndy Fleming EXT_CSD_BUS_WIDTH_8, 14347798f6dbSAndy Fleming EXT_CSD_BUS_WIDTH_4, 14357798f6dbSAndy Fleming EXT_CSD_BUS_WIDTH_1, 14367798f6dbSAndy Fleming }; 14377798f6dbSAndy Fleming 14387798f6dbSAndy Fleming /* An array to map CSD bus widths to host cap bits */ 14397798f6dbSAndy Fleming static unsigned ext_to_hostcaps[] = { 1440786e8f81SAndrew Gabbasov [EXT_CSD_DDR_BUS_WIDTH_4] = 1441786e8f81SAndrew Gabbasov MMC_MODE_DDR_52MHz | MMC_MODE_4BIT, 1442786e8f81SAndrew Gabbasov [EXT_CSD_DDR_BUS_WIDTH_8] = 1443786e8f81SAndrew Gabbasov MMC_MODE_DDR_52MHz | MMC_MODE_8BIT, 14447798f6dbSAndy Fleming [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT, 14457798f6dbSAndy Fleming [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT, 14467798f6dbSAndy Fleming }; 14477798f6dbSAndy Fleming 14487798f6dbSAndy Fleming /* An array to map chosen bus width to an integer */ 14497798f6dbSAndy Fleming static unsigned widths[] = { 1450d22e3d46SJaehoon Chung 8, 4, 8, 4, 1, 14517798f6dbSAndy Fleming }; 14527798f6dbSAndy Fleming 14537798f6dbSAndy Fleming for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) { 14547798f6dbSAndy Fleming unsigned int extw = ext_csd_bits[idx]; 1455786e8f81SAndrew Gabbasov unsigned int caps = ext_to_hostcaps[extw]; 14567798f6dbSAndy Fleming 14577798f6dbSAndy Fleming /* 1458bf477073SAndrew Gabbasov * If the bus width is still not changed, 1459bf477073SAndrew Gabbasov * don't try to set the default again. 1460bf477073SAndrew Gabbasov * Otherwise, recover from switch attempts 1461bf477073SAndrew Gabbasov * by switching to 1-bit bus width. 1462bf477073SAndrew Gabbasov */ 1463bf477073SAndrew Gabbasov if (extw == EXT_CSD_BUS_WIDTH_1 && 1464bf477073SAndrew Gabbasov mmc->bus_width == 1) { 1465bf477073SAndrew Gabbasov err = 0; 1466bf477073SAndrew Gabbasov break; 1467bf477073SAndrew Gabbasov } 1468bf477073SAndrew Gabbasov 1469bf477073SAndrew Gabbasov /* 1470786e8f81SAndrew Gabbasov * Check to make sure the card and controller support 1471786e8f81SAndrew Gabbasov * these capabilities 14727798f6dbSAndy Fleming */ 1473786e8f81SAndrew Gabbasov if ((mmc->card_caps & caps) != caps) 14747798f6dbSAndy Fleming continue; 14757798f6dbSAndy Fleming 1476272cc70bSAndy Fleming err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 14777798f6dbSAndy Fleming EXT_CSD_BUS_WIDTH, extw); 1478272cc70bSAndy Fleming 1479272cc70bSAndy Fleming if (err) 14804137894eSLei Wen continue; 1481272cc70bSAndy Fleming 1482786e8f81SAndrew Gabbasov mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0; 14837798f6dbSAndy Fleming mmc_set_bus_width(mmc, widths[idx]); 1484272cc70bSAndy Fleming 14854137894eSLei Wen err = mmc_send_ext_csd(mmc, test_csd); 1486272cc70bSAndy Fleming 1487786e8f81SAndrew Gabbasov if (err) 1488786e8f81SAndrew Gabbasov continue; 1489786e8f81SAndrew Gabbasov 1490786e8f81SAndrew Gabbasov /* Only compare read only fields */ 1491786e8f81SAndrew Gabbasov if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] 1492786e8f81SAndrew Gabbasov == test_csd[EXT_CSD_PARTITIONING_SUPPORT] && 1493786e8f81SAndrew Gabbasov ext_csd[EXT_CSD_HC_WP_GRP_SIZE] 1494786e8f81SAndrew Gabbasov == test_csd[EXT_CSD_HC_WP_GRP_SIZE] && 1495786e8f81SAndrew Gabbasov ext_csd[EXT_CSD_REV] 1496786e8f81SAndrew Gabbasov == test_csd[EXT_CSD_REV] && 1497786e8f81SAndrew Gabbasov ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] 1498786e8f81SAndrew Gabbasov == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] && 1499786e8f81SAndrew Gabbasov memcmp(&ext_csd[EXT_CSD_SEC_CNT], 1500786e8f81SAndrew Gabbasov &test_csd[EXT_CSD_SEC_CNT], 4) == 0) 15014137894eSLei Wen break; 1502786e8f81SAndrew Gabbasov else 1503915ffa52SJaehoon Chung err = -EBADMSG; 15044137894eSLei Wen } 1505786e8f81SAndrew Gabbasov 1506786e8f81SAndrew Gabbasov if (err) 1507786e8f81SAndrew Gabbasov return err; 1508272cc70bSAndy Fleming 1509272cc70bSAndy Fleming if (mmc->card_caps & MMC_MODE_HS) { 1510272cc70bSAndy Fleming if (mmc->card_caps & MMC_MODE_HS_52MHz) 1511ad5fd922SJaehoon Chung mmc->tran_speed = 52000000; 1512272cc70bSAndy Fleming else 1513ad5fd922SJaehoon Chung mmc->tran_speed = 26000000; 1514272cc70bSAndy Fleming } 1515ad5fd922SJaehoon Chung } 1516ad5fd922SJaehoon Chung 1517ad5fd922SJaehoon Chung mmc_set_clock(mmc, mmc->tran_speed); 1518272cc70bSAndy Fleming 15195af8f45cSAndrew Gabbasov /* Fix the block length for DDR mode */ 15205af8f45cSAndrew Gabbasov if (mmc->ddr_mode) { 15215af8f45cSAndrew Gabbasov mmc->read_bl_len = MMC_MAX_BLOCK_LEN; 15225af8f45cSAndrew Gabbasov mmc->write_bl_len = MMC_MAX_BLOCK_LEN; 15235af8f45cSAndrew Gabbasov } 15245af8f45cSAndrew Gabbasov 1525272cc70bSAndy Fleming /* fill in device description */ 1526c40fdca6SSimon Glass bdesc = mmc_get_blk_desc(mmc); 1527c40fdca6SSimon Glass bdesc->lun = 0; 1528c40fdca6SSimon Glass bdesc->hwpart = 0; 1529c40fdca6SSimon Glass bdesc->type = 0; 1530c40fdca6SSimon Glass bdesc->blksz = mmc->read_bl_len; 1531c40fdca6SSimon Glass bdesc->log2blksz = LOG2(bdesc->blksz); 1532c40fdca6SSimon Glass bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len); 1533fc011f64SSjoerd Simons #if !defined(CONFIG_SPL_BUILD) || \ 1534fc011f64SSjoerd Simons (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \ 1535fc011f64SSjoerd Simons !defined(CONFIG_USE_TINY_PRINTF)) 1536c40fdca6SSimon Glass sprintf(bdesc->vendor, "Man %06x Snr %04x%04x", 1537babce5f6STaylor Hutt mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff), 1538babce5f6STaylor Hutt (mmc->cid[3] >> 16) & 0xffff); 1539c40fdca6SSimon Glass sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff, 15400b453ffeSRabin Vincent (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, 1541babce5f6STaylor Hutt (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff, 1542babce5f6STaylor Hutt (mmc->cid[2] >> 24) & 0xff); 1543c40fdca6SSimon Glass sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf, 1544babce5f6STaylor Hutt (mmc->cid[2] >> 16) & 0xf); 154556196826SPaul Burton #else 1546c40fdca6SSimon Glass bdesc->vendor[0] = 0; 1547c40fdca6SSimon Glass bdesc->product[0] = 0; 1548c40fdca6SSimon Glass bdesc->revision[0] = 0; 154956196826SPaul Burton #endif 1550122efd43SMikhail Kshevetskiy #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT) 1551c40fdca6SSimon Glass part_init(bdesc); 1552122efd43SMikhail Kshevetskiy #endif 1553272cc70bSAndy Fleming 1554272cc70bSAndy Fleming return 0; 1555272cc70bSAndy Fleming } 1556272cc70bSAndy Fleming 1557fdbb873eSKim Phillips static int mmc_send_if_cond(struct mmc *mmc) 1558272cc70bSAndy Fleming { 1559272cc70bSAndy Fleming struct mmc_cmd cmd; 1560272cc70bSAndy Fleming int err; 1561272cc70bSAndy Fleming 1562272cc70bSAndy Fleming cmd.cmdidx = SD_CMD_SEND_IF_COND; 1563272cc70bSAndy Fleming /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ 156493bfd616SPantelis Antoniou cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa; 1565272cc70bSAndy Fleming cmd.resp_type = MMC_RSP_R7; 1566272cc70bSAndy Fleming 1567272cc70bSAndy Fleming err = mmc_send_cmd(mmc, &cmd, NULL); 1568272cc70bSAndy Fleming 1569272cc70bSAndy Fleming if (err) 1570272cc70bSAndy Fleming return err; 1571272cc70bSAndy Fleming 1572998be3ddSRabin Vincent if ((cmd.response[0] & 0xff) != 0xaa) 1573915ffa52SJaehoon Chung return -EOPNOTSUPP; 1574272cc70bSAndy Fleming else 1575272cc70bSAndy Fleming mmc->version = SD_VERSION_2; 1576272cc70bSAndy Fleming 1577272cc70bSAndy Fleming return 0; 1578272cc70bSAndy Fleming } 1579272cc70bSAndy Fleming 158095de9ab2SPaul Kocialkowski /* board-specific MMC power initializations. */ 158195de9ab2SPaul Kocialkowski __weak void board_mmc_power_init(void) 158295de9ab2SPaul Kocialkowski { 158395de9ab2SPaul Kocialkowski } 158495de9ab2SPaul Kocialkowski 1585e9550449SChe-Liang Chiou int mmc_start_init(struct mmc *mmc) 1586272cc70bSAndy Fleming { 15878ca51e51SSimon Glass bool no_card; 1588afd5932bSMacpaul Lin int err; 1589272cc70bSAndy Fleming 1590ab769f22SPantelis Antoniou /* we pretend there's no card when init is NULL */ 15918ca51e51SSimon Glass no_card = mmc_getcd(mmc) == 0; 15928ca51e51SSimon Glass #ifndef CONFIG_DM_MMC_OPS 15938ca51e51SSimon Glass no_card = no_card || (mmc->cfg->ops->init == NULL); 15948ca51e51SSimon Glass #endif 15958ca51e51SSimon Glass if (no_card) { 159648972d90SThierry Reding mmc->has_init = 0; 159756196826SPaul Burton #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 159848972d90SThierry Reding printf("MMC: no card present\n"); 159956196826SPaul Burton #endif 1600915ffa52SJaehoon Chung return -ENOMEDIUM; 160148972d90SThierry Reding } 160248972d90SThierry Reding 1603bc897b1dSLei Wen if (mmc->has_init) 1604bc897b1dSLei Wen return 0; 1605bc897b1dSLei Wen 16065a8dbdc6SYangbo Lu #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT 16075a8dbdc6SYangbo Lu mmc_adapter_card_type_ident(); 16085a8dbdc6SYangbo Lu #endif 160995de9ab2SPaul Kocialkowski board_mmc_power_init(); 161095de9ab2SPaul Kocialkowski 16118ca51e51SSimon Glass #ifdef CONFIG_DM_MMC_OPS 16128ca51e51SSimon Glass /* The device has already been probed ready for use */ 16138ca51e51SSimon Glass #else 1614ab769f22SPantelis Antoniou /* made sure it's not NULL earlier */ 161593bfd616SPantelis Antoniou err = mmc->cfg->ops->init(mmc); 1616272cc70bSAndy Fleming if (err) 1617272cc70bSAndy Fleming return err; 16188ca51e51SSimon Glass #endif 1619786e8f81SAndrew Gabbasov mmc->ddr_mode = 0; 1620b86b85e2SIlya Yanok mmc_set_bus_width(mmc, 1); 1621b86b85e2SIlya Yanok mmc_set_clock(mmc, 1); 1622b86b85e2SIlya Yanok 1623272cc70bSAndy Fleming /* Reset the Card */ 1624272cc70bSAndy Fleming err = mmc_go_idle(mmc); 1625272cc70bSAndy Fleming 1626272cc70bSAndy Fleming if (err) 1627272cc70bSAndy Fleming return err; 1628272cc70bSAndy Fleming 1629bc897b1dSLei Wen /* The internal partition reset to user partition(0) at every CMD0*/ 1630c40fdca6SSimon Glass mmc_get_blk_desc(mmc)->hwpart = 0; 1631bc897b1dSLei Wen 1632272cc70bSAndy Fleming /* Test for SD version 2 */ 1633272cc70bSAndy Fleming err = mmc_send_if_cond(mmc); 1634272cc70bSAndy Fleming 1635272cc70bSAndy Fleming /* Now try to get the SD card's operating condition */ 1636272cc70bSAndy Fleming err = sd_send_op_cond(mmc); 1637272cc70bSAndy Fleming 1638272cc70bSAndy Fleming /* If the command timed out, we check for an MMC card */ 1639915ffa52SJaehoon Chung if (err == -ETIMEDOUT) { 1640272cc70bSAndy Fleming err = mmc_send_op_cond(mmc); 1641272cc70bSAndy Fleming 1642bd47c135SAndrew Gabbasov if (err) { 164356196826SPaul Burton #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1644272cc70bSAndy Fleming printf("Card did not respond to voltage select!\n"); 164556196826SPaul Burton #endif 1646915ffa52SJaehoon Chung return -EOPNOTSUPP; 1647272cc70bSAndy Fleming } 1648272cc70bSAndy Fleming } 1649272cc70bSAndy Fleming 1650bd47c135SAndrew Gabbasov if (!err) 1651e9550449SChe-Liang Chiou mmc->init_in_progress = 1; 1652e9550449SChe-Liang Chiou 1653e9550449SChe-Liang Chiou return err; 1654e9550449SChe-Liang Chiou } 1655e9550449SChe-Liang Chiou 1656e9550449SChe-Liang Chiou static int mmc_complete_init(struct mmc *mmc) 1657e9550449SChe-Liang Chiou { 1658e9550449SChe-Liang Chiou int err = 0; 1659e9550449SChe-Liang Chiou 1660bd47c135SAndrew Gabbasov mmc->init_in_progress = 0; 1661e9550449SChe-Liang Chiou if (mmc->op_cond_pending) 1662e9550449SChe-Liang Chiou err = mmc_complete_op_cond(mmc); 1663e9550449SChe-Liang Chiou 1664e9550449SChe-Liang Chiou if (!err) 1665bc897b1dSLei Wen err = mmc_startup(mmc); 1666bc897b1dSLei Wen if (err) 1667bc897b1dSLei Wen mmc->has_init = 0; 1668bc897b1dSLei Wen else 1669bc897b1dSLei Wen mmc->has_init = 1; 1670e9550449SChe-Liang Chiou return err; 1671e9550449SChe-Liang Chiou } 1672e9550449SChe-Liang Chiou 1673e9550449SChe-Liang Chiou int mmc_init(struct mmc *mmc) 1674e9550449SChe-Liang Chiou { 1675bd47c135SAndrew Gabbasov int err = 0; 1676d803fea5SMateusz Zalega unsigned start; 167733fb211dSSimon Glass #ifdef CONFIG_DM_MMC 167833fb211dSSimon Glass struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev); 1679e9550449SChe-Liang Chiou 168033fb211dSSimon Glass upriv->mmc = mmc; 168133fb211dSSimon Glass #endif 1682e9550449SChe-Liang Chiou if (mmc->has_init) 1683e9550449SChe-Liang Chiou return 0; 1684d803fea5SMateusz Zalega 1685d803fea5SMateusz Zalega start = get_timer(0); 1686d803fea5SMateusz Zalega 1687e9550449SChe-Liang Chiou if (!mmc->init_in_progress) 1688e9550449SChe-Liang Chiou err = mmc_start_init(mmc); 1689e9550449SChe-Liang Chiou 1690bd47c135SAndrew Gabbasov if (!err) 1691e9550449SChe-Liang Chiou err = mmc_complete_init(mmc); 1692e9550449SChe-Liang Chiou debug("%s: %d, time %lu\n", __func__, err, get_timer(start)); 1693bc897b1dSLei Wen return err; 1694272cc70bSAndy Fleming } 1695272cc70bSAndy Fleming 1696ab71188cSMarkus Niebel int mmc_set_dsr(struct mmc *mmc, u16 val) 1697ab71188cSMarkus Niebel { 1698ab71188cSMarkus Niebel mmc->dsr = val; 1699ab71188cSMarkus Niebel return 0; 1700ab71188cSMarkus Niebel } 1701ab71188cSMarkus Niebel 1702cee9ab7cSJeroen Hofstee /* CPU-specific MMC initializations */ 1703cee9ab7cSJeroen Hofstee __weak int cpu_mmc_init(bd_t *bis) 1704272cc70bSAndy Fleming { 1705272cc70bSAndy Fleming return -1; 1706272cc70bSAndy Fleming } 1707272cc70bSAndy Fleming 1708cee9ab7cSJeroen Hofstee /* board-specific MMC initializations. */ 1709cee9ab7cSJeroen Hofstee __weak int board_mmc_init(bd_t *bis) 1710cee9ab7cSJeroen Hofstee { 1711cee9ab7cSJeroen Hofstee return -1; 1712cee9ab7cSJeroen Hofstee } 1713272cc70bSAndy Fleming 1714e9550449SChe-Liang Chiou void mmc_set_preinit(struct mmc *mmc, int preinit) 1715e9550449SChe-Liang Chiou { 1716e9550449SChe-Liang Chiou mmc->preinit = preinit; 1717e9550449SChe-Liang Chiou } 1718e9550449SChe-Liang Chiou 17198e3332e2SSjoerd Simons #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD) 17208e3332e2SSjoerd Simons static int mmc_probe(bd_t *bis) 17218e3332e2SSjoerd Simons { 17228e3332e2SSjoerd Simons return 0; 17238e3332e2SSjoerd Simons } 17248e3332e2SSjoerd Simons #elif defined(CONFIG_DM_MMC) 17258e3332e2SSjoerd Simons static int mmc_probe(bd_t *bis) 17268e3332e2SSjoerd Simons { 17274a1db6d8SSimon Glass int ret, i; 17288e3332e2SSjoerd Simons struct uclass *uc; 17294a1db6d8SSimon Glass struct udevice *dev; 17308e3332e2SSjoerd Simons 17318e3332e2SSjoerd Simons ret = uclass_get(UCLASS_MMC, &uc); 17328e3332e2SSjoerd Simons if (ret) 17338e3332e2SSjoerd Simons return ret; 17348e3332e2SSjoerd Simons 17354a1db6d8SSimon Glass /* 17364a1db6d8SSimon Glass * Try to add them in sequence order. Really with driver model we 17374a1db6d8SSimon Glass * should allow holes, but the current MMC list does not allow that. 17384a1db6d8SSimon Glass * So if we request 0, 1, 3 we will get 0, 1, 2. 17394a1db6d8SSimon Glass */ 17404a1db6d8SSimon Glass for (i = 0; ; i++) { 17414a1db6d8SSimon Glass ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev); 17424a1db6d8SSimon Glass if (ret == -ENODEV) 17434a1db6d8SSimon Glass break; 17444a1db6d8SSimon Glass } 17454a1db6d8SSimon Glass uclass_foreach_dev(dev, uc) { 17464a1db6d8SSimon Glass ret = device_probe(dev); 17478e3332e2SSjoerd Simons if (ret) 17484a1db6d8SSimon Glass printf("%s - probe failed: %d\n", dev->name, ret); 17498e3332e2SSjoerd Simons } 17508e3332e2SSjoerd Simons 17518e3332e2SSjoerd Simons return 0; 17528e3332e2SSjoerd Simons } 17538e3332e2SSjoerd Simons #else 17548e3332e2SSjoerd Simons static int mmc_probe(bd_t *bis) 17558e3332e2SSjoerd Simons { 17568e3332e2SSjoerd Simons if (board_mmc_init(bis) < 0) 17578e3332e2SSjoerd Simons cpu_mmc_init(bis); 17588e3332e2SSjoerd Simons 17598e3332e2SSjoerd Simons return 0; 17608e3332e2SSjoerd Simons } 17618e3332e2SSjoerd Simons #endif 1762e9550449SChe-Liang Chiou 1763272cc70bSAndy Fleming int mmc_initialize(bd_t *bis) 1764272cc70bSAndy Fleming { 17651b26bab1SDaniel Kochmański static int initialized = 0; 17668e3332e2SSjoerd Simons int ret; 17671b26bab1SDaniel Kochmański if (initialized) /* Avoid initializing mmc multiple times */ 17681b26bab1SDaniel Kochmański return 0; 17691b26bab1SDaniel Kochmański initialized = 1; 17701b26bab1SDaniel Kochmański 1771c40fdca6SSimon Glass #ifndef CONFIG_BLK 1772c40fdca6SSimon Glass mmc_list_init(); 1773c40fdca6SSimon Glass #endif 17748e3332e2SSjoerd Simons ret = mmc_probe(bis); 17758e3332e2SSjoerd Simons if (ret) 17768e3332e2SSjoerd Simons return ret; 1777272cc70bSAndy Fleming 1778bb0dc108SYing Zhang #ifndef CONFIG_SPL_BUILD 1779272cc70bSAndy Fleming print_mmc_devices(','); 1780bb0dc108SYing Zhang #endif 1781272cc70bSAndy Fleming 1782c40fdca6SSimon Glass mmc_do_preinit(); 1783272cc70bSAndy Fleming return 0; 1784272cc70bSAndy Fleming } 1785