1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2015 Linaro 4 * peter.griffin <peter.griffin@linaro.org> 5 */ 6 7 #include <common.h> 8 #include <dwmmc.h> 9 #include <malloc.h> 10 #include <linux/errno.h> 11 12 #define DWMMC_MAX_CH_NUM 4 13 14 #define DWMMC_MAX_FREQ 50000000 15 #define DWMMC_MIN_FREQ 400000 16 17 /* Source clock is configured to 100MHz by ATF bl1*/ 18 #define MMC0_DEFAULT_FREQ 100000000 19 20 static int hi6220_dwmci_core_init(struct dwmci_host *host, int index) 21 { 22 host->name = "Hisilicon DWMMC"; 23 24 host->dev_index = index; 25 26 /* Add the mmc channel to be registered with mmc core */ 27 if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) { 28 printf("DWMMC%d registration failed\n", index); 29 return -1; 30 } 31 return 0; 32 } 33 34 /* 35 * This function adds the mmc channel to be registered with mmc core. 36 * index - mmc channel number. 37 * regbase - register base address of mmc channel specified in 'index'. 38 * bus_width - operating bus width of mmc channel specified in 'index'. 39 */ 40 int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width) 41 { 42 struct dwmci_host *host = NULL; 43 44 host = calloc(1, sizeof(struct dwmci_host)); 45 if (!host) { 46 pr_err("dwmci_host calloc failed!\n"); 47 return -ENOMEM; 48 } 49 50 host->ioaddr = (void *)(ulong)regbase; 51 host->buswidth = bus_width; 52 host->bus_hz = MMC0_DEFAULT_FREQ; 53 54 return hi6220_dwmci_core_init(host, index); 55 } 56