1 /* 2 * Copyright (C) 2010 3 * Rob Emanuele <rob@emanuele.us> 4 * Reinhard Meyer, EMK Elektronik <reinhard.meyer@emk-elektronik.de> 5 * 6 * Original Driver: 7 * Copyright (C) 2004-2006 Atmel Corporation 8 * 9 * See file CREDITS for list of people who contributed to this 10 * project. 11 * 12 * This program is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License as 14 * published by the Free Software Foundation; either version 2 of 15 * the License, or (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 25 * MA 02111-1307 USA 26 */ 27 28 #include <common.h> 29 #include <mmc.h> 30 #include <part.h> 31 #include <malloc.h> 32 #include <asm/io.h> 33 #include <asm/errno.h> 34 #include <asm/byteorder.h> 35 #include <asm/arch/clk.h> 36 #include <asm/arch/hardware.h> 37 #include "atmel_mci.h" 38 39 #ifndef CONFIG_SYS_MMC_CLK_OD 40 # define CONFIG_SYS_MMC_CLK_OD 150000 41 #endif 42 43 #define MMC_DEFAULT_BLKLEN 512 44 45 #if defined(CONFIG_ATMEL_MCI_PORTB) 46 # define MCI_BUS 1 47 #else 48 # define MCI_BUS 0 49 #endif 50 51 static int initialized = 0; 52 53 /* Read Atmel MCI IP version */ 54 static unsigned int atmel_mci_get_version(struct atmel_mci *mci) 55 { 56 return readl(&mci->version) & 0x00000fff; 57 } 58 59 /* 60 * Print command and status: 61 * 62 * - always when DEBUG is defined 63 * - on command errors 64 */ 65 static void dump_cmd(u32 cmdr, u32 arg, u32 status, const char* msg) 66 { 67 printf("gen_atmel_mci: CMDR %08x (%2u) ARGR %08x (SR: %08x) %s\n", 68 cmdr, cmdr&0x3F, arg, status, msg); 69 } 70 71 /* Setup for MCI Clock and Block Size */ 72 static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen) 73 { 74 atmel_mci_t *mci = (atmel_mci_t *)mmc->priv; 75 u32 bus_hz = get_mci_clk_rate(); 76 u32 clkdiv = 255; 77 78 debug("mci: bus_hz is %u, setting clock %u Hz, block size %u\n", 79 bus_hz, hz, blklen); 80 if (hz > 0) { 81 /* find lowest clkdiv yielding a rate <= than requested */ 82 for (clkdiv=0; clkdiv<255; clkdiv++) { 83 if ((bus_hz / (clkdiv+1) / 2) <= hz) 84 break; 85 } 86 } 87 printf("mci: setting clock %u Hz, block size %u\n", 88 (bus_hz / (clkdiv+1)) / 2, blklen); 89 90 blklen &= 0xfffc; 91 /* On some platforms RDPROOF and WRPROOF are ignored */ 92 writel((MMCI_BF(CLKDIV, clkdiv) 93 | MMCI_BF(BLKLEN, blklen) 94 | MMCI_BIT(RDPROOF) 95 | MMCI_BIT(WRPROOF)), &mci->mr); 96 /* 97 * On some new platforms BLKLEN in mci->mr is ignored. 98 * Should use the BLKLEN in the block register. 99 */ 100 writel(MMCI_BF(BLKLEN, blklen), &mci->blkr); 101 initialized = 1; 102 } 103 104 /* Return the CMDR with flags for a given command and data packet */ 105 static u32 mci_encode_cmd( 106 struct mmc_cmd *cmd, struct mmc_data *data, u32* error_flags) 107 { 108 u32 cmdr = 0; 109 110 /* Default Flags for Errors */ 111 *error_flags |= (MMCI_BIT(DTOE) | MMCI_BIT(RDIRE) | MMCI_BIT(RENDE) | 112 MMCI_BIT(RINDE) | MMCI_BIT(RTOE)); 113 114 /* Default Flags for the Command */ 115 cmdr |= MMCI_BIT(MAXLAT); 116 117 if (data) { 118 cmdr |= MMCI_BF(TRCMD, 1); 119 if (data->blocks > 1) 120 cmdr |= MMCI_BF(TRTYP, 1); 121 if (data->flags & MMC_DATA_READ) 122 cmdr |= MMCI_BIT(TRDIR); 123 } 124 125 if (cmd->resp_type & MMC_RSP_CRC) 126 *error_flags |= MMCI_BIT(RCRCE); 127 if (cmd->resp_type & MMC_RSP_136) 128 cmdr |= MMCI_BF(RSPTYP, 2); 129 else if (cmd->resp_type & MMC_RSP_BUSY) 130 cmdr |= MMCI_BF(RSPTYP, 3); 131 else if (cmd->resp_type & MMC_RSP_PRESENT) 132 cmdr |= MMCI_BF(RSPTYP, 1); 133 134 return cmdr | MMCI_BF(CMDNB, cmd->cmdidx); 135 } 136 137 /* Entered into function pointer in mci_send_cmd */ 138 static u32 mci_data_read(atmel_mci_t *mci, u32* data, u32 error_flags) 139 { 140 u32 status; 141 142 do { 143 status = readl(&mci->sr); 144 if (status & (error_flags | MMCI_BIT(OVRE))) 145 goto io_fail; 146 } while (!(status & MMCI_BIT(RXRDY))); 147 148 if (status & MMCI_BIT(RXRDY)) { 149 *data = readl(&mci->rdr); 150 status = 0; 151 } 152 io_fail: 153 return status; 154 } 155 156 /* Entered into function pointer in mci_send_cmd */ 157 static u32 mci_data_write(atmel_mci_t *mci, u32* data, u32 error_flags) 158 { 159 u32 status; 160 161 do { 162 status = readl(&mci->sr); 163 if (status & (error_flags | MMCI_BIT(UNRE))) 164 goto io_fail; 165 } while (!(status & MMCI_BIT(TXRDY))); 166 167 if (status & MMCI_BIT(TXRDY)) { 168 writel(*data, &mci->tdr); 169 status = 0; 170 } 171 io_fail: 172 return status; 173 } 174 175 /* 176 * Entered into mmc structure during driver init 177 * 178 * Sends a command out on the bus and deals with the block data. 179 * Takes the mmc pointer, a command pointer, and an optional data pointer. 180 */ 181 static int 182 mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) 183 { 184 atmel_mci_t *mci = (atmel_mci_t *)mmc->priv; 185 u32 cmdr; 186 u32 error_flags = 0; 187 u32 status; 188 189 if (!initialized) { 190 puts ("MCI not initialized!\n"); 191 return COMM_ERR; 192 } 193 194 /* Figure out the transfer arguments */ 195 cmdr = mci_encode_cmd(cmd, data, &error_flags); 196 197 /* For multi blocks read/write, set the block register */ 198 if ((cmd->cmdidx == MMC_CMD_READ_MULTIPLE_BLOCK) 199 || (cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK)) 200 writel(data->blocks | MMCI_BF(BLKLEN, mmc->read_bl_len), 201 &mci->blkr); 202 203 /* Send the command */ 204 writel(cmd->cmdarg, &mci->argr); 205 writel(cmdr, &mci->cmdr); 206 207 #ifdef DEBUG 208 dump_cmd(cmdr, cmd->cmdarg, 0, "DEBUG"); 209 #endif 210 211 /* Wait for the command to complete */ 212 while (!((status = readl(&mci->sr)) & MMCI_BIT(CMDRDY))); 213 214 if ((status & error_flags) & MMCI_BIT(RTOE)) { 215 dump_cmd(cmdr, cmd->cmdarg, status, "Command Time Out"); 216 return TIMEOUT; 217 } else if (status & error_flags) { 218 dump_cmd(cmdr, cmd->cmdarg, status, "Command Failed"); 219 return COMM_ERR; 220 } 221 222 /* Copy the response to the response buffer */ 223 if (cmd->resp_type & MMC_RSP_136) { 224 cmd->response[0] = readl(&mci->rspr); 225 cmd->response[1] = readl(&mci->rspr1); 226 cmd->response[2] = readl(&mci->rspr2); 227 cmd->response[3] = readl(&mci->rspr3); 228 } else 229 cmd->response[0] = readl(&mci->rspr); 230 231 /* transfer all of the blocks */ 232 if (data) { 233 u32 word_count, block_count; 234 u32* ioptr; 235 u32 sys_blocksize, dummy, i; 236 u32 (*mci_data_op) 237 (atmel_mci_t *mci, u32* data, u32 error_flags); 238 239 if (data->flags & MMC_DATA_READ) { 240 mci_data_op = mci_data_read; 241 sys_blocksize = mmc->read_bl_len; 242 ioptr = (u32*)data->dest; 243 } else { 244 mci_data_op = mci_data_write; 245 sys_blocksize = mmc->write_bl_len; 246 ioptr = (u32*)data->src; 247 } 248 249 status = 0; 250 for (block_count = 0; 251 block_count < data->blocks && !status; 252 block_count++) { 253 word_count = 0; 254 do { 255 status = mci_data_op(mci, ioptr, error_flags); 256 word_count++; 257 ioptr++; 258 } while (!status && word_count < (data->blocksize/4)); 259 #ifdef DEBUG 260 if (data->flags & MMC_DATA_READ) 261 { 262 printf("Read Data:\n"); 263 print_buffer(0, data->dest, 1, 264 word_count*4, 0); 265 } 266 #endif 267 #ifdef DEBUG 268 if (!status && word_count < (sys_blocksize / 4)) 269 printf("filling rest of block...\n"); 270 #endif 271 /* fill the rest of a full block */ 272 while (!status && word_count < (sys_blocksize / 4)) { 273 status = mci_data_op(mci, &dummy, 274 error_flags); 275 word_count++; 276 } 277 if (status) { 278 dump_cmd(cmdr, cmd->cmdarg, status, 279 "Data Transfer Failed"); 280 return COMM_ERR; 281 } 282 } 283 284 /* Wait for Transfer End */ 285 i = 0; 286 do { 287 status = readl(&mci->sr); 288 289 if (status & error_flags) { 290 dump_cmd(cmdr, cmd->cmdarg, status, 291 "DTIP Wait Failed"); 292 return COMM_ERR; 293 } 294 i++; 295 } while ((status & MMCI_BIT(DTIP)) && i < 10000); 296 if (status & MMCI_BIT(DTIP)) { 297 dump_cmd(cmdr, cmd->cmdarg, status, 298 "XFER DTIP never unset, ignoring"); 299 } 300 } 301 302 return 0; 303 } 304 305 /* Entered into mmc structure during driver init */ 306 static void mci_set_ios(struct mmc *mmc) 307 { 308 atmel_mci_t *mci = (atmel_mci_t *)mmc->priv; 309 int bus_width = mmc->bus_width; 310 unsigned int version = atmel_mci_get_version(mci); 311 int busw; 312 313 /* Set the clock speed */ 314 mci_set_mode(mmc, mmc->clock, MMC_DEFAULT_BLKLEN); 315 316 /* 317 * set the bus width and select slot for this interface 318 * there is no capability for multiple slots on the same interface yet 319 */ 320 if ((version & 0xf00) >= 0x300) { 321 switch (bus_width) { 322 case 8: 323 busw = 3; 324 break; 325 case 4: 326 busw = 2; 327 break; 328 default: 329 busw = 0; 330 break; 331 } 332 333 writel(busw << 6 | MMCI_BF(SCDSEL, MCI_BUS), &mci->sdcr); 334 } else { 335 busw = (bus_width == 4) ? 1 : 0; 336 337 writel(busw << 7 | MMCI_BF(SCDSEL, MCI_BUS), &mci->sdcr); 338 } 339 } 340 341 /* Entered into mmc structure during driver init */ 342 static int mci_init(struct mmc *mmc) 343 { 344 atmel_mci_t *mci = (atmel_mci_t *)mmc->priv; 345 346 /* Initialize controller */ 347 writel(MMCI_BIT(SWRST), &mci->cr); /* soft reset */ 348 writel(MMCI_BIT(PWSDIS), &mci->cr); /* disable power save */ 349 writel(MMCI_BIT(MCIEN), &mci->cr); /* enable mci */ 350 writel(MMCI_BF(SCDSEL, MCI_BUS), &mci->sdcr); /* select port */ 351 352 /* This delay can be optimized, but stick with max value */ 353 writel(0x7f, &mci->dtor); 354 /* Disable Interrupts */ 355 writel(~0UL, &mci->idr); 356 357 /* Set default clocks and blocklen */ 358 mci_set_mode(mmc, CONFIG_SYS_MMC_CLK_OD, MMC_DEFAULT_BLKLEN); 359 360 return 0; 361 } 362 363 /* 364 * This is the only exported function 365 * 366 * Call it with the MCI register base address 367 */ 368 int atmel_mci_init(void *regs) 369 { 370 struct mmc *mmc = malloc(sizeof(struct mmc)); 371 struct atmel_mci *mci; 372 unsigned int version; 373 374 if (!mmc) 375 return -1; 376 377 strcpy(mmc->name, "mci"); 378 mmc->priv = regs; 379 mmc->send_cmd = mci_send_cmd; 380 mmc->set_ios = mci_set_ios; 381 mmc->init = mci_init; 382 mmc->getcd = NULL; 383 mmc->getwp = NULL; 384 385 /* need to be able to pass these in on a board by board basis */ 386 mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; 387 mci = (struct atmel_mci *)mmc->priv; 388 version = atmel_mci_get_version(mci); 389 if ((version & 0xf00) >= 0x300) 390 mmc->host_caps = MMC_MODE_8BIT; 391 392 mmc->host_caps |= MMC_MODE_4BIT; 393 394 /* 395 * min and max frequencies determined by 396 * max and min of clock divider 397 */ 398 mmc->f_min = get_mci_clk_rate() / (2*256); 399 mmc->f_max = get_mci_clk_rate() / (2*1); 400 401 mmc->b_max = 0; 402 403 mmc_register(mmc); 404 405 return 0; 406 } 407