1 /* 2 * (C) Copyright 2012 SAMSUNG Electronics 3 * Jaehoon Chung <jh80.chung@samsung.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <dwmmc.h> 10 #include <fdtdec.h> 11 #include <libfdt.h> 12 #include <malloc.h> 13 #include <asm/arch/dwmmc.h> 14 #include <asm/arch/clk.h> 15 #include <asm/arch/pinmux.h> 16 17 #define DWMMC_MAX_CH_NUM 4 18 #define DWMMC_MAX_FREQ 52000000 19 #define DWMMC_MIN_FREQ 400000 20 #define DWMMC_MMC0_CLKSEL_VAL 0x03030001 21 #define DWMMC_MMC2_CLKSEL_VAL 0x03020001 22 23 /* 24 * Function used as callback function to initialise the 25 * CLKSEL register for every mmc channel. 26 */ 27 static void exynos_dwmci_clksel(struct dwmci_host *host) 28 { 29 dwmci_writel(host, DWMCI_CLKSEL, host->clksel_val); 30 } 31 32 unsigned int exynos_dwmci_get_clk(int dev_index) 33 { 34 return get_mmc_clk(dev_index); 35 } 36 37 /* 38 * This function adds the mmc channel to be registered with mmc core. 39 * index - mmc channel number. 40 * regbase - register base address of mmc channel specified in 'index'. 41 * bus_width - operating bus width of mmc channel specified in 'index'. 42 * clksel - value to be written into CLKSEL register in case of FDT. 43 * NULL in case od non-FDT. 44 */ 45 int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel) 46 { 47 struct dwmci_host *host = NULL; 48 unsigned int div; 49 unsigned long freq, sclk; 50 host = malloc(sizeof(struct dwmci_host)); 51 if (!host) { 52 printf("dwmci_host malloc fail!\n"); 53 return 1; 54 } 55 /* request mmc clock vlaue of 52MHz. */ 56 freq = 52000000; 57 sclk = get_mmc_clk(index); 58 div = DIV_ROUND_UP(sclk, freq); 59 /* set the clock divisor for mmc */ 60 set_mmc_clk(index, div); 61 62 host->name = "EXYNOS DWMMC"; 63 host->ioaddr = (void *)regbase; 64 host->buswidth = bus_width; 65 66 if (clksel) { 67 host->clksel_val = clksel; 68 } else { 69 if (0 == index) 70 host->clksel_val = DWMMC_MMC0_CLKSEL_VAL; 71 if (2 == index) 72 host->clksel_val = DWMMC_MMC2_CLKSEL_VAL; 73 } 74 75 host->clksel = exynos_dwmci_clksel; 76 host->dev_index = index; 77 host->mmc_clk = exynos_dwmci_get_clk; 78 /* Add the mmc channel to be registered with mmc core */ 79 if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) { 80 debug("dwmmc%d registration failed\n", index); 81 return -1; 82 } 83 return 0; 84 } 85 86 #ifdef CONFIG_OF_CONTROL 87 int exynos_dwmmc_init(const void *blob) 88 { 89 int index, bus_width; 90 int node_list[DWMMC_MAX_CH_NUM]; 91 int err = 0, dev_id, flag, count, i; 92 u32 clksel_val, base, timing[3]; 93 94 count = fdtdec_find_aliases_for_id(blob, "mmc", 95 COMPAT_SAMSUNG_EXYNOS5_DWMMC, node_list, 96 DWMMC_MAX_CH_NUM); 97 98 for (i = 0; i < count; i++) { 99 int node = node_list[i]; 100 101 if (node <= 0) 102 continue; 103 104 /* Extract device id for each mmc channel */ 105 dev_id = pinmux_decode_periph_id(blob, node); 106 107 /* Get the bus width from the device node */ 108 bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0); 109 if (bus_width <= 0) { 110 debug("DWMMC: Can't get bus-width\n"); 111 return -1; 112 } 113 if (8 == bus_width) 114 flag = PINMUX_FLAG_8BIT_MODE; 115 else 116 flag = PINMUX_FLAG_NONE; 117 118 /* config pinmux for each mmc channel */ 119 err = exynos_pinmux_config(dev_id, flag); 120 if (err) { 121 debug("DWMMC not configured\n"); 122 return err; 123 } 124 125 index = dev_id - PERIPH_ID_SDMMC0; 126 127 /* Get the base address from the device node */ 128 base = fdtdec_get_addr(blob, node, "reg"); 129 if (!base) { 130 debug("DWMMC: Can't get base address\n"); 131 return -1; 132 } 133 /* Extract the timing info from the node */ 134 err = fdtdec_get_int_array(blob, node, "samsung,timing", 135 timing, 3); 136 if (err) { 137 debug("Can't get sdr-timings for divider\n"); 138 return -1; 139 } 140 141 clksel_val = (DWMCI_SET_SAMPLE_CLK(timing[0]) | 142 DWMCI_SET_DRV_CLK(timing[1]) | 143 DWMCI_SET_DIV_RATIO(timing[2])); 144 /* Initialise each mmc channel */ 145 err = exynos_dwmci_add_port(index, base, bus_width, clksel_val); 146 if (err) 147 debug("dwmmc Channel-%d init failed\n", index); 148 } 149 return 0; 150 } 151 #endif 152