19a4fbe4fSStephen Warren /* 29a4fbe4fSStephen Warren * This code was extracted from: 39a4fbe4fSStephen Warren * git://github.com/gonzoua/u-boot-pi.git master 49a4fbe4fSStephen Warren * and hence presumably (C) 2012 Oleksandr Tymoshenko 59a4fbe4fSStephen Warren * 69a4fbe4fSStephen Warren * Tweaks for U-Boot upstreaming 79a4fbe4fSStephen Warren * (C) 2012 Stephen Warren 89a4fbe4fSStephen Warren * 99a4fbe4fSStephen Warren * Portions (e.g. read/write macros, concepts for back-to-back register write 109a4fbe4fSStephen Warren * timing workarounds) obviously extracted from the Linux kernel at: 119a4fbe4fSStephen Warren * https://github.com/raspberrypi/linux.git rpi-3.6.y 129a4fbe4fSStephen Warren * 139a4fbe4fSStephen Warren * The Linux kernel code has the following (c) and license, which is hence 149a4fbe4fSStephen Warren * propagated to Oleksandr's tree and here: 159a4fbe4fSStephen Warren * 169a4fbe4fSStephen Warren * Support for SDHCI device on 2835 179a4fbe4fSStephen Warren * Based on sdhci-bcm2708.c (c) 2010 Broadcom 189a4fbe4fSStephen Warren * 199a4fbe4fSStephen Warren * This program is free software; you can redistribute it and/or modify 209a4fbe4fSStephen Warren * it under the terms of the GNU General Public License version 2 as 219a4fbe4fSStephen Warren * published by the Free Software Foundation. 229a4fbe4fSStephen Warren * 239a4fbe4fSStephen Warren * This program is distributed in the hope that it will be useful, 249a4fbe4fSStephen Warren * but WITHOUT ANY WARRANTY; without even the implied warranty of 259a4fbe4fSStephen Warren * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 269a4fbe4fSStephen Warren * GNU General Public License for more details. 279a4fbe4fSStephen Warren * 289a4fbe4fSStephen Warren * You should have received a copy of the GNU General Public License 299a4fbe4fSStephen Warren * along with this program; if not, write to the Free Software 309a4fbe4fSStephen Warren * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 319a4fbe4fSStephen Warren */ 329a4fbe4fSStephen Warren 339a4fbe4fSStephen Warren /* Supports: 349a4fbe4fSStephen Warren * SDHCI platform device - Arasan SD controller in BCM2708 359a4fbe4fSStephen Warren * 369a4fbe4fSStephen Warren * Inspired by sdhci-pci.c, by Pierre Ossman 379a4fbe4fSStephen Warren */ 389a4fbe4fSStephen Warren 399a4fbe4fSStephen Warren #include <common.h> 409a4fbe4fSStephen Warren #include <malloc.h> 419a4fbe4fSStephen Warren #include <sdhci.h> 42d6c418e4SMasahiro Yamada #include <mach/timer.h> 43d6c418e4SMasahiro Yamada #include <mach/sdhci.h> 449a4fbe4fSStephen Warren 459a4fbe4fSStephen Warren /* 400KHz is max freq for card ID etc. Use that as min */ 469a4fbe4fSStephen Warren #define MIN_FREQ 400000 479a4fbe4fSStephen Warren 489a4fbe4fSStephen Warren struct bcm2835_sdhci_host { 499a4fbe4fSStephen Warren struct sdhci_host host; 509a4fbe4fSStephen Warren uint twoticks_delay; 519a4fbe4fSStephen Warren ulong last_write; 529a4fbe4fSStephen Warren }; 539a4fbe4fSStephen Warren 549a4fbe4fSStephen Warren static inline struct bcm2835_sdhci_host *to_bcm(struct sdhci_host *host) 559a4fbe4fSStephen Warren { 569a4fbe4fSStephen Warren return (struct bcm2835_sdhci_host *)host; 579a4fbe4fSStephen Warren } 589a4fbe4fSStephen Warren 599a4fbe4fSStephen Warren static inline void bcm2835_sdhci_raw_writel(struct sdhci_host *host, u32 val, 609a4fbe4fSStephen Warren int reg) 619a4fbe4fSStephen Warren { 629a4fbe4fSStephen Warren struct bcm2835_sdhci_host *bcm_host = to_bcm(host); 639a4fbe4fSStephen Warren 649a4fbe4fSStephen Warren /* 659a4fbe4fSStephen Warren * The Arasan has a bugette whereby it may lose the content of 669a4fbe4fSStephen Warren * successive writes to registers that are within two SD-card clock 679a4fbe4fSStephen Warren * cycles of each other (a clock domain crossing problem). 689a4fbe4fSStephen Warren * It seems, however, that the data register does not have this problem. 699a4fbe4fSStephen Warren * (Which is just as well - otherwise we'd have to nobble the DMA engine 709a4fbe4fSStephen Warren * too) 719a4fbe4fSStephen Warren */ 729f1b4456SMarek Vasut while (timer_get_us() - bcm_host->last_write < bcm_host->twoticks_delay) 739a4fbe4fSStephen Warren ; 749a4fbe4fSStephen Warren 759a4fbe4fSStephen Warren writel(val, host->ioaddr + reg); 769f1b4456SMarek Vasut bcm_host->last_write = timer_get_us(); 779a4fbe4fSStephen Warren } 789a4fbe4fSStephen Warren 799a4fbe4fSStephen Warren static inline u32 bcm2835_sdhci_raw_readl(struct sdhci_host *host, int reg) 809a4fbe4fSStephen Warren { 819a4fbe4fSStephen Warren return readl(host->ioaddr + reg); 829a4fbe4fSStephen Warren } 839a4fbe4fSStephen Warren 849a4fbe4fSStephen Warren static void bcm2835_sdhci_writel(struct sdhci_host *host, u32 val, int reg) 859a4fbe4fSStephen Warren { 869a4fbe4fSStephen Warren bcm2835_sdhci_raw_writel(host, val, reg); 879a4fbe4fSStephen Warren } 889a4fbe4fSStephen Warren 899a4fbe4fSStephen Warren static void bcm2835_sdhci_writew(struct sdhci_host *host, u16 val, int reg) 909a4fbe4fSStephen Warren { 919a4fbe4fSStephen Warren static u32 shadow; 929a4fbe4fSStephen Warren u32 oldval = (reg == SDHCI_COMMAND) ? shadow : 939a4fbe4fSStephen Warren bcm2835_sdhci_raw_readl(host, reg & ~3); 949a4fbe4fSStephen Warren u32 word_num = (reg >> 1) & 1; 959a4fbe4fSStephen Warren u32 word_shift = word_num * 16; 969a4fbe4fSStephen Warren u32 mask = 0xffff << word_shift; 979a4fbe4fSStephen Warren u32 newval = (oldval & ~mask) | (val << word_shift); 989a4fbe4fSStephen Warren 999a4fbe4fSStephen Warren if (reg == SDHCI_TRANSFER_MODE) 1009a4fbe4fSStephen Warren shadow = newval; 1019a4fbe4fSStephen Warren else 1029a4fbe4fSStephen Warren bcm2835_sdhci_raw_writel(host, newval, reg & ~3); 1039a4fbe4fSStephen Warren } 1049a4fbe4fSStephen Warren 1059a4fbe4fSStephen Warren static void bcm2835_sdhci_writeb(struct sdhci_host *host, u8 val, int reg) 1069a4fbe4fSStephen Warren { 1079a4fbe4fSStephen Warren u32 oldval = bcm2835_sdhci_raw_readl(host, reg & ~3); 1089a4fbe4fSStephen Warren u32 byte_num = reg & 3; 1099a4fbe4fSStephen Warren u32 byte_shift = byte_num * 8; 1109a4fbe4fSStephen Warren u32 mask = 0xff << byte_shift; 1119a4fbe4fSStephen Warren u32 newval = (oldval & ~mask) | (val << byte_shift); 1129a4fbe4fSStephen Warren 1139a4fbe4fSStephen Warren bcm2835_sdhci_raw_writel(host, newval, reg & ~3); 1149a4fbe4fSStephen Warren } 1159a4fbe4fSStephen Warren 1169a4fbe4fSStephen Warren static u32 bcm2835_sdhci_readl(struct sdhci_host *host, int reg) 1179a4fbe4fSStephen Warren { 1189a4fbe4fSStephen Warren u32 val = bcm2835_sdhci_raw_readl(host, reg); 1199a4fbe4fSStephen Warren 1209a4fbe4fSStephen Warren return val; 1219a4fbe4fSStephen Warren } 1229a4fbe4fSStephen Warren 1239a4fbe4fSStephen Warren static u16 bcm2835_sdhci_readw(struct sdhci_host *host, int reg) 1249a4fbe4fSStephen Warren { 1259a4fbe4fSStephen Warren u32 val = bcm2835_sdhci_raw_readl(host, (reg & ~3)); 1269a4fbe4fSStephen Warren u32 word_num = (reg >> 1) & 1; 1279a4fbe4fSStephen Warren u32 word_shift = word_num * 16; 1289a4fbe4fSStephen Warren u32 word = (val >> word_shift) & 0xffff; 1299a4fbe4fSStephen Warren 1309a4fbe4fSStephen Warren return word; 1319a4fbe4fSStephen Warren } 1329a4fbe4fSStephen Warren 1339a4fbe4fSStephen Warren static u8 bcm2835_sdhci_readb(struct sdhci_host *host, int reg) 1349a4fbe4fSStephen Warren { 1359a4fbe4fSStephen Warren u32 val = bcm2835_sdhci_raw_readl(host, (reg & ~3)); 1369a4fbe4fSStephen Warren u32 byte_num = reg & 3; 1379a4fbe4fSStephen Warren u32 byte_shift = byte_num * 8; 1389a4fbe4fSStephen Warren u32 byte = (val >> byte_shift) & 0xff; 1399a4fbe4fSStephen Warren 1409a4fbe4fSStephen Warren return byte; 1419a4fbe4fSStephen Warren } 1429a4fbe4fSStephen Warren 1439a4fbe4fSStephen Warren static const struct sdhci_ops bcm2835_ops = { 1449a4fbe4fSStephen Warren .write_l = bcm2835_sdhci_writel, 1459a4fbe4fSStephen Warren .write_w = bcm2835_sdhci_writew, 1469a4fbe4fSStephen Warren .write_b = bcm2835_sdhci_writeb, 1479a4fbe4fSStephen Warren .read_l = bcm2835_sdhci_readl, 1489a4fbe4fSStephen Warren .read_w = bcm2835_sdhci_readw, 1499a4fbe4fSStephen Warren .read_b = bcm2835_sdhci_readb, 1509a4fbe4fSStephen Warren }; 1519a4fbe4fSStephen Warren 1529a4fbe4fSStephen Warren int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq) 1539a4fbe4fSStephen Warren { 1549a4fbe4fSStephen Warren struct bcm2835_sdhci_host *bcm_host; 1559a4fbe4fSStephen Warren struct sdhci_host *host; 1569a4fbe4fSStephen Warren 157ebe78bb9SAlexander Stein bcm_host = calloc(1, sizeof(*bcm_host)); 1589a4fbe4fSStephen Warren if (!bcm_host) { 159ebe78bb9SAlexander Stein printf("sdhci_host calloc fail!\n"); 1602cb5d67cSJaehoon Chung return -ENOMEM; 1619a4fbe4fSStephen Warren } 1629a4fbe4fSStephen Warren 1639a4fbe4fSStephen Warren /* 1649a4fbe4fSStephen Warren * See the comments in bcm2835_sdhci_raw_writel(). 1659a4fbe4fSStephen Warren * 1669a4fbe4fSStephen Warren * This should probably be dynamically calculated based on the actual 1679a4fbe4fSStephen Warren * frequency. However, this is the longest we'll have to wait, and 1689a4fbe4fSStephen Warren * doesn't seem to slow access down too much, so the added complexity 1699a4fbe4fSStephen Warren * doesn't seem worth it for now. 1709a4fbe4fSStephen Warren * 1719a4fbe4fSStephen Warren * 1/MIN_FREQ is (max) time per tick of eMMC clock. 1729a4fbe4fSStephen Warren * 2/MIN_FREQ is time for two ticks. 1739a4fbe4fSStephen Warren * Multiply by 1000000 to get uS per two ticks. 1749a4fbe4fSStephen Warren * +1 for hack rounding. 1759a4fbe4fSStephen Warren */ 1769a4fbe4fSStephen Warren bcm_host->twoticks_delay = ((2 * 1000000) / MIN_FREQ) + 1; 1779a4fbe4fSStephen Warren bcm_host->last_write = 0; 1789a4fbe4fSStephen Warren 1799a4fbe4fSStephen Warren host = &bcm_host->host; 1809a4fbe4fSStephen Warren host->name = "bcm2835_sdhci"; 181a481a156SStephen Warren host->ioaddr = (void *)(unsigned long)regbase; 1829a4fbe4fSStephen Warren host->quirks = SDHCI_QUIRK_BROKEN_VOLTAGE | SDHCI_QUIRK_BROKEN_R1B | 18364973023SLubomir Rintel SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_NO_HISPD_BIT; 184*6d0e34bfSStefan Herbrechtsmeier host->max_clk = emmc_freq; 1859a4fbe4fSStephen Warren host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; 1869a4fbe4fSStephen Warren host->ops = &bcm2835_ops; 1879a4fbe4fSStephen Warren 188*6d0e34bfSStefan Herbrechtsmeier add_sdhci(host, 0, MIN_FREQ); 1899a4fbe4fSStephen Warren 1909a4fbe4fSStephen Warren return 0; 1919a4fbe4fSStephen Warren } 192