1 /* 2 * Copyright (C) 2015 Atmel Corporation 3 * Wenyou.Yang <wenyou.yang@atmel.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <clk.h> 10 #include <dm.h> 11 #include <malloc.h> 12 #include <sdhci.h> 13 #include <asm/arch/clk.h> 14 15 #define ATMEL_SDHC_MIN_FREQ 400000 16 #define ATMEL_SDHC_GCK_RATE 240000000 17 18 #ifndef CONFIG_DM_MMC 19 int atmel_sdhci_init(void *regbase, u32 id) 20 { 21 struct sdhci_host *host; 22 u32 max_clk, min_clk = ATMEL_SDHC_MIN_FREQ; 23 24 host = (struct sdhci_host *)calloc(1, sizeof(struct sdhci_host)); 25 if (!host) { 26 printf("%s: sdhci_host calloc failed\n", __func__); 27 return -ENOMEM; 28 } 29 30 host->name = "atmel_sdhci"; 31 host->ioaddr = regbase; 32 host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD; 33 max_clk = at91_get_periph_generated_clk(id); 34 if (!max_clk) { 35 printf("%s: Failed to get the proper clock\n", __func__); 36 free(host); 37 return -ENODEV; 38 } 39 host->max_clk = max_clk; 40 41 add_sdhci(host, 0, min_clk); 42 43 return 0; 44 } 45 46 #else 47 48 DECLARE_GLOBAL_DATA_PTR; 49 50 struct atmel_sdhci_plat { 51 struct mmc_config cfg; 52 struct mmc mmc; 53 }; 54 55 static int atmel_sdhci_probe(struct udevice *dev) 56 { 57 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); 58 struct atmel_sdhci_plat *plat = dev_get_platdata(dev); 59 struct sdhci_host *host = dev_get_priv(dev); 60 u32 max_clk; 61 struct clk clk; 62 int ret; 63 64 ret = clk_get_by_index(dev, 0, &clk); 65 if (ret) 66 return ret; 67 68 ret = clk_enable(&clk); 69 if (ret) 70 return ret; 71 72 host->name = dev->name; 73 host->ioaddr = (void *)devfdt_get_addr(dev); 74 75 host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD; 76 host->bus_width = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), 77 "bus-width", 4); 78 79 ret = clk_get_by_index(dev, 1, &clk); 80 if (ret) 81 return ret; 82 83 ret = clk_set_rate(&clk, ATMEL_SDHC_GCK_RATE); 84 if (ret) 85 return ret; 86 87 max_clk = clk_get_rate(&clk); 88 if (!max_clk) 89 return -EINVAL; 90 91 host->max_clk = max_clk; 92 93 ret = sdhci_setup_cfg(&plat->cfg, host, 0, ATMEL_SDHC_MIN_FREQ); 94 if (ret) 95 return ret; 96 97 host->mmc = &plat->mmc; 98 host->mmc->dev = dev; 99 host->mmc->priv = host; 100 upriv->mmc = host->mmc; 101 102 clk_free(&clk); 103 104 return sdhci_probe(dev); 105 } 106 107 static int atmel_sdhci_bind(struct udevice *dev) 108 { 109 struct atmel_sdhci_plat *plat = dev_get_platdata(dev); 110 111 return sdhci_bind(dev, &plat->mmc, &plat->cfg); 112 } 113 114 static const struct udevice_id atmel_sdhci_ids[] = { 115 { .compatible = "atmel,sama5d2-sdhci" }, 116 { } 117 }; 118 119 U_BOOT_DRIVER(atmel_sdhci_drv) = { 120 .name = "atmel_sdhci", 121 .id = UCLASS_MMC, 122 .of_match = atmel_sdhci_ids, 123 .ops = &sdhci_ops, 124 .bind = atmel_sdhci_bind, 125 .probe = atmel_sdhci_probe, 126 .priv_auto_alloc_size = sizeof(struct sdhci_host), 127 .platdata_auto_alloc_size = sizeof(struct atmel_sdhci_plat), 128 }; 129 #endif 130