xref: /openbmc/u-boot/drivers/mmc/aspeed_sdhci.c (revision 1a68faac)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2016 Fuzhou Rockchip Electronics Co., Ltd
4  *
5  * Rockchip SD Host Controller Interface
6  */
7 
8 #include <common.h>
9 #include <dm.h>
10 #include <dt-structs.h>
11 #include <linux/libfdt.h>
12 #include <malloc.h>
13 #include <mapmem.h>
14 #include <sdhci.h>
15 #include <clk.h>
16 
17 /* 400KHz is max freq for card ID etc. Use that as min */
18 #define EMMC_MIN_FREQ	400000
19 
20 struct aspeed_sdhci_plat {
21 	struct mmc_config cfg;
22 	struct mmc mmc;
23 	unsigned int f_max;
24 };
25 
26 struct aspeed_sdhci_priv {
27 	struct sdhci_host *host;
28 	struct clk clk;
29 };
30 
31 static int aspeed_sdhci_probe(struct udevice *dev)
32 {
33 	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
34 	struct aspeed_sdhci_plat *plat = dev_get_platdata(dev);
35 	struct aspeed_sdhci_priv *prv = dev_get_priv(dev);
36 	int node = dev_of_offset(dev);
37 	struct sdhci_host *host = prv->host;
38 	unsigned long clock;
39 	struct clk clk;
40 	int ret;
41 
42 	ret = clk_get_by_index(dev, 0, &clk);
43 	if (ret < 0) {
44 		pr_debug("%s: Can't get clock for %s: %d\n", __func__, dev->name,
45 		      ret);
46 	}
47 
48 	clock = clk_get_rate(&clk);
49 	if (IS_ERR_VALUE(clock)) {
50 		dev_err(dev, "failed to get clock\n");
51 		return ret;
52 	}
53 
54 	debug("%s: CLK %ld\n", __func__, clock);
55 
56 	gpio_request_by_name_nodev(offset_to_ofnode(node), "pwr-gpios", 0,
57 				   &host->pwr_gpio, GPIOD_IS_OUT);
58 	gpio_request_by_name_nodev(offset_to_ofnode(node), "pwr-sw-gpios", 0,
59 				   &host->pwr_sw_gpio, GPIOD_IS_OUT);
60 
61 	if (dm_gpio_is_valid(&host->pwr_gpio)) {
62 		dm_gpio_set_value(&host->pwr_gpio, 1);
63 		if (ret) {
64 			debug("MMC not configured\n");
65 			return ret;
66 		}
67 	}
68 
69 //	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
70 	host->max_clk = clock;
71 
72 	host->bus_width = dev_read_u32_default(dev, "bus-width", 4);
73 
74 	if (host->bus_width == 8)
75 		host->host_caps |= MMC_MODE_8BIT;
76 
77 	ret = sdhci_setup_cfg(&plat->cfg, host, host->max_clk, EMMC_MIN_FREQ);
78 
79 	host->mmc = &plat->mmc;
80 	if (ret)
81 		return ret;
82 	host->mmc->priv = host;
83 	host->mmc->dev = dev;
84 	upriv->mmc = host->mmc;
85 
86 	return sdhci_probe(dev);
87 }
88 
89 static int aspeed_sdhci_ofdata_to_platdata(struct udevice *dev)
90 {
91 	struct aspeed_sdhci_priv *priv = dev_get_priv(dev);
92 
93 	priv->host = calloc(1, sizeof(struct sdhci_host));
94 	if (!priv->host)
95 			return -1;
96 
97 	priv->host->name = dev->name;
98 	priv->host->ioaddr = (void *)dev_read_addr(dev);
99 
100 	return 0;
101 }
102 
103 static int aspeed_sdhci_bind(struct udevice *dev)
104 {
105 	struct aspeed_sdhci_plat *plat = dev_get_platdata(dev);
106 
107 	return sdhci_bind(dev, &plat->mmc, &plat->cfg);
108 }
109 
110 static const struct udevice_id aspeed_sdhci_ids[] = {
111 	{ .compatible = "aspeed,sdhci-ast2500" },
112 	{ .compatible = "aspeed,sdhci-ast2600" },
113 	{ .compatible = "aspeed,emmc-ast2600" },
114 	{ }
115 };
116 
117 U_BOOT_DRIVER(aspeed_sdhci_drv) = {
118 	.name		= "aspeed_sdhci",
119 	.id		= UCLASS_MMC,
120 	.of_match	= aspeed_sdhci_ids,
121 	.ofdata_to_platdata = aspeed_sdhci_ofdata_to_platdata,
122 	.ops		= &sdhci_ops,
123 	.bind		= aspeed_sdhci_bind,
124 	.probe		= aspeed_sdhci_probe,
125 	.priv_auto_alloc_size = sizeof(struct aspeed_sdhci_priv),
126 	.platdata_auto_alloc_size = sizeof(struct aspeed_sdhci_plat),
127 };
128