1 /* 2 * Copyright 2008 Extreme Engineering Solutions, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #ifndef __DS4510_H_ 8 #define __DS4510_H_ 9 10 /* General defines */ 11 #define DS4510_NUM_IO 0x04 12 #define DS4510_IO_MASK ((1 << DS4510_NUM_IO) - 1) 13 #define DS4510_EEPROM_PAGE_WRITE_DELAY_MS 20 14 15 /* EEPROM from 0x00 - 0x39 */ 16 #define DS4510_EEPROM 0x00 17 #define DS4510_EEPROM_SIZE 0x40 18 #define DS4510_EEPROM_PAGE_SIZE 0x08 19 #define DS4510_EEPROM_PAGE_OFFSET(x) ((x) & (DS4510_EEPROM_PAGE_SIZE - 1)) 20 21 /* SEEPROM from 0xf0 - 0xf7 */ 22 #define DS4510_SEEPROM 0xf0 23 #define DS4510_SEEPROM_SIZE 0x08 24 25 /* Registers overlapping SEEPROM from 0xf0 - 0xf7 */ 26 #define DS4510_PULLUP 0xF0 27 #define DS4510_PULLUP_DIS 0x00 28 #define DS4510_PULLUP_EN 0x01 29 #define DS4510_RSTDELAY 0xF1 30 #define DS4510_RSTDELAY_MASK 0x03 31 #define DS4510_RSTDELAY_125 0x00 32 #define DS4510_RSTDELAY_250 0x01 33 #define DS4510_RSTDELAY_500 0x02 34 #define DS4510_RSTDELAY_1000 0x03 35 #define DS4510_IO3 0xF4 36 #define DS4510_IO2 0xF5 37 #define DS4510_IO1 0xF6 38 #define DS4510_IO0 0xF7 39 40 /* Status configuration registers from 0xf8 - 0xf9*/ 41 #define DS4510_IO_STATUS 0xF8 42 #define DS4510_CFG 0xF9 43 #define DS4510_CFG_READY 0x80 44 #define DS4510_CFG_TRIP_POINT 0x40 45 #define DS4510_CFG_RESET 0x20 46 #define DS4510_CFG_SEE 0x10 47 #define DS4510_CFG_SWRST 0x08 48 49 /* SRAM from 0xfa - 0xff */ 50 #define DS4510_SRAM 0xfa 51 #define DS4510_SRAM_SIZE 0x06 52 53 #endif /* __DS4510_H_ */ 54