1# 2# Multifunction miscellaneous devices 3# 4 5menu "Multifunction device drivers" 6 7config MISC 8 bool "Enable Driver Model for Misc drivers" 9 depends on DM 10 help 11 Enable driver model for miscellaneous devices. This class is 12 used only for those do not fit other more general classes. A 13 set of generic read, write and ioctl methods may be used to 14 access the device. 15 16config ALTERA_SYSID 17 bool "Altera Sysid support" 18 depends on MISC 19 help 20 Select this to enable a sysid for Altera devices. Please find 21 details on the "Embedded Peripherals IP User Guide" of Altera. 22 23config CMD_CROS_EC 24 bool "Enable crosec command" 25 depends on CROS_EC 26 help 27 Enable command-line access to the Chrome OS EC (Embedded 28 Controller). This provides the 'crosec' command which has 29 a number of sub-commands for performing EC tasks such as 30 updating its flash, accessing a small saved context area 31 and talking to the I2C bus behind the EC (if there is one). 32 33config CROS_EC 34 bool "Enable Chrome OS EC" 35 help 36 Enable access to the Chrome OS EC. This is a separate 37 microcontroller typically available on a SPI bus on Chromebooks. It 38 provides access to the keyboard, some internal storage and may 39 control access to the battery and main PMIC depending on the 40 device. You can use the 'crosec' command to access it. 41 42config CROS_EC_I2C 43 bool "Enable Chrome OS EC I2C driver" 44 depends on CROS_EC 45 help 46 Enable I2C access to the Chrome OS EC. This is used on older 47 ARM Chromebooks such as snow and spring before the standard bus 48 changed to SPI. The EC will accept commands across the I2C using 49 a special message protocol, and provide responses. 50 51config CROS_EC_LPC 52 bool "Enable Chrome OS EC LPC driver" 53 depends on CROS_EC 54 help 55 Enable I2C access to the Chrome OS EC. This is used on x86 56 Chromebooks such as link and falco. The keyboard is provided 57 through a legacy port interface, so on x86 machines the main 58 function of the EC is power and thermal management. 59 60config CROS_EC_SANDBOX 61 bool "Enable Chrome OS EC sandbox driver" 62 depends on CROS_EC && SANDBOX 63 help 64 Enable a sandbox emulation of the Chrome OS EC. This supports 65 keyboard (use the -l flag to enable the LCD), verified boot context, 66 EC flash read/write/erase support and a few other things. It is 67 enough to perform a Chrome OS verified boot on sandbox. 68 69config CROS_EC_SPI 70 bool "Enable Chrome OS EC SPI driver" 71 depends on CROS_EC 72 help 73 Enable SPI access to the Chrome OS EC. This is used on newer 74 ARM Chromebooks such as pit, pi and nyan-big. The SPI interface 75 provides a faster and more robust interface than I2C but the bugs 76 are less interesting. 77 78config FSL_SEC_MON 79 bool "Enable FSL SEC_MON Driver" 80 help 81 Freescale Security Monitor block is responsible for monitoring 82 system states. 83 Security Monitor can be transitioned on any security failures, 84 like software violations or hardware security violations. 85 86config MXC_OCOTP 87 bool "Enable MXC OCOTP Driver" 88 help 89 If you say Y here, you will get support for the One Time 90 Programmable memory pages that are stored on the some 91 Freescale i.MX processors. 92 93config NUVOTON_NCT6102D 94 bool "Enable Nuvoton NCT6102D Super I/O driver" 95 help 96 If you say Y here, you will get support for the Nuvoton 97 NCT6102D Super I/O driver. This can be used to enable or 98 disable the legacy UART, the watchdog or other devices 99 in the Nuvoton Super IO chips on X86 platforms. 100 101config PWRSEQ 102 bool "Enable power-sequencing drivers" 103 depends on DM 104 help 105 Power-sequencing drivers provide support for controlling power for 106 devices. They are typically referenced by a phandle from another 107 device. When the device is started up, its power sequence can be 108 initiated. 109 110config SPL_PWRSEQ 111 bool "Enable power-sequencing drivers for SPL" 112 depends on PWRSEQ 113 help 114 Power-sequencing drivers provide support for controlling power for 115 devices. They are typically referenced by a phandle from another 116 device. When the device is started up, its power sequence can be 117 initiated. 118 119config PCA9551_LED 120 bool "Enable PCA9551 LED driver" 121 help 122 Enable driver for PCA9551 LED controller. This controller 123 is connected via I2C. So I2C needs to be enabled. 124 125config PCA9551_I2C_ADDR 126 hex "I2C address of PCA9551 LED controller" 127 depends on PCA9551_LED 128 default 0x60 129 help 130 The I2C address of the PCA9551 LED controller. 131 132config TEGRA_CAR 133 bool "Enable support for the Tegra CAR driver" 134 depends on TEGRA_NO_BPMP 135 help 136 The Tegra CAR (Clock and Reset Controller) is a HW module that 137 controls almost all clocks and resets in a Tegra SoC. 138 139config TEGRA186_BPMP 140 bool "Enable support for the Tegra186 BPMP driver" 141 depends on TEGRA186 142 help 143 The Tegra BPMP (Boot and Power Management Processor) is a separate 144 auxiliary CPU embedded into Tegra to perform power management work, 145 and controls related features such as clocks, resets, power domains, 146 PMIC I2C bus, etc. This driver provides the core low-level 147 communication path by which feature-specific drivers (such as clock) 148 can make requests to the BPMP. This driver is similar to an MFD 149 driver in the Linux kernel. 150 151config WINBOND_W83627 152 bool "Enable Winbond Super I/O driver" 153 help 154 If you say Y here, you will get support for the Winbond 155 W83627 Super I/O driver. This can be used to enable the 156 legacy UART or other devices in the Winbond Super IO chips 157 on X86 platforms. 158 159config QFW 160 bool 161 help 162 Hidden option to enable QEMU fw_cfg interface. This will be selected by 163 either CONFIG_CMD_QFW or CONFIG_GENERATE_ACPI_TABLE. 164 165config I2C_EEPROM 166 bool "Enable driver for generic I2C-attached EEPROMs" 167 depends on MISC 168 help 169 Enable a generic driver for EEPROMs attached via I2C. 170endmenu 171