1# 2# Multifunction miscellaneous devices 3# 4 5menu "Multifunction device drivers" 6 7config MISC 8 bool "Enable Driver Model for Misc drivers" 9 depends on DM 10 help 11 Enable driver model for miscellaneous devices. This class is 12 used only for those do not fit other more general classes. A 13 set of generic read, write and ioctl methods may be used to 14 access the device. 15 16config ALTERA_SYSID 17 bool "Altera Sysid support" 18 depends on MISC 19 help 20 Select this to enable a sysid for Altera devices. Please find 21 details on the "Embedded Peripherals IP User Guide" of Altera. 22 23config ROCKCHIP_EFUSE 24 bool "Rockchip e-fuse support" 25 depends on MISC 26 help 27 Enable (read-only) access for the e-fuse block found in Rockchip 28 SoCs: accesses can either be made using byte addressing and a length 29 or through child-nodes that are generated based on the e-fuse map 30 retrieved from the DTS. 31 32 This driver currently supports the RK3399 only, but can easily be 33 extended (by porting the read function from the Linux kernel sources) 34 to support other recent Rockchip devices. 35 36config CMD_CROS_EC 37 bool "Enable crosec command" 38 depends on CROS_EC 39 help 40 Enable command-line access to the Chrome OS EC (Embedded 41 Controller). This provides the 'crosec' command which has 42 a number of sub-commands for performing EC tasks such as 43 updating its flash, accessing a small saved context area 44 and talking to the I2C bus behind the EC (if there is one). 45 46config CROS_EC 47 bool "Enable Chrome OS EC" 48 help 49 Enable access to the Chrome OS EC. This is a separate 50 microcontroller typically available on a SPI bus on Chromebooks. It 51 provides access to the keyboard, some internal storage and may 52 control access to the battery and main PMIC depending on the 53 device. You can use the 'crosec' command to access it. 54 55config CROS_EC_I2C 56 bool "Enable Chrome OS EC I2C driver" 57 depends on CROS_EC 58 help 59 Enable I2C access to the Chrome OS EC. This is used on older 60 ARM Chromebooks such as snow and spring before the standard bus 61 changed to SPI. The EC will accept commands across the I2C using 62 a special message protocol, and provide responses. 63 64config CROS_EC_LPC 65 bool "Enable Chrome OS EC LPC driver" 66 depends on CROS_EC 67 help 68 Enable I2C access to the Chrome OS EC. This is used on x86 69 Chromebooks such as link and falco. The keyboard is provided 70 through a legacy port interface, so on x86 machines the main 71 function of the EC is power and thermal management. 72 73config CROS_EC_SANDBOX 74 bool "Enable Chrome OS EC sandbox driver" 75 depends on CROS_EC && SANDBOX 76 help 77 Enable a sandbox emulation of the Chrome OS EC. This supports 78 keyboard (use the -l flag to enable the LCD), verified boot context, 79 EC flash read/write/erase support and a few other things. It is 80 enough to perform a Chrome OS verified boot on sandbox. 81 82config CROS_EC_SPI 83 bool "Enable Chrome OS EC SPI driver" 84 depends on CROS_EC 85 help 86 Enable SPI access to the Chrome OS EC. This is used on newer 87 ARM Chromebooks such as pit, pi and nyan-big. The SPI interface 88 provides a faster and more robust interface than I2C but the bugs 89 are less interesting. 90 91config DS4510 92 bool "Enable support for DS4510 CPU supervisor" 93 help 94 Enable support for the Maxim DS4510 CPU supervisor. It has an 95 integrated 64-byte EEPROM, four programmable non-volatile I/O pins 96 and a configurable timer for the supervisor function. The device is 97 connected over I2C. 98 99config FSL_SEC_MON 100 bool "Enable FSL SEC_MON Driver" 101 help 102 Freescale Security Monitor block is responsible for monitoring 103 system states. 104 Security Monitor can be transitioned on any security failures, 105 like software violations or hardware security violations. 106 107config MXC_OCOTP 108 bool "Enable MXC OCOTP Driver" 109 help 110 If you say Y here, you will get support for the One Time 111 Programmable memory pages that are stored on the some 112 Freescale i.MX processors. 113 114config NUVOTON_NCT6102D 115 bool "Enable Nuvoton NCT6102D Super I/O driver" 116 help 117 If you say Y here, you will get support for the Nuvoton 118 NCT6102D Super I/O driver. This can be used to enable or 119 disable the legacy UART, the watchdog or other devices 120 in the Nuvoton Super IO chips on X86 platforms. 121 122config PWRSEQ 123 bool "Enable power-sequencing drivers" 124 depends on DM 125 help 126 Power-sequencing drivers provide support for controlling power for 127 devices. They are typically referenced by a phandle from another 128 device. When the device is started up, its power sequence can be 129 initiated. 130 131config SPL_PWRSEQ 132 bool "Enable power-sequencing drivers for SPL" 133 depends on PWRSEQ 134 help 135 Power-sequencing drivers provide support for controlling power for 136 devices. They are typically referenced by a phandle from another 137 device. When the device is started up, its power sequence can be 138 initiated. 139 140config PCA9551_LED 141 bool "Enable PCA9551 LED driver" 142 help 143 Enable driver for PCA9551 LED controller. This controller 144 is connected via I2C. So I2C needs to be enabled. 145 146config PCA9551_I2C_ADDR 147 hex "I2C address of PCA9551 LED controller" 148 depends on PCA9551_LED 149 default 0x60 150 help 151 The I2C address of the PCA9551 LED controller. 152 153config TEGRA_CAR 154 bool "Enable support for the Tegra CAR driver" 155 depends on TEGRA_NO_BPMP 156 help 157 The Tegra CAR (Clock and Reset Controller) is a HW module that 158 controls almost all clocks and resets in a Tegra SoC. 159 160config TEGRA186_BPMP 161 bool "Enable support for the Tegra186 BPMP driver" 162 depends on TEGRA186 163 help 164 The Tegra BPMP (Boot and Power Management Processor) is a separate 165 auxiliary CPU embedded into Tegra to perform power management work, 166 and controls related features such as clocks, resets, power domains, 167 PMIC I2C bus, etc. This driver provides the core low-level 168 communication path by which feature-specific drivers (such as clock) 169 can make requests to the BPMP. This driver is similar to an MFD 170 driver in the Linux kernel. 171 172config WINBOND_W83627 173 bool "Enable Winbond Super I/O driver" 174 help 175 If you say Y here, you will get support for the Winbond 176 W83627 Super I/O driver. This can be used to enable the 177 legacy UART or other devices in the Winbond Super IO chips 178 on X86 platforms. 179 180config QFW 181 bool 182 help 183 Hidden option to enable QEMU fw_cfg interface. This will be selected by 184 either CONFIG_CMD_QFW or CONFIG_GENERATE_ACPI_TABLE. 185 186config I2C_EEPROM 187 bool "Enable driver for generic I2C-attached EEPROMs" 188 depends on MISC 189 help 190 Enable a generic driver for EEPROMs attached via I2C. 191endmenu 192